2 * mxl5007t.c - driver for the MaxLinear MxL5007T silicon tuner
4 * Copyright (C) 2008, 2009 Michael Krufky <mkrufky@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include <linux/i2c.h>
22 #include <linux/types.h>
23 #include <linux/videodev2.h>
24 #include "tuner-i2c.h"
27 static DEFINE_MUTEX(mxl5007t_list_mutex);
28 static LIST_HEAD(hybrid_tuner_instance_list);
30 static int mxl5007t_debug;
31 module_param_named(debug, mxl5007t_debug, int, 0644);
32 MODULE_PARM_DESC(debug, "set debug level");
34 /* ------------------------------------------------------------------------- */
36 #define mxl_printk(kern, fmt, arg...) \
37 printk(kern "%s: " fmt "\n", __func__, ##arg)
39 #define mxl_err(fmt, arg...) \
40 mxl_printk(KERN_ERR, "%d: " fmt, __LINE__, ##arg)
42 #define mxl_warn(fmt, arg...) \
43 mxl_printk(KERN_WARNING, fmt, ##arg)
45 #define mxl_info(fmt, arg...) \
46 mxl_printk(KERN_INFO, fmt, ##arg)
48 #define mxl_debug(fmt, arg...) \
51 mxl_printk(KERN_DEBUG, fmt, ##arg); \
54 #define mxl_fail(ret) \
59 mxl_printk(KERN_ERR, "error %d on line %d", \
64 /* ------------------------------------------------------------------------- */
72 MxL_MODE_CABLE = 0x10,
75 enum mxl5007t_chip_version {
76 MxL_UNKNOWN_ID = 0x00,
77 MxL_5007_V1_F1 = 0x11,
78 MxL_5007_V1_F2 = 0x12,
80 MxL_5007_V2_100_F1 = 0x21,
81 MxL_5007_V2_100_F2 = 0x22,
82 MxL_5007_V2_200_F1 = 0x23,
83 MxL_5007_V2_200_F2 = 0x24,
91 /* ------------------------------------------------------------------------- */
93 static struct reg_pair_t init_tab[] = {
98 { 0x2e, 0x15 }, /* OVERRIDE */
99 { 0x30, 0x10 }, /* OVERRIDE */
100 { 0x45, 0x58 }, /* OVERRIDE */
101 { 0x48, 0x19 }, /* OVERRIDE */
102 { 0x52, 0x03 }, /* OVERRIDE */
103 { 0x53, 0x44 }, /* OVERRIDE */
104 { 0x6a, 0x4b }, /* OVERRIDE */
105 { 0x76, 0x00 }, /* OVERRIDE */
106 { 0x78, 0x18 }, /* OVERRIDE */
107 { 0x7a, 0x17 }, /* OVERRIDE */
108 { 0x85, 0x06 }, /* OVERRIDE */
109 { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
113 static struct reg_pair_t init_tab_cable[] = {
121 { 0x2e, 0x15 }, /* OVERRIDE */
122 { 0x30, 0x10 }, /* OVERRIDE */
123 { 0x45, 0x58 }, /* OVERRIDE */
124 { 0x48, 0x19 }, /* OVERRIDE */
125 { 0x52, 0x03 }, /* OVERRIDE */
126 { 0x53, 0x44 }, /* OVERRIDE */
127 { 0x6a, 0x4b }, /* OVERRIDE */
128 { 0x76, 0x00 }, /* OVERRIDE */
129 { 0x78, 0x18 }, /* OVERRIDE */
130 { 0x7a, 0x17 }, /* OVERRIDE */
131 { 0x85, 0x06 }, /* OVERRIDE */
132 { 0x01, 0x01 }, /* TOP_MASTER_ENABLE */
136 /* ------------------------------------------------------------------------- */
138 static struct reg_pair_t reg_pair_rftune[] = {
139 { 0x0f, 0x00 }, /* abort tune */
143 { 0x1f, 0x87 }, /* OVERRIDE */
144 { 0x20, 0x1f }, /* OVERRIDE */
145 { 0x21, 0x87 }, /* OVERRIDE */
146 { 0x22, 0x1f }, /* OVERRIDE */
147 { 0x80, 0x01 }, /* freq dependent */
148 { 0x0f, 0x01 }, /* start tune */
152 /* ------------------------------------------------------------------------- */
154 struct mxl5007t_state {
155 struct list_head hybrid_tuner_instance_list;
156 struct tuner_i2c_props i2c_props;
160 struct mxl5007t_config *config;
162 enum mxl5007t_chip_version chip_id;
164 struct reg_pair_t tab_init[ARRAY_SIZE(init_tab)];
165 struct reg_pair_t tab_init_cable[ARRAY_SIZE(init_tab_cable)];
166 struct reg_pair_t tab_rftune[ARRAY_SIZE(reg_pair_rftune)];
172 /* ------------------------------------------------------------------------- */
174 /* called by _init and _rftun to manipulate the register arrays */
176 static void set_reg_bits(struct reg_pair_t *reg_pair, u8 reg, u8 mask, u8 val)
180 while (reg_pair[i].reg || reg_pair[i].val) {
181 if (reg_pair[i].reg == reg) {
182 reg_pair[i].val &= ~mask;
183 reg_pair[i].val |= val;
191 static void copy_reg_bits(struct reg_pair_t *reg_pair1,
192 struct reg_pair_t *reg_pair2)
198 while (reg_pair1[i].reg || reg_pair1[i].val) {
199 while (reg_pair2[j].reg || reg_pair2[j].reg) {
200 if (reg_pair1[i].reg != reg_pair2[j].reg) {
204 reg_pair2[j].val = reg_pair1[i].val;
212 /* ------------------------------------------------------------------------- */
214 static void mxl5007t_set_mode_bits(struct mxl5007t_state *state,
215 enum mxl5007t_mode mode,
216 s32 if_diff_out_level)
220 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x12);
223 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x11);
226 set_reg_bits(state->tab_init, 0x06, 0x1f, 0x10);
229 set_reg_bits(state->tab_init_cable, 0x09, 0xff, 0xc1);
230 set_reg_bits(state->tab_init_cable, 0x0a, 0xff,
231 8 - if_diff_out_level);
232 set_reg_bits(state->tab_init_cable, 0x0b, 0xff, 0x17);
240 static void mxl5007t_set_if_freq_bits(struct mxl5007t_state *state,
241 enum mxl5007t_if_freq if_freq,
253 case MxL_IF_4_57_MHZ:
259 case MxL_IF_5_38_MHZ:
265 case MxL_IF_6_28_MHZ:
268 case MxL_IF_9_1915_MHZ:
271 case MxL_IF_35_25_MHZ:
274 case MxL_IF_36_15_MHZ:
284 set_reg_bits(state->tab_init, 0x02, 0x0f, val);
286 /* set inverted IF or normal IF */
287 set_reg_bits(state->tab_init, 0x02, 0x10, invert_if ? 0x10 : 0x00);
292 static void mxl5007t_set_xtal_freq_bits(struct mxl5007t_state *state,
293 enum mxl5007t_xtal_freq xtal_freq)
296 case MxL_XTAL_16_MHZ:
297 /* select xtal freq & ref freq */
298 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x00);
299 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x00);
301 case MxL_XTAL_20_MHZ:
302 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x10);
303 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x01);
305 case MxL_XTAL_20_25_MHZ:
306 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x20);
307 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x02);
309 case MxL_XTAL_20_48_MHZ:
310 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x30);
311 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x03);
313 case MxL_XTAL_24_MHZ:
314 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x40);
315 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x04);
317 case MxL_XTAL_25_MHZ:
318 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x50);
319 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x05);
321 case MxL_XTAL_25_14_MHZ:
322 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x60);
323 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x06);
325 case MxL_XTAL_27_MHZ:
326 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x70);
327 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x07);
329 case MxL_XTAL_28_8_MHZ:
330 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x80);
331 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x08);
333 case MxL_XTAL_32_MHZ:
334 set_reg_bits(state->tab_init, 0x03, 0xf0, 0x90);
335 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x09);
337 case MxL_XTAL_40_MHZ:
338 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xa0);
339 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0a);
341 case MxL_XTAL_44_MHZ:
342 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xb0);
343 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0b);
345 case MxL_XTAL_48_MHZ:
346 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xc0);
347 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0c);
349 case MxL_XTAL_49_3811_MHZ:
350 set_reg_bits(state->tab_init, 0x03, 0xf0, 0xd0);
351 set_reg_bits(state->tab_init, 0x05, 0x0f, 0x0d);
361 static struct reg_pair_t *mxl5007t_calc_init_regs(struct mxl5007t_state *state,
362 enum mxl5007t_mode mode)
364 struct mxl5007t_config *cfg = state->config;
366 memcpy(&state->tab_init, &init_tab, sizeof(init_tab));
367 memcpy(&state->tab_init_cable, &init_tab_cable, sizeof(init_tab_cable));
369 mxl5007t_set_mode_bits(state, mode, cfg->if_diff_out_level);
370 mxl5007t_set_if_freq_bits(state, cfg->if_freq_hz, cfg->invert_if);
371 mxl5007t_set_xtal_freq_bits(state, cfg->xtal_freq_hz);
373 set_reg_bits(state->tab_init, 0x04, 0x01, cfg->loop_thru_enable);
374 set_reg_bits(state->tab_init, 0x03, 0x08, cfg->clk_out_enable << 3);
375 set_reg_bits(state->tab_init, 0x03, 0x07, cfg->clk_out_amp);
377 if (mode >= MxL_MODE_CABLE) {
378 copy_reg_bits(state->tab_init, state->tab_init_cable);
379 return state->tab_init_cable;
381 return state->tab_init;
384 /* ------------------------------------------------------------------------- */
386 enum mxl5007t_bw_mhz {
392 static void mxl5007t_set_bw_bits(struct mxl5007t_state *state,
393 enum mxl5007t_bw_mhz bw)
399 val = 0x15; /* set DIG_MODEINDEX, DIG_MODEINDEX_A,
400 * and DIG_MODEINDEX_CSF */
412 set_reg_bits(state->tab_rftune, 0x0c, 0x3f, val);
418 reg_pair_t *mxl5007t_calc_rf_tune_regs(struct mxl5007t_state *state,
419 u32 rf_freq, enum mxl5007t_bw_mhz bw)
423 u32 frac_divider = 1000000;
426 memcpy(&state->tab_rftune, ®_pair_rftune, sizeof(reg_pair_rftune));
428 mxl5007t_set_bw_bits(state, bw);
430 /* Convert RF frequency into 16 bits =>
431 * 10 bit integer (MHz) + 6 bit fraction */
432 dig_rf_freq = rf_freq / MHz;
434 temp = rf_freq % MHz;
436 for (i = 0; i < 6; i++) {
439 if (temp > frac_divider) {
440 temp -= frac_divider;
445 /* add to have shift center point by 7.8124 kHz */
449 set_reg_bits(state->tab_rftune, 0x0d, 0xff, (u8) dig_rf_freq);
450 set_reg_bits(state->tab_rftune, 0x0e, 0xff, (u8) (dig_rf_freq >> 8));
452 if (rf_freq >= 333000000)
453 set_reg_bits(state->tab_rftune, 0x80, 0x40, 0x40);
455 return state->tab_rftune;
458 /* ------------------------------------------------------------------------- */
460 static int mxl5007t_write_reg(struct mxl5007t_state *state, u8 reg, u8 val)
462 u8 buf[] = { reg, val };
463 struct i2c_msg msg = { .addr = state->i2c_props.addr, .flags = 0,
464 .buf = buf, .len = 2 };
467 ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
475 static int mxl5007t_write_regs(struct mxl5007t_state *state,
476 struct reg_pair_t *reg_pair)
481 while ((ret == 0) && (reg_pair[i].reg || reg_pair[i].val)) {
482 ret = mxl5007t_write_reg(state,
483 reg_pair[i].reg, reg_pair[i].val);
489 static int mxl5007t_read_reg(struct mxl5007t_state *state, u8 reg, u8 *val)
491 struct i2c_msg msg[] = {
492 { .addr = state->i2c_props.addr, .flags = 0,
493 .buf = ®, .len = 1 },
494 { .addr = state->i2c_props.addr, .flags = I2C_M_RD,
495 .buf = val, .len = 1 },
499 ret = i2c_transfer(state->i2c_props.adap, msg, 2);
507 static int mxl5007t_soft_reset(struct mxl5007t_state *state)
510 struct i2c_msg msg = {
511 .addr = state->i2c_props.addr, .flags = 0,
514 int ret = i2c_transfer(state->i2c_props.adap, &msg, 1);
523 static int mxl5007t_tuner_init(struct mxl5007t_state *state,
524 enum mxl5007t_mode mode)
526 struct reg_pair_t *init_regs;
529 ret = mxl5007t_soft_reset(state);
533 /* calculate initialization reg array */
534 init_regs = mxl5007t_calc_init_regs(state, mode);
536 ret = mxl5007t_write_regs(state, init_regs);
544 static int mxl5007t_tuner_rf_tune(struct mxl5007t_state *state, u32 rf_freq_hz,
545 enum mxl5007t_bw_mhz bw)
547 struct reg_pair_t *rf_tune_regs;
550 /* calculate channel change reg array */
551 rf_tune_regs = mxl5007t_calc_rf_tune_regs(state, rf_freq_hz, bw);
553 ret = mxl5007t_write_regs(state, rf_tune_regs);
561 /* ------------------------------------------------------------------------- */
563 static int mxl5007t_synth_lock_status(struct mxl5007t_state *state,
564 int *rf_locked, int *ref_locked)
572 ret = mxl5007t_read_reg(state, 0xd8, &d);
576 if ((d & 0x0c) == 0x0c)
579 if ((d & 0x03) == 0x03)
585 /* ------------------------------------------------------------------------- */
587 static int mxl5007t_get_status(struct dvb_frontend *fe, u32 *status)
589 struct mxl5007t_state *state = fe->tuner_priv;
590 int rf_locked, ref_locked, ret;
594 if (fe->ops.i2c_gate_ctrl)
595 fe->ops.i2c_gate_ctrl(fe, 1);
597 ret = mxl5007t_synth_lock_status(state, &rf_locked, &ref_locked);
600 mxl_debug("%s%s", rf_locked ? "rf locked " : "",
601 ref_locked ? "ref locked" : "");
603 if ((rf_locked) || (ref_locked))
604 *status |= TUNER_STATUS_LOCKED;
606 if (fe->ops.i2c_gate_ctrl)
607 fe->ops.i2c_gate_ctrl(fe, 0);
612 /* ------------------------------------------------------------------------- */
614 static int mxl5007t_set_params(struct dvb_frontend *fe,
615 struct dvb_frontend_parameters *params)
617 struct mxl5007t_state *state = fe->tuner_priv;
618 enum mxl5007t_bw_mhz bw;
619 enum mxl5007t_mode mode;
621 u32 freq = params->frequency;
623 if (fe->ops.info.type == FE_ATSC) {
624 switch (params->u.vsb.modulation) {
627 mode = MxL_MODE_ATSC;
631 mode = MxL_MODE_CABLE;
634 mxl_err("modulation not set!");
638 } else if (fe->ops.info.type == FE_OFDM) {
639 switch (params->u.ofdm.bandwidth) {
640 case BANDWIDTH_6_MHZ:
643 case BANDWIDTH_7_MHZ:
646 case BANDWIDTH_8_MHZ:
650 mxl_err("bandwidth not set!");
653 mode = MxL_MODE_DVBT;
655 mxl_err("modulation type not supported!");
659 if (fe->ops.i2c_gate_ctrl)
660 fe->ops.i2c_gate_ctrl(fe, 1);
662 mutex_lock(&state->lock);
664 ret = mxl5007t_tuner_init(state, mode);
668 ret = mxl5007t_tuner_rf_tune(state, freq, bw);
672 state->frequency = freq;
673 state->bandwidth = (fe->ops.info.type == FE_OFDM) ?
674 params->u.ofdm.bandwidth : 0;
676 mutex_unlock(&state->lock);
678 if (fe->ops.i2c_gate_ctrl)
679 fe->ops.i2c_gate_ctrl(fe, 0);
684 /* ------------------------------------------------------------------------- */
686 static int mxl5007t_init(struct dvb_frontend *fe)
688 struct mxl5007t_state *state = fe->tuner_priv;
691 if (fe->ops.i2c_gate_ctrl)
692 fe->ops.i2c_gate_ctrl(fe, 1);
694 /* wake from standby */
695 ret = mxl5007t_write_reg(state, 0x01, 0x01);
698 if (fe->ops.i2c_gate_ctrl)
699 fe->ops.i2c_gate_ctrl(fe, 0);
704 static int mxl5007t_sleep(struct dvb_frontend *fe)
706 struct mxl5007t_state *state = fe->tuner_priv;
709 if (fe->ops.i2c_gate_ctrl)
710 fe->ops.i2c_gate_ctrl(fe, 1);
712 /* enter standby mode */
713 ret = mxl5007t_write_reg(state, 0x01, 0x00);
715 ret = mxl5007t_write_reg(state, 0x0f, 0x00);
718 if (fe->ops.i2c_gate_ctrl)
719 fe->ops.i2c_gate_ctrl(fe, 0);
724 /* ------------------------------------------------------------------------- */
726 static int mxl5007t_get_frequency(struct dvb_frontend *fe, u32 *frequency)
728 struct mxl5007t_state *state = fe->tuner_priv;
729 *frequency = state->frequency;
733 static int mxl5007t_get_bandwidth(struct dvb_frontend *fe, u32 *bandwidth)
735 struct mxl5007t_state *state = fe->tuner_priv;
736 *bandwidth = state->bandwidth;
740 static int mxl5007t_release(struct dvb_frontend *fe)
742 struct mxl5007t_state *state = fe->tuner_priv;
744 mutex_lock(&mxl5007t_list_mutex);
747 hybrid_tuner_release_state(state);
749 mutex_unlock(&mxl5007t_list_mutex);
751 fe->tuner_priv = NULL;
756 /* ------------------------------------------------------------------------- */
758 static struct dvb_tuner_ops mxl5007t_tuner_ops = {
760 .name = "MaxLinear MxL5007T",
762 .init = mxl5007t_init,
763 .sleep = mxl5007t_sleep,
764 .set_params = mxl5007t_set_params,
765 .get_status = mxl5007t_get_status,
766 .get_frequency = mxl5007t_get_frequency,
767 .get_bandwidth = mxl5007t_get_bandwidth,
768 .release = mxl5007t_release,
771 static int mxl5007t_get_chip_id(struct mxl5007t_state *state)
777 ret = mxl5007t_read_reg(state, 0xd9, &id);
783 name = "MxL5007.v1.f1";
786 name = "MxL5007.v1.f2";
788 case MxL_5007_V2_100_F1:
789 name = "MxL5007.v2.100.f1";
791 case MxL_5007_V2_100_F2:
792 name = "MxL5007.v2.100.f2";
794 case MxL_5007_V2_200_F1:
795 name = "MxL5007.v2.200.f1";
797 case MxL_5007_V2_200_F2:
798 name = "MxL5007.v2.200.f2";
801 name = "MxL5007T.v4";
805 printk(KERN_WARNING "%s: unknown rev (%02x)\n", __func__, id);
809 mxl_info("%s detected @ %d-%04x", name,
810 i2c_adapter_id(state->i2c_props.adap),
811 state->i2c_props.addr);
814 mxl_warn("unable to identify device @ %d-%04x",
815 i2c_adapter_id(state->i2c_props.adap),
816 state->i2c_props.addr);
818 state->chip_id = MxL_UNKNOWN_ID;
822 struct dvb_frontend *mxl5007t_attach(struct dvb_frontend *fe,
823 struct i2c_adapter *i2c, u8 addr,
824 struct mxl5007t_config *cfg)
826 struct mxl5007t_state *state = NULL;
829 mutex_lock(&mxl5007t_list_mutex);
830 instance = hybrid_tuner_request_state(struct mxl5007t_state, state,
831 hybrid_tuner_instance_list,
832 i2c, addr, "mxl5007t");
837 /* new tuner instance */
840 mutex_init(&state->lock);
842 if (fe->ops.i2c_gate_ctrl)
843 fe->ops.i2c_gate_ctrl(fe, 1);
845 ret = mxl5007t_get_chip_id(state);
847 if (fe->ops.i2c_gate_ctrl)
848 fe->ops.i2c_gate_ctrl(fe, 0);
850 /* check return value of mxl5007t_get_chip_id */
855 /* existing tuner instance */
858 fe->tuner_priv = state;
859 mutex_unlock(&mxl5007t_list_mutex);
861 memcpy(&fe->ops.tuner_ops, &mxl5007t_tuner_ops,
862 sizeof(struct dvb_tuner_ops));
866 mutex_unlock(&mxl5007t_list_mutex);
868 mxl5007t_release(fe);
871 EXPORT_SYMBOL_GPL(mxl5007t_attach);
872 MODULE_DESCRIPTION("MaxLinear MxL5007T Silicon IC tuner driver");
873 MODULE_AUTHOR("Michael Krufky <mkrufky@linuxtv.org>");
874 MODULE_LICENSE("GPL");
875 MODULE_VERSION("0.2");
878 * Overrides for Emacs so that we follow Linus's tabbing style.
879 * ---------------------------------------------------------------------------