2 tda18271-common.c - driver for the Philips / NXP TDA18271 silicon tuner
4 Copyright (C) 2007, 2008 Michael Krufky <mkrufky@linuxtv.org>
6 This program is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2 of the License, or
9 (at your option) any later version.
11 This program is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with this program; if not, write to the Free Software
18 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include "tda18271-priv.h"
23 static int tda18271_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
25 struct tda18271_priv *priv = fe->tuner_priv;
26 enum tda18271_i2c_gate gate;
30 case TDA18271_GATE_DIGITAL:
31 case TDA18271_GATE_ANALOG:
34 case TDA18271_GATE_AUTO:
37 case TDA18271_DIGITAL:
38 gate = TDA18271_GATE_DIGITAL;
42 gate = TDA18271_GATE_ANALOG;
48 case TDA18271_GATE_ANALOG:
49 if (fe->ops.analog_ops.i2c_gate_ctrl)
50 ret = fe->ops.analog_ops.i2c_gate_ctrl(fe, enable);
52 case TDA18271_GATE_DIGITAL:
53 if (fe->ops.i2c_gate_ctrl)
54 ret = fe->ops.i2c_gate_ctrl(fe, enable);
64 /*---------------------------------------------------------------------*/
66 static void tda18271_dump_regs(struct dvb_frontend *fe, int extended)
68 struct tda18271_priv *priv = fe->tuner_priv;
69 unsigned char *regs = priv->tda18271_regs;
71 tda_reg("=== TDA18271 REG DUMP ===\n");
72 tda_reg("ID_BYTE = 0x%02x\n", 0xff & regs[R_ID]);
73 tda_reg("THERMO_BYTE = 0x%02x\n", 0xff & regs[R_TM]);
74 tda_reg("POWER_LEVEL_BYTE = 0x%02x\n", 0xff & regs[R_PL]);
75 tda_reg("EASY_PROG_BYTE_1 = 0x%02x\n", 0xff & regs[R_EP1]);
76 tda_reg("EASY_PROG_BYTE_2 = 0x%02x\n", 0xff & regs[R_EP2]);
77 tda_reg("EASY_PROG_BYTE_3 = 0x%02x\n", 0xff & regs[R_EP3]);
78 tda_reg("EASY_PROG_BYTE_4 = 0x%02x\n", 0xff & regs[R_EP4]);
79 tda_reg("EASY_PROG_BYTE_5 = 0x%02x\n", 0xff & regs[R_EP5]);
80 tda_reg("CAL_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_CPD]);
81 tda_reg("CAL_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_CD1]);
82 tda_reg("CAL_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_CD2]);
83 tda_reg("CAL_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_CD3]);
84 tda_reg("MAIN_POST_DIV_BYTE = 0x%02x\n", 0xff & regs[R_MPD]);
85 tda_reg("MAIN_DIV_BYTE_1 = 0x%02x\n", 0xff & regs[R_MD1]);
86 tda_reg("MAIN_DIV_BYTE_2 = 0x%02x\n", 0xff & regs[R_MD2]);
87 tda_reg("MAIN_DIV_BYTE_3 = 0x%02x\n", 0xff & regs[R_MD3]);
89 /* only dump extended regs if DBG_ADV is set */
90 if (!(tda18271_debug & DBG_ADV))
93 /* W indicates write-only registers.
94 * Register dump for write-only registers shows last value written. */
96 tda_reg("EXTENDED_BYTE_1 = 0x%02x\n", 0xff & regs[R_EB1]);
97 tda_reg("EXTENDED_BYTE_2 = 0x%02x\n", 0xff & regs[R_EB2]);
98 tda_reg("EXTENDED_BYTE_3 = 0x%02x\n", 0xff & regs[R_EB3]);
99 tda_reg("EXTENDED_BYTE_4 = 0x%02x\n", 0xff & regs[R_EB4]);
100 tda_reg("EXTENDED_BYTE_5 = 0x%02x\n", 0xff & regs[R_EB5]);
101 tda_reg("EXTENDED_BYTE_6 = 0x%02x\n", 0xff & regs[R_EB6]);
102 tda_reg("EXTENDED_BYTE_7 = 0x%02x\n", 0xff & regs[R_EB7]);
103 tda_reg("EXTENDED_BYTE_8 = 0x%02x\n", 0xff & regs[R_EB8]);
104 tda_reg("EXTENDED_BYTE_9 W = 0x%02x\n", 0xff & regs[R_EB9]);
105 tda_reg("EXTENDED_BYTE_10 = 0x%02x\n", 0xff & regs[R_EB10]);
106 tda_reg("EXTENDED_BYTE_11 = 0x%02x\n", 0xff & regs[R_EB11]);
107 tda_reg("EXTENDED_BYTE_12 = 0x%02x\n", 0xff & regs[R_EB12]);
108 tda_reg("EXTENDED_BYTE_13 = 0x%02x\n", 0xff & regs[R_EB13]);
109 tda_reg("EXTENDED_BYTE_14 = 0x%02x\n", 0xff & regs[R_EB14]);
110 tda_reg("EXTENDED_BYTE_15 = 0x%02x\n", 0xff & regs[R_EB15]);
111 tda_reg("EXTENDED_BYTE_16 W = 0x%02x\n", 0xff & regs[R_EB16]);
112 tda_reg("EXTENDED_BYTE_17 W = 0x%02x\n", 0xff & regs[R_EB17]);
113 tda_reg("EXTENDED_BYTE_18 = 0x%02x\n", 0xff & regs[R_EB18]);
114 tda_reg("EXTENDED_BYTE_19 W = 0x%02x\n", 0xff & regs[R_EB19]);
115 tda_reg("EXTENDED_BYTE_20 W = 0x%02x\n", 0xff & regs[R_EB20]);
116 tda_reg("EXTENDED_BYTE_21 = 0x%02x\n", 0xff & regs[R_EB21]);
117 tda_reg("EXTENDED_BYTE_22 = 0x%02x\n", 0xff & regs[R_EB22]);
118 tda_reg("EXTENDED_BYTE_23 = 0x%02x\n", 0xff & regs[R_EB23]);
121 int tda18271_read_regs(struct dvb_frontend *fe)
123 struct tda18271_priv *priv = fe->tuner_priv;
124 unsigned char *regs = priv->tda18271_regs;
125 unsigned char buf = 0x00;
127 struct i2c_msg msg[] = {
128 { .addr = priv->i2c_props.addr, .flags = 0,
129 .buf = &buf, .len = 1 },
130 { .addr = priv->i2c_props.addr, .flags = I2C_M_RD,
131 .buf = regs, .len = 16 }
134 tda18271_i2c_gate_ctrl(fe, 1);
136 /* read all registers */
137 ret = i2c_transfer(priv->i2c_props.adap, msg, 2);
139 tda18271_i2c_gate_ctrl(fe, 0);
142 tda_err("ERROR: i2c_transfer returned: %d\n", ret);
144 if (tda18271_debug & DBG_REG)
145 tda18271_dump_regs(fe, 0);
147 return (ret == 2 ? 0 : ret);
150 int tda18271_read_extended(struct dvb_frontend *fe)
152 struct tda18271_priv *priv = fe->tuner_priv;
153 unsigned char *regs = priv->tda18271_regs;
154 unsigned char regdump[TDA18271_NUM_REGS];
155 unsigned char buf = 0x00;
157 struct i2c_msg msg[] = {
158 { .addr = priv->i2c_props.addr, .flags = 0,
159 .buf = &buf, .len = 1 },
160 { .addr = priv->i2c_props.addr, .flags = I2C_M_RD,
161 .buf = regdump, .len = TDA18271_NUM_REGS }
164 tda18271_i2c_gate_ctrl(fe, 1);
166 /* read all registers */
167 ret = i2c_transfer(priv->i2c_props.adap, msg, 2);
169 tda18271_i2c_gate_ctrl(fe, 0);
172 tda_err("ERROR: i2c_transfer returned: %d\n", ret);
174 for (i = 0; i < TDA18271_NUM_REGS; i++) {
175 /* don't update write-only registers */
181 regs[i] = regdump[i];
184 if (tda18271_debug & DBG_REG)
185 tda18271_dump_regs(fe, 1);
187 return (ret == 2 ? 0 : ret);
190 int tda18271_write_regs(struct dvb_frontend *fe, int idx, int len)
192 struct tda18271_priv *priv = fe->tuner_priv;
193 unsigned char *regs = priv->tda18271_regs;
194 unsigned char buf[TDA18271_NUM_REGS + 1];
195 struct i2c_msg msg = { .addr = priv->i2c_props.addr, .flags = 0,
196 .buf = buf, .len = len + 1 };
199 BUG_ON((len == 0) || (idx + len > sizeof(buf)));
202 for (i = 1; i <= len; i++)
203 buf[i] = regs[idx - 1 + i];
205 tda18271_i2c_gate_ctrl(fe, 1);
207 /* write registers */
208 ret = i2c_transfer(priv->i2c_props.adap, &msg, 1);
210 tda18271_i2c_gate_ctrl(fe, 0);
213 tda_err("ERROR: idx = 0x%x, len = %d, "
214 "i2c_transfer returned: %d\n", idx, len, ret);
216 return (ret == 1 ? 0 : ret);
219 /*---------------------------------------------------------------------*/
221 int tda18271_charge_pump_source(struct dvb_frontend *fe,
222 enum tda18271_pll pll, int force)
224 struct tda18271_priv *priv = fe->tuner_priv;
225 unsigned char *regs = priv->tda18271_regs;
227 int r_cp = (pll == TDA18271_CAL_PLL) ? R_EB7 : R_EB4;
230 regs[r_cp] |= ((force & 1) << 5);
232 return tda18271_write_regs(fe, r_cp, 1);
235 int tda18271_init_regs(struct dvb_frontend *fe)
237 struct tda18271_priv *priv = fe->tuner_priv;
238 unsigned char *regs = priv->tda18271_regs;
240 tda_dbg("initializing registers for device @ %d-%04x\n",
241 i2c_adapter_id(priv->i2c_props.adap),
242 priv->i2c_props.addr);
244 /* initialize registers */
329 switch (priv->small_i2c) {
330 case TDA18271_08_BYTE_CHUNK_INIT:
331 tda18271_write_regs(fe, 0x00, 0x08);
332 tda18271_write_regs(fe, 0x08, 0x08);
333 tda18271_write_regs(fe, 0x10, 0x08);
334 tda18271_write_regs(fe, 0x18, 0x08);
335 tda18271_write_regs(fe, 0x20, 0x07);
337 case TDA18271_16_BYTE_CHUNK_INIT:
338 tda18271_write_regs(fe, 0x00, 0x10);
339 tda18271_write_regs(fe, 0x10, 0x10);
340 tda18271_write_regs(fe, 0x20, 0x07);
342 case TDA18271_39_BYTE_CHUNK_INIT:
344 tda18271_write_regs(fe, 0x00, TDA18271_NUM_REGS);
348 /* setup agc1 gain */
350 tda18271_write_regs(fe, R_EB17, 1);
352 tda18271_write_regs(fe, R_EB17, 1);
354 tda18271_write_regs(fe, R_EB17, 1);
356 tda18271_write_regs(fe, R_EB17, 1);
358 /* setup agc2 gain */
359 if ((priv->id) == TDA18271HDC1) {
361 tda18271_write_regs(fe, R_EB20, 1);
363 tda18271_write_regs(fe, R_EB20, 1);
365 tda18271_write_regs(fe, R_EB20, 1);
367 tda18271_write_regs(fe, R_EB20, 1);
370 /* image rejection calibration */
385 tda18271_write_regs(fe, R_EP3, 11);
387 if ((priv->id) == TDA18271HDC2) {
388 /* main pll cp source on */
389 tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 1);
392 /* main pll cp source off */
393 tda18271_charge_pump_source(fe, TDA18271_MAIN_PLL, 0);
396 msleep(5); /* pll locking */
398 /* launch detector */
399 tda18271_write_regs(fe, R_EP1, 1);
400 msleep(5); /* wanted low measurement */
407 tda18271_write_regs(fe, R_EP3, 7);
408 msleep(5); /* pll locking */
410 /* launch optimization algorithm */
411 tda18271_write_regs(fe, R_EP2, 1);
412 msleep(30); /* image low optimization completion */
422 tda18271_write_regs(fe, R_EP3, 11);
423 msleep(5); /* pll locking */
425 /* launch detector */
426 tda18271_write_regs(fe, R_EP1, 1);
427 msleep(5); /* wanted mid measurement */
434 tda18271_write_regs(fe, R_EP3, 7);
435 msleep(5); /* pll locking */
437 /* launch optimization algorithm */
438 tda18271_write_regs(fe, R_EP2, 1);
439 msleep(30); /* image mid optimization completion */
450 tda18271_write_regs(fe, R_EP3, 11);
451 msleep(5); /* pll locking */
453 /* launch detector */
454 tda18271_write_regs(fe, R_EP1, 1);
455 msleep(5); /* wanted high measurement */
461 tda18271_write_regs(fe, R_EP3, 7);
462 msleep(5); /* pll locking */
464 /* launch optimization algorithm */
465 tda18271_write_regs(fe, R_EP2, 1);
466 msleep(30); /* image high optimization completion */
468 /* return to normal mode */
470 tda18271_write_regs(fe, R_EP4, 1);
473 tda18271_write_regs(fe, R_EP1, 1);
478 /*---------------------------------------------------------------------*/
481 * Standby modes, EP3 [7:5]
483 * | SM || SM_LT || SM_XT || mode description
484 * |=====\\=======\\=======\\===================================
485 * | 0 || 0 || 0 || normal mode
486 * |-----||-------||-------||-----------------------------------
487 * | || || || standby mode w/ slave tuner output
488 * | 1 || 0 || 0 || & loop thru & xtal oscillator on
489 * |-----||-------||-------||-----------------------------------
490 * | 1 || 1 || 0 || standby mode w/ xtal oscillator on
491 * |-----||-------||-------||-----------------------------------
492 * | 1 || 1 || 1 || power off
496 int tda18271_set_standby_mode(struct dvb_frontend *fe,
497 int sm, int sm_lt, int sm_xt)
499 struct tda18271_priv *priv = fe->tuner_priv;
500 unsigned char *regs = priv->tda18271_regs;
502 if (tda18271_debug & DBG_ADV)
503 tda_dbg("sm = %d, sm_lt = %d, sm_xt = %d\n", sm, sm_lt, sm_xt);
505 regs[R_EP3] &= ~0xe0; /* clear sm, sm_lt, sm_xt */
506 regs[R_EP3] |= (sm ? (1 << 7) : 0) |
507 (sm_lt ? (1 << 6) : 0) |
508 (sm_xt ? (1 << 5) : 0);
510 return tda18271_write_regs(fe, R_EP3, 1);
513 /*---------------------------------------------------------------------*/
515 int tda18271_calc_main_pll(struct dvb_frontend *fe, u32 freq)
517 /* sets main post divider & divider bytes, but does not write them */
518 struct tda18271_priv *priv = fe->tuner_priv;
519 unsigned char *regs = priv->tda18271_regs;
523 int ret = tda18271_lookup_pll_map(fe, MAIN_PLL, &freq, &pd, &d);
527 regs[R_MPD] = (0x77 & pd);
529 switch (priv->mode) {
530 case TDA18271_ANALOG:
531 regs[R_MPD] &= ~0x08;
533 case TDA18271_DIGITAL:
538 div = ((d * (freq / 1000)) << 7) / 125;
540 regs[R_MD1] = 0x7f & (div >> 16);
541 regs[R_MD2] = 0xff & (div >> 8);
542 regs[R_MD3] = 0xff & div;
547 int tda18271_calc_cal_pll(struct dvb_frontend *fe, u32 freq)
549 /* sets cal post divider & divider bytes, but does not write them */
550 struct tda18271_priv *priv = fe->tuner_priv;
551 unsigned char *regs = priv->tda18271_regs;
555 int ret = tda18271_lookup_pll_map(fe, CAL_PLL, &freq, &pd, &d);
561 div = ((d * (freq / 1000)) << 7) / 125;
563 regs[R_CD1] = 0x7f & (div >> 16);
564 regs[R_CD2] = 0xff & (div >> 8);
565 regs[R_CD3] = 0xff & div;
570 /*---------------------------------------------------------------------*/
572 int tda18271_calc_bp_filter(struct dvb_frontend *fe, u32 *freq)
574 /* sets bp filter bits, but does not write them */
575 struct tda18271_priv *priv = fe->tuner_priv;
576 unsigned char *regs = priv->tda18271_regs;
579 int ret = tda18271_lookup_map(fe, BP_FILTER, freq, &val);
583 regs[R_EP1] &= ~0x07; /* clear bp filter bits */
584 regs[R_EP1] |= (0x07 & val);
589 int tda18271_calc_km(struct dvb_frontend *fe, u32 *freq)
591 /* sets K & M bits, but does not write them */
592 struct tda18271_priv *priv = fe->tuner_priv;
593 unsigned char *regs = priv->tda18271_regs;
596 int ret = tda18271_lookup_map(fe, RF_CAL_KMCO, freq, &val);
600 regs[R_EB13] &= ~0x7c; /* clear k & m bits */
601 regs[R_EB13] |= (0x7c & val);
606 int tda18271_calc_rf_band(struct dvb_frontend *fe, u32 *freq)
608 /* sets rf band bits, but does not write them */
609 struct tda18271_priv *priv = fe->tuner_priv;
610 unsigned char *regs = priv->tda18271_regs;
613 int ret = tda18271_lookup_map(fe, RF_BAND, freq, &val);
617 regs[R_EP2] &= ~0xe0; /* clear rf band bits */
618 regs[R_EP2] |= (0xe0 & (val << 5));
623 int tda18271_calc_gain_taper(struct dvb_frontend *fe, u32 *freq)
625 /* sets gain taper bits, but does not write them */
626 struct tda18271_priv *priv = fe->tuner_priv;
627 unsigned char *regs = priv->tda18271_regs;
630 int ret = tda18271_lookup_map(fe, GAIN_TAPER, freq, &val);
634 regs[R_EP2] &= ~0x1f; /* clear gain taper bits */
635 regs[R_EP2] |= (0x1f & val);
640 int tda18271_calc_ir_measure(struct dvb_frontend *fe, u32 *freq)
642 /* sets IR Meas bits, but does not write them */
643 struct tda18271_priv *priv = fe->tuner_priv;
644 unsigned char *regs = priv->tda18271_regs;
647 int ret = tda18271_lookup_map(fe, IR_MEASURE, freq, &val);
651 regs[R_EP5] &= ~0x07;
652 regs[R_EP5] |= (0x07 & val);
657 int tda18271_calc_rf_cal(struct dvb_frontend *fe, u32 *freq)
659 /* sets rf cal byte (RFC_Cprog), but does not write it */
660 struct tda18271_priv *priv = fe->tuner_priv;
661 unsigned char *regs = priv->tda18271_regs;
664 int ret = tda18271_lookup_map(fe, RF_CAL, freq, &val);
665 /* The TDA18271HD/C1 rf_cal map lookup is expected to go out of range
666 * for frequencies above 61.1 MHz. In these cases, the internal RF
667 * tracking filters calibration mechanism is used.
669 * There is no need to warn the user about this.
680 * Overrides for Emacs so that we follow Linus's tabbing style.
681 * ---------------------------------------------------------------------------