2 * ddbridge.c: Digital Devices PCIe bridge driver
4 * Copyright (C) 2010-2011 Digital Devices GmbH
6 * This program is free software; you can redistribute it and/or
7 * modify it under the terms of the GNU General Public License
8 * version 2 only, as published by the Free Software Foundation.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA
21 * Or, point your browser to http://www.gnu.org/copyleft/gpl.html
24 #include <linux/module.h>
25 #include <linux/init.h>
26 #include <linux/interrupt.h>
27 #include <linux/delay.h>
28 #include <linux/slab.h>
29 #include <linux/poll.h>
31 #include <linux/pci.h>
32 #include <linux/pci_ids.h>
33 #include <linux/timer.h>
34 #include <linux/version.h>
35 #include <linux/i2c.h>
36 #include <linux/swab.h>
37 #include <linux/vmalloc.h>
40 #include "ddbridge-regs.h"
42 #include "tda18271c2dd.h"
48 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
50 /* MSI had problems with lost interrupts, fixed but needs testing */
53 /******************************************************************************/
55 static int i2c_read(struct i2c_adapter *adapter, u8 adr, u8 *val)
57 struct i2c_msg msgs[1] = {{.addr = adr, .flags = I2C_M_RD,
58 .buf = val, .len = 1 } };
59 return (i2c_transfer(adapter, msgs, 1) == 1) ? 0 : -1;
62 static int i2c_read_reg(struct i2c_adapter *adapter, u8 adr, u8 reg, u8 *val)
64 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
65 .buf = ®, .len = 1 },
66 {.addr = adr, .flags = I2C_M_RD,
67 .buf = val, .len = 1 } };
68 return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
71 static int i2c_read_reg16(struct i2c_adapter *adapter, u8 adr,
74 u8 msg[2] = {reg>>8, reg&0xff};
75 struct i2c_msg msgs[2] = {{.addr = adr, .flags = 0,
76 .buf = msg, .len = 2},
77 {.addr = adr, .flags = I2C_M_RD,
78 .buf = val, .len = 1} };
79 return (i2c_transfer(adapter, msgs, 2) == 2) ? 0 : -1;
82 static int ddb_i2c_cmd(struct ddb_i2c *i2c, u32 adr, u32 cmd)
84 struct ddb *dev = i2c->dev;
89 ddbwritel((adr << 9) | cmd, i2c->regs + I2C_COMMAND);
90 stat = wait_event_timeout(i2c->wq, i2c->done == 1, HZ);
92 printk(KERN_ERR "I2C timeout\n");
94 u32 istat = ddbreadl(INTERRUPT_STATUS);
95 printk(KERN_ERR "IRS %08x\n", istat);
96 ddbwritel(istat, INTERRUPT_ACK);
100 val = ddbreadl(i2c->regs+I2C_COMMAND);
106 static int ddb_i2c_master_xfer(struct i2c_adapter *adapter,
107 struct i2c_msg msg[], int num)
109 struct ddb_i2c *i2c = (struct ddb_i2c *)i2c_get_adapdata(adapter);
110 struct ddb *dev = i2c->dev;
116 if (num == 2 && msg[1].flags & I2C_M_RD &&
117 !(msg[0].flags & I2C_M_RD)) {
118 memcpy_toio(dev->regs + I2C_TASKMEM_BASE + i2c->wbuf,
119 msg[0].buf, msg[0].len);
120 ddbwritel(msg[0].len|(msg[1].len << 16),
121 i2c->regs+I2C_TASKLENGTH);
122 if (!ddb_i2c_cmd(i2c, addr, 1)) {
123 memcpy_fromio(msg[1].buf,
124 dev->regs + I2C_TASKMEM_BASE + i2c->rbuf,
130 if (num == 1 && !(msg[0].flags & I2C_M_RD)) {
131 ddbcpyto(I2C_TASKMEM_BASE + i2c->wbuf, msg[0].buf, msg[0].len);
132 ddbwritel(msg[0].len, i2c->regs + I2C_TASKLENGTH);
133 if (!ddb_i2c_cmd(i2c, addr, 2))
136 if (num == 1 && (msg[0].flags & I2C_M_RD)) {
137 ddbwritel(msg[0].len << 16, i2c->regs + I2C_TASKLENGTH);
138 if (!ddb_i2c_cmd(i2c, addr, 3)) {
139 ddbcpyfrom(msg[0].buf,
140 I2C_TASKMEM_BASE + i2c->rbuf, msg[0].len);
148 static u32 ddb_i2c_functionality(struct i2c_adapter *adap)
150 return I2C_FUNC_SMBUS_EMUL;
153 struct i2c_algorithm ddb_i2c_algo = {
154 .master_xfer = ddb_i2c_master_xfer,
155 .functionality = ddb_i2c_functionality,
158 static void ddb_i2c_release(struct ddb *dev)
162 struct i2c_adapter *adap;
164 for (i = 0; i < dev->info->port_num; i++) {
167 i2c_del_adapter(adap);
171 static int ddb_i2c_init(struct ddb *dev)
175 struct i2c_adapter *adap;
177 for (i = 0; i < dev->info->port_num; i++) {
181 i2c->wbuf = i * (I2C_TASKMEM_SIZE / 4);
182 i2c->rbuf = i2c->wbuf + (I2C_TASKMEM_SIZE / 8);
183 i2c->regs = 0x80 + i * 0x20;
184 ddbwritel(I2C_SPEED_100, i2c->regs + I2C_TIMING);
185 ddbwritel((i2c->rbuf << 16) | i2c->wbuf,
186 i2c->regs + I2C_TASKADDRESS);
187 init_waitqueue_head(&i2c->wq);
190 i2c_set_adapdata(adap, i2c);
191 #ifdef I2C_ADAP_CLASS_TV_DIGITAL
192 adap->class = I2C_ADAP_CLASS_TV_DIGITAL|I2C_CLASS_TV_ANALOG;
194 #ifdef I2C_CLASS_TV_ANALOG
195 adap->class = I2C_CLASS_TV_ANALOG;
198 strcpy(adap->name, "ddbridge");
199 adap->algo = &ddb_i2c_algo;
200 adap->algo_data = (void *)i2c;
201 adap->dev.parent = &dev->pdev->dev;
202 stat = i2c_add_adapter(adap);
207 for (j = 0; j < i; j++) {
210 i2c_del_adapter(adap);
216 /******************************************************************************/
217 /******************************************************************************/
218 /******************************************************************************/
221 static void set_table(struct ddb *dev, u32 off,
222 dma_addr_t *pbuf, u32 num)
227 base = DMA_BASE_ADDRESS_TABLE + off;
228 for (i = 0; i < num; i++) {
230 ddbwritel(mem & 0xffffffff, base + i * 8);
231 ddbwritel(mem >> 32, base + i * 8 + 4);
236 static void ddb_address_table(struct ddb *dev)
242 for (i = 0; i < dev->info->port_num * 2; i++) {
243 base = DMA_BASE_ADDRESS_TABLE + i * 0x100;
244 pbuf = dev->input[i].pbuf;
245 for (j = 0; j < dev->input[i].dma_buf_num; j++) {
247 ddbwritel(mem & 0xffffffff, base + j * 8);
248 ddbwritel(mem >> 32, base + j * 8 + 4);
251 for (i = 0; i < dev->info->port_num; i++) {
252 base = DMA_BASE_ADDRESS_TABLE + 0x800 + i * 0x100;
253 pbuf = dev->output[i].pbuf;
254 for (j = 0; j < dev->output[i].dma_buf_num; j++) {
256 ddbwritel(mem & 0xffffffff, base + j * 8);
257 ddbwritel(mem >> 32, base + j * 8 + 4);
262 static void io_free(struct pci_dev *pdev, u8 **vbuf,
263 dma_addr_t *pbuf, u32 size, int num)
267 for (i = 0; i < num; i++) {
269 pci_free_consistent(pdev, size, vbuf[i], pbuf[i]);
275 static int io_alloc(struct pci_dev *pdev, u8 **vbuf,
276 dma_addr_t *pbuf, u32 size, int num)
280 for (i = 0; i < num; i++) {
281 vbuf[i] = pci_alloc_consistent(pdev, size, &pbuf[i]);
288 static int ddb_buffers_alloc(struct ddb *dev)
291 struct ddb_port *port;
293 for (i = 0; i < dev->info->port_num; i++) {
294 port = &dev->port[i];
295 switch (port->class) {
297 if (io_alloc(dev->pdev, port->input[0]->vbuf,
298 port->input[0]->pbuf,
299 port->input[0]->dma_buf_size,
300 port->input[0]->dma_buf_num) < 0)
302 if (io_alloc(dev->pdev, port->input[1]->vbuf,
303 port->input[1]->pbuf,
304 port->input[1]->dma_buf_size,
305 port->input[1]->dma_buf_num) < 0)
309 if (io_alloc(dev->pdev, port->input[0]->vbuf,
310 port->input[0]->pbuf,
311 port->input[0]->dma_buf_size,
312 port->input[0]->dma_buf_num) < 0)
314 if (io_alloc(dev->pdev, port->output->vbuf,
316 port->output->dma_buf_size,
317 port->output->dma_buf_num) < 0)
324 ddb_address_table(dev);
328 static void ddb_buffers_free(struct ddb *dev)
331 struct ddb_port *port;
333 for (i = 0; i < dev->info->port_num; i++) {
334 port = &dev->port[i];
335 io_free(dev->pdev, port->input[0]->vbuf,
336 port->input[0]->pbuf,
337 port->input[0]->dma_buf_size,
338 port->input[0]->dma_buf_num);
339 io_free(dev->pdev, port->input[1]->vbuf,
340 port->input[1]->pbuf,
341 port->input[1]->dma_buf_size,
342 port->input[1]->dma_buf_num);
343 io_free(dev->pdev, port->output->vbuf,
345 port->output->dma_buf_size,
346 port->output->dma_buf_num);
350 static void ddb_input_start(struct ddb_input *input)
352 struct ddb *dev = input->port->dev;
354 spin_lock_irq(&input->lock);
359 ddbwritel(0, TS_INPUT_CONTROL(input->nr));
360 ddbwritel(2, TS_INPUT_CONTROL(input->nr));
361 ddbwritel(0, TS_INPUT_CONTROL(input->nr));
363 ddbwritel((1 << 16) |
364 (input->dma_buf_num << 11) |
365 (input->dma_buf_size >> 7),
366 DMA_BUFFER_SIZE(input->nr));
367 ddbwritel(0, DMA_BUFFER_ACK(input->nr));
369 ddbwritel(1, DMA_BASE_WRITE);
370 ddbwritel(3, DMA_BUFFER_CONTROL(input->nr));
371 ddbwritel(9, TS_INPUT_CONTROL(input->nr));
373 spin_unlock_irq(&input->lock);
376 static void ddb_input_stop(struct ddb_input *input)
378 struct ddb *dev = input->port->dev;
380 spin_lock_irq(&input->lock);
381 ddbwritel(0, TS_INPUT_CONTROL(input->nr));
382 ddbwritel(0, DMA_BUFFER_CONTROL(input->nr));
384 spin_unlock_irq(&input->lock);
387 static void ddb_output_start(struct ddb_output *output)
389 struct ddb *dev = output->port->dev;
391 spin_lock_irq(&output->lock);
394 ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
395 ddbwritel(2, TS_OUTPUT_CONTROL(output->nr));
396 ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
397 ddbwritel(0x3c, TS_OUTPUT_CONTROL(output->nr));
398 ddbwritel((1 << 16) |
399 (output->dma_buf_num << 11) |
400 (output->dma_buf_size >> 7),
401 DMA_BUFFER_SIZE(output->nr + 8));
402 ddbwritel(0, DMA_BUFFER_ACK(output->nr + 8));
404 ddbwritel(1, DMA_BASE_READ);
405 ddbwritel(3, DMA_BUFFER_CONTROL(output->nr + 8));
406 /* ddbwritel(0xbd, TS_OUTPUT_CONTROL(output->nr)); */
407 ddbwritel(0x1d, TS_OUTPUT_CONTROL(output->nr));
409 spin_unlock_irq(&output->lock);
412 static void ddb_output_stop(struct ddb_output *output)
414 struct ddb *dev = output->port->dev;
416 spin_lock_irq(&output->lock);
417 ddbwritel(0, TS_OUTPUT_CONTROL(output->nr));
418 ddbwritel(0, DMA_BUFFER_CONTROL(output->nr + 8));
420 spin_unlock_irq(&output->lock);
423 static u32 ddb_output_free(struct ddb_output *output)
425 u32 idx, off, stat = output->stat;
428 idx = (stat >> 11) & 0x1f;
429 off = (stat & 0x7ff) << 7;
431 if (output->cbuf != idx) {
432 if ((((output->cbuf + 1) % output->dma_buf_num) == idx) &&
433 (output->dma_buf_size - output->coff <= 188))
437 diff = off - output->coff;
438 if (diff <= 0 || diff > 188)
443 static ssize_t ddb_output_write(struct ddb_output *output,
444 const u8 *buf, size_t count)
446 struct ddb *dev = output->port->dev;
447 u32 idx, off, stat = output->stat;
448 u32 left = count, len;
450 idx = (stat >> 11) & 0x1f;
451 off = (stat & 0x7ff) << 7;
454 len = output->dma_buf_size - output->coff;
455 if ((((output->cbuf + 1) % output->dma_buf_num) == idx) &&
461 if (output->cbuf == idx) {
462 if (off > output->coff) {
464 len = off - output->coff;
475 if (copy_from_user(output->vbuf[output->cbuf] + output->coff,
481 if (output->coff == output->dma_buf_size) {
483 output->cbuf = ((output->cbuf + 1) % output->dma_buf_num);
485 ddbwritel((output->cbuf << 11) | (output->coff >> 7),
486 DMA_BUFFER_ACK(output->nr + 8));
491 static u32 ddb_input_avail(struct ddb_input *input)
493 struct ddb *dev = input->port->dev;
494 u32 idx, off, stat = input->stat;
495 u32 ctrl = ddbreadl(DMA_BUFFER_CONTROL(input->nr));
497 idx = (stat >> 11) & 0x1f;
498 off = (stat & 0x7ff) << 7;
501 printk(KERN_ERR "IA %d %d %08x\n", idx, off, ctrl);
502 ddbwritel(input->stat, DMA_BUFFER_ACK(input->nr));
505 if (input->cbuf != idx)
510 static size_t ddb_input_read(struct ddb_input *input, u8 *buf, size_t count)
512 struct ddb *dev = input->port->dev;
514 u32 idx, off, free, stat = input->stat;
517 idx = (stat >> 11) & 0x1f;
518 off = (stat & 0x7ff) << 7;
521 if (input->cbuf == idx)
523 free = input->dma_buf_size - input->coff;
526 ret = copy_to_user(buf, input->vbuf[input->cbuf] +
529 if (input->coff == input->dma_buf_size) {
531 input->cbuf = (input->cbuf+1) % input->dma_buf_num;
534 ddbwritel((input->cbuf << 11) | (input->coff >> 7),
535 DMA_BUFFER_ACK(input->nr));
540 /******************************************************************************/
541 /******************************************************************************/
542 /******************************************************************************/
545 static struct ddb_input *fe2input(struct ddb *dev, struct dvb_frontend *fe)
549 for (i = 0; i < dev->info->port_num * 2; i++) {
550 if (dev->input[i].fe == fe)
551 return &dev->input[i];
557 static int drxk_gate_ctrl(struct dvb_frontend *fe, int enable)
559 struct ddb_input *input = fe->sec_priv;
560 struct ddb_port *port = input->port;
564 mutex_lock(&port->i2c_gate_lock);
565 status = input->gate_ctrl(fe, 1);
567 status = input->gate_ctrl(fe, 0);
568 mutex_unlock(&port->i2c_gate_lock);
573 static int demod_attach_drxk(struct ddb_input *input)
575 struct i2c_adapter *i2c = &input->port->i2c->adap;
576 struct dvb_frontend *fe;
578 fe = input->fe = dvb_attach(drxk_attach,
579 i2c, 0x29 + (input->nr&1),
582 printk(KERN_ERR "No DRXK found!\n");
585 fe->sec_priv = input;
586 input->gate_ctrl = fe->ops.i2c_gate_ctrl;
587 fe->ops.i2c_gate_ctrl = drxk_gate_ctrl;
591 static int tuner_attach_tda18271(struct ddb_input *input)
593 struct i2c_adapter *i2c = &input->port->i2c->adap;
594 struct dvb_frontend *fe;
596 if (input->fe->ops.i2c_gate_ctrl)
597 input->fe->ops.i2c_gate_ctrl(input->fe, 1);
598 fe = dvb_attach(tda18271c2dd_attach, input->fe, i2c, 0x60);
600 printk(KERN_ERR "No TDA18271 found!\n");
603 if (input->fe->ops.i2c_gate_ctrl)
604 input->fe->ops.i2c_gate_ctrl(input->fe, 0);
608 /******************************************************************************/
609 /******************************************************************************/
610 /******************************************************************************/
612 static struct stv090x_config stv0900 = {
614 .demod_mode = STV090x_DUAL,
615 .clk_mode = STV090x_CLK_EXT,
620 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
621 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
623 .repeater_level = STV090x_RPTLEVEL_16,
625 .adc1_range = STV090x_ADC_1Vpp,
626 .adc2_range = STV090x_ADC_1Vpp,
628 .diseqc_envelope_mode = true,
631 static struct stv090x_config stv0900_aa = {
633 .demod_mode = STV090x_DUAL,
634 .clk_mode = STV090x_CLK_EXT,
639 .ts1_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
640 .ts2_mode = STV090x_TSMODE_SERIAL_PUNCTURED,
642 .repeater_level = STV090x_RPTLEVEL_16,
644 .adc1_range = STV090x_ADC_1Vpp,
645 .adc2_range = STV090x_ADC_1Vpp,
647 .diseqc_envelope_mode = true,
650 static struct stv6110x_config stv6110a = {
656 static struct stv6110x_config stv6110b = {
662 static int demod_attach_stv0900(struct ddb_input *input, int type)
664 struct i2c_adapter *i2c = &input->port->i2c->adap;
665 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
667 input->fe = dvb_attach(stv090x_attach, feconf, i2c,
668 (input->nr & 1) ? STV090x_DEMODULATOR_1
669 : STV090x_DEMODULATOR_0);
671 printk(KERN_ERR "No STV0900 found!\n");
674 if (!dvb_attach(lnbh24_attach, input->fe, i2c, 0,
676 (0x09 - type) : (0x0b - type))) {
677 printk(KERN_ERR "No LNBH24 found!\n");
683 static int tuner_attach_stv6110(struct ddb_input *input, int type)
685 struct i2c_adapter *i2c = &input->port->i2c->adap;
686 struct stv090x_config *feconf = type ? &stv0900_aa : &stv0900;
687 struct stv6110x_config *tunerconf = (input->nr & 1) ?
688 &stv6110b : &stv6110a;
689 struct stv6110x_devctl *ctl;
691 ctl = dvb_attach(stv6110x_attach, input->fe, tunerconf, i2c);
693 printk(KERN_ERR "No STV6110X found!\n");
696 printk(KERN_INFO "attach tuner input %d adr %02x\n",
697 input->nr, tunerconf->addr);
699 feconf->tuner_init = ctl->tuner_init;
700 feconf->tuner_sleep = ctl->tuner_sleep;
701 feconf->tuner_set_mode = ctl->tuner_set_mode;
702 feconf->tuner_set_frequency = ctl->tuner_set_frequency;
703 feconf->tuner_get_frequency = ctl->tuner_get_frequency;
704 feconf->tuner_set_bandwidth = ctl->tuner_set_bandwidth;
705 feconf->tuner_get_bandwidth = ctl->tuner_get_bandwidth;
706 feconf->tuner_set_bbgain = ctl->tuner_set_bbgain;
707 feconf->tuner_get_bbgain = ctl->tuner_get_bbgain;
708 feconf->tuner_set_refclk = ctl->tuner_set_refclk;
709 feconf->tuner_get_status = ctl->tuner_get_status;
714 int my_dvb_dmx_ts_card_init(struct dvb_demux *dvbdemux, char *id,
715 int (*start_feed)(struct dvb_demux_feed *),
716 int (*stop_feed)(struct dvb_demux_feed *),
719 dvbdemux->priv = priv;
721 dvbdemux->filternum = 256;
722 dvbdemux->feednum = 256;
723 dvbdemux->start_feed = start_feed;
724 dvbdemux->stop_feed = stop_feed;
725 dvbdemux->write_to_decoder = NULL;
726 dvbdemux->dmx.capabilities = (DMX_TS_FILTERING |
727 DMX_SECTION_FILTERING |
728 DMX_MEMORY_BASED_FILTERING);
729 return dvb_dmx_init(dvbdemux);
732 int my_dvb_dmxdev_ts_card_init(struct dmxdev *dmxdev,
733 struct dvb_demux *dvbdemux,
734 struct dmx_frontend *hw_frontend,
735 struct dmx_frontend *mem_frontend,
736 struct dvb_adapter *dvb_adapter)
740 dmxdev->filternum = 256;
741 dmxdev->demux = &dvbdemux->dmx;
742 dmxdev->capabilities = 0;
743 ret = dvb_dmxdev_init(dmxdev, dvb_adapter);
747 hw_frontend->source = DMX_FRONTEND_0;
748 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, hw_frontend);
749 mem_frontend->source = DMX_MEMORY_FE;
750 dvbdemux->dmx.add_frontend(&dvbdemux->dmx, mem_frontend);
751 return dvbdemux->dmx.connect_frontend(&dvbdemux->dmx, hw_frontend);
754 static int start_feed(struct dvb_demux_feed *dvbdmxfeed)
756 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
757 struct ddb_input *input = dvbdmx->priv;
760 ddb_input_start(input);
762 return ++input->users;
765 static int stop_feed(struct dvb_demux_feed *dvbdmxfeed)
767 struct dvb_demux *dvbdmx = dvbdmxfeed->demux;
768 struct ddb_input *input = dvbdmx->priv;
773 ddb_input_stop(input);
778 static void dvb_input_detach(struct ddb_input *input)
780 struct dvb_adapter *adap = &input->adap;
781 struct dvb_demux *dvbdemux = &input->demux;
783 switch (input->attached) {
786 dvb_unregister_frontend(input->fe2);
788 dvb_unregister_frontend(input->fe);
789 dvb_frontend_detach(input->fe);
793 dvb_net_release(&input->dvbnet);
796 dvbdemux->dmx.close(&dvbdemux->dmx);
797 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
798 &input->hw_frontend);
799 dvbdemux->dmx.remove_frontend(&dvbdemux->dmx,
800 &input->mem_frontend);
801 dvb_dmxdev_release(&input->dmxdev);
804 dvb_dmx_release(&input->demux);
807 dvb_unregister_adapter(adap);
812 static int dvb_input_attach(struct ddb_input *input)
815 struct ddb_port *port = input->port;
816 struct dvb_adapter *adap = &input->adap;
817 struct dvb_demux *dvbdemux = &input->demux;
819 ret = dvb_register_adapter(adap, "DDBridge", THIS_MODULE,
820 &input->port->dev->pdev->dev,
823 printk(KERN_ERR "ddbridge: Could not register adapter."
824 "Check if you enabled enough adapters in dvb-core!\n");
829 ret = my_dvb_dmx_ts_card_init(dvbdemux, "SW demux",
836 ret = my_dvb_dmxdev_ts_card_init(&input->dmxdev, &input->demux,
838 &input->mem_frontend, adap);
843 ret = dvb_net_init(adap, &input->dvbnet, input->dmxdev.demux);
849 switch (port->type) {
850 case DDB_TUNER_DVBS_ST:
851 if (demod_attach_stv0900(input, 0) < 0)
853 if (tuner_attach_stv6110(input, 0) < 0)
856 if (dvb_register_frontend(adap, input->fe) < 0)
860 case DDB_TUNER_DVBS_ST_AA:
861 if (demod_attach_stv0900(input, 1) < 0)
863 if (tuner_attach_stv6110(input, 1) < 0)
866 if (dvb_register_frontend(adap, input->fe) < 0)
870 case DDB_TUNER_DVBCT_TR:
871 if (demod_attach_drxk(input) < 0)
873 if (tuner_attach_tda18271(input) < 0)
876 if (dvb_register_frontend(adap, input->fe) < 0)
880 if (dvb_register_frontend(adap, input->fe2) < 0)
882 input->fe2->tuner_priv = input->fe->tuner_priv;
883 memcpy(&input->fe2->ops.tuner_ops,
884 &input->fe->ops.tuner_ops,
885 sizeof(struct dvb_tuner_ops));
893 /****************************************************************************/
894 /****************************************************************************/
896 static ssize_t ts_write(struct file *file, const char *buf,
897 size_t count, loff_t *ppos)
899 struct dvb_device *dvbdev = file->private_data;
900 struct ddb_output *output = dvbdev->priv;
905 if (ddb_output_free(output) < 188) {
906 if (file->f_flags & O_NONBLOCK)
908 if (wait_event_interruptible(
909 output->wq, ddb_output_free(output) >= 188) < 0)
912 stat = ddb_output_write(output, buf, left);
918 return (left == count) ? -EAGAIN : (count - left);
921 static ssize_t ts_read(struct file *file, char *buf,
922 size_t count, loff_t *ppos)
924 struct dvb_device *dvbdev = file->private_data;
925 struct ddb_output *output = dvbdev->priv;
926 struct ddb_input *input = output->port->input[0];
929 count -= count % 188;
932 if (ddb_input_avail(input) < 188) {
933 if (file->f_flags & O_NONBLOCK)
935 if (wait_event_interruptible(
936 input->wq, ddb_input_avail(input) >= 188) < 0)
939 read = ddb_input_read(input, buf, left);
943 return (left == count) ? -EAGAIN : (count - left);
946 static unsigned int ts_poll(struct file *file, poll_table *wait)
949 struct dvb_device *dvbdev = file->private_data;
950 struct ddb_output *output = dvbdev->priv;
951 struct ddb_input *input = output->port->input[0];
953 unsigned int mask = 0;
956 if (data_avail_to_read)
957 mask |= POLLIN | POLLRDNORM;
958 if (data_avail_to_write)
959 mask |= POLLOUT | POLLWRNORM;
961 poll_wait(file, &read_queue, wait);
962 poll_wait(file, &write_queue, wait);
967 static const struct file_operations ci_fops = {
968 .owner = THIS_MODULE,
971 .open = dvb_generic_open,
972 .release = dvb_generic_release,
977 static struct dvb_device dvbdev_ci = {
985 /****************************************************************************/
986 /****************************************************************************/
987 /****************************************************************************/
989 static void input_tasklet(unsigned long data)
991 struct ddb_input *input = (struct ddb_input *) data;
992 struct ddb *dev = input->port->dev;
994 spin_lock(&input->lock);
995 if (!input->running) {
996 spin_unlock(&input->lock);
999 input->stat = ddbreadl(DMA_BUFFER_CURRENT(input->nr));
1001 if (input->port->class == DDB_PORT_TUNER) {
1002 if (4&ddbreadl(DMA_BUFFER_CONTROL(input->nr)))
1003 printk(KERN_ERR "Overflow input %d\n", input->nr);
1004 while (input->cbuf != ((input->stat >> 11) & 0x1f)
1005 || (4&ddbreadl(DMA_BUFFER_CONTROL(input->nr)))) {
1006 dvb_dmx_swfilter_packets(&input->demux,
1007 input->vbuf[input->cbuf],
1008 input->dma_buf_size / 188);
1010 input->cbuf = (input->cbuf + 1) % input->dma_buf_num;
1011 ddbwritel((input->cbuf << 11),
1012 DMA_BUFFER_ACK(input->nr));
1013 input->stat = ddbreadl(DMA_BUFFER_CURRENT(input->nr));
1016 if (input->port->class == DDB_PORT_CI)
1017 wake_up(&input->wq);
1018 spin_unlock(&input->lock);
1021 static void output_tasklet(unsigned long data)
1023 struct ddb_output *output = (struct ddb_output *) data;
1024 struct ddb *dev = output->port->dev;
1026 spin_lock(&output->lock);
1027 if (!output->running) {
1028 spin_unlock(&output->lock);
1031 output->stat = ddbreadl(DMA_BUFFER_CURRENT(output->nr + 8));
1032 wake_up(&output->wq);
1033 spin_unlock(&output->lock);
1037 struct cxd2099_cfg cxd_cfg = {
1044 static int ddb_ci_attach(struct ddb_port *port)
1048 ret = dvb_register_adapter(&port->output->adap,
1051 &port->dev->pdev->dev,
1055 port->en = cxd2099_attach(&cxd_cfg, port, &port->i2c->adap);
1057 dvb_unregister_adapter(&port->output->adap);
1060 ddb_input_start(port->input[0]);
1061 ddb_output_start(port->output);
1062 dvb_ca_en50221_init(&port->output->adap,
1064 ret = dvb_register_device(&port->output->adap, &port->output->dev,
1065 &dvbdev_ci, (void *) port->output,
1070 static int ddb_port_attach(struct ddb_port *port)
1074 switch (port->class) {
1075 case DDB_PORT_TUNER:
1076 ret = dvb_input_attach(port->input[0]);
1079 ret = dvb_input_attach(port->input[1]);
1082 ret = ddb_ci_attach(port);
1088 printk(KERN_ERR "port_attach on port %d failed\n", port->nr);
1092 static int ddb_ports_attach(struct ddb *dev)
1095 struct ddb_port *port;
1097 for (i = 0; i < dev->info->port_num; i++) {
1098 port = &dev->port[i];
1099 ret = ddb_port_attach(port);
1106 static void ddb_ports_detach(struct ddb *dev)
1109 struct ddb_port *port;
1111 for (i = 0; i < dev->info->port_num; i++) {
1112 port = &dev->port[i];
1113 switch (port->class) {
1114 case DDB_PORT_TUNER:
1115 dvb_input_detach(port->input[0]);
1116 dvb_input_detach(port->input[1]);
1119 if (port->output->dev)
1120 dvb_unregister_device(port->output->dev);
1122 ddb_input_stop(port->input[0]);
1123 ddb_output_stop(port->output);
1124 dvb_ca_en50221_release(port->en);
1127 dvb_unregister_adapter(&port->output->adap);
1134 /****************************************************************************/
1135 /****************************************************************************/
1137 static int port_has_ci(struct ddb_port *port)
1140 return i2c_read_reg(&port->i2c->adap, 0x40, 0, &val) ? 0 : 1;
1143 static int port_has_stv0900(struct ddb_port *port)
1146 if (i2c_read_reg16(&port->i2c->adap, 0x69, 0xf100, &val) < 0)
1151 static int port_has_stv0900_aa(struct ddb_port *port)
1154 if (i2c_read_reg16(&port->i2c->adap, 0x68, 0xf100, &val) < 0)
1159 static int port_has_drxks(struct ddb_port *port)
1162 if (i2c_read(&port->i2c->adap, 0x29, &val) < 0)
1164 if (i2c_read(&port->i2c->adap, 0x2a, &val) < 0)
1169 static void ddb_port_probe(struct ddb_port *port)
1171 struct ddb *dev = port->dev;
1172 char *modname = "NO MODULE";
1174 port->class = DDB_PORT_NONE;
1176 if (port_has_ci(port)) {
1178 port->class = DDB_PORT_CI;
1179 ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1180 } else if (port_has_stv0900(port)) {
1181 modname = "DUAL DVB-S2";
1182 port->class = DDB_PORT_TUNER;
1183 port->type = DDB_TUNER_DVBS_ST;
1184 ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1185 } else if (port_has_stv0900_aa(port)) {
1186 modname = "DUAL DVB-S2";
1187 port->class = DDB_PORT_TUNER;
1188 port->type = DDB_TUNER_DVBS_ST_AA;
1189 ddbwritel(I2C_SPEED_100, port->i2c->regs + I2C_TIMING);
1190 } else if (port_has_drxks(port)) {
1191 modname = "DUAL DVB-C/T";
1192 port->class = DDB_PORT_TUNER;
1193 port->type = DDB_TUNER_DVBCT_TR;
1194 ddbwritel(I2C_SPEED_400, port->i2c->regs + I2C_TIMING);
1196 printk(KERN_INFO "Port %d (TAB %d): %s\n",
1197 port->nr, port->nr+1, modname);
1200 static void ddb_input_init(struct ddb_port *port, int nr)
1202 struct ddb *dev = port->dev;
1203 struct ddb_input *input = &dev->input[nr];
1207 input->dma_buf_num = INPUT_DMA_BUFS;
1208 input->dma_buf_size = INPUT_DMA_SIZE;
1209 ddbwritel(0, TS_INPUT_CONTROL(nr));
1210 ddbwritel(2, TS_INPUT_CONTROL(nr));
1211 ddbwritel(0, TS_INPUT_CONTROL(nr));
1212 ddbwritel(0, DMA_BUFFER_ACK(nr));
1213 tasklet_init(&input->tasklet, input_tasklet, (unsigned long) input);
1214 spin_lock_init(&input->lock);
1215 init_waitqueue_head(&input->wq);
1218 static void ddb_output_init(struct ddb_port *port, int nr)
1220 struct ddb *dev = port->dev;
1221 struct ddb_output *output = &dev->output[nr];
1223 output->port = port;
1224 output->dma_buf_num = OUTPUT_DMA_BUFS;
1225 output->dma_buf_size = OUTPUT_DMA_SIZE;
1227 ddbwritel(0, TS_OUTPUT_CONTROL(nr));
1228 ddbwritel(2, TS_OUTPUT_CONTROL(nr));
1229 ddbwritel(0, TS_OUTPUT_CONTROL(nr));
1230 tasklet_init(&output->tasklet, output_tasklet, (unsigned long) output);
1231 init_waitqueue_head(&output->wq);
1234 static void ddb_ports_init(struct ddb *dev)
1237 struct ddb_port *port;
1239 for (i = 0; i < dev->info->port_num; i++) {
1240 port = &dev->port[i];
1243 port->i2c = &dev->i2c[i];
1244 port->input[0] = &dev->input[2 * i];
1245 port->input[1] = &dev->input[2 * i + 1];
1246 port->output = &dev->output[i];
1248 mutex_init(&port->i2c_gate_lock);
1249 ddb_port_probe(port);
1250 ddb_input_init(port, 2 * i);
1251 ddb_input_init(port, 2 * i + 1);
1252 ddb_output_init(port, i);
1256 static void ddb_ports_release(struct ddb *dev)
1259 struct ddb_port *port;
1261 for (i = 0; i < dev->info->port_num; i++) {
1262 port = &dev->port[i];
1264 tasklet_kill(&port->input[0]->tasklet);
1265 tasklet_kill(&port->input[1]->tasklet);
1266 tasklet_kill(&port->output->tasklet);
1270 /****************************************************************************/
1271 /****************************************************************************/
1272 /****************************************************************************/
1274 static void irq_handle_i2c(struct ddb *dev, int n)
1276 struct ddb_i2c *i2c = &dev->i2c[n];
1282 static irqreturn_t irq_handler(int irq, void *dev_id)
1284 struct ddb *dev = (struct ddb *) dev_id;
1285 u32 s = ddbreadl(INTERRUPT_STATUS);
1291 ddbwritel(s, INTERRUPT_ACK);
1294 irq_handle_i2c(dev, 0);
1296 irq_handle_i2c(dev, 1);
1298 irq_handle_i2c(dev, 2);
1300 irq_handle_i2c(dev, 3);
1303 tasklet_schedule(&dev->input[0].tasklet);
1305 tasklet_schedule(&dev->input[1].tasklet);
1307 tasklet_schedule(&dev->input[2].tasklet);
1309 tasklet_schedule(&dev->input[3].tasklet);
1311 tasklet_schedule(&dev->input[4].tasklet);
1313 tasklet_schedule(&dev->input[5].tasklet);
1315 tasklet_schedule(&dev->input[6].tasklet);
1317 tasklet_schedule(&dev->input[7].tasklet);
1320 tasklet_schedule(&dev->output[0].tasklet);
1322 tasklet_schedule(&dev->output[1].tasklet);
1324 tasklet_schedule(&dev->output[2].tasklet);
1326 tasklet_schedule(&dev->output[3].tasklet);
1328 /* if (s & 0x000f0000) printk(KERN_DEBUG "%08x\n", istat); */
1329 } while ((s = ddbreadl(INTERRUPT_STATUS)));
1334 /******************************************************************************/
1335 /******************************************************************************/
1336 /******************************************************************************/
1338 static int flashio(struct ddb *dev, u8 *wbuf, u32 wlen, u8 *rbuf, u32 rlen)
1343 ddbwritel(1, SPI_CONTROL);
1345 /* FIXME: check for big-endian */
1346 data = swab32(*(u32 *)wbuf);
1349 ddbwritel(data, SPI_DATA);
1350 while (ddbreadl(SPI_CONTROL) & 0x0004)
1355 ddbwritel(0x0001 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL);
1357 ddbwritel(0x0003 | ((wlen << (8 + 3)) & 0x1f00), SPI_CONTROL);
1360 shift = ((4 - wlen) * 8);
1369 ddbwritel(data, SPI_DATA);
1370 while (ddbreadl(SPI_CONTROL) & 0x0004)
1374 ddbwritel(0, SPI_CONTROL);
1378 ddbwritel(1, SPI_CONTROL);
1381 ddbwritel(0xffffffff, SPI_DATA);
1382 while (ddbreadl(SPI_CONTROL) & 0x0004)
1384 data = ddbreadl(SPI_DATA);
1385 *(u32 *) rbuf = swab32(data);
1389 ddbwritel(0x0003 | ((rlen << (8 + 3)) & 0x1F00), SPI_CONTROL);
1390 ddbwritel(0xffffffff, SPI_DATA);
1391 while (ddbreadl(SPI_CONTROL) & 0x0004)
1394 data = ddbreadl(SPI_DATA);
1395 ddbwritel(0, SPI_CONTROL);
1398 data <<= ((4 - rlen) * 8);
1401 *rbuf = ((data >> 24) & 0xff);
1409 #define DDB_MAGIC 'd'
1411 struct ddb_flashio {
1418 #define IOCTL_DDB_FLASHIO _IOWR(DDB_MAGIC, 0x00, struct ddb_flashio)
1420 #define DDB_NAME "ddbridge"
1423 static struct ddb *ddbs[32];
1424 static struct class *ddb_class;
1425 static int ddb_major;
1427 static int ddb_open(struct inode *inode, struct file *file)
1429 struct ddb *dev = ddbs[iminor(inode)];
1431 file->private_data = dev;
1435 static long ddb_ioctl(struct file *file, unsigned int cmd, unsigned long arg)
1437 struct ddb *dev = file->private_data;
1438 void *parg = (void *)arg;
1442 case IOCTL_DDB_FLASHIO:
1444 struct ddb_flashio fio;
1447 if (copy_from_user(&fio, parg, sizeof(fio)))
1449 if (fio.write_len + fio.read_len > 1028) {
1450 printk(KERN_ERR "IOBUF too small\n");
1453 wbuf = &dev->iobuf[0];
1456 rbuf = wbuf + fio.write_len;
1457 if (copy_from_user(wbuf, fio.write_buf, fio.write_len)) {
1461 res = flashio(dev, wbuf, fio.write_len,
1462 rbuf, fio.read_len);
1463 if (copy_to_user(fio.read_buf, rbuf, fio.read_len))
1473 static const struct file_operations ddb_fops = {
1474 .unlocked_ioctl = ddb_ioctl,
1478 static char *ddb_devnode(struct device *device, mode_t *mode)
1480 struct ddb *dev = dev_get_drvdata(device);
1482 return kasprintf(GFP_KERNEL, "ddbridge/card%d", dev->nr);
1485 static int ddb_class_create(void)
1487 ddb_major = register_chrdev(0, DDB_NAME, &ddb_fops);
1491 ddb_class = class_create(THIS_MODULE, DDB_NAME);
1492 if (IS_ERR(ddb_class)) {
1493 unregister_chrdev(ddb_major, DDB_NAME);
1496 ddb_class->devnode = ddb_devnode;
1500 static void ddb_class_destroy(void)
1502 class_destroy(ddb_class);
1503 unregister_chrdev(ddb_major, DDB_NAME);
1506 static int ddb_device_create(struct ddb *dev)
1508 dev->nr = ddb_num++;
1509 dev->ddb_dev = device_create(ddb_class, NULL,
1510 MKDEV(ddb_major, dev->nr),
1511 dev, "ddbridge%d", dev->nr);
1512 ddbs[dev->nr] = dev;
1513 if (IS_ERR(dev->ddb_dev))
1518 static void ddb_device_destroy(struct ddb *dev)
1521 if (IS_ERR(dev->ddb_dev))
1523 device_destroy(ddb_class, MKDEV(ddb_major, 0));
1527 /****************************************************************************/
1528 /****************************************************************************/
1529 /****************************************************************************/
1531 static void ddb_unmap(struct ddb *dev)
1539 static void __devexit ddb_remove(struct pci_dev *pdev)
1541 struct ddb *dev = (struct ddb *) pci_get_drvdata(pdev);
1543 ddb_ports_detach(dev);
1544 ddb_i2c_release(dev);
1546 ddbwritel(0, INTERRUPT_ENABLE);
1547 free_irq(dev->pdev->irq, dev);
1548 #ifdef CONFIG_PCI_MSI
1550 pci_disable_msi(dev->pdev);
1552 ddb_ports_release(dev);
1553 ddb_buffers_free(dev);
1554 ddb_device_destroy(dev);
1557 pci_set_drvdata(pdev, 0);
1558 pci_disable_device(pdev);
1562 static int __devinit ddb_probe(struct pci_dev *pdev,
1563 const struct pci_device_id *id)
1567 int irq_flag = IRQF_SHARED;
1569 if (pci_enable_device(pdev) < 0)
1572 dev = vmalloc(sizeof(struct ddb));
1575 memset(dev, 0, sizeof(struct ddb));
1578 pci_set_drvdata(pdev, dev);
1579 dev->info = (struct ddb_info *) id->driver_data;
1580 printk(KERN_INFO "DDBridge driver detected: %s\n", dev->info->name);
1582 dev->regs = ioremap(pci_resource_start(dev->pdev, 0),
1583 pci_resource_len(dev->pdev, 0));
1588 printk(KERN_INFO "HW %08x FW %08x\n", ddbreadl(0), ddbreadl(4));
1590 #ifdef CONFIG_PCI_MSI
1591 if (pci_msi_enabled())
1592 stat = pci_enable_msi(dev->pdev);
1594 printk(KERN_INFO ": MSI not available.\n");
1600 stat = request_irq(dev->pdev->irq, irq_handler,
1601 irq_flag, "DDBridge", (void *) dev);
1604 ddbwritel(0, DMA_BASE_WRITE);
1605 ddbwritel(0, DMA_BASE_READ);
1606 ddbwritel(0xffffffff, INTERRUPT_ACK);
1607 ddbwritel(0xfff0f, INTERRUPT_ENABLE);
1608 ddbwritel(0, MSI1_ENABLE);
1610 if (ddb_i2c_init(dev) < 0)
1612 ddb_ports_init(dev);
1613 if (ddb_buffers_alloc(dev) < 0) {
1614 printk(KERN_INFO ": Could not allocate buffer memory\n");
1617 if (ddb_ports_attach(dev) < 0)
1619 ddb_device_create(dev);
1623 ddb_ports_detach(dev);
1624 printk(KERN_ERR "fail3\n");
1625 ddb_ports_release(dev);
1627 printk(KERN_ERR "fail2\n");
1628 ddb_buffers_free(dev);
1630 printk(KERN_ERR "fail1\n");
1632 pci_disable_msi(dev->pdev);
1633 free_irq(dev->pdev->irq, dev);
1635 printk(KERN_ERR "fail\n");
1637 pci_set_drvdata(pdev, 0);
1638 pci_disable_device(pdev);
1642 /******************************************************************************/
1643 /******************************************************************************/
1644 /******************************************************************************/
1646 static struct ddb_info ddb_none = {
1648 .name = "Digital Devices PCIe bridge",
1651 static struct ddb_info ddb_octopus = {
1652 .type = DDB_OCTOPUS,
1653 .name = "Digital Devices Octopus DVB adapter",
1657 static struct ddb_info ddb_octopus_le = {
1658 .type = DDB_OCTOPUS,
1659 .name = "Digital Devices Octopus LE DVB adapter",
1663 static struct ddb_info ddb_v6 = {
1664 .type = DDB_OCTOPUS,
1665 .name = "Digital Devices Cine S2 V6 DVB adapter",
1669 #define DDVID 0xdd01 /* Digital Devices Vendor ID */
1671 #define DDB_ID(_vend, _dev, _subvend, _subdev, _driverdata) { \
1672 .vendor = _vend, .device = _dev, \
1673 .subvendor = _subvend, .subdevice = _subdev, \
1674 .driver_data = (unsigned long)&_driverdata }
1676 static const struct pci_device_id ddb_id_tbl[] __devinitdata = {
1677 DDB_ID(DDVID, 0x0002, DDVID, 0x0001, ddb_octopus),
1678 DDB_ID(DDVID, 0x0003, DDVID, 0x0001, ddb_octopus),
1679 DDB_ID(DDVID, 0x0003, DDVID, 0x0002, ddb_octopus_le),
1680 DDB_ID(DDVID, 0x0003, DDVID, 0x0010, ddb_octopus),
1681 DDB_ID(DDVID, 0x0003, DDVID, 0x0020, ddb_v6),
1682 /* in case sub-ids got deleted in flash */
1683 DDB_ID(DDVID, 0x0003, PCI_ANY_ID, PCI_ANY_ID, ddb_none),
1686 MODULE_DEVICE_TABLE(pci, ddb_id_tbl);
1689 static struct pci_driver ddb_pci_driver = {
1691 .id_table = ddb_id_tbl,
1693 .remove = ddb_remove,
1696 static __init int module_init_ddbridge(void)
1698 printk(KERN_INFO "Digital Devices PCIE bridge driver, "
1699 "Copyright (C) 2010-11 Digital Devices GmbH\n");
1700 if (ddb_class_create())
1702 return pci_register_driver(&ddb_pci_driver);
1705 static __exit void module_exit_ddbridge(void)
1707 pci_unregister_driver(&ddb_pci_driver);
1708 ddb_class_destroy();
1711 module_init(module_init_ddbridge);
1712 module_exit(module_exit_ddbridge);
1714 MODULE_DESCRIPTION("Digital Devices PCIe Bridge");
1715 MODULE_AUTHOR("Ralph Metzler");
1716 MODULE_LICENSE("GPL");
1717 MODULE_VERSION("0.5");