2 Montage Technology DS3000/TS2020 - DVBS/S2 Demodulator/Tuner driver
3 Copyright (C) 2009 Konstantin Dimitrov <kosio.dimitrov@gmail.com>
5 Copyright (C) 2009 TurboSight.com
7 This program is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2 of the License, or
10 (at your option) any later version.
12 This program is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with this program; if not, write to the Free Software
19 Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/slab.h>
23 #include <linux/kernel.h>
24 #include <linux/module.h>
25 #include <linux/moduleparam.h>
26 #include <linux/init.h>
27 #include <linux/firmware.h>
29 #include "dvb_frontend.h"
34 #define dprintk(args...) \
40 /* as of March 2009 current DS3000 firmware version is 1.78 */
41 /* DS3000 FW v1.78 MD5: a32d17910c4f370073f9346e71d34b80 */
42 #define DS3000_DEFAULT_FIRMWARE "dvb-fe-ds3000.fw"
44 #define DS3000_SAMPLE_RATE 96000 /* in kHz */
45 #define DS3000_XTAL_FREQ 27000 /* in kHz */
47 /* Register values to initialise the demod in DVB-S mode */
48 static u8 ds3000_dvbs_init_tab[] = {
132 /* Register values to initialise the demod in DVB-S2 mode */
133 static u8 ds3000_dvbs2_init_tab[] = {
232 /* DS3000 doesn't need some parameters as input and auto-detects them */
233 /* save input from the application of those parameters */
234 struct ds3000_tuning {
237 fe_spectral_inversion_t inversion;
238 enum fe_code_rate fec;
242 fe_modulation_t delivery;
246 struct ds3000_state {
247 struct i2c_adapter *i2c;
248 const struct ds3000_config *config;
250 struct dvb_frontend frontend;
252 struct ds3000_tuning dcur;
253 struct ds3000_tuning dnxt;
257 /* previous uncorrected block counter for DVB-S2 */
261 static int ds3000_writereg(struct ds3000_state *state, int reg, int data)
263 u8 buf[] = { reg, data };
264 struct i2c_msg msg = { .addr = state->config->demod_address,
265 .flags = 0, .buf = buf, .len = 2 };
268 dprintk("%s: write reg 0x%02x, value 0x%02x\n", __func__, reg, data);
270 err = i2c_transfer(state->i2c, &msg, 1);
272 printk(KERN_ERR "%s: writereg error(err == %i, reg == 0x%02x,"
273 " value == 0x%02x)\n", __func__, err, reg, data);
280 static int ds3000_tuner_writereg(struct ds3000_state *state, int reg, int data)
282 u8 buf[] = { reg, data };
283 struct i2c_msg msg = { .addr = 0x60,
284 .flags = 0, .buf = buf, .len = 2 };
287 dprintk("%s: write reg 0x%02x, value 0x%02x\n", __func__, reg, data);
289 ds3000_writereg(state, 0x03, 0x11);
290 err = i2c_transfer(state->i2c, &msg, 1);
292 printk("%s: writereg error(err == %i, reg == 0x%02x,"
293 " value == 0x%02x)\n", __func__, err, reg, data);
300 /* I2C write for 8k firmware load */
301 static int ds3000_writeFW(struct ds3000_state *state, int reg,
302 const u8 *data, u16 len)
304 int i, ret = -EREMOTEIO;
308 buf = kmalloc(3, GFP_KERNEL);
310 printk(KERN_ERR "Unable to kmalloc\n");
317 msg.addr = state->config->demod_address;
322 for (i = 0; i < len; i += 2) {
323 memcpy(buf + 1, data + i, 2);
325 dprintk("%s: write reg 0x%02x, len = %d\n", __func__, reg, len);
327 ret = i2c_transfer(state->i2c, &msg, 1);
329 printk(KERN_ERR "%s: write error(err == %i, "
330 "reg == 0x%02x\n", __func__, ret, reg);
341 static int ds3000_readreg(struct ds3000_state *state, u8 reg)
346 struct i2c_msg msg[] = {
348 .addr = state->config->demod_address,
353 .addr = state->config->demod_address,
360 ret = i2c_transfer(state->i2c, msg, 2);
363 printk(KERN_ERR "%s: reg=0x%x(error=%d)\n", __func__, reg, ret);
367 dprintk("%s: read reg 0x%02x, value 0x%02x\n", __func__, reg, b1[0]);
372 static int ds3000_tuner_readreg(struct ds3000_state *state, u8 reg)
377 struct i2c_msg msg[] = {
391 ds3000_writereg(state, 0x03, 0x12);
392 ret = i2c_transfer(state->i2c, msg, 2);
395 printk(KERN_ERR "%s: reg=0x%x(error=%d)\n", __func__, reg, ret);
399 dprintk("%s: read reg 0x%02x, value 0x%02x\n", __func__, reg, b1[0]);
404 static int ds3000_set_inversion(struct ds3000_state *state,
405 fe_spectral_inversion_t inversion)
407 dprintk("%s(%d)\n", __func__, inversion);
418 state->dnxt.inversion = inversion;
423 static int ds3000_set_symbolrate(struct ds3000_state *state, u32 rate)
427 dprintk("%s()\n", __func__);
429 dprintk("%s() symbol_rate = %d\n", __func__, state->dnxt.symbol_rate);
431 /* check if symbol rate is within limits */
432 if ((state->dnxt.symbol_rate >
433 state->frontend.ops.info.symbol_rate_max) ||
434 (state->dnxt.symbol_rate <
435 state->frontend.ops.info.symbol_rate_min))
438 state->dnxt.symbol_rate = rate;
443 static int ds3000_load_firmware(struct dvb_frontend *fe,
444 const struct firmware *fw);
446 static int ds3000_firmware_ondemand(struct dvb_frontend *fe)
448 struct ds3000_state *state = fe->demodulator_priv;
449 const struct firmware *fw;
452 dprintk("%s()\n", __func__);
454 if (ds3000_readreg(state, 0xb2) <= 0)
457 if (state->skip_fw_load)
460 /* request the firmware, this will block until someone uploads it */
461 printk(KERN_INFO "%s: Waiting for firmware upload (%s)...\n", __func__,
462 DS3000_DEFAULT_FIRMWARE);
463 ret = request_firmware(&fw, DS3000_DEFAULT_FIRMWARE,
464 state->i2c->dev.parent);
465 printk(KERN_INFO "%s: Waiting for firmware upload(2)...\n", __func__);
467 printk(KERN_ERR "%s: No firmware uploaded (timeout or file not "
468 "found?)\n", __func__);
472 /* Make sure we don't recurse back through here during loading */
473 state->skip_fw_load = 1;
475 ret = ds3000_load_firmware(fe, fw);
477 printk("%s: Writing firmware to device failed\n", __func__);
479 release_firmware(fw);
481 dprintk("%s: Firmware upload %s\n", __func__,
482 ret == 0 ? "complete" : "failed");
484 /* Ensure firmware is always loaded if required */
485 state->skip_fw_load = 0;
490 static int ds3000_load_firmware(struct dvb_frontend *fe,
491 const struct firmware *fw)
493 struct ds3000_state *state = fe->demodulator_priv;
495 dprintk("%s\n", __func__);
496 dprintk("Firmware is %zu bytes (%02x %02x .. %02x %02x)\n",
500 fw->data[fw->size - 2],
501 fw->data[fw->size - 1]);
503 /* Begin the firmware load process */
504 ds3000_writereg(state, 0xb2, 0x01);
505 /* write the entire firmware */
506 ds3000_writeFW(state, 0xb0, fw->data, fw->size);
507 ds3000_writereg(state, 0xb2, 0x00);
512 static void ds3000_dump_registers(struct dvb_frontend *fe)
514 struct ds3000_state *state = fe->demodulator_priv;
515 int x, y, reg = 0, val;
517 for (y = 0; y < 16; y++) {
518 dprintk("%s: %02x: ", __func__, y);
519 for (x = 0; x < 16; x++) {
521 val = ds3000_readreg(state, reg);
523 dprintk("%02x ", val);
525 dprintk("%02x\n", val);
528 dprintk("%s: -- DS3000 DUMP DONE --\n", __func__);
531 static int ds3000_read_status(struct dvb_frontend *fe, fe_status_t* status)
533 struct ds3000_state *state = fe->demodulator_priv;
534 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
539 switch (c->delivery_system) {
541 lock = ds3000_readreg(state, 0xd1);
542 if ((lock & 0x07) == 0x07)
543 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
544 FE_HAS_VITERBI | FE_HAS_SYNC |
549 lock = ds3000_readreg(state, 0x0d);
550 if ((lock & 0x8f) == 0x8f)
551 *status = FE_HAS_SIGNAL | FE_HAS_CARRIER |
552 FE_HAS_VITERBI | FE_HAS_SYNC |
560 dprintk("%s: status = 0x%02x\n", __func__, lock);
565 #define FE_IS_TUNED (FE_HAS_SIGNAL + FE_HAS_LOCK)
566 static int ds3000_is_tuned(struct dvb_frontend *fe)
568 fe_status_t tunerstat;
570 ds3000_read_status(fe, &tunerstat);
572 return ((tunerstat & FE_IS_TUNED) == FE_IS_TUNED);
575 /* read DS3000 BER value */
576 static int ds3000_read_ber(struct dvb_frontend *fe, u32* ber)
578 struct ds3000_state *state = fe->demodulator_priv;
579 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
581 u32 ber_reading, lpdc_frames;
583 dprintk("%s()\n", __func__);
585 switch (c->delivery_system) {
587 /* set the number of bytes checked during
589 ds3000_writereg(state, 0xf9, 0x04);
590 /* read BER estimation status */
591 data = ds3000_readreg(state, 0xf8);
592 /* check if BER estimation is ready */
593 if ((data & 0x10) == 0) {
594 /* this is the number of error bits,
595 to calculate the bit error rate
597 *ber = (ds3000_readreg(state, 0xf7) << 8) |
598 ds3000_readreg(state, 0xf6);
599 /* start counting error bits */
600 /* need to be set twice
601 otherwise it fails sometimes */
603 ds3000_writereg(state, 0xf8, data);
604 ds3000_writereg(state, 0xf8, data);
606 /* used to indicate that BER estimation
607 is not ready, i.e. BER is unknown */
611 /* read the number of LPDC decoded frames */
612 lpdc_frames = (ds3000_readreg(state, 0xd7) << 16) |
613 (ds3000_readreg(state, 0xd6) << 8) |
614 ds3000_readreg(state, 0xd5);
615 /* read the number of packets with bad CRC */
616 ber_reading = (ds3000_readreg(state, 0xf8) << 8) |
617 ds3000_readreg(state, 0xf7);
618 if (lpdc_frames > 750) {
619 /* clear LPDC frame counters */
620 ds3000_writereg(state, 0xd1, 0x01);
621 /* clear bad packets counter */
622 ds3000_writereg(state, 0xf9, 0x01);
623 /* enable bad packets counter */
624 ds3000_writereg(state, 0xf9, 0x00);
625 /* enable LPDC frame counters */
626 ds3000_writereg(state, 0xd1, 0x00);
629 /* used to indicate that BER estimation is not ready,
630 i.e. BER is unknown */
640 /* read TS2020 signal strength */
641 static int ds3000_read_signal_strength(struct dvb_frontend *fe,
642 u16 *signal_strength)
644 struct ds3000_state *state = fe->demodulator_priv;
645 u16 sig_reading, sig_strength;
648 dprintk("%s()\n", __func__);
650 rfgain = ds3000_tuner_readreg(state, 0x3d) & 0x1f;
651 bbgain = ds3000_tuner_readreg(state, 0x21) & 0x1f;
658 sig_reading = rfgain * 2 + bbgain * 3;
660 sig_strength = 40 + (64 - sig_reading) * 50 / 64 ;
662 /* cook the value to be suitable for szap-s2 human readable output */
663 *signal_strength = sig_strength * 1000;
665 dprintk("%s: raw / cooked = 0x%04x / 0x%04x\n", __func__,
666 sig_reading, *signal_strength);
671 /* calculate DS3000 snr value in dB */
672 static int ds3000_read_snr(struct dvb_frontend *fe, u16 *snr)
674 struct ds3000_state *state = fe->demodulator_priv;
675 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
676 u8 snr_reading, snr_value;
677 u32 dvbs2_signal_reading, dvbs2_noise_reading, tmp;
678 static const u16 dvbs_snr_tab[] = { /* 20 x Table (rounded up) */
679 0x0000, 0x1b13, 0x2aea, 0x3627, 0x3ede, 0x45fe, 0x4c03,
680 0x513a, 0x55d4, 0x59f2, 0x5dab, 0x6111, 0x6431, 0x6717,
681 0x69c9, 0x6c4e, 0x6eac, 0x70e8, 0x7304, 0x7505
683 static const u16 dvbs2_snr_tab[] = { /* 80 x Table (rounded up) */
684 0x0000, 0x0bc2, 0x12a3, 0x1785, 0x1b4e, 0x1e65, 0x2103,
685 0x2347, 0x2546, 0x2710, 0x28ae, 0x2a28, 0x2b83, 0x2cc5,
686 0x2df1, 0x2f09, 0x3010, 0x3109, 0x31f4, 0x32d2, 0x33a6,
687 0x3470, 0x3531, 0x35ea, 0x369b, 0x3746, 0x37ea, 0x3888,
688 0x3920, 0x39b3, 0x3a42, 0x3acc, 0x3b51, 0x3bd3, 0x3c51,
689 0x3ccb, 0x3d42, 0x3db6, 0x3e27, 0x3e95, 0x3f00, 0x3f68,
690 0x3fcf, 0x4033, 0x4094, 0x40f4, 0x4151, 0x41ac, 0x4206,
691 0x425e, 0x42b4, 0x4308, 0x435b, 0x43ac, 0x43fc, 0x444a,
692 0x4497, 0x44e2, 0x452d, 0x4576, 0x45bd, 0x4604, 0x4649,
693 0x468e, 0x46d1, 0x4713, 0x4755, 0x4795, 0x47d4, 0x4813,
694 0x4851, 0x488d, 0x48c9, 0x4904, 0x493f, 0x4978, 0x49b1,
695 0x49e9, 0x4a20, 0x4a57
698 dprintk("%s()\n", __func__);
700 switch (c->delivery_system) {
702 snr_reading = ds3000_readreg(state, 0xff);
704 if (snr_reading == 0)
707 if (snr_reading > 20)
709 snr_value = dvbs_snr_tab[snr_reading - 1] * 10 / 23026;
710 /* cook the value to be suitable for szap-s2
711 human readable output */
712 *snr = snr_value * 8 * 655;
714 dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__,
718 dvbs2_noise_reading = (ds3000_readreg(state, 0x8c) & 0x3f) +
719 (ds3000_readreg(state, 0x8d) << 4);
720 dvbs2_signal_reading = ds3000_readreg(state, 0x8e);
721 tmp = dvbs2_signal_reading * dvbs2_signal_reading >> 1;
722 if (dvbs2_signal_reading == 0) {
726 if (dvbs2_noise_reading == 0) {
728 /* cook the value to be suitable for szap-s2
729 human readable output */
733 if (tmp > dvbs2_noise_reading) {
734 snr_reading = tmp / dvbs2_noise_reading;
735 if (snr_reading > 80)
737 snr_value = dvbs2_snr_tab[snr_reading - 1] / 1000;
738 /* cook the value to be suitable for szap-s2
739 human readable output */
740 *snr = snr_value * 5 * 655;
742 snr_reading = dvbs2_noise_reading / tmp;
743 if (snr_reading > 80)
745 *snr = -(dvbs2_snr_tab[snr_reading] / 1000);
747 dprintk("%s: raw / cooked = 0x%02x / 0x%04x\n", __func__,
757 /* read DS3000 uncorrected blocks */
758 static int ds3000_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
760 struct ds3000_state *state = fe->demodulator_priv;
761 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
765 dprintk("%s()\n", __func__);
767 switch (c->delivery_system) {
769 *ucblocks = (ds3000_readreg(state, 0xf5) << 8) |
770 ds3000_readreg(state, 0xf4);
771 data = ds3000_readreg(state, 0xf8);
772 /* clear packet counters */
774 ds3000_writereg(state, 0xf8, data);
775 /* enable packet counters */
777 ds3000_writereg(state, 0xf8, data);
780 _ucblocks = (ds3000_readreg(state, 0xe2) << 8) |
781 ds3000_readreg(state, 0xe1);
782 if (_ucblocks > state->prevUCBS2)
783 *ucblocks = _ucblocks - state->prevUCBS2;
785 *ucblocks = state->prevUCBS2 - _ucblocks;
786 state->prevUCBS2 = _ucblocks;
795 /* Overwrite the current tuning params, we are about to tune */
796 static void ds3000_clone_params(struct dvb_frontend *fe)
798 struct ds3000_state *state = fe->demodulator_priv;
799 memcpy(&state->dcur, &state->dnxt, sizeof(state->dcur));
802 static int ds3000_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
804 struct ds3000_state *state = fe->demodulator_priv;
807 dprintk("%s(%d)\n", __func__, tone);
808 if ((tone != SEC_TONE_ON) && (tone != SEC_TONE_OFF)) {
809 printk(KERN_ERR "%s: Invalid, tone=%d\n", __func__, tone);
813 data = ds3000_readreg(state, 0xa2);
815 ds3000_writereg(state, 0xa2, data);
819 dprintk("%s: setting tone on\n", __func__);
820 data = ds3000_readreg(state, 0xa1);
823 ds3000_writereg(state, 0xa1, data);
826 dprintk("%s: setting tone off\n", __func__);
827 data = ds3000_readreg(state, 0xa2);
829 ds3000_writereg(state, 0xa2, data);
836 static int ds3000_send_diseqc_msg(struct dvb_frontend *fe,
837 struct dvb_diseqc_master_cmd *d)
839 struct ds3000_state *state = fe->demodulator_priv;
843 /* Dump DiSEqC message */
844 dprintk("%s(", __func__);
845 for (i = 0 ; i < d->msg_len;) {
846 dprintk("0x%02x", d->msg[i]);
847 if (++i < d->msg_len)
851 /* enable DiSEqC message send pin */
852 data = ds3000_readreg(state, 0xa2);
854 ds3000_writereg(state, 0xa2, data);
857 for (i = 0; i < d->msg_len; i++)
858 ds3000_writereg(state, 0xa3 + i, d->msg[i]);
860 data = ds3000_readreg(state, 0xa1);
861 /* clear DiSEqC message length and status,
862 enable DiSEqC message send */
864 /* set DiSEqC mode, modulation active during 33 pulses,
865 set DiSEqC message length */
866 data |= ((d->msg_len - 1) << 3) | 0x07;
867 ds3000_writereg(state, 0xa1, data);
869 /* wait up to 150ms for DiSEqC transmission to complete */
870 for (i = 0; i < 15; i++) {
871 data = ds3000_readreg(state, 0xa1);
872 if ((data & 0x40) == 0)
877 /* DiSEqC timeout after 150ms */
879 data = ds3000_readreg(state, 0xa1);
882 ds3000_writereg(state, 0xa1, data);
884 data = ds3000_readreg(state, 0xa2);
887 ds3000_writereg(state, 0xa2, data);
892 data = ds3000_readreg(state, 0xa2);
895 ds3000_writereg(state, 0xa2, data);
900 /* Send DiSEqC burst */
901 static int ds3000_diseqc_send_burst(struct dvb_frontend *fe,
902 fe_sec_mini_cmd_t burst)
904 struct ds3000_state *state = fe->demodulator_priv;
908 dprintk("%s()\n", __func__);
910 data = ds3000_readreg(state, 0xa2);
912 ds3000_writereg(state, 0xa2, data);
915 if (burst == SEC_MINI_A)
916 /* Unmodulated tone burst */
917 ds3000_writereg(state, 0xa1, 0x02);
918 else if (burst == SEC_MINI_B)
919 /* Modulated tone burst */
920 ds3000_writereg(state, 0xa1, 0x01);
925 for (i = 0; i < 5; i++) {
926 data = ds3000_readreg(state, 0xa1);
927 if ((data & 0x40) == 0)
933 data = ds3000_readreg(state, 0xa1);
936 ds3000_writereg(state, 0xa1, data);
938 data = ds3000_readreg(state, 0xa2);
941 ds3000_writereg(state, 0xa2, data);
946 data = ds3000_readreg(state, 0xa2);
949 ds3000_writereg(state, 0xa2, data);
954 static void ds3000_release(struct dvb_frontend *fe)
956 struct ds3000_state *state = fe->demodulator_priv;
957 dprintk("%s\n", __func__);
961 static struct dvb_frontend_ops ds3000_ops;
963 struct dvb_frontend *ds3000_attach(const struct ds3000_config *config,
964 struct i2c_adapter *i2c)
966 struct ds3000_state *state = NULL;
969 dprintk("%s\n", __func__);
971 /* allocate memory for the internal state */
972 state = kmalloc(sizeof(struct ds3000_state), GFP_KERNEL);
974 printk(KERN_ERR "Unable to kmalloc\n");
978 /* setup the state */
979 memset(state, 0, sizeof(struct ds3000_state));
981 state->config = config;
983 state->prevUCBS2 = 0;
985 /* check if the demod is present */
986 ret = ds3000_readreg(state, 0x00) & 0xfe;
988 printk(KERN_ERR "Invalid probe, probably not a DS3000\n");
992 printk(KERN_INFO "DS3000 chip version: %d.%d attached.\n",
993 ds3000_readreg(state, 0x02),
994 ds3000_readreg(state, 0x01));
996 memcpy(&state->frontend.ops, &ds3000_ops,
997 sizeof(struct dvb_frontend_ops));
998 state->frontend.demodulator_priv = state;
999 return &state->frontend;
1006 EXPORT_SYMBOL(ds3000_attach);
1008 static int ds3000_set_property(struct dvb_frontend *fe,
1009 struct dtv_property *tvp)
1011 dprintk("%s(..)\n", __func__);
1015 static int ds3000_get_property(struct dvb_frontend *fe,
1016 struct dtv_property *tvp)
1018 dprintk("%s(..)\n", __func__);
1022 static int ds3000_tune(struct dvb_frontend *fe,
1023 struct dvb_frontend_parameters *p)
1025 struct ds3000_state *state = fe->demodulator_priv;
1026 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
1028 int ret = 0, retune, i;
1029 u8 status, mlpf, mlpf_new, mlpf_max, mlpf_min, nlpf;
1033 dprintk("%s() ", __func__);
1035 /* Load the firmware if required */
1036 ret = ds3000_firmware_ondemand(fe);
1038 printk(KERN_ERR "%s: Unable initialise the firmware\n",
1043 state->dnxt.delivery = c->modulation;
1044 state->dnxt.frequency = c->frequency;
1045 state->dnxt.rolloff = 2; /* fixme */
1046 state->dnxt.fec = c->fec_inner;
1048 ret = ds3000_set_inversion(state, p->inversion);
1052 ret = ds3000_set_symbolrate(state, c->symbol_rate);
1056 /* discard the 'current' tuning parameters and prepare to tune */
1057 ds3000_clone_params(fe);
1059 retune = 1; /* try 1 times */
1060 dprintk("%s: retune = %d\n", __func__, retune);
1061 dprintk("%s: frequency = %d\n", __func__, state->dcur.frequency);
1062 dprintk("%s: symbol_rate = %d\n", __func__, state->dcur.symbol_rate);
1063 dprintk("%s: FEC = %d \n", __func__,
1065 dprintk("%s: Inversion = %d\n", __func__, state->dcur.inversion);
1068 /* Reset status register */
1072 ds3000_tuner_writereg(state, 0x42, 0x73);
1073 ds3000_tuner_writereg(state, 0x05, 0x01);
1074 ds3000_tuner_writereg(state, 0x62, 0xf5);
1076 ds3000_tuner_writereg(state, 0x07, 0x02);
1077 ds3000_tuner_writereg(state, 0x10, 0x00);
1078 ds3000_tuner_writereg(state, 0x60, 0x79);
1079 ds3000_tuner_writereg(state, 0x08, 0x01);
1080 ds3000_tuner_writereg(state, 0x00, 0x01);
1081 /* calculate and set freq divider */
1082 if (state->dcur.frequency < 1146000) {
1083 ds3000_tuner_writereg(state, 0x10, 0x11);
1084 ndiv = ((state->dcur.frequency * (6 + 8) * 4) +
1085 (DS3000_XTAL_FREQ / 2)) /
1086 DS3000_XTAL_FREQ - 1024;
1088 ds3000_tuner_writereg(state, 0x10, 0x01);
1089 ndiv = ((state->dcur.frequency * (6 + 8) * 2) +
1090 (DS3000_XTAL_FREQ / 2)) /
1091 DS3000_XTAL_FREQ - 1024;
1094 ds3000_tuner_writereg(state, 0x01, (ndiv & 0x0f00) >> 8);
1095 ds3000_tuner_writereg(state, 0x02, ndiv & 0x00ff);
1098 ds3000_tuner_writereg(state, 0x03, 0x06);
1099 ds3000_tuner_writereg(state, 0x51, 0x0f);
1100 ds3000_tuner_writereg(state, 0x51, 0x1f);
1101 ds3000_tuner_writereg(state, 0x50, 0x10);
1102 ds3000_tuner_writereg(state, 0x50, 0x00);
1106 ds3000_tuner_writereg(state, 0x51, 0x17);
1107 ds3000_tuner_writereg(state, 0x51, 0x1f);
1108 ds3000_tuner_writereg(state, 0x50, 0x08);
1109 ds3000_tuner_writereg(state, 0x50, 0x00);
1112 value = ds3000_tuner_readreg(state, 0x3d);
1114 if ((value > 4) && (value < 15)) {
1118 value = ((value << 3) | 0x01) & 0x79;
1121 ds3000_tuner_writereg(state, 0x60, value);
1122 ds3000_tuner_writereg(state, 0x51, 0x17);
1123 ds3000_tuner_writereg(state, 0x51, 0x1f);
1124 ds3000_tuner_writereg(state, 0x50, 0x08);
1125 ds3000_tuner_writereg(state, 0x50, 0x00);
1127 /* set low-pass filter period */
1128 ds3000_tuner_writereg(state, 0x04, 0x2e);
1129 ds3000_tuner_writereg(state, 0x51, 0x1b);
1130 ds3000_tuner_writereg(state, 0x51, 0x1f);
1131 ds3000_tuner_writereg(state, 0x50, 0x04);
1132 ds3000_tuner_writereg(state, 0x50, 0x00);
1135 f3db = ((state->dcur.symbol_rate / 1000) << 2) / 5 + 2000;
1136 if ((state->dcur.symbol_rate / 1000) < 5000)
1143 /* set low-pass filter baseband */
1144 value = ds3000_tuner_readreg(state, 0x26);
1145 mlpf = 0x2e * 207 / ((value << 1) + 151);
1146 mlpf_max = mlpf * 135 / 100;
1147 mlpf_min = mlpf * 78 / 100;
1151 /* rounded to the closest integer */
1152 nlpf = ((mlpf * f3db * 1000) + (2766 * DS3000_XTAL_FREQ / 2))
1153 / (2766 * DS3000_XTAL_FREQ);
1159 /* rounded to the closest integer */
1160 mlpf_new = ((DS3000_XTAL_FREQ * nlpf * 2766) +
1161 (1000 * f3db / 2)) / (1000 * f3db);
1163 if (mlpf_new < mlpf_min) {
1165 mlpf_new = ((DS3000_XTAL_FREQ * nlpf * 2766) +
1166 (1000 * f3db / 2)) / (1000 * f3db);
1169 if (mlpf_new > mlpf_max)
1170 mlpf_new = mlpf_max;
1172 ds3000_tuner_writereg(state, 0x04, mlpf_new);
1173 ds3000_tuner_writereg(state, 0x06, nlpf);
1174 ds3000_tuner_writereg(state, 0x51, 0x1b);
1175 ds3000_tuner_writereg(state, 0x51, 0x1f);
1176 ds3000_tuner_writereg(state, 0x50, 0x04);
1177 ds3000_tuner_writereg(state, 0x50, 0x00);
1181 ds3000_tuner_writereg(state, 0x51, 0x1e);
1182 ds3000_tuner_writereg(state, 0x51, 0x1f);
1183 ds3000_tuner_writereg(state, 0x50, 0x01);
1184 ds3000_tuner_writereg(state, 0x50, 0x00);
1187 /* ds3000 global reset */
1188 ds3000_writereg(state, 0x07, 0x80);
1189 ds3000_writereg(state, 0x07, 0x00);
1190 /* ds3000 build-in uC reset */
1191 ds3000_writereg(state, 0xb2, 0x01);
1192 /* ds3000 software reset */
1193 ds3000_writereg(state, 0x00, 0x01);
1195 switch (c->delivery_system) {
1197 /* initialise the demod in DVB-S mode */
1198 for (i = 0; i < sizeof(ds3000_dvbs_init_tab); i += 2)
1199 ds3000_writereg(state,
1200 ds3000_dvbs_init_tab[i],
1201 ds3000_dvbs_init_tab[i + 1]);
1202 value = ds3000_readreg(state, 0xfe);
1205 ds3000_writereg(state, 0xfe, value);
1208 /* initialise the demod in DVB-S2 mode */
1209 for (i = 0; i < sizeof(ds3000_dvbs2_init_tab); i += 2)
1210 ds3000_writereg(state,
1211 ds3000_dvbs2_init_tab[i],
1212 ds3000_dvbs2_init_tab[i + 1]);
1213 ds3000_writereg(state, 0xfe, 0x54);
1219 /* enable 27MHz clock output */
1220 ds3000_writereg(state, 0x29, 0x80);
1221 /* enable ac coupling */
1222 ds3000_writereg(state, 0x25, 0x8a);
1224 /* enhance symbol rate performance */
1225 if ((state->dcur.symbol_rate / 1000) <= 5000) {
1226 value = 29777 / (state->dcur.symbol_rate / 1000) + 1;
1229 ds3000_writereg(state, 0xc3, 0x0d);
1230 ds3000_writereg(state, 0xc8, value);
1231 ds3000_writereg(state, 0xc4, 0x10);
1232 ds3000_writereg(state, 0xc7, 0x0e);
1233 } else if ((state->dcur.symbol_rate / 1000) <= 10000) {
1234 value = 92166 / (state->dcur.symbol_rate / 1000) + 1;
1237 ds3000_writereg(state, 0xc3, 0x07);
1238 ds3000_writereg(state, 0xc8, value);
1239 ds3000_writereg(state, 0xc4, 0x09);
1240 ds3000_writereg(state, 0xc7, 0x12);
1241 } else if ((state->dcur.symbol_rate / 1000) <= 20000) {
1242 value = 64516 / (state->dcur.symbol_rate / 1000) + 1;
1243 ds3000_writereg(state, 0xc3, value);
1244 ds3000_writereg(state, 0xc8, 0x0e);
1245 ds3000_writereg(state, 0xc4, 0x07);
1246 ds3000_writereg(state, 0xc7, 0x18);
1248 value = 129032 / (state->dcur.symbol_rate / 1000) + 1;
1249 ds3000_writereg(state, 0xc3, value);
1250 ds3000_writereg(state, 0xc8, 0x0a);
1251 ds3000_writereg(state, 0xc4, 0x05);
1252 ds3000_writereg(state, 0xc7, 0x24);
1255 /* normalized symbol rate rounded to the closest integer */
1256 value = (((state->dcur.symbol_rate / 1000) << 16) +
1257 (DS3000_SAMPLE_RATE / 2)) / DS3000_SAMPLE_RATE;
1258 ds3000_writereg(state, 0x61, value & 0x00ff);
1259 ds3000_writereg(state, 0x62, (value & 0xff00) >> 8);
1261 /* co-channel interference cancellation disabled */
1262 ds3000_writereg(state, 0x56, 0x00);
1264 /* equalizer disabled */
1265 ds3000_writereg(state, 0x76, 0x00);
1267 /*ds3000_writereg(state, 0x08, 0x03);
1268 ds3000_writereg(state, 0xfd, 0x22);
1269 ds3000_writereg(state, 0x08, 0x07);
1270 ds3000_writereg(state, 0xfd, 0x42);
1271 ds3000_writereg(state, 0x08, 0x07);*/
1273 /* ds3000 out of software reset */
1274 ds3000_writereg(state, 0x00, 0x00);
1275 /* start ds3000 build-in uC */
1276 ds3000_writereg(state, 0xb2, 0x00);
1278 /* TODO: calculate and set carrier offset */
1280 /* wait before retrying */
1281 for (i = 0; i < 30 ; i++) {
1282 if (ds3000_is_tuned(fe)) {
1283 dprintk("%s: Tuned\n", __func__);
1284 ds3000_dump_registers(fe);
1290 dprintk("%s: Not tuned\n", __func__);
1291 ds3000_dump_registers(fe);
1299 static enum dvbfe_algo ds3000_get_algo(struct dvb_frontend *fe)
1301 dprintk("%s()\n", __func__);
1302 return DVBFE_ALGO_SW;
1306 * Initialise or wake up device
1308 * Power config will reset and load initial firmware if required
1310 static int ds3000_initfe(struct dvb_frontend *fe)
1312 dprintk("%s()\n", __func__);
1316 /* Put device to sleep */
1317 static int ds3000_sleep(struct dvb_frontend *fe)
1319 dprintk("%s()\n", __func__);
1323 static struct dvb_frontend_ops ds3000_ops = {
1326 .name = "Montage Technology DS3000/TS2020",
1328 .frequency_min = 950000,
1329 .frequency_max = 2150000,
1330 .frequency_stepsize = 1011, /* kHz for QPSK frontends */
1331 .frequency_tolerance = 5000,
1332 .symbol_rate_min = 1000000,
1333 .symbol_rate_max = 45000000,
1334 .caps = FE_CAN_INVERSION_AUTO |
1335 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1336 FE_CAN_FEC_4_5 | FE_CAN_FEC_5_6 | FE_CAN_FEC_6_7 |
1337 FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1338 FE_CAN_2G_MODULATION |
1339 FE_CAN_QPSK | FE_CAN_RECOVER
1342 .release = ds3000_release,
1344 .init = ds3000_initfe,
1345 .sleep = ds3000_sleep,
1346 .read_status = ds3000_read_status,
1347 .read_ber = ds3000_read_ber,
1348 .read_signal_strength = ds3000_read_signal_strength,
1349 .read_snr = ds3000_read_snr,
1350 .read_ucblocks = ds3000_read_ucblocks,
1351 .set_tone = ds3000_set_tone,
1352 .diseqc_send_master_cmd = ds3000_send_diseqc_msg,
1353 .diseqc_send_burst = ds3000_diseqc_send_burst,
1354 .get_frontend_algo = ds3000_get_algo,
1356 .set_property = ds3000_set_property,
1357 .get_property = ds3000_get_property,
1358 .set_frontend = ds3000_tune,
1361 module_param(debug, int, 0644);
1362 MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
1364 MODULE_DESCRIPTION("DVB Frontend module for Montage Technology "
1365 "DS3000/TS2020 hardware");
1366 MODULE_AUTHOR("Konstantin Dimitrov");
1367 MODULE_LICENSE("GPL");