2 * Support for LGDT3302 and LGDT3303 - VSB/QAM
4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * NOTES ABOUT THIS DRIVER
25 * This Linux driver supports:
26 * DViCO FusionHDTV 3 Gold-Q
27 * DViCO FusionHDTV 3 Gold-T
28 * DViCO FusionHDTV 5 Gold
29 * DViCO FusionHDTV 5 Lite
32 * signal strength always returns 0.
36 #include <linux/kernel.h>
37 #include <linux/module.h>
38 #include <linux/moduleparam.h>
39 #include <linux/init.h>
40 #include <linux/delay.h>
41 #include <linux/string.h>
42 #include <linux/slab.h>
43 #include <asm/byteorder.h>
45 #include "dvb_frontend.h"
46 #include "lgdt330x_priv.h"
50 module_param(debug, int, 0644);
51 MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
52 #define dprintk(args...) \
54 if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
59 struct i2c_adapter* i2c;
60 struct dvb_frontend_ops ops;
62 /* Configuration settings */
63 const struct lgdt330x_config* config;
65 struct dvb_frontend frontend;
67 /* Demodulator private data */
68 fe_modulation_t current_modulation;
70 /* Tuner private data */
71 u32 current_frequency;
74 static int i2c_write_demod_bytes (struct lgdt330x_state* state,
75 u8 *buf, /* data bytes to send */
76 int len /* number of bytes to send */ )
79 { .addr = state->config->demod_address,
86 for (i=0; i<len-1; i+=2){
87 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
88 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
100 * This routine writes the register (reg) to the demod bus
101 * then reads the data returned for (len) bytes.
104 static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
105 enum I2C_REG reg, u8* buf, int len)
108 struct i2c_msg msg [] = {
109 { .addr = state->config->demod_address,
110 .flags = 0, .buf = wr, .len = 1 },
111 { .addr = state->config->demod_address,
112 .flags = I2C_M_RD, .buf = buf, .len = len },
115 ret = i2c_transfer(state->i2c, msg, 2);
117 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __FUNCTION__, state->config->demod_address, reg, ret);
125 static int lgdt3302_SwReset(struct lgdt330x_state* state)
130 0x00 /* bit 6 is active low software reset
131 * bits 5-0 are 1 to mask interrupts */
134 ret = i2c_write_demod_bytes(state,
135 reset, sizeof(reset));
138 /* force reset high (inactive) and unmask interrupts */
140 ret = i2c_write_demod_bytes(state,
141 reset, sizeof(reset));
146 static int lgdt3303_SwReset(struct lgdt330x_state* state)
151 0x00 /* bit 0 is active low software reset */
154 ret = i2c_write_demod_bytes(state,
155 reset, sizeof(reset));
158 /* force reset high (inactive) */
160 ret = i2c_write_demod_bytes(state,
161 reset, sizeof(reset));
166 static int lgdt330x_SwReset(struct lgdt330x_state* state)
168 switch (state->config->demod_chip) {
170 return lgdt3302_SwReset(state);
172 return lgdt3303_SwReset(state);
178 static int lgdt330x_init(struct dvb_frontend* fe)
180 /* Hardware reset is done using gpio[0] of cx23880x chip.
181 * I'd like to do it here, but don't know how to find chip address.
182 * cx88-cards.c arranges for the reset bit to be inactive (high).
183 * Maybe there needs to be a callable function in cx88-core or
184 * the caller of this function needs to do it. */
187 * Array of byte pairs <address, value>
188 * to initialize each different chip
190 static u8 lgdt3302_init_data[] = {
191 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
192 /* Change the value of NCOCTFV[25:0] of carrier
193 recovery center frequency register */
194 VSB_CARRIER_FREQ0, 0x00,
195 VSB_CARRIER_FREQ1, 0x87,
196 VSB_CARRIER_FREQ2, 0x8e,
197 VSB_CARRIER_FREQ3, 0x01,
198 /* Change the TPCLK pin polarity
199 data is valid on falling clock */
201 /* Change the value of IFBW[11:0] of
202 AGC IF/RF loop filter bandwidth register */
203 AGC_RF_BANDWIDTH0, 0x40,
204 AGC_RF_BANDWIDTH1, 0x93,
205 AGC_RF_BANDWIDTH2, 0x00,
206 /* Change the value of bit 6, 'nINAGCBY' and
207 'NSSEL[1:0] of ACG function control register 2 */
208 AGC_FUNC_CTRL2, 0xc6,
209 /* Change the value of bit 6 'RFFIX'
210 of AGC function control register 3 */
211 AGC_FUNC_CTRL3, 0x40,
212 /* Set the value of 'INLVTHD' register 0x2a/0x2c
216 /* Change the value of IAGCBW[15:8]
217 of inner AGC loop filter bandwith */
218 AGC_LOOP_BANDWIDTH0, 0x08,
219 AGC_LOOP_BANDWIDTH1, 0x9a
222 static u8 lgdt3303_init_data[] = {
226 struct lgdt330x_state* state = fe->demodulator_priv;
230 switch (state->config->demod_chip) {
232 chip_name = "LGDT3302";
233 err = i2c_write_demod_bytes(state, lgdt3302_init_data,
234 sizeof(lgdt3302_init_data));
237 chip_name = "LGDT3303";
238 err = i2c_write_demod_bytes(state, lgdt3303_init_data,
239 sizeof(lgdt3303_init_data));
242 chip_name = "undefined";
243 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
246 dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
249 return lgdt330x_SwReset(state);
252 static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
254 *ber = 0; /* Not supplied by the demod chips */
258 static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
260 struct lgdt330x_state* state = fe->demodulator_priv;
264 switch (state->config->demod_chip) {
266 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
270 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
275 "Only LGDT3302 and LGDT3303 are supported chips.\n");
279 *ucblocks = (buf[0] << 8) | buf[1];
283 static int lgdt330x_set_parameters(struct dvb_frontend* fe,
284 struct dvb_frontend_parameters *param)
287 * Array of byte pairs <address, value>
288 * to initialize 8VSB for lgdt3303 chip 50 MHz IF
290 static u8 lgdt3303_8vsb_44_data[] = {
299 * Array of byte pairs <address, value>
300 * to initialize QAM for lgdt3303 chip
302 static u8 lgdt3303_qam_data[] = {
315 struct lgdt330x_state* state = fe->demodulator_priv;
317 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
320 /* Change only if we are actually changing the modulation */
321 if (state->current_modulation != param->u.vsb.modulation) {
322 switch(param->u.vsb.modulation) {
324 dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
326 /* Select VSB mode */
327 top_ctrl_cfg[1] = 0x03;
329 /* Select ANT connector if supported by card */
330 if (state->config->pll_rf_set)
331 state->config->pll_rf_set(fe, 1);
333 if (state->config->demod_chip == LGDT3303) {
334 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
335 sizeof(lgdt3303_8vsb_44_data));
340 dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
342 /* Select QAM_64 mode */
343 top_ctrl_cfg[1] = 0x00;
345 /* Select CABLE connector if supported by card */
346 if (state->config->pll_rf_set)
347 state->config->pll_rf_set(fe, 0);
349 if (state->config->demod_chip == LGDT3303) {
350 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
351 sizeof(lgdt3303_qam_data));
356 dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
358 /* Select QAM_256 mode */
359 top_ctrl_cfg[1] = 0x01;
361 /* Select CABLE connector if supported by card */
362 if (state->config->pll_rf_set)
363 state->config->pll_rf_set(fe, 0);
365 if (state->config->demod_chip == LGDT3303) {
366 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
367 sizeof(lgdt3303_qam_data));
371 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
375 * select serial or parallel MPEG harware interface
376 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
379 top_ctrl_cfg[1] |= state->config->serial_mpeg;
381 /* Select the requested mode */
382 i2c_write_demod_bytes(state, top_ctrl_cfg,
383 sizeof(top_ctrl_cfg));
384 if (state->config->set_ts_params)
385 state->config->set_ts_params(fe, 0);
386 state->current_modulation = param->u.vsb.modulation;
389 /* Tune to the specified frequency */
390 if (state->config->pll_set)
391 state->config->pll_set(fe, param);
393 /* Keep track of the new frequency */
394 state->current_frequency = param->frequency;
396 lgdt330x_SwReset(state);
400 static int lgdt330x_get_frontend(struct dvb_frontend* fe,
401 struct dvb_frontend_parameters* param)
403 struct lgdt330x_state *state = fe->demodulator_priv;
404 param->frequency = state->current_frequency;
408 static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
410 struct lgdt330x_state* state = fe->demodulator_priv;
413 *status = 0; /* Reset status result */
415 /* AGC status register */
416 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
417 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
418 if ((buf[0] & 0x0c) == 0x8){
419 /* Test signal does not exist flag */
420 /* as well as the AGC lock flag. */
421 *status |= FE_HAS_SIGNAL;
423 /* Without a signal all other status bits are meaningless */
428 * You must set the Mask bits to 1 in the IRQ_MASK in order
429 * to see that status bit in the IRQ_STATUS register.
430 * This is done in SwReset();
433 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
434 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
438 if ((buf[2] & 0x03) == 0x01) {
439 *status |= FE_HAS_SYNC;
442 /* FEC error status */
443 if ((buf[2] & 0x0c) == 0x08) {
444 *status |= FE_HAS_LOCK;
445 *status |= FE_HAS_VITERBI;
448 /* Carrier Recovery Lock Status Register */
449 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
450 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
451 switch (state->current_modulation) {
454 /* Need to undestand why there are 3 lock levels here */
455 if ((buf[0] & 0x07) == 0x07)
456 *status |= FE_HAS_CARRIER;
459 if ((buf[0] & 0x80) == 0x80)
460 *status |= FE_HAS_CARRIER;
463 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
469 static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
471 struct lgdt330x_state* state = fe->demodulator_priv;
475 *status = 0; /* Reset status result */
477 /* lgdt3303 AGC status register */
478 err = i2c_read_demod_bytes(state, 0x58, buf, 1);
482 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
483 if ((buf[0] & 0x21) == 0x01){
484 /* Test input signal does not exist flag */
485 /* as well as the AGC lock flag. */
486 *status |= FE_HAS_SIGNAL;
488 /* Without a signal all other status bits are meaningless */
492 /* Carrier Recovery Lock Status Register */
493 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
494 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
495 switch (state->current_modulation) {
498 /* Need to undestand why there are 3 lock levels here */
499 if ((buf[0] & 0x07) == 0x07)
500 *status |= FE_HAS_CARRIER;
503 i2c_read_demod_bytes(state, 0x8a, buf, 1);
504 if ((buf[0] & 0x04) == 0x04)
505 *status |= FE_HAS_SYNC;
506 if ((buf[0] & 0x01) == 0x01)
507 *status |= FE_HAS_LOCK;
508 if ((buf[0] & 0x08) == 0x08)
509 *status |= FE_HAS_VITERBI;
512 if ((buf[0] & 0x80) == 0x80)
513 *status |= FE_HAS_CARRIER;
516 i2c_read_demod_bytes(state, 0x38, buf, 1);
517 if ((buf[0] & 0x02) == 0x00)
518 *status |= FE_HAS_SYNC;
519 if ((buf[0] & 0x01) == 0x01) {
520 *status |= FE_HAS_LOCK;
521 *status |= FE_HAS_VITERBI;
525 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
530 static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
532 /* not directly available. */
537 static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
541 * Spec sheet shows formula for SNR_EQ = 10 log10(25 * 24**2 / noise)
542 * and SNR_PH = 10 log10(25 * 32**2 / noise) for equalizer and phase tracker
543 * respectively. The following tables are built on these formulas.
544 * The usual definition is SNR = 20 log10(signal/noise)
545 * If the specification is wrong the value retuned is 1/2 the actual SNR in db.
547 * This table is a an ordered list of noise values computed by the
548 * formula from the spec sheet such that the index into the table
549 * starting at 43 or 45 is the SNR value in db. There are duplicate noise
550 * value entries at the beginning because the SNR varies more than
551 * 1 db for a change of 1 digit in noise at very small values of noise.
553 * Examples from SNR_EQ table:
571 static const u32 SNR_EQ[] =
572 { 1, 2, 2, 2, 3, 3, 4, 4, 5, 7,
573 9, 11, 13, 17, 21, 26, 33, 41, 52, 65,
574 81, 102, 129, 162, 204, 257, 323, 406, 511, 644,
575 810, 1020, 1284, 1616, 2035, 2561, 3224, 4059, 5110, 6433,
576 8098, 10195, 12835, 16158, 20341, 25608, 32238, 40585, 51094, 64323,
577 80978, 101945, 128341, 161571, 203406, 256073, 0x40000
580 static const u32 SNR_PH[] =
581 { 1, 2, 2, 2, 3, 3, 4, 5, 6, 8,
582 10, 12, 15, 19, 23, 29, 37, 46, 58, 73,
583 91, 115, 144, 182, 229, 288, 362, 456, 574, 722,
584 909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216,
585 9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151,
586 90833, 114351, 143960, 181235, 228161, 0x080000
589 static u8 buf[5];/* read data buffer */
590 static u32 noise; /* noise value */
591 static u32 snr_db; /* index into SNR_EQ[] */
592 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
594 /* read both equalizer and phase tracker noise data */
595 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
597 if (state->current_modulation == VSB_8) {
598 /* Equalizer Mean-Square Error Register for VSB */
599 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
602 * Look up noise value in table.
603 * A better search algorithm could be used...
604 * watch out there are duplicate entries.
606 for (snr_db = 0; snr_db < sizeof(SNR_EQ); snr_db++) {
607 if (noise < SNR_EQ[snr_db]) {
613 /* Phase Tracker Mean-Square Error Register for QAM */
614 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
616 /* Look up noise value in table. */
617 for (snr_db = 0; snr_db < sizeof(SNR_PH); snr_db++) {
618 if (noise < SNR_PH[snr_db]) {
625 /* Return the raw noise value */
626 static u8 buf[5];/* read data buffer */
627 static u32 noise; /* noise value */
628 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
630 /* read both equalizer and pase tracker noise data */
631 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
633 if (state->current_modulation == VSB_8) {
634 /* Phase Tracker Mean-Square Error Register for VSB */
635 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
638 /* Carrier Recovery Mean-Square Error for QAM */
639 i2c_read_demod_bytes(state, 0x1a, buf, 2);
640 noise = ((buf[0] & 3) << 8) | buf[1];
643 /* Small values for noise mean signal is better so invert noise */
647 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
652 static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
654 /* Return the raw noise value */
655 static u8 buf[5];/* read data buffer */
656 static u32 noise; /* noise value */
657 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
659 if (state->current_modulation == VSB_8) {
661 /* Phase Tracker Mean-Square Error Register for VSB */
662 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
665 /* Carrier Recovery Mean-Square Error for QAM */
666 i2c_read_demod_bytes(state, 0x1a, buf, 2);
667 noise = (buf[0] << 8) | buf[1];
670 /* Small values for noise mean signal is better so invert noise */
673 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
678 static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
680 /* I have no idea about this - it may not be needed */
681 fe_tune_settings->min_delay_ms = 500;
682 fe_tune_settings->step_size = 0;
683 fe_tune_settings->max_drift = 0;
687 static void lgdt330x_release(struct dvb_frontend* fe)
689 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
693 static struct dvb_frontend_ops lgdt3302_ops;
694 static struct dvb_frontend_ops lgdt3303_ops;
696 struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
697 struct i2c_adapter* i2c)
699 struct lgdt330x_state* state = NULL;
702 /* Allocate memory for the internal state */
703 state = (struct lgdt330x_state*) kmalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
706 memset(state,0,sizeof(*state));
708 /* Setup the state */
709 state->config = config;
711 switch (config->demod_chip) {
713 memcpy(&state->ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
716 memcpy(&state->ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
722 /* Verify communication with demod chip */
723 if (i2c_read_demod_bytes(state, 2, buf, 1))
726 state->current_frequency = -1;
727 state->current_modulation = -1;
729 /* Create dvb_frontend */
730 state->frontend.ops = &state->ops;
731 state->frontend.demodulator_priv = state;
732 return &state->frontend;
736 dprintk("%s: ERROR\n",__FUNCTION__);
740 static struct dvb_frontend_ops lgdt3302_ops = {
742 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
744 .frequency_min= 54000000,
745 .frequency_max= 858000000,
746 .frequency_stepsize= 62500,
747 /* Symbol rate is for all VSB modes need to check QAM */
748 .symbol_rate_min = 10762000,
749 .symbol_rate_max = 10762000,
750 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
752 .init = lgdt330x_init,
753 .set_frontend = lgdt330x_set_parameters,
754 .get_frontend = lgdt330x_get_frontend,
755 .get_tune_settings = lgdt330x_get_tune_settings,
756 .read_status = lgdt3302_read_status,
757 .read_ber = lgdt330x_read_ber,
758 .read_signal_strength = lgdt330x_read_signal_strength,
759 .read_snr = lgdt3302_read_snr,
760 .read_ucblocks = lgdt330x_read_ucblocks,
761 .release = lgdt330x_release,
764 static struct dvb_frontend_ops lgdt3303_ops = {
766 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
768 .frequency_min= 54000000,
769 .frequency_max= 858000000,
770 .frequency_stepsize= 62500,
771 /* Symbol rate is for all VSB modes need to check QAM */
772 .symbol_rate_min = 10762000,
773 .symbol_rate_max = 10762000,
774 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
776 .init = lgdt330x_init,
777 .set_frontend = lgdt330x_set_parameters,
778 .get_frontend = lgdt330x_get_frontend,
779 .get_tune_settings = lgdt330x_get_tune_settings,
780 .read_status = lgdt3303_read_status,
781 .read_ber = lgdt330x_read_ber,
782 .read_signal_strength = lgdt330x_read_signal_strength,
783 .read_snr = lgdt3303_read_snr,
784 .read_ucblocks = lgdt330x_read_ucblocks,
785 .release = lgdt330x_release,
788 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
789 MODULE_AUTHOR("Wilson Michaels");
790 MODULE_LICENSE("GPL");
792 EXPORT_SYMBOL(lgdt330x_attach);