2 * Support for LGDT3302 and LGDT3303 - VSB/QAM
4 * Copyright (C) 2005 Wilson Michaels <wilsonmichaels@earthlink.net>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
23 * NOTES ABOUT THIS DRIVER
25 * This Linux driver supports:
26 * DViCO FusionHDTV 3 Gold-Q
27 * DViCO FusionHDTV 3 Gold-T
28 * DViCO FusionHDTV 5 Gold
31 * signal strength always returns 0.
35 #include <linux/kernel.h>
36 #include <linux/module.h>
37 #include <linux/moduleparam.h>
38 #include <linux/init.h>
39 #include <linux/delay.h>
40 #include <asm/byteorder.h>
42 #include "dvb_frontend.h"
43 #include "lgdt330x_priv.h"
47 module_param(debug, int, 0644);
48 MODULE_PARM_DESC(debug,"Turn on/off lgdt330x frontend debugging (default:off).");
49 #define dprintk(args...) \
51 if (debug) printk(KERN_DEBUG "lgdt330x: " args); \
56 struct i2c_adapter* i2c;
57 struct dvb_frontend_ops ops;
59 /* Configuration settings */
60 const struct lgdt330x_config* config;
62 struct dvb_frontend frontend;
64 /* Demodulator private data */
65 fe_modulation_t current_modulation;
67 /* Tuner private data */
68 u32 current_frequency;
71 static int i2c_write_demod_bytes (struct lgdt330x_state* state,
72 u8 *buf, /* data bytes to send */
73 int len /* number of bytes to send */ )
76 { .addr = state->config->demod_address,
83 for (i=0; i<len-1; i+=2){
84 if ((err = i2c_transfer(state->i2c, &msg, 1)) != 1) {
85 printk(KERN_WARNING "lgdt330x: %s error (addr %02x <- %02x, err = %i)\n", __FUNCTION__, msg.buf[0], msg.buf[1], err);
97 * This routine writes the register (reg) to the demod bus
98 * then reads the data returned for (len) bytes.
101 static u8 i2c_read_demod_bytes (struct lgdt330x_state* state,
102 enum I2C_REG reg, u8* buf, int len)
105 struct i2c_msg msg [] = {
106 { .addr = state->config->demod_address,
107 .flags = 0, .buf = wr, .len = 1 },
108 { .addr = state->config->demod_address,
109 .flags = I2C_M_RD, .buf = buf, .len = len },
112 ret = i2c_transfer(state->i2c, msg, 2);
114 printk(KERN_WARNING "lgdt330x: %s: addr 0x%02x select 0x%02x error (ret == %i)\n", __FUNCTION__, state->config->demod_address, reg, ret);
122 static int lgdt3302_SwReset(struct lgdt330x_state* state)
127 0x00 /* bit 6 is active low software reset
128 * bits 5-0 are 1 to mask interrupts */
131 ret = i2c_write_demod_bytes(state,
132 reset, sizeof(reset));
135 /* force reset high (inactive) and unmask interrupts */
137 ret = i2c_write_demod_bytes(state,
138 reset, sizeof(reset));
143 static int lgdt3303_SwReset(struct lgdt330x_state* state)
148 0x00 /* bit 0 is active low software reset */
151 ret = i2c_write_demod_bytes(state,
152 reset, sizeof(reset));
155 /* force reset high (inactive) */
157 ret = i2c_write_demod_bytes(state,
158 reset, sizeof(reset));
163 static int lgdt330x_SwReset(struct lgdt330x_state* state)
165 switch (state->config->demod_chip) {
167 return lgdt3302_SwReset(state);
169 return lgdt3303_SwReset(state);
175 static int lgdt330x_init(struct dvb_frontend* fe)
177 /* Hardware reset is done using gpio[0] of cx23880x chip.
178 * I'd like to do it here, but don't know how to find chip address.
179 * cx88-cards.c arranges for the reset bit to be inactive (high).
180 * Maybe there needs to be a callable function in cx88-core or
181 * the caller of this function needs to do it. */
184 * Array of byte pairs <address, value>
185 * to initialize each different chip
187 static u8 lgdt3302_init_data[] = {
188 /* Use 50MHz parameter values from spec sheet since xtal is 50 */
189 /* Change the value of NCOCTFV[25:0] of carrier
190 recovery center frequency register */
191 VSB_CARRIER_FREQ0, 0x00,
192 VSB_CARRIER_FREQ1, 0x87,
193 VSB_CARRIER_FREQ2, 0x8e,
194 VSB_CARRIER_FREQ3, 0x01,
195 /* Change the TPCLK pin polarity
196 data is valid on falling clock */
198 /* Change the value of IFBW[11:0] of
199 AGC IF/RF loop filter bandwidth register */
200 AGC_RF_BANDWIDTH0, 0x40,
201 AGC_RF_BANDWIDTH1, 0x93,
202 AGC_RF_BANDWIDTH2, 0x00,
203 /* Change the value of bit 6, 'nINAGCBY' and
204 'NSSEL[1:0] of ACG function control register 2 */
205 AGC_FUNC_CTRL2, 0xc6,
206 /* Change the value of bit 6 'RFFIX'
207 of AGC function control register 3 */
208 AGC_FUNC_CTRL3, 0x40,
209 /* Set the value of 'INLVTHD' register 0x2a/0x2c
213 /* Change the value of IAGCBW[15:8]
214 of inner AGC loop filter bandwith */
215 AGC_LOOP_BANDWIDTH0, 0x08,
216 AGC_LOOP_BANDWIDTH1, 0x9a
219 static u8 lgdt3303_init_data[] = {
223 struct lgdt330x_state* state = fe->demodulator_priv;
227 switch (state->config->demod_chip) {
229 chip_name = "LGDT3302";
230 err = i2c_write_demod_bytes(state, lgdt3302_init_data,
231 sizeof(lgdt3302_init_data));
234 chip_name = "LGDT3303";
235 err = i2c_write_demod_bytes(state, lgdt3303_init_data,
236 sizeof(lgdt3303_init_data));
239 chip_name = "undefined";
240 printk (KERN_WARNING "Only LGDT3302 and LGDT3303 are supported chips.\n");
243 dprintk("%s entered as %s\n", __FUNCTION__, chip_name);
246 return lgdt330x_SwReset(state);
249 static int lgdt330x_read_ber(struct dvb_frontend* fe, u32* ber)
251 *ber = 0; /* Not supplied by the demod chips */
255 static int lgdt330x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
257 struct lgdt330x_state* state = fe->demodulator_priv;
261 switch (state->config->demod_chip) {
263 err = i2c_read_demod_bytes(state, LGDT3302_PACKET_ERR_COUNTER1,
267 err = i2c_read_demod_bytes(state, LGDT3303_PACKET_ERR_COUNTER1,
272 "Only LGDT3302 and LGDT3303 are supported chips.\n");
276 *ucblocks = (buf[0] << 8) | buf[1];
280 static int lgdt330x_set_parameters(struct dvb_frontend* fe,
281 struct dvb_frontend_parameters *param)
284 * Array of byte pairs <address, value>
285 * to initialize 8VSB for lgdt3303 chip 50 MHz IF
287 static u8 lgdt3303_8vsb_44_data[] = {
296 * Array of byte pairs <address, value>
297 * to initialize QAM for lgdt3303 chip
299 static u8 lgdt3303_qam_data[] = {
312 struct lgdt330x_state* state = fe->demodulator_priv;
314 static u8 top_ctrl_cfg[] = { TOP_CONTROL, 0x03 };
317 /* Change only if we are actually changing the modulation */
318 if (state->current_modulation != param->u.vsb.modulation) {
319 switch(param->u.vsb.modulation) {
321 dprintk("%s: VSB_8 MODE\n", __FUNCTION__);
323 /* Select VSB mode */
324 top_ctrl_cfg[1] = 0x03;
326 /* Select ANT connector if supported by card */
327 if (state->config->pll_rf_set)
328 state->config->pll_rf_set(fe, 1);
330 if (state->config->demod_chip == LGDT3303) {
331 err = i2c_write_demod_bytes(state, lgdt3303_8vsb_44_data,
332 sizeof(lgdt3303_8vsb_44_data));
337 dprintk("%s: QAM_64 MODE\n", __FUNCTION__);
339 /* Select QAM_64 mode */
340 top_ctrl_cfg[1] = 0x00;
342 /* Select CABLE connector if supported by card */
343 if (state->config->pll_rf_set)
344 state->config->pll_rf_set(fe, 0);
346 if (state->config->demod_chip == LGDT3303) {
347 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
348 sizeof(lgdt3303_qam_data));
353 dprintk("%s: QAM_256 MODE\n", __FUNCTION__);
355 /* Select QAM_256 mode */
356 top_ctrl_cfg[1] = 0x01;
358 /* Select CABLE connector if supported by card */
359 if (state->config->pll_rf_set)
360 state->config->pll_rf_set(fe, 0);
362 if (state->config->demod_chip == LGDT3303) {
363 err = i2c_write_demod_bytes(state, lgdt3303_qam_data,
364 sizeof(lgdt3303_qam_data));
368 printk(KERN_WARNING "lgdt330x: %s: Modulation type(%d) UNSUPPORTED\n", __FUNCTION__, param->u.vsb.modulation);
372 * select serial or parallel MPEG harware interface
373 * Serial: 0x04 for LGDT3302 or 0x40 for LGDT3303
376 top_ctrl_cfg[1] |= state->config->serial_mpeg;
378 /* Select the requested mode */
379 i2c_write_demod_bytes(state, top_ctrl_cfg,
380 sizeof(top_ctrl_cfg));
381 if (state->config->set_ts_params)
382 state->config->set_ts_params(fe, 0);
383 state->current_modulation = param->u.vsb.modulation;
386 /* Tune to the specified frequency */
387 if (state->config->pll_set)
388 state->config->pll_set(fe, param);
390 /* Keep track of the new frequency */
391 state->current_frequency = param->frequency;
393 lgdt330x_SwReset(state);
397 static int lgdt330x_get_frontend(struct dvb_frontend* fe,
398 struct dvb_frontend_parameters* param)
400 struct lgdt330x_state *state = fe->demodulator_priv;
401 param->frequency = state->current_frequency;
405 static int lgdt3302_read_status(struct dvb_frontend* fe, fe_status_t* status)
407 struct lgdt330x_state* state = fe->demodulator_priv;
410 *status = 0; /* Reset status result */
412 /* AGC status register */
413 i2c_read_demod_bytes(state, AGC_STATUS, buf, 1);
414 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
415 if ((buf[0] & 0x0c) == 0x8){
416 /* Test signal does not exist flag */
417 /* as well as the AGC lock flag. */
418 *status |= FE_HAS_SIGNAL;
420 /* Without a signal all other status bits are meaningless */
425 * You must set the Mask bits to 1 in the IRQ_MASK in order
426 * to see that status bit in the IRQ_STATUS register.
427 * This is done in SwReset();
430 i2c_read_demod_bytes(state, TOP_CONTROL, buf, sizeof(buf));
431 dprintk("%s: TOP_CONTROL = 0x%02x, IRO_MASK = 0x%02x, IRQ_STATUS = 0x%02x\n", __FUNCTION__, buf[0], buf[1], buf[2]);
435 if ((buf[2] & 0x03) == 0x01) {
436 *status |= FE_HAS_SYNC;
439 /* FEC error status */
440 if ((buf[2] & 0x0c) == 0x08) {
441 *status |= FE_HAS_LOCK;
442 *status |= FE_HAS_VITERBI;
445 /* Carrier Recovery Lock Status Register */
446 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
447 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
448 switch (state->current_modulation) {
451 /* Need to undestand why there are 3 lock levels here */
452 if ((buf[0] & 0x07) == 0x07)
453 *status |= FE_HAS_CARRIER;
456 if ((buf[0] & 0x80) == 0x80)
457 *status |= FE_HAS_CARRIER;
460 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
466 static int lgdt3303_read_status(struct dvb_frontend* fe, fe_status_t* status)
468 struct lgdt330x_state* state = fe->demodulator_priv;
472 *status = 0; /* Reset status result */
474 /* lgdt3303 AGC status register */
475 err = i2c_read_demod_bytes(state, 0x58, buf, 1);
479 dprintk("%s: AGC_STATUS = 0x%02x\n", __FUNCTION__, buf[0]);
480 if ((buf[0] & 0x21) == 0x01){
481 /* Test input signal does not exist flag */
482 /* as well as the AGC lock flag. */
483 *status |= FE_HAS_SIGNAL;
485 /* Without a signal all other status bits are meaningless */
489 /* Carrier Recovery Lock Status Register */
490 i2c_read_demod_bytes(state, CARRIER_LOCK, buf, 1);
491 dprintk("%s: CARRIER_LOCK = 0x%02x\n", __FUNCTION__, buf[0]);
492 switch (state->current_modulation) {
495 /* Need to undestand why there are 3 lock levels here */
496 if ((buf[0] & 0x07) == 0x07)
497 *status |= FE_HAS_CARRIER;
500 i2c_read_demod_bytes(state, 0x8a, buf, 1);
501 if ((buf[0] & 0x04) == 0x04)
502 *status |= FE_HAS_SYNC;
503 if ((buf[0] & 0x01) == 0x01)
504 *status |= FE_HAS_LOCK;
505 if ((buf[0] & 0x08) == 0x08)
506 *status |= FE_HAS_VITERBI;
509 if ((buf[0] & 0x80) == 0x80)
510 *status |= FE_HAS_CARRIER;
513 i2c_read_demod_bytes(state, 0x38, buf, 1);
514 if ((buf[0] & 0x02) == 0x00)
515 *status |= FE_HAS_SYNC;
516 if ((buf[0] & 0x01) == 0x01) {
517 *status |= FE_HAS_LOCK;
518 *status |= FE_HAS_VITERBI;
522 printk("KERN_WARNING lgdt330x: %s: Modulation set to unsupported value\n", __FUNCTION__);
527 static int lgdt330x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
529 /* not directly available. */
534 static int lgdt3302_read_snr(struct dvb_frontend* fe, u16* snr)
538 * Spec sheet shows formula for SNR_EQ = 10 log10(25 * 24**2 / noise)
539 * and SNR_PH = 10 log10(25 * 32**2 / noise) for equalizer and phase tracker
540 * respectively. The following tables are built on these formulas.
541 * The usual definition is SNR = 20 log10(signal/noise)
542 * If the specification is wrong the value retuned is 1/2 the actual SNR in db.
544 * This table is a an ordered list of noise values computed by the
545 * formula from the spec sheet such that the index into the table
546 * starting at 43 or 45 is the SNR value in db. There are duplicate noise
547 * value entries at the beginning because the SNR varies more than
548 * 1 db for a change of 1 digit in noise at very small values of noise.
550 * Examples from SNR_EQ table:
568 static const u32 SNR_EQ[] =
569 { 1, 2, 2, 2, 3, 3, 4, 4, 5, 7,
570 9, 11, 13, 17, 21, 26, 33, 41, 52, 65,
571 81, 102, 129, 162, 204, 257, 323, 406, 511, 644,
572 810, 1020, 1284, 1616, 2035, 2561, 3224, 4059, 5110, 6433,
573 8098, 10195, 12835, 16158, 20341, 25608, 32238, 40585, 51094, 64323,
574 80978, 101945, 128341, 161571, 203406, 256073, 0x40000
577 static const u32 SNR_PH[] =
578 { 1, 2, 2, 2, 3, 3, 4, 5, 6, 8,
579 10, 12, 15, 19, 23, 29, 37, 46, 58, 73,
580 91, 115, 144, 182, 229, 288, 362, 456, 574, 722,
581 909, 1144, 1440, 1813, 2282, 2873, 3617, 4553, 5732, 7216,
582 9084, 11436, 14396, 18124, 22817, 28724, 36161, 45524, 57312, 72151,
583 90833, 114351, 143960, 181235, 228161, 0x080000
586 static u8 buf[5];/* read data buffer */
587 static u32 noise; /* noise value */
588 static u32 snr_db; /* index into SNR_EQ[] */
589 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
591 /* read both equalizer and phase tracker noise data */
592 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
594 if (state->current_modulation == VSB_8) {
595 /* Equalizer Mean-Square Error Register for VSB */
596 noise = ((buf[0] & 7) << 16) | (buf[1] << 8) | buf[2];
599 * Look up noise value in table.
600 * A better search algorithm could be used...
601 * watch out there are duplicate entries.
603 for (snr_db = 0; snr_db < sizeof(SNR_EQ); snr_db++) {
604 if (noise < SNR_EQ[snr_db]) {
610 /* Phase Tracker Mean-Square Error Register for QAM */
611 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
613 /* Look up noise value in table. */
614 for (snr_db = 0; snr_db < sizeof(SNR_PH); snr_db++) {
615 if (noise < SNR_PH[snr_db]) {
622 /* Return the raw noise value */
623 static u8 buf[5];/* read data buffer */
624 static u32 noise; /* noise value */
625 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
627 /* read both equalizer and pase tracker noise data */
628 i2c_read_demod_bytes(state, EQPH_ERR0, buf, sizeof(buf));
630 if (state->current_modulation == VSB_8) {
631 /* Phase Tracker Mean-Square Error Register for VSB */
632 noise = ((buf[0] & 7<<3) << 13) | (buf[3] << 8) | buf[4];
635 /* Carrier Recovery Mean-Square Error for QAM */
636 i2c_read_demod_bytes(state, 0x1a, buf, 2);
637 noise = ((buf[0] & 3) << 8) | buf[1];
640 /* Small values for noise mean signal is better so invert noise */
644 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
649 static int lgdt3303_read_snr(struct dvb_frontend* fe, u16* snr)
651 /* Return the raw noise value */
652 static u8 buf[5];/* read data buffer */
653 static u32 noise; /* noise value */
654 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
656 if (state->current_modulation == VSB_8) {
658 /* Phase Tracker Mean-Square Error Register for VSB */
659 noise = ((buf[0] & 7) << 16) | (buf[3] << 8) | buf[4];
662 /* Carrier Recovery Mean-Square Error for QAM */
663 i2c_read_demod_bytes(state, 0x1a, buf, 2);
664 noise = (buf[0] << 8) | buf[1];
667 /* Small values for noise mean signal is better so invert noise */
670 dprintk("%s: noise = 0x%05x, snr = %idb\n",__FUNCTION__, noise, *snr);
675 static int lgdt330x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fe_tune_settings)
677 /* I have no idea about this - it may not be needed */
678 fe_tune_settings->min_delay_ms = 500;
679 fe_tune_settings->step_size = 0;
680 fe_tune_settings->max_drift = 0;
684 static void lgdt330x_release(struct dvb_frontend* fe)
686 struct lgdt330x_state* state = (struct lgdt330x_state*) fe->demodulator_priv;
690 static struct dvb_frontend_ops lgdt3302_ops;
691 static struct dvb_frontend_ops lgdt3303_ops;
693 struct dvb_frontend* lgdt330x_attach(const struct lgdt330x_config* config,
694 struct i2c_adapter* i2c)
696 struct lgdt330x_state* state = NULL;
699 /* Allocate memory for the internal state */
700 state = (struct lgdt330x_state*) kmalloc(sizeof(struct lgdt330x_state), GFP_KERNEL);
703 memset(state,0,sizeof(*state));
705 /* Setup the state */
706 state->config = config;
708 switch (config->demod_chip) {
710 memcpy(&state->ops, &lgdt3302_ops, sizeof(struct dvb_frontend_ops));
713 memcpy(&state->ops, &lgdt3303_ops, sizeof(struct dvb_frontend_ops));
719 /* Verify communication with demod chip */
720 if (i2c_read_demod_bytes(state, 2, buf, 1))
723 state->current_frequency = -1;
724 state->current_modulation = -1;
726 /* Create dvb_frontend */
727 state->frontend.ops = &state->ops;
728 state->frontend.demodulator_priv = state;
729 return &state->frontend;
734 dprintk("%s: ERROR\n",__FUNCTION__);
738 static struct dvb_frontend_ops lgdt3302_ops = {
740 .name= "LG Electronics LGDT3302 VSB/QAM Frontend",
742 .frequency_min= 54000000,
743 .frequency_max= 858000000,
744 .frequency_stepsize= 62500,
745 /* Symbol rate is for all VSB modes need to check QAM */
746 .symbol_rate_min = 10762000,
747 .symbol_rate_max = 10762000,
748 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
750 .init = lgdt330x_init,
751 .set_frontend = lgdt330x_set_parameters,
752 .get_frontend = lgdt330x_get_frontend,
753 .get_tune_settings = lgdt330x_get_tune_settings,
754 .read_status = lgdt3302_read_status,
755 .read_ber = lgdt330x_read_ber,
756 .read_signal_strength = lgdt330x_read_signal_strength,
757 .read_snr = lgdt3302_read_snr,
758 .read_ucblocks = lgdt330x_read_ucblocks,
759 .release = lgdt330x_release,
762 static struct dvb_frontend_ops lgdt3303_ops = {
764 .name= "LG Electronics LGDT3303 VSB/QAM Frontend",
766 .frequency_min= 54000000,
767 .frequency_max= 858000000,
768 .frequency_stepsize= 62500,
769 /* Symbol rate is for all VSB modes need to check QAM */
770 .symbol_rate_min = 10762000,
771 .symbol_rate_max = 10762000,
772 .caps = FE_CAN_QAM_64 | FE_CAN_QAM_256 | FE_CAN_8VSB
774 .init = lgdt330x_init,
775 .set_frontend = lgdt330x_set_parameters,
776 .get_frontend = lgdt330x_get_frontend,
777 .get_tune_settings = lgdt330x_get_tune_settings,
778 .read_status = lgdt3303_read_status,
779 .read_ber = lgdt330x_read_ber,
780 .read_signal_strength = lgdt330x_read_signal_strength,
781 .read_snr = lgdt3303_read_snr,
782 .read_ucblocks = lgdt330x_read_ucblocks,
783 .release = lgdt330x_release,
786 MODULE_DESCRIPTION("LGDT330X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
787 MODULE_AUTHOR("Wilson Michaels");
788 MODULE_LICENSE("GPL");
790 EXPORT_SYMBOL(lgdt330x_attach);