drivers/media/dvb/frontends/mb86a16.c

   1 /*
   2         Fujitsu MB86A16 DVB-S/DSS DC Receiver driver
   3
   4         Copyright (C) 2005, 2006 Manu Abraham (abraham.manu@gmail.com)
   5
   6         This program is free software; you can redistribute it and/or modify
   7         it under the terms of the GNU General Public License as published by
   8         the Free Software Foundation; either version 2 of the License, or
   9         (at your option) any later version.
  10
  11         This program is distributed in the hope that it will be useful,
  12         but WITHOUT ANY WARRANTY; without even the implied warranty of
  13         MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  14         GNU General Public License for more details.
  15
  16         You should have received a copy of the GNU General Public License
  17         along with this program; if not, write to the Free Software
  18         Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
  19 */
  20
  21 #include <linux/init.h>
  22 #include <linux/kernel.h>
  23 #include <linux/module.h>
  24 #include <linux/moduleparam.h>
  25
  26 #include "dvb_frontend.h"
  27 #include "mb86a16.h"
  28 #include "mb86a16_priv.h"
  29
  30 unsigned int verbose = 5;
  31 module_param(verbose, int, 0644);
  32
  33 #define ABS(x)          ((x) < 0 ? (-x) : (x))
  34
  35 struct mb86a16_state {
  36         struct i2c_adapter              *i2c_adap;
  37         const struct mb86a16_config     *config;
  38         struct dvb_frontend             frontend;
  39
  40         // tuning parameters
  41         int                             frequency;
  42         int                             srate;
  43
  44         // Internal stuff
  45         int                             master_clk;
  46         int                             deci;
  47         int                             csel;
  48         int                             rsel;
  49 };
  50
  51 #define MB86A16_ERROR           0
  52 #define MB86A16_NOTICE          1
  53 #define MB86A16_INFO            2
  54 #define MB86A16_DEBUG           3
  55
  56 #define dprintk(x, y, z, format, arg...) do {                                           \
  57         if (z) {                                                                        \
  58                 if      ((x > MB86A16_ERROR) && (x > y))                                \
  59                         printk(KERN_ERR "%s: " format "\n", __func__, ##arg);           \
  60                 else if ((x > MB86A16_NOTICE) && (x > y))                               \
  61                         printk(KERN_NOTICE "%s: " format "\n", __func__, ##arg);        \
  62                 else if ((x > MB86A16_INFO) && (x > y))                                 \
  63                         printk(KERN_INFO "%s: " format "\n", __func__, ##arg);          \
  64                 else if ((x > MB86A16_DEBUG) && (x > y))                                \
  65                         printk(KERN_DEBUG "%s: " format "\n", __func__, ##arg);         \
  66         } else {                                                                        \
  67                 if (x > y)                                                              \
  68                         printk(format, ##arg);                                          \
  69         }                                                                               \
  70 } while (0)
  71
  72 #define TRACE_IN        dprintk(verbose, MB86A16_DEBUG, 1, "-->()")
  73 #define TRACE_OUT       dprintk(verbose, MB86A16_DEBUG, 1, "()-->")
  74
  75 static int mb86a16_write(struct mb86a16_state *state, u8 reg, u8 val)
  76 {
  77         int ret;
  78         u8 buf[] = { reg, val };
  79
  80         struct i2c_msg msg = {
  81                 .addr = state->config->demod_address,
  82                 .flags = 0,
  83                 .buf = buf,
  84                 .len = 2
  85         };
  86
  87         dprintk(verbose, MB86A16_DEBUG, 1,
  88                 "writing to [0x%02x],Reg[0x%02x],Data[0x%02x]",
  89                 state->config->demod_address, buf[0], buf[1]);
  90
  91         ret = i2c_transfer(state->i2c_adap, &msg, 1);
  92
  93         return (ret != 1) ? -EREMOTEIO : 0;
  94 }
  95
  96 static int mb86a16_read(struct mb86a16_state *state, u8 reg, u8 *val)
  97 {
  98         int ret;
  99         u8 b0[] = { reg };
 100         u8 b1[] = { 0 };
 101
 102         struct i2c_msg msg[] = {
 103                 {
 104                         .addr = state->config->demod_address,
 105                         .flags = 0,
 106                         .buf = b0,
 107                         .len = 1
 108                 },{
 109                         .addr = state->config->demod_address,
 110                         .flags = I2C_M_RD,
 111                         .buf = b1,
 112                         .len = 1
 113                 }
 114         };
 115         ret = i2c_transfer(state->i2c_adap, msg, 2);
 116         if (ret != 2) {
 117                 dprintk(verbose, MB86A16_ERROR, 1, "read error(reg=0x%02x, ret=0x%i)",
 118                         reg, ret);
 119
 120                 return -EREMOTEIO;
 121         }
 122         *val = b1[0];
 123
 124         return ret;
 125 }
 126
 127 static int CNTM_set(struct mb86a16_state *state,
 128                     unsigned char timint1,
 129                     unsigned char timint2,
 130                     unsigned char cnext)
 131 {
 132         unsigned char val;
 133
 134         val = (timint1 << 4) | (timint2 << 2) | cnext;
 135         if (mb86a16_write(state, MB86A16_CNTMR, val) < 0)
 136                 goto err;
 137
 138         return 0;
 139
 140 err:
 141         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 142         return -EREMOTEIO;
 143 }
 144
 145 static int smrt_set(struct mb86a16_state *state, int rate)
 146 {
 147         int tmp ;
 148         int m ;
 149         unsigned char STOFS0, STOFS1;
 150
 151         m = 1 << state->deci;
 152         tmp = (8192 * state->master_clk - 2 * m * rate * 8192 + state->master_clk / 2) / state->master_clk;
 153
 154         STOFS0 = tmp & 0x0ff;
 155         STOFS1 = (tmp & 0xf00) >> 8;
 156
 157         if (mb86a16_write(state, MB86A16_SRATE1, (state->deci << 2) |
 158                                        (state->csel << 1) |
 159                                         state->rsel) < 0)
 160                 goto err;
 161         if (mb86a16_write(state, MB86A16_SRATE2, STOFS0) < 0)
 162                 goto err;
 163         if (mb86a16_write(state, MB86A16_SRATE3, STOFS1) < 0)
 164                 goto err;
 165
 166         return 0;
 167 err:
 168         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 169         return -1;
 170 }
 171
 172 static int srst(struct mb86a16_state *state)
 173 {
 174         if (mb86a16_write(state, MB86A16_RESET, 0x04) < 0)
 175                 goto err;
 176
 177         return 0;
 178 err:
 179         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 180         return -EREMOTEIO;
 181
 182 }
 183
 184 static int afcex_data_set(struct mb86a16_state *state,
 185                           unsigned char AFCEX_L,
 186                           unsigned char AFCEX_H)
 187 {
 188         if (mb86a16_write(state, MB86A16_AFCEXL, AFCEX_L) < 0)
 189                 goto err;
 190         if (mb86a16_write(state, MB86A16_AFCEXH, AFCEX_H) < 0)
 191                 goto err;
 192
 193         return 0;
 194 err:
 195         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 196
 197         return -1;
 198 }
 199
 200 static int afcofs_data_set(struct mb86a16_state *state,
 201                            unsigned char AFCEX_L,
 202                            unsigned char AFCEX_H)
 203 {
 204         if (mb86a16_write(state, 0x58, AFCEX_L) < 0)
 205                 goto err;
 206         if (mb86a16_write(state, 0x59, AFCEX_H) < 0)
 207                 goto err;
 208
 209         return 0;
 210 err:
 211         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 212         return -EREMOTEIO;
 213 }
 214
 215 static int stlp_set(struct mb86a16_state *state,
 216                     unsigned char STRAS,
 217                     unsigned char STRBS)
 218 {
 219         if (mb86a16_write(state, MB86A16_STRFILTCOEF1, (STRBS << 3) | (STRAS)) < 0)
 220                 goto err;
 221
 222         return 0;
 223 err:
 224         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 225         return -EREMOTEIO;
 226 }
 227
 228 static int Vi_set(struct mb86a16_state *state, unsigned char ETH, unsigned char VIA)
 229 {
 230         if (mb86a16_write(state, MB86A16_VISET2, 0x04) < 0)
 231                 goto err;
 232         if (mb86a16_write(state, MB86A16_VISET3, 0xf5) < 0)
 233                 goto err;
 234
 235         return 0;
 236 err:
 237         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 238         return -EREMOTEIO;
 239 }
 240
 241 static int initial_set(struct mb86a16_state *state)
 242 {
 243         if (stlp_set(state, 5, 7))
 244                 goto err;
 245
 246         udelay(100);
 247         if (afcex_data_set(state, 0, 0))
 248                 goto err;
 249
 250         udelay(100);
 251         if (afcofs_data_set(state, 0, 0))
 252                 goto err;
 253
 254         udelay(100);
 255         if (mb86a16_write(state, MB86A16_CRLFILTCOEF1, 0x16) < 0)
 256                 goto err;
 257         if (mb86a16_write(state, 0x2f, 0x21) < 0)
 258                 goto err;
 259         if (mb86a16_write(state, MB86A16_VIMAG, 0x38) < 0)
 260                 goto err;
 261         if (mb86a16_write(state, MB86A16_FAGCS1, 0x00) < 0)
 262                 goto err;
 263         if (mb86a16_write(state, MB86A16_FAGCS2, 0x1c) < 0)
 264                 goto err;
 265         if (mb86a16_write(state, MB86A16_FAGCS3, 0x20) < 0)
 266                 goto err;
 267         if (mb86a16_write(state, MB86A16_FAGCS4, 0x1e) < 0)
 268                 goto err;
 269         if (mb86a16_write(state, MB86A16_FAGCS5, 0x23) < 0)
 270                 goto err;
 271         if (mb86a16_write(state, 0x54, 0xff) < 0)
 272                 goto err;
 273         if (mb86a16_write(state, MB86A16_TSOUT, 0x00) < 0)
 274                 goto err;
 275
 276         return 0;
 277
 278 err:
 279         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 280         return -EREMOTEIO;
 281 }
 282
 283 static int S01T_set(struct mb86a16_state *state,
 284                     unsigned char s1t,
 285                     unsigned s0t)
 286 {
 287         if (mb86a16_write(state, 0x33, (s1t << 3) | s0t) < 0)
 288                 goto err;
 289
 290         return 0;
 291 err:
 292         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 293         return -EREMOTEIO;
 294 }
 295
 296
 297 static int EN_set(struct mb86a16_state *state,
 298                   int cren,
 299                   int afcen)
 300 {
 301         unsigned char val;
 302
 303         val = 0x7a | (cren << 7) | (afcen << 2);
 304         if (mb86a16_write(state, 0x49, val) < 0)
 305                 goto err;
 306
 307         return 0;
 308 err:
 309         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 310         return -EREMOTEIO;
 311 }
 312
 313 static int AFCEXEN_set(struct mb86a16_state *state,
 314                        int afcexen,
 315                        int smrt)
 316 {
 317         unsigned char AFCA ;
 318
 319         if (smrt > 18875)
 320                 AFCA = 4;
 321         else if (smrt > 9375)
 322                 AFCA = 3;
 323         else if (smrt > 2250)
 324                 AFCA = 2;
 325         else
 326                 AFCA = 1;
 327
 328         if (mb86a16_write(state, 0x2a, 0x02 | (afcexen << 5) | (AFCA << 2)) < 0)
 329                 goto err;
 330
 331         return 0;
 332
 333 err:
 334         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 335         return -EREMOTEIO;
 336 }
 337
 338 static int DAGC_data_set(struct mb86a16_state *state,
 339                          unsigned char DAGCA,
 340                          unsigned char DAGCW)
 341 {
 342         if (mb86a16_write(state, 0x2d, (DAGCA << 3) | DAGCW) < 0)
 343                 goto err;
 344
 345         return 0;
 346
 347 err:
 348         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 349         return -EREMOTEIO;
 350 }
 351
 352 static void smrt_info_get(struct mb86a16_state *state, int rate)
 353 {
 354         if (rate >= 37501) {
 355                 state->deci = 0; state->csel = 0; state->rsel = 0;
 356         } else if (rate >= 30001) {
 357                 state->deci = 0; state->csel = 0; state->rsel = 1;
 358         } else if (rate >= 26251) {
 359                 state->deci = 0; state->csel = 1; state->rsel = 0;
 360         } else if (rate >= 22501) {
 361                 state->deci = 0; state->csel = 1; state->rsel = 1;
 362         } else if (rate >= 18751) {
 363                 state->deci = 1; state->csel = 0; state->rsel = 0;
 364         } else if (rate >= 15001) {
 365                 state->deci = 1; state->csel = 0; state->rsel = 1;
 366         } else if (rate >= 13126) {
 367                 state->deci = 1; state->csel = 1; state->rsel = 0;
 368         } else if (rate >= 11251) {
 369                 state->deci = 1; state->csel = 1; state->rsel = 1;
 370         } else if (rate >= 9376) {
 371                 state->deci = 2; state->csel = 0; state->rsel = 0;
 372         } else if (rate >= 7501) {
 373                 state->deci = 2; state->csel = 0; state->rsel = 1;
 374         } else if (rate >= 6563) {
 375                 state->deci = 2; state->csel = 1; state->rsel = 0;
 376         } else if (rate >= 5626) {
 377                 state->deci = 2; state->csel = 1; state->rsel = 1;
 378         } else if (rate >= 4688) {
 379                 state->deci = 3; state->csel = 0; state->rsel = 0;
 380         } else if (rate >= 3751) {
 381                 state->deci = 3; state->csel = 0; state->rsel = 1;
 382         } else if (rate >= 3282) {
 383                 state->deci = 3; state->csel = 1; state->rsel = 0;
 384         } else if (rate >= 2814) {
 385                 state->deci = 3; state->csel = 1; state->rsel = 1;
 386         } else if (rate >= 2344) {
 387                 state->deci = 4; state->csel = 0; state->rsel = 0;
 388         } else if (rate >= 1876) {
 389                 state->deci = 4; state->csel = 0; state->rsel = 1;
 390         } else if (rate >= 1641) {
 391                 state->deci = 4; state->csel = 1; state->rsel = 0;
 392         } else if (rate >= 1407) {
 393                 state->deci = 4; state->csel = 1; state->rsel = 1;
 394         } else if (rate >= 1172) {
 395                 state->deci = 5; state->csel = 0; state->rsel = 0;
 396         } else if (rate >=  939) {
 397                 state->deci = 5; state->csel = 0; state->rsel = 1;
 398         } else if (rate >=  821) {
 399                 state->deci = 5; state->csel = 1; state->rsel = 0;
 400         } else {
 401                 state->deci = 5; state->csel = 1; state->rsel = 1;
 402         }
 403
 404         if (state->csel == 0)
 405                 state->master_clk = 92000;
 406         else
 407                 state->master_clk = 61333;
 408
 409 }
 410
 411 static int signal_det(struct mb86a16_state *state,
 412                       int smrt,
 413                       unsigned char *SIG)
 414 {
 415
 416         int ret ;
 417         int smrtd ;
 418         int wait_sym ;
 419
 420         u32 wait_t;
 421         unsigned char S[3] ;
 422         int i ;
 423
 424         if (*SIG > 45) {
 425                 if (CNTM_set(state, 2, 1, 2) < 0) {
 426                         dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
 427                         return -1;
 428                 }
 429                 wait_sym = 40000;
 430         } else {
 431                 if (CNTM_set(state, 3, 1, 2) < 0) {
 432                         dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
 433                         return -1;
 434                 }
 435                 wait_sym = 80000;
 436         }
 437         for (i = 0; i < 3; i++) {
 438                 if (i == 0 )
 439                         smrtd = smrt * 98 / 100;
 440                 else if (i == 1)
 441                         smrtd = smrt;
 442                 else
 443                         smrtd = smrt * 102 / 100;
 444                 smrt_info_get(state, smrtd);
 445                 smrt_set(state, smrtd);
 446                 srst(state);
 447                 wait_t = (wait_sym + 99 * smrtd / 100) / smrtd;
 448                 if (wait_t == 0)
 449                         wait_t = 1;
 450                 msleep_interruptible(10);
 451                 if (mb86a16_read(state, 0x37, &(S[i])) != 2) {
 452                         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 453                         return -EREMOTEIO;
 454                 }
 455         }
 456         if ((S[1] > S[0] * 112 / 100) &&
 457             (S[1] > S[2] * 112 / 100)) {
 458
 459                 ret = 1;
 460         } else {
 461                 ret = 0;
 462         }
 463         *SIG = S[1];
 464
 465         if (CNTM_set(state, 0, 1, 2) < 0) {
 466                 dprintk(verbose, MB86A16_ERROR, 1, "CNTM set Error");
 467                 return -1;
 468         }
 469
 470         return ret;
 471 }
 472
 473 static int rf_val_set(struct mb86a16_state *state,
 474                       int f,
 475                       int smrt,
 476                       unsigned char R)
 477 {
 478         unsigned char C, F, B;
 479         int M;
 480         unsigned char rf_val[5];
 481         int ack = -1;
 482
 483         if (smrt > 37750 )
 484                 C = 1;
 485         else if (smrt > 18875)
 486                 C = 2;
 487         else if (smrt > 5500 )
 488                 C = 3;
 489         else
 490                 C = 4;
 491
 492         if (smrt > 30500)
 493                 F = 3;
 494         else if (smrt > 9375)
 495                 F = 1;
 496         else if (smrt > 4625)
 497                 F = 0;
 498         else
 499                 F = 2;
 500
 501         if (f < 1060)
 502                 B = 0;
 503         else if (f < 1175)
 504                 B = 1;
 505         else if (f < 1305)
 506                 B = 2;
 507         else if (f < 1435)
 508                 B = 3;
 509         else if (f < 1570)
 510                 B = 4;
 511         else if (f < 1715)
 512                 B = 5;
 513         else if (f < 1845)
 514                 B = 6;
 515         else if (f < 1980)
 516                 B = 7;
 517         else if (f < 2080)
 518                 B = 8;
 519         else
 520                 B = 9;
 521
 522         M = f * (1 << R) / 2;
 523
 524         rf_val[0] = 0x01 | (C << 3) | (F << 1);
 525         rf_val[1] = (R << 5) | ((M & 0x1f000) >> 12);
 526         rf_val[2] = (M & 0x00ff0) >> 4;
 527         rf_val[3] = ((M & 0x0000f) << 4) | B;
 528
 529         // Frequency Set
 530         if (mb86a16_write(state, 0x21, rf_val[0]) < 0)
 531                 ack = 0;
 532         if (mb86a16_write(state, 0x22, rf_val[1]) < 0)
 533                 ack = 0;
 534         if (mb86a16_write(state, 0x23, rf_val[2]) < 0)
 535                 ack = 0;
 536         if (mb86a16_write(state, 0x24, rf_val[3]) < 0)
 537                 ack = 0;
 538         if (mb86a16_write(state, 0x25, 0x01) < 0)
 539                 ack = 0;
 540         if (ack == 0) {
 541                 dprintk(verbose, MB86A16_ERROR, 1, "RF Setup - I2C transfer error");
 542                 return -EREMOTEIO;
 543         }
 544
 545         return 0;
 546 }
 547
 548 static int afcerr_chk(struct mb86a16_state *state)
 549 {
 550         unsigned char AFCM_L, AFCM_H ;
 551         int AFCM ;
 552         int afcm, afcerr ;
 553
 554         if (mb86a16_read(state, 0x0e, &AFCM_L) != 2)
 555                 goto err;
 556         if (mb86a16_read(state, 0x0f, &AFCM_H) != 2)
 557                 goto err;
 558
 559         AFCM = (AFCM_H << 8) + AFCM_L;
 560
 561         if (AFCM > 2048)
 562                 afcm = AFCM - 4096;
 563         else
 564                 afcm = AFCM;
 565         afcerr = afcm * state->master_clk / 8192;
 566
 567         return afcerr;
 568
 569 err:
 570         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 571         return -EREMOTEIO;
 572 }
 573
 574 static int dagcm_val_get(struct mb86a16_state *state)
 575 {
 576         int DAGCM;
 577         unsigned char DAGCM_H, DAGCM_L;
 578
 579         if (mb86a16_read(state, 0x45, &DAGCM_L) != 2)
 580                 goto err;
 581         if (mb86a16_read(state, 0x46, &DAGCM_H) != 2)
 582                 goto err;
 583
 584         DAGCM = (DAGCM_H << 8) + DAGCM_L;
 585
 586         return DAGCM;
 587
 588 err:
 589         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 590         return -EREMOTEIO;
 591 }
 592
 593 static int mb86a16_read_status(struct dvb_frontend *fe, fe_status_t *status)
 594 {
 595         u8 stat, stat2;
 596         struct mb86a16_state *state = fe->demodulator_priv;
 597
 598         *status = 0;
 599
 600         if (mb86a16_read(state, MB86A16_SIG1, &stat) != 2)
 601                 goto err;
 602         if (mb86a16_read(state, MB86A16_SIG2, &stat2) != 2)
 603                 goto err;
 604         if ((stat > 25) && (stat2 > 25))
 605                 *status |= FE_HAS_SIGNAL;
 606         if ((stat > 45) && (stat2 > 45))
 607                 *status |= FE_HAS_CARRIER;
 608
 609         if (mb86a16_read(state, MB86A16_STATUS, &stat) != 2)
 610                 goto err;
 611
 612         if (stat & 0x01)
 613                 *status |= FE_HAS_SYNC;
 614         if (stat & 0x01)
 615                 *status |= FE_HAS_VITERBI;
 616
 617         if (mb86a16_read(state, MB86A16_FRAMESYNC, &stat) != 2)
 618                 goto err;
 619
 620         if ((stat & 0x0f) && (*status & FE_HAS_VITERBI))
 621                 *status |= FE_HAS_LOCK;
 622
 623         return 0;
 624
 625 err:
 626         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 627         return -EREMOTEIO;
 628 }
 629
 630 static int sync_chk(struct mb86a16_state *state,
 631                     unsigned char *VIRM)
 632 {
 633         unsigned char val;
 634         int sync;
 635
 636         if (mb86a16_read(state, 0x0d, &val) != 2)
 637                 goto err;
 638
 639         dprintk(verbose, MB86A16_INFO, 1, "Status = %02x,", val);
 640         sync = val & 0x01;
 641         *VIRM = (val & 0x1c) >> 2;
 642
 643         return sync;
 644 err:
 645         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 646         return -EREMOTEIO;
 647
 648 }
 649
 650 static int freqerr_chk(struct mb86a16_state *state,
 651                        int fTP,
 652                        int smrt,
 653                        int unit)
 654 {
 655         unsigned char CRM, AFCML, AFCMH;
 656         unsigned char temp1, temp2, temp3;
 657         int crm, afcm, AFCM;
 658         int crrerr, afcerr;             // [kHz]
 659         int frqerr;                     // [MHz]
 660         int afcen, afcexen = 0;
 661         int R, M, fOSC, fOSC_OFS;
 662
 663         if (mb86a16_read(state, 0x43, &CRM) != 2)
 664                 goto err;
 665
 666         if (CRM > 127)
 667                 crm = CRM - 256;
 668         else
 669                 crm = CRM;
 670
 671         crrerr = smrt * crm / 256;
 672         if (mb86a16_read(state, 0x49, &temp1) != 2)
 673                 goto err;
 674
 675         afcen = (temp1 & 0x04) >> 2;
 676         if (afcen == 0) {
 677                 if (mb86a16_read(state, 0x2a, &temp1) != 2)
 678                         goto err;
 679                 afcexen = (temp1 & 0x20) >> 5;
 680         }
 681
 682         if (afcen == 1) {
 683                 if (mb86a16_read(state, 0x0e, &AFCML) != 2)
 684                         goto err;
 685                 if (mb86a16_read(state, 0x0f, &AFCMH) != 2)
 686                         goto err;
 687         } else if (afcexen == 1) {
 688                 if (mb86a16_read(state, 0x2b, &AFCML) != 2)
 689                         goto err;
 690                 if (mb86a16_read(state, 0x2c, &AFCMH) != 2)
 691                         goto err;
 692         }
 693         if ((afcen == 1) || (afcexen == 1)) {
 694                 smrt_info_get(state, smrt);
 695                 AFCM = ((AFCMH & 0x01) << 8) + AFCML;
 696                 if (AFCM > 255)
 697                         afcm = AFCM - 512;
 698                 else
 699                         afcm = AFCM;
 700
 701                 afcerr = afcm * state->master_clk / 8192;
 702         } else
 703                 afcerr = 0;
 704
 705         if (mb86a16_read(state, 0x22, &temp1) != 2)
 706                 goto err;
 707         if (mb86a16_read(state, 0x23, &temp2) != 2)
 708                 goto err;
 709         if (mb86a16_read(state, 0x24, &temp3) != 2)
 710                 goto err;
 711
 712         R = (temp1 & 0xe0) >> 5;
 713         M = ((temp1 & 0x1f) << 12) + (temp2 << 4) + (temp3 >> 4);
 714         if (R == 0)
 715                 fOSC = 2 * M;
 716         else
 717                 fOSC = M;
 718
 719         fOSC_OFS = fOSC - fTP;
 720
 721         if (unit == 0) {        //[MHz]
 722                 if (crrerr + afcerr + fOSC_OFS * 1000 >= 0)
 723                         frqerr = (crrerr + afcerr + fOSC_OFS * 1000 + 500) / 1000;
 724                 else
 725                         frqerr = (crrerr + afcerr + fOSC_OFS * 1000 - 500) / 1000;
 726         } else {        //[kHz]
 727                 frqerr = crrerr + afcerr + fOSC_OFS * 1000;
 728         }
 729
 730         return frqerr;
 731 err:
 732         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 733         return -EREMOTEIO;
 734 }
 735
 736 static unsigned char vco_dev_get(struct mb86a16_state *state, int smrt)
 737 {
 738         unsigned char R;
 739
 740         if (smrt > 9375)
 741                 R = 0;
 742         else
 743                 R = 1;
 744
 745         return R;
 746 }
 747
 748 static void swp_info_get(struct mb86a16_state *state,
 749                          int fOSC_start,
 750                          int smrt,
 751                          int v, int R,
 752                          int swp_ofs,
 753                          int *fOSC,
 754                          int *afcex_freq,
 755                          unsigned char *AFCEX_L,
 756                          unsigned char *AFCEX_H)
 757 {
 758         int AFCEX ;
 759         int crnt_swp_freq ;
 760
 761         crnt_swp_freq = fOSC_start * 1000 + v * swp_ofs;
 762
 763         if (R == 0 )
 764                 *fOSC = (crnt_swp_freq + 1000) / 2000 * 2;
 765         else
 766                 *fOSC = (crnt_swp_freq + 500) / 1000;
 767
 768         if (*fOSC >= crnt_swp_freq)
 769                 *afcex_freq = *fOSC *1000 - crnt_swp_freq;
 770         else
 771                 *afcex_freq = crnt_swp_freq - *fOSC * 1000;
 772
 773         AFCEX = *afcex_freq * 8192 / state->master_clk;
 774         *AFCEX_L =  AFCEX & 0x00ff;
 775         *AFCEX_H = (AFCEX & 0x0f00) >> 8;
 776 }
 777
 778
 779 static int swp_freq_calcuation(struct mb86a16_state *state, int i, int v, int *V,  int vmax, int vmin,
 780                                int SIGMIN, int fOSC, int afcex_freq, int swp_ofs, unsigned char *SIG1)
 781 {
 782         int swp_freq ;
 783
 784         if ((i % 2 == 1) && (v <= vmax)) {
 785                 // positive v (case 1)
 786                 if ((v - 1 == vmin)                             &&
 787                     (*(V + 30 + v) >= 0)                        &&
 788                     (*(V + 30 + v - 1) >= 0)                    &&
 789                     (*(V + 30 + v - 1) > *(V + 30 + v))         &&
 790                     (*(V + 30 + v - 1) > SIGMIN)) {
 791
 792                         swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
 793                         *SIG1 = *(V + 30 + v - 1);
 794                 } else if ((v == vmax)                          &&
 795                            (*(V + 30 + v) >= 0)                 &&
 796                            (*(V + 30 + v - 1) >= 0)             &&
 797                            (*(V + 30 + v) > *(V + 30 + v - 1))  &&
 798                            (*(V + 30 + v) > SIGMIN)) {
 799                         // (case 2)
 800                         swp_freq = fOSC * 1000 + afcex_freq;
 801                         *SIG1 = *(V + 30 + v);
 802                 } else if ((*(V + 30 + v) > 0)                  &&
 803                            (*(V + 30 + v - 1) > 0)              &&
 804                            (*(V + 30 + v - 2) > 0)              &&
 805                            (*(V + 30 + v - 3) > 0)              &&
 806                            (*(V + 30 + v - 1) > *(V + 30 + v))  &&
 807                            (*(V + 30 + v - 2) > *(V + 30 + v - 3)) &&
 808                            ((*(V + 30 + v - 1) > SIGMIN)        ||
 809                            (*(V + 30 + v - 2) > SIGMIN))) {
 810                         // (case 3)
 811                         if (*(V + 30 + v - 1) >= *(V + 30 + v - 2)) {
 812                                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
 813                                 *SIG1 = *(V + 30 + v - 1);
 814                         } else {
 815                                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs * 2;
 816                                 *SIG1 = *(V + 30 + v - 2);
 817                         }
 818                 } else if ((v == vmax)                          &&
 819                            (*(V + 30 + v) >= 0)                 &&
 820                            (*(V + 30 + v - 1) >= 0)             &&
 821                            (*(V + 30 + v - 2) >= 0)             &&
 822                            (*(V + 30 + v) > *(V + 30 + v - 2))  &&
 823                            (*(V + 30 + v - 1) > *(V + 30 + v - 2)) &&
 824                            ((*(V + 30 + v) > SIGMIN)            ||
 825                            (*(V + 30 + v - 1) > SIGMIN))) {
 826                         // (case 4)
 827                         if (*(V + 30 + v) >= *(V + 30 + v - 1)) {
 828                                 swp_freq = fOSC * 1000 + afcex_freq;
 829                                 *SIG1 = *(V + 30 + v);
 830                         } else {
 831                                 swp_freq = fOSC * 1000 + afcex_freq - swp_ofs;
 832                                 *SIG1 = *(V + 30 + v - 1);
 833                         }
 834                 } else  {
 835                         swp_freq = -1 ;
 836                 }
 837         } else if ((i % 2 == 0) && (v >= vmin)) {
 838                 // Negative v (case 1)
 839                 if ((*(V + 30 + v) > 0)                         &&
 840                     (*(V + 30 + v + 1) > 0)                     &&
 841                     (*(V + 30 + v + 2) > 0)                     &&
 842                     (*(V + 30 + v + 1) > *(V + 30 + v))         &&
 843                     (*(V + 30 + v + 1) > *(V + 30 + v + 2))     &&
 844                     (*(V + 30 + v + 1) > SIGMIN)) {
 845
 846                         swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 847                         *SIG1 = *(V + 30 + v + 1);
 848                 } else if ((v + 1 == vmax)                      &&
 849                            (*(V + 30 + v) >= 0)                 &&
 850                            (*(V + 30 + v + 1) >= 0)             &&
 851                            (*(V + 30 + v + 1) > *(V + 30 + v))  &&
 852                            (*(V + 30 + v + 1) > SIGMIN)) {
 853                         // (case 2)
 854                         swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 855                         *SIG1 = *(V + 30 + v);
 856                 } else if ((v == vmin)                          &&
 857                            (*(V + 30 + v) > 0)                  &&
 858                            (*(V + 30 + v + 1) > 0)              &&
 859                            (*(V + 30 + v + 2) > 0)              &&
 860                            (*(V + 30 + v) > *(V + 30 + v + 1))  &&
 861                            (*(V + 30 + v) > *(V + 30 + v + 2))  &&
 862                            (*(V + 30 + v) > SIGMIN)) {
 863                         // (case 3)
 864                         swp_freq = fOSC * 1000 + afcex_freq;
 865                         *SIG1 = *(V + 30 + v);
 866                 } else if ((*(V + 30 + v) >= 0)                 &&
 867                            (*(V + 30 + v + 1) >= 0)             &&
 868                            (*(V + 30 + v + 2) >= 0)             &&
 869                            (*(V +30 + v + 3) >= 0)              &&
 870                            (*(V + 30 + v + 1) > *(V + 30 + v))  &&
 871                            (*(V + 30 + v + 2) > *(V + 30 + v + 3)) &&
 872                            ((*(V + 30 + v + 1) > SIGMIN)        ||
 873                             (*(V + 30 + v + 2) > SIGMIN))) {
 874                         // (case 4)
 875                         if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
 876                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 877                                 *SIG1 = *(V + 30 + v + 1);
 878                         } else {
 879                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2;
 880                                 *SIG1 = *(V + 30 + v + 2);
 881                         }
 882                 } else if ((*(V + 30 + v) >= 0)                 &&
 883                            (*(V + 30 + v + 1) >= 0)             &&
 884                            (*(V + 30 + v + 2) >= 0)             &&
 885                            (*(V + 30 + v + 3) >= 0)             &&
 886                            (*(V + 30 + v) > *(V + 30 + v + 2))  &&
 887                            (*(V + 30 + v + 1) > *(V + 30 + v + 2)) &&
 888                            (*(V + 30 + v) > *(V + 30 + v + 3))  &&
 889                            (*(V + 30 + v + 1) > *(V + 30 + v + 3)) &&
 890                            ((*(V + 30 + v) > SIGMIN)            ||
 891                             (*(V + 30 + v + 1) > SIGMIN))) {
 892                         // (case 5)
 893                         if (*(V + 30 + v) >= *(V + 30 + v + 1)) {
 894                                 swp_freq = fOSC * 1000 + afcex_freq;
 895                                 *SIG1 = *(V + 30 + v);
 896                         } else {
 897                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 898                                 *SIG1 = *(V + 30 + v + 1);
 899                         }
 900                 } else if ((v + 2 == vmin)                      &&
 901                            (*(V + 30 + v) >= 0)                 &&
 902                            (*(V + 30 + v + 1) >= 0)             &&
 903                            (*(V + 30 + v + 2) >= 0)             &&
 904                            (*(V + 30 + v + 1) > *(V + 30 + v))  &&
 905                            (*(V + 30 + v + 2) > *(V + 30 + v))  &&
 906                            ((*(V + 30 + v + 1) > SIGMIN)        ||
 907                             (*(V + 30 + v + 2) > SIGMIN))) {
 908                         // (case 6)
 909                         if (*(V + 30 + v + 1) >= *(V + 30 + v + 2)) {
 910                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs;
 911                                 *SIG1 = *(V + 30 + v + 1);
 912                         } else {
 913                                 swp_freq = fOSC * 1000 + afcex_freq + swp_ofs * 2;
 914                                 *SIG1 = *(V + 30 + v + 2);
 915                         }
 916                 } else if ((vmax == 0) && (vmin == 0) && (*(V + 30 + v) > SIGMIN)) {
 917                         swp_freq = fOSC * 1000;
 918                         *SIG1 = *(V + 30 + v);
 919                 } else swp_freq = -1;
 920         } else swp_freq = -1;
 921
 922         return swp_freq;
 923 }
 924
 925 static void swp_info_get2(struct mb86a16_state *state,
 926                           int smrt,
 927                           int R,
 928                           int swp_freq,
 929                           int *afcex_freq,
 930                           int *fOSC,
 931                           unsigned char *AFCEX_L,
 932                           unsigned char *AFCEX_H)
 933 {
 934         int AFCEX ;
 935
 936         if (R == 0)
 937                 *fOSC = (swp_freq + 1000) / 2000 * 2;
 938         else
 939                 *fOSC = (swp_freq + 500) / 1000;
 940
 941         if (*fOSC >= swp_freq)
 942                 *afcex_freq = *fOSC * 1000 - swp_freq;
 943         else
 944                 *afcex_freq = swp_freq - *fOSC * 1000;
 945
 946         AFCEX = *afcex_freq * 8192 / state->master_clk;
 947         *AFCEX_L =  AFCEX & 0x00ff;
 948         *AFCEX_H = (AFCEX & 0x0f00) >> 8;
 949 }
 950
 951 static void afcex_info_get(struct mb86a16_state *state,
 952                            int afcex_freq,
 953                            unsigned char *AFCEX_L,
 954                            unsigned char *AFCEX_H)
 955 {
 956         int AFCEX ;
 957
 958         AFCEX = afcex_freq * 8192 / state->master_clk;
 959         *AFCEX_L =  AFCEX & 0x00ff;
 960         *AFCEX_H = (AFCEX & 0x0f00) >> 8;
 961 }
 962
 963 static int SEQ_set(struct mb86a16_state *state, unsigned char loop)
 964 {
 965         // SLOCK0 = 0
 966         if (mb86a16_write(state, 0x32, 0x02 | (loop << 2)) < 0) {
 967                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 968                 return -EREMOTEIO;
 969         }
 970
 971         return 0;
 972 }
 973
 974 static int iq_vt_set(struct mb86a16_state *state, unsigned char IQINV)
 975 {
 976         // Viterbi Rate, IQ Settings
 977         if (mb86a16_write(state, 0x06, 0xdf | (IQINV << 5)) < 0) {
 978                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 979                 return -EREMOTEIO;
 980         }
 981
 982         return 0;
 983 }
 984
 985 static int FEC_srst(struct mb86a16_state *state)
 986 {
 987         if (mb86a16_write(state, MB86A16_RESET, 0x02) < 0) {
 988                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 989                 return -EREMOTEIO;
 990         }
 991
 992         return 0;
 993 }
 994
 995 static int S2T_set(struct mb86a16_state *state, unsigned char S2T)
 996 {
 997         if (mb86a16_write(state, 0x34, 0x70 | S2T) < 0) {
 998                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
 999                 return -EREMOTEIO;
1000         }
1001
1002         return 0;
1003 }
1004
1005 static int S45T_set(struct mb86a16_state *state, unsigned char S4T, unsigned char S5T)
1006 {
1007         if (mb86a16_write(state, 0x35, 0x00 | (S5T << 4) | S4T) < 0) {
1008                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1009                 return -EREMOTEIO;
1010         }
1011
1012         return 0;
1013 }
1014
1015
1016 static int mb86a16_set_fe(struct mb86a16_state *state)
1017 {
1018         u8 agcval, cnmval;
1019
1020         int i, j;
1021         int fOSC = 0;
1022         int fOSC_start = 0;
1023         int wait_t;
1024         int fcp;
1025         int swp_ofs;
1026         int V[60];
1027         u8 SIG1MIN;
1028
1029         unsigned char CREN, AFCEN, AFCEXEN;
1030         unsigned char SIG1;
1031         unsigned char TIMINT1, TIMINT2, TIMEXT;
1032         unsigned char S0T, S1T;
1033         unsigned char S2T;
1034 //      unsigned char S2T, S3T;
1035         unsigned char S4T, S5T;
1036         unsigned char AFCEX_L, AFCEX_H;
1037         unsigned char R;
1038         unsigned char VIRM;
1039         unsigned char ETH, VIA;
1040         unsigned char junk;
1041
1042         int loop;
1043         int ftemp;
1044         int v, vmax, vmin;
1045         int vmax_his, vmin_his;
1046         int swp_freq, prev_swp_freq[20];
1047         int prev_freq_num;
1048         int signal_dupl;
1049         int afcex_freq;
1050         int signal;
1051         int afcerr;
1052         int temp_freq, delta_freq;
1053         int dagcm[4];
1054         int smrt_d;
1055 //      int freq_err;
1056         int n;
1057         int ret = -1;
1058         int sync;
1059
1060         dprintk(verbose, MB86A16_INFO, 1, "freq=%d Mhz, symbrt=%d Ksps", state->frequency, state->srate);
1061
1062         fcp = 3000;
1063         swp_ofs = state->srate / 4;
1064
1065         for (i = 0; i < 60; i++)
1066                 V[i] = -1;
1067
1068         for (i = 0; i < 20; i++)
1069                 prev_swp_freq[i] = 0;
1070
1071         SIG1MIN = 25;
1072
1073         for (n = 0; ((n < 3) && (ret == -1)); n++) {
1074                 SEQ_set(state, 0);
1075                 iq_vt_set(state, 0);
1076
1077                 CREN = 0;
1078                 AFCEN = 0;
1079                 AFCEXEN = 1;
1080                 TIMINT1 = 0;
1081                 TIMINT2 = 1;
1082                 TIMEXT = 2;
1083                 S1T = 0;
1084                 S0T = 0;
1085
1086                 if (initial_set(state) < 0) {
1087                         dprintk(verbose, MB86A16_ERROR, 1, "initial set failed");
1088                         return -1;
1089                 }
1090                 if (DAGC_data_set(state, 3, 2) < 0) {
1091                         dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1092                         return -1;
1093                 }
1094                 if (EN_set(state, CREN, AFCEN) < 0) {
1095                         dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1096                         return -1; // (0, 0)
1097                 }
1098                 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1099                         dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1100                         return -1; // (1, smrt) = (1, symbolrate)
1101                 }
1102                 if (CNTM_set(state, TIMINT1, TIMINT2, TIMEXT) < 0) {
1103                         dprintk(verbose, MB86A16_ERROR, 1, "CNTM set error");
1104                         return -1; // (0, 1, 2)
1105                 }
1106                 if (S01T_set(state, S1T, S0T) < 0) {
1107                         dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1108                         return -1; // (0, 0)
1109                 }
1110                 smrt_info_get(state, state->srate);
1111                 if (smrt_set(state, state->srate) < 0) {
1112                         dprintk(verbose, MB86A16_ERROR, 1, "smrt info get error");
1113                         return -1;
1114                 }
1115
1116                 R = vco_dev_get(state, state->srate);
1117                 if (R == 1)
1118                         fOSC_start = state->frequency;
1119
1120                 else if (R == 0) {
1121                         if (state->frequency % 2 == 0) {
1122                                 fOSC_start = state->frequency;
1123                         } else {
1124                                 fOSC_start = state->frequency + 1;
1125                                 if (fOSC_start > 2150)
1126                                         fOSC_start = state->frequency - 1;
1127                         }
1128                 }
1129                 loop = 1;
1130                 ftemp = fOSC_start * 1000;
1131                 vmax = 0 ;
1132                 while (loop == 1) {
1133                         ftemp = ftemp + swp_ofs;
1134                         vmax++;
1135
1136                         // Upper bound
1137                         if (ftemp > 2150000) {
1138                                 loop = 0;
1139                                 vmax--;
1140                         }
1141                         else if ((ftemp == 2150000) || (ftemp - state->frequency * 1000 >= fcp + state->srate / 4))
1142                                 loop = 0;
1143                 }
1144
1145                 loop = 1;
1146                 ftemp = fOSC_start * 1000;
1147                 vmin = 0 ;
1148                 while (loop == 1) {
1149                         ftemp = ftemp - swp_ofs;
1150                         vmin--;
1151
1152                         // Lower bound
1153                         if (ftemp < 950000) {
1154                                 loop = 0;
1155                                 vmin++;
1156                         }
1157                         else if ((ftemp == 950000) || (state->frequency * 1000 - ftemp >= fcp + state->srate / 4))
1158                                 loop = 0;
1159                 }
1160
1161                 wait_t = (8000 + state->srate / 2) / state->srate;
1162                 if (wait_t == 0)
1163                         wait_t = 1;
1164
1165                 i = 0;
1166                 j = 0;
1167                 prev_freq_num = 0;
1168                 loop = 1;
1169                 signal = 0;
1170                 vmax_his = 0;
1171                 vmin_his = 0;
1172                 v = 0;
1173
1174                 while (loop == 1) {
1175                         swp_info_get(state, fOSC_start, state->srate,
1176                                      v, R, swp_ofs, &fOSC,
1177                                      &afcex_freq, &AFCEX_L, &AFCEX_H);
1178
1179                         udelay(100);
1180                         if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1181                                 dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1182                                 return -1;
1183                         }
1184                         udelay(100);
1185                         if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1186                                 dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1187                                 return -1;
1188                         }
1189                         if (srst(state) < 0) {
1190                                 dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1191                                 return -1;
1192                         }
1193                         msleep_interruptible(wait_t);
1194
1195                         if (mb86a16_read(state, 0x37, &SIG1) != 2) {
1196                                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1197                                 return -1;
1198                         }
1199                         V[30 + v] = SIG1 ;
1200                         swp_freq = swp_freq_calcuation(state, i, v, V, vmax, vmin,
1201                                                       SIG1MIN, fOSC, afcex_freq,
1202                                                       swp_ofs, &SIG1);  //changed
1203
1204                         signal_dupl = 0;
1205                         for (j = 0; j < prev_freq_num; j++) {
1206                                 if ((ABS(prev_swp_freq[j] - swp_freq)) < (swp_ofs * 3 / 2)) {
1207                                         signal_dupl = 1;
1208                                         dprintk(verbose, MB86A16_INFO, 1, "Probably Duplicate Signal, j = %d", j);
1209                                 }
1210                         }
1211                         if ((signal_dupl == 0) && (swp_freq > 0) && (ABS(swp_freq - state->frequency * 1000) < fcp + state->srate / 6)) {
1212                                 dprintk(verbose, MB86A16_DEBUG, 1, "------ Signal detect ------ [swp_freq=[%07d, srate=%05d]]", swp_freq, state->srate);
1213                                 prev_swp_freq[prev_freq_num] = swp_freq;
1214                                 prev_freq_num++;
1215                                 swp_info_get2(state, state->srate, R, swp_freq,
1216                                               &afcex_freq, &fOSC,
1217                                               &AFCEX_L, &AFCEX_H);
1218
1219                                 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1220                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1221                                         return -1;
1222                                 }
1223                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1224                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1225                                         return -1;
1226                                 }
1227                                 signal = signal_det(state, state->srate, &SIG1);
1228                                 if (signal == 1) {
1229                                         dprintk(verbose, MB86A16_ERROR, 1, "***** Signal Found *****");
1230                                         loop = 0;
1231                                 } else {
1232                                         dprintk(verbose, MB86A16_ERROR, 1, "!!!!! No signal !!!!!, try again...");
1233                                         smrt_info_get(state, state->srate);
1234                                         if (smrt_set(state, state->srate) < 0) {
1235                                                 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1236                                                 return -1;
1237                                         }
1238                                 }
1239                         }
1240                         if (v > vmax)
1241                                 vmax_his = 1 ;
1242                         if (v < vmin)
1243                                 vmin_his = 1 ;
1244                         i++;
1245
1246                         if ((i % 2 == 1) && (vmax_his == 1))
1247                                 i++;
1248                         if ((i % 2 == 0) && (vmin_his == 1))
1249                                 i++;
1250
1251                         if (i % 2 == 1)
1252                                 v = (i + 1) / 2;
1253                         else
1254                                 v = -i / 2;
1255
1256                         if ((vmax_his == 1) && (vmin_his == 1))
1257                                 loop = 0 ;
1258                 }
1259
1260                 if (signal == 1) {
1261                         dprintk(verbose, MB86A16_INFO, 1, " Start Freq Error Check");
1262                         S1T = 7 ;
1263                         S0T = 1 ;
1264                         CREN = 0 ;
1265                         AFCEN = 1 ;
1266                         AFCEXEN = 0 ;
1267
1268                         if (S01T_set(state, S1T, S0T) < 0) {
1269                                 dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1270                                 return -1;
1271                         }
1272                         smrt_info_get(state, state->srate);
1273                         if (smrt_set(state, state->srate) < 0) {
1274                                 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1275                                 return -1;
1276                         }
1277                         if (EN_set(state, CREN, AFCEN) < 0) {
1278                                 dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1279                                 return -1;
1280                         }
1281                         if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1282                                 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1283                                 return -1;
1284                         }
1285                         afcex_info_get(state, afcex_freq, &AFCEX_L, &AFCEX_H);
1286                         if (afcofs_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1287                                 dprintk(verbose, MB86A16_ERROR, 1, "AFCOFS data set error");
1288                                 return -1;
1289                         }
1290                         if (srst(state) < 0) {
1291                                 dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1292                                 return -1;
1293                         }
1294                         // delay 4~200
1295                         wait_t = 200000 / state->master_clk + 200000 / state->srate;
1296                         msleep(wait_t);
1297                         afcerr = afcerr_chk(state);
1298                         if (afcerr == -1)
1299                                 return -1;
1300
1301                         swp_freq = fOSC * 1000 + afcerr ;
1302                         AFCEXEN = 1 ;
1303                         if (state->srate >= 1500)
1304                                 smrt_d = state->srate / 3;
1305                         else
1306                                 smrt_d = state->srate / 2;
1307                         smrt_info_get(state, smrt_d);
1308                         if (smrt_set(state, smrt_d) < 0) {
1309                                 dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1310                                 return -1;
1311                         }
1312                         if (AFCEXEN_set(state, AFCEXEN, smrt_d) < 0) {
1313                                 dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1314                                 return -1;
1315                         }
1316                         R = vco_dev_get(state, smrt_d);
1317                         if (DAGC_data_set(state, 2, 0) < 0) {
1318                                 dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1319                                 return -1;
1320                         }
1321                         for (i = 0; i < 3; i++) {
1322                                 temp_freq = swp_freq + (i - 1) * state->srate / 8;
1323                                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1324                                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1325                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1326                                         return -1;
1327                                 }
1328                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1329                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1330                                         return -1;
1331                                 }
1332                                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1333                                 msleep(wait_t);
1334                                 dagcm[i] = dagcm_val_get(state);
1335                         }
1336                         if ((dagcm[0] > dagcm[1]) &&
1337                             (dagcm[0] > dagcm[2]) &&
1338                             (dagcm[0] - dagcm[1] > 2 * (dagcm[2] - dagcm[1]))) {
1339
1340                                 temp_freq = swp_freq - 2 * state->srate / 8;
1341                                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1342                                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1343                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1344                                         return -1;
1345                                 }
1346                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1347                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set");
1348                                         return -1;
1349                                 }
1350                                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1351                                 msleep(wait_t);
1352                                 dagcm[3] = dagcm_val_get(state);
1353                                 if (dagcm[3] > dagcm[1])
1354                                         delta_freq = (dagcm[2] - dagcm[0] + dagcm[1] - dagcm[3]) * state->srate / 300;
1355                                 else
1356                                         delta_freq = 0;
1357                         } else if ((dagcm[2] > dagcm[1]) &&
1358                                    (dagcm[2] > dagcm[0]) &&
1359                                    (dagcm[2] - dagcm[1] > 2 * (dagcm[0] - dagcm[1]))) {
1360
1361                                 temp_freq = swp_freq + 2 * state->srate / 8;
1362                                 swp_info_get2(state, smrt_d, R, temp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1363                                 if (rf_val_set(state, fOSC, smrt_d, R) < 0) {
1364                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set");
1365                                         return -1;
1366                                 }
1367                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1368                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set");
1369                                         return -1;
1370                                 }
1371                                 wait_t = 200000 / state->master_clk + 40000 / smrt_d;
1372                                 msleep(wait_t);
1373                                 dagcm[3] = dagcm_val_get(state);
1374                                 if (dagcm[3] > dagcm[1])
1375                                         delta_freq = (dagcm[2] - dagcm[0] + dagcm[3] - dagcm[1]) * state->srate / 300;
1376                                 else
1377                                         delta_freq = 0 ;
1378
1379                         } else {
1380                                 delta_freq = 0 ;
1381                         }
1382                         dprintk(verbose, MB86A16_INFO, 1, "SWEEP Frequency = %d", swp_freq);
1383                         swp_freq += delta_freq;
1384                         dprintk(verbose, MB86A16_INFO, 1, "Adjusting .., DELTA Freq = %d, SWEEP Freq=%d", delta_freq, swp_freq);
1385                         if (ABS(state->frequency * 1000 - swp_freq) > 3800) {
1386                                 dprintk(verbose, MB86A16_INFO, 1, "NO  --  SIGNAL !");
1387                         } else {
1388
1389                                 S1T = 0;
1390                                 S0T = 3;
1391                                 CREN = 1;
1392                                 AFCEN = 0;
1393                                 AFCEXEN = 1;
1394
1395                                 if (S01T_set(state, S1T, S0T) < 0) {
1396                                         dprintk(verbose, MB86A16_ERROR, 1, "S01T set error");
1397                                         return -1;
1398                                 }
1399                                 if (DAGC_data_set(state, 0, 0) < 0) {
1400                                         dprintk(verbose, MB86A16_ERROR, 1, "DAGC data set error");
1401                                         return -1;
1402                                 }
1403                                 R = vco_dev_get(state, state->srate);
1404                                 smrt_info_get(state, state->srate);
1405                                 if (smrt_set(state, state->srate) < 0) {
1406                                         dprintk(verbose, MB86A16_ERROR, 1, "smrt set error");
1407                                         return -1;
1408                                 }
1409                                 if (EN_set(state, CREN, AFCEN) < 0) {
1410                                         dprintk(verbose, MB86A16_ERROR, 1, "EN set error");
1411                                         return -1;
1412                                 }
1413                                 if (AFCEXEN_set(state, AFCEXEN, state->srate) < 0) {
1414                                         dprintk(verbose, MB86A16_ERROR, 1, "AFCEXEN set error");
1415                                         return -1;
1416                                 }
1417                                 swp_info_get2(state, state->srate, R, swp_freq, &afcex_freq, &fOSC, &AFCEX_L, &AFCEX_H);
1418                                 if (rf_val_set(state, fOSC, state->srate, R) < 0) {
1419                                         dprintk(verbose, MB86A16_ERROR, 1, "rf val set error");
1420                                         return -1;
1421                                 }
1422                                 if (afcex_data_set(state, AFCEX_L, AFCEX_H) < 0) {
1423                                         dprintk(verbose, MB86A16_ERROR, 1, "afcex data set error");
1424                                         return -1;
1425                                 }
1426                                 if (srst(state) < 0) {
1427                                         dprintk(verbose, MB86A16_ERROR, 1, "srst error");
1428                                         return -1;
1429                                 }
1430                                 wait_t = 7 + (10000 + state->srate / 2) / state->srate;
1431                                 if (wait_t == 0)
1432                                         wait_t = 1;
1433                                 msleep_interruptible(wait_t);
1434                                 if (mb86a16_read(state, 0x37, &SIG1) != 2) {
1435                                         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1436                                         return -EREMOTEIO;
1437                                 }
1438
1439                                 if (SIG1 > 110) {
1440                                         S2T = 4; S4T = 1; S5T = 6; ETH = 4; VIA = 6;
1441                                         wait_t = 7 + (917504 + state->srate / 2) / state->srate;
1442                                 } else if (SIG1 > 105) {
1443                                         S2T = 4; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1444                                         wait_t = 7 + (1048576 + state->srate / 2) / state->srate;
1445                                 } else if (SIG1 > 85) {
1446                                         S2T = 5; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1447                                         wait_t = 7 + (1310720 + state->srate / 2) / state->srate;
1448                                 } else if (SIG1 > 65) {
1449                                         S2T = 6; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1450                                         wait_t = 7 + (1572864 + state->srate / 2) / state->srate;
1451                                 } else {
1452                                         S2T = 7; S4T = 2; S5T = 8; ETH = 7; VIA = 2;
1453                                         wait_t = 7 + (2097152 + state->srate / 2) / state->srate;
1454                                 }
1455                                 wait_t *= 2; /*         FOS     */
1456                                 S2T_set(state, S2T);
1457                                 S45T_set(state, S4T, S5T);
1458                                 Vi_set(state, ETH, VIA);
1459                                 srst(state);
1460                                 msleep_interruptible(wait_t);
1461                                 sync = sync_chk(state, &VIRM);
1462                                 dprintk(verbose, MB86A16_INFO, 1, "-------- Viterbi=[%d] SYNC=[%d] ---------", VIRM, sync);
1463                                 if (VIRM) {
1464                                         if (VIRM == 4) { // 5/6
1465                                                 if (SIG1 > 110)
1466                                                         wait_t = ( 786432 + state->srate / 2) / state->srate;
1467                                                 else
1468                                                         wait_t = (1572864 + state->srate / 2) / state->srate;
1469                                                 if (state->srate < 5000)
1470                                                         // FIXME ! , should be a long wait !
1471                                                         msleep_interruptible(wait_t);
1472                                                 else
1473                                                         msleep_interruptible(wait_t);
1474
1475                                                 if (sync_chk(state, &junk) == 0) {
1476                                                         iq_vt_set(state, 1);
1477                                                         FEC_srst(state);
1478                                                 }
1479                                         }
1480                                         // 1/2, 2/3, 3/4, 7/8
1481                                         if (SIG1 > 110)
1482                                                 wait_t = ( 786432 + state->srate / 2) / state->srate;
1483                                         else
1484                                                 wait_t = (1572864 + state->srate / 2) / state->srate;
1485                                         msleep_interruptible(wait_t);
1486                                         SEQ_set(state, 1);
1487                                 } else {
1488                                         dprintk(verbose, MB86A16_INFO, 1, "NO  -- SYNC");
1489                                         SEQ_set(state, 1);
1490                                         ret = -1;
1491                                 }
1492                         }
1493                 } else {
1494                         dprintk (verbose, MB86A16_INFO, 1, "NO  -- SIGNAL");
1495                         ret = -1;
1496                 }
1497
1498                 sync = sync_chk(state, &junk);
1499                 if (sync) {
1500                         dprintk(verbose, MB86A16_INFO, 1, "******* SYNC *******");
1501                         freqerr_chk(state, state->frequency, state->srate, 1);
1502                         ret = 0;
1503                         break;
1504                 }
1505         }
1506
1507         mb86a16_read(state, 0x15, &agcval);
1508         mb86a16_read(state, 0x26, &cnmval);
1509         dprintk(verbose, MB86A16_INFO, 1, "AGC = %02x CNM = %02x", agcval, cnmval);
1510
1511         return ret;
1512 }
1513
1514 static int mb86a16_send_diseqc_msg(struct dvb_frontend *fe,
1515                                    struct dvb_diseqc_master_cmd *cmd)
1516 {
1517         struct mb86a16_state *state = fe->demodulator_priv;
1518         int i;
1519         u8 regs;
1520
1521         if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0)
1522                 goto err;
1523         if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0)
1524                 goto err;
1525         if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0)
1526                 goto err;
1527
1528         regs = 0x18;
1529
1530         if (cmd->msg_len > 5 || cmd->msg_len < 4)
1531                 return -EINVAL;
1532
1533         for (i = 0; i < cmd->msg_len; i++) {
1534                 if (mb86a16_write(state, regs, cmd->msg[i]) < 0)
1535                         goto err;
1536
1537                 regs++;
1538         }
1539         i += 0x90;
1540
1541         msleep_interruptible(10);
1542
1543         if (mb86a16_write(state, MB86A16_DCC1, i) < 0)
1544                 goto err;
1545         if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1546                 goto err;
1547
1548         return 0;
1549
1550 err:
1551         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1552         return -EREMOTEIO;
1553 }
1554
1555 static int mb86a16_send_diseqc_burst(struct dvb_frontend *fe, fe_sec_mini_cmd_t burst)
1556 {
1557         struct mb86a16_state *state = fe->demodulator_priv;
1558
1559         switch (burst) {
1560         case SEC_MINI_A:
1561                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1562                                                        MB86A16_DCC1_TBEN  |
1563                                                        MB86A16_DCC1_TBO) < 0)
1564                         goto err;
1565                 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1566                         goto err;
1567                 break;
1568         case SEC_MINI_B:
1569                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1570                                                        MB86A16_DCC1_TBEN) < 0)
1571                         goto err;
1572                 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1573                         goto err;
1574                 break;
1575         }
1576
1577         return 0;
1578 err:
1579         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1580         return -EREMOTEIO;
1581 }
1582
1583 static int mb86a16_set_tone(struct dvb_frontend *fe, fe_sec_tone_mode_t tone)
1584 {
1585         struct mb86a16_state *state = fe->demodulator_priv;
1586
1587         switch (tone) {
1588         case SEC_TONE_ON:
1589                 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x00) < 0)
1590                         goto err;
1591                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA |
1592                                                        MB86A16_DCC1_CTOE) < 0)
1593
1594                         goto err;
1595                 if (mb86a16_write(state, MB86A16_DCCOUT, MB86A16_DCCOUT_DISEN) < 0)
1596                         goto err;
1597                 break;
1598         case SEC_TONE_OFF:
1599                 if (mb86a16_write(state, MB86A16_TONEOUT2, 0x04) < 0)
1600                         goto err;
1601                 if (mb86a16_write(state, MB86A16_DCC1, MB86A16_DCC1_DISTA) < 0)
1602                         goto err;
1603                 if (mb86a16_write(state, MB86A16_DCCOUT, 0x00) < 0)
1604                         goto err;
1605                 break;
1606         default:
1607                 return -EINVAL;
1608         }
1609         return 0;
1610
1611 err:
1612         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1613         return -EREMOTEIO;
1614 }
1615
1616 static enum dvbfe_search mb86a16_search(struct dvb_frontend *fe,
1617                                         struct dvb_frontend_parameters *p)
1618 {
1619         struct mb86a16_state *state = fe->demodulator_priv;
1620
1621         state->frequency = p->frequency / 1000;
1622         state->srate = p->u.qpsk.symbol_rate / 1000;
1623
1624         if (!mb86a16_set_fe(state)) {
1625                 dprintk(verbose, MB86A16_ERROR, 1, "Succesfully acquired LOCK");
1626                 return DVBFE_ALGO_SEARCH_SUCCESS;
1627         }
1628
1629         dprintk(verbose, MB86A16_ERROR, 1, "Lock acquisition failed!");
1630         return DVBFE_ALGO_SEARCH_FAILED;
1631 }
1632
1633 static void mb86a16_release(struct dvb_frontend *fe)
1634 {
1635         struct mb86a16_state *state = fe->demodulator_priv;
1636         kfree(state);
1637 }
1638
1639 static int mb86a16_init(struct dvb_frontend *fe)
1640 {
1641         return 0;
1642 }
1643
1644 static int mb86a16_sleep(struct dvb_frontend *fe)
1645 {
1646         return 0;
1647 }
1648
1649 static int mb86a16_read_ber(struct dvb_frontend *fe, u32 *ber)
1650 {
1651         u8 ber_mon, ber_tab, ber_lsb, ber_mid, ber_msb, ber_tim, ber_rst;
1652         u32 timer;
1653
1654         struct mb86a16_state *state = fe->demodulator_priv;
1655
1656         *ber = 0;
1657         if (mb86a16_read(state, MB86A16_BERMON, &ber_mon) != 2)
1658                 goto err;
1659         if (mb86a16_read(state, MB86A16_BERTAB, &ber_tab) != 2)
1660                 goto err;
1661         if (mb86a16_read(state, MB86A16_BERLSB, &ber_lsb) != 2)
1662                 goto err;
1663         if (mb86a16_read(state, MB86A16_BERMID, &ber_mid) != 2)
1664                 goto err;
1665         if (mb86a16_read(state, MB86A16_BERMSB, &ber_msb) != 2)
1666                 goto err;
1667         /* BER monitor invalid when BER_EN = 0  */
1668         if (ber_mon & 0x04) {
1669                 /* coarse, fast calculation     */
1670                 *ber = ber_tab & 0x1f;
1671                 dprintk(verbose, MB86A16_DEBUG, 1, "BER coarse=[0x%02x]", *ber);
1672                 if (ber_mon & 0x01) {
1673                         /*
1674                          * BER_SEL = 1, The monitored BER is the estimated
1675                          * value with a Reed-Solomon decoder error amount at
1676                          * the deinterleaver output.
1677                          * monitored BER is expressed as a 20 bit output in total
1678                          */
1679                         ber_rst = ber_mon >> 3;
1680                         *ber = (((ber_msb << 8) | ber_mid) << 8) | ber_lsb;
1681                         if (ber_rst == 0)
1682                                 timer =  12500000;
1683                         if (ber_rst == 1)
1684                                 timer =  25000000;
1685                         if (ber_rst == 2)
1686                                 timer =  50000000;
1687                         if (ber_rst == 3)
1688                                 timer = 100000000;
1689
1690                         *ber /= timer;
1691                         dprintk(verbose, MB86A16_DEBUG, 1, "BER fine=[0x%02x]", *ber);
1692                 } else {
1693                         /*
1694                          * BER_SEL = 0, The monitored BER is the estimated
1695                          * value with a Viterbi decoder error amount at the
1696                          * QPSK demodulator output.
1697                          * monitored BER is expressed as a 24 bit output in total
1698                          */
1699                         ber_tim = ber_mon >> 1;
1700                         *ber = (((ber_msb << 8) | ber_mid) << 8) | ber_lsb;
1701                         if (ber_tim == 0)
1702                                 timer = 16;
1703                         if (ber_tim == 1)
1704                                 timer = 24;
1705
1706                         *ber /= 2 ^ timer;
1707                         dprintk(verbose, MB86A16_DEBUG, 1, "BER fine=[0x%02x]", *ber);
1708                 }
1709         }
1710         return 0;
1711 err:
1712         dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1713         return -EREMOTEIO;
1714 }
1715
1716 static int mb86a16_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
1717 {
1718         u8 agcm = 0;
1719         struct mb86a16_state *state = fe->demodulator_priv;
1720
1721         *strength = 0;
1722         if (mb86a16_read(state, MB86A16_AGCM, &agcm) != 2) {
1723                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1724                 return -EREMOTEIO;
1725         }
1726
1727         *strength = ((0xff - agcm) * 100) / 256;
1728         dprintk(verbose, MB86A16_DEBUG, 1, "Signal strength=[%d %%]", (u8) *strength);
1729         *strength = (0xffff - 0xff) + agcm;
1730
1731         return 0;
1732 }
1733
1734 struct cnr {
1735         u8 cn_reg;
1736         u8 cn_val;
1737 };
1738
1739 static const struct cnr cnr_tab[] = {
1740         {  35,  2 },
1741         {  40,  3 },
1742         {  50,  4 },
1743         {  60,  5 },
1744         {  70,  6 },
1745         {  80,  7 },
1746         {  92,  8 },
1747         { 103,  9 },
1748         { 115, 10 },
1749         { 138, 12 },
1750         { 162, 15 },
1751         { 180, 18 },
1752         { 185, 19 },
1753         { 189, 20 },
1754         { 195, 22 },
1755         { 199, 24 },
1756         { 201, 25 },
1757         { 202, 26 },
1758         { 203, 27 },
1759         { 205, 28 },
1760         { 208, 30 }
1761 };
1762
1763 static int mb86a16_read_snr(struct dvb_frontend *fe, u16 *snr)
1764 {
1765         struct mb86a16_state *state = fe->demodulator_priv;
1766         int i = 0;
1767         int low_tide = 2, high_tide = 30, q_level;
1768         u8  cn;
1769
1770         *snr = 0;
1771         if (mb86a16_read(state, 0x26, &cn) != 2) {
1772                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1773                 return -EREMOTEIO;
1774         }
1775
1776         for (i = 0; i < ARRAY_SIZE(cnr_tab); i++) {
1777                 if (cn < cnr_tab[i].cn_reg) {
1778                         *snr = cnr_tab[i].cn_val;
1779                         break;
1780                 }
1781         }
1782         q_level = (*snr * 100) / (high_tide - low_tide);
1783         dprintk(verbose, MB86A16_ERROR, 1, "SNR (Quality) = [%d dB], Level=%d %%", *snr, q_level);
1784         *snr = (0xffff - 0xff) + *snr;
1785
1786         return 0;
1787 }
1788
1789 static int mb86a16_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
1790 {
1791         u8 dist;
1792         struct mb86a16_state *state = fe->demodulator_priv;
1793
1794         if (mb86a16_read(state, MB86A16_DISTMON, &dist) != 2) {
1795                 dprintk(verbose, MB86A16_ERROR, 1, "I2C transfer error");
1796                 return -EREMOTEIO;
1797         }
1798         *ucblocks = dist;
1799
1800         return 0;
1801 }
1802
1803 static enum dvbfe_algo mb86a16_frontend_algo(struct dvb_frontend *fe)
1804 {
1805         return DVBFE_ALGO_CUSTOM;
1806 }
1807
1808 static struct dvb_frontend_ops mb86a16_ops = {
1809         .info = {
1810                 .name                   = "Fujitsu MB86A16 DVB-S",
1811                 .type                   = FE_QPSK,
1812                 .frequency_min          = 950000,
1813                 .frequency_max          = 2150000,
1814                 .frequency_stepsize     = 3000,
1815                 .frequency_tolerance    = 0,
1816                 .symbol_rate_min        = 1000000,
1817                 .symbol_rate_max        = 45000000,
1818                 .symbol_rate_tolerance  = 500,
1819                 .caps                   = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
1820                                           FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 |
1821                                           FE_CAN_FEC_7_8 | FE_CAN_QPSK    |
1822                                           FE_CAN_FEC_AUTO
1823         },
1824         .release                        = mb86a16_release,
1825
1826         .get_frontend_algo              = mb86a16_frontend_algo,
1827         .search                         = mb86a16_search,
1828         .read_status                    = mb86a16_read_status,
1829         .init                           = mb86a16_init,
1830         .sleep                          = mb86a16_sleep,
1831         .read_status                    = mb86a16_read_status,
1832
1833         .read_ber                       = mb86a16_read_ber,
1834         .read_signal_strength           = mb86a16_read_signal_strength,
1835         .read_snr                       = mb86a16_read_snr,
1836         .read_ucblocks                  = mb86a16_read_ucblocks,
1837
1838         .diseqc_send_master_cmd         = mb86a16_send_diseqc_msg,
1839         .diseqc_send_burst              = mb86a16_send_diseqc_burst,
1840         .set_tone                       = mb86a16_set_tone,
1841 };
1842
1843 struct dvb_frontend *mb86a16_attach(const struct mb86a16_config *config,
1844                                     struct i2c_adapter *i2c_adap)
1845 {
1846         u8 dev_id = 0;
1847         struct mb86a16_state *state = NULL;
1848
1849         state = kmalloc(sizeof (struct mb86a16_state), GFP_KERNEL);
1850         if (state == NULL)
1851                 goto error;
1852
1853         state->config = config;
1854         state->i2c_adap = i2c_adap;
1855
1856         mb86a16_read(state, 0x7f, &dev_id);
1857         if (dev_id != 0xfe)
1858                 goto error;
1859
1860         memcpy(&state->frontend.ops, &mb86a16_ops, sizeof (struct dvb_frontend_ops));
1861         state->frontend.demodulator_priv = state;
1862         state->frontend.ops.set_voltage = state->config->set_voltage;
1863
1864         return &state->frontend;
1865 error:
1866         kfree(state);
1867         return NULL;
1868 }
1869 EXPORT_SYMBOL(mb86a16_attach);
1870 MODULE_LICENSE("GPL");
1871 MODULE_AUTHOR("Manu Abraham");