2 * driver for Earthsoft PT1
4 * Copyright (C) 2009 HIRANO Takahito <hiranotaka@zng.info>
6 * based on pt1dvr - http://pt1dvr.sourceforge.jp/
7 * by Tomoaki Ishikawa <tomy@users.sourceforge.jp>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
24 #include <linux/kernel.h>
25 #include <linux/module.h>
26 #include <linux/pci.h>
27 #include <linux/kthread.h>
28 #include <linux/freezer.h>
31 #include "dvb_demux.h"
34 #include "dvb_frontend.h"
36 #include "va1j5jf8007t.h"
37 #include "va1j5jf8007s.h"
39 #define DRIVER_NAME "earth-pt1"
41 #define PT1_PAGE_SHIFT 12
42 #define PT1_PAGE_SIZE (1 << PT1_PAGE_SHIFT)
43 #define PT1_NR_UPACKETS 1024
44 #define PT1_NR_BUFS 511
46 struct pt1_buffer_page {
47 __le32 upackets[PT1_NR_UPACKETS];
50 struct pt1_table_page {
52 __le32 buf_pfns[PT1_NR_BUFS];
56 struct pt1_buffer_page *page;
61 struct pt1_table_page *page;
63 struct pt1_buffer bufs[PT1_NR_BUFS];
66 #define PT1_NR_ADAPS 4
73 struct i2c_adapter i2c_adap;
75 struct pt1_adapter *adaps[PT1_NR_ADAPS];
76 struct pt1_table *tables;
77 struct task_struct *kthread;
88 struct dvb_adapter adap;
89 struct dvb_demux demux;
93 struct dvb_frontend *fe;
94 int (*orig_set_voltage)(struct dvb_frontend *fe,
95 fe_sec_voltage_t voltage);
98 #define pt1_printk(level, pt1, format, arg...) \
99 dev_printk(level, &(pt1)->pdev->dev, format, ##arg)
101 static void pt1_write_reg(struct pt1 *pt1, int reg, u32 data)
103 writel(data, pt1->regs + reg * 4);
106 static u32 pt1_read_reg(struct pt1 *pt1, int reg)
108 return readl(pt1->regs + reg * 4);
111 static int pt1_nr_tables = 64;
112 module_param_named(nr_tables, pt1_nr_tables, int, 0);
114 static void pt1_increment_table_count(struct pt1 *pt1)
116 pt1_write_reg(pt1, 0, 0x00000020);
119 static void pt1_init_table_count(struct pt1 *pt1)
121 pt1_write_reg(pt1, 0, 0x00000010);
124 static void pt1_register_tables(struct pt1 *pt1, u32 first_pfn)
126 pt1_write_reg(pt1, 5, first_pfn);
127 pt1_write_reg(pt1, 0, 0x0c000040);
130 static void pt1_unregister_tables(struct pt1 *pt1)
132 pt1_write_reg(pt1, 0, 0x08080000);
135 static int pt1_sync(struct pt1 *pt1)
138 for (i = 0; i < 57; i++) {
139 if (pt1_read_reg(pt1, 0) & 0x20000000)
141 pt1_write_reg(pt1, 0, 0x00000008);
143 pt1_printk(KERN_ERR, pt1, "could not sync\n");
147 static u64 pt1_identify(struct pt1 *pt1)
152 for (i = 0; i < 57; i++) {
153 id |= (u64)(pt1_read_reg(pt1, 0) >> 30 & 1) << i;
154 pt1_write_reg(pt1, 0, 0x00000008);
159 static int pt1_unlock(struct pt1 *pt1)
162 pt1_write_reg(pt1, 0, 0x00000008);
163 for (i = 0; i < 3; i++) {
164 if (pt1_read_reg(pt1, 0) & 0x80000000)
166 schedule_timeout_uninterruptible((HZ + 999) / 1000);
168 pt1_printk(KERN_ERR, pt1, "could not unlock\n");
172 static int pt1_reset_pci(struct pt1 *pt1)
175 pt1_write_reg(pt1, 0, 0x01010000);
176 pt1_write_reg(pt1, 0, 0x01000000);
177 for (i = 0; i < 10; i++) {
178 if (pt1_read_reg(pt1, 0) & 0x00000001)
180 schedule_timeout_uninterruptible((HZ + 999) / 1000);
182 pt1_printk(KERN_ERR, pt1, "could not reset PCI\n");
186 static int pt1_reset_ram(struct pt1 *pt1)
189 pt1_write_reg(pt1, 0, 0x02020000);
190 pt1_write_reg(pt1, 0, 0x02000000);
191 for (i = 0; i < 10; i++) {
192 if (pt1_read_reg(pt1, 0) & 0x00000002)
194 schedule_timeout_uninterruptible((HZ + 999) / 1000);
196 pt1_printk(KERN_ERR, pt1, "could not reset RAM\n");
200 static int pt1_do_enable_ram(struct pt1 *pt1)
204 status = pt1_read_reg(pt1, 0) & 0x00000004;
205 pt1_write_reg(pt1, 0, 0x00000002);
206 for (i = 0; i < 10; i++) {
207 for (j = 0; j < 1024; j++) {
208 if ((pt1_read_reg(pt1, 0) & 0x00000004) != status)
211 schedule_timeout_uninterruptible((HZ + 999) / 1000);
213 pt1_printk(KERN_ERR, pt1, "could not enable RAM\n");
217 static int pt1_enable_ram(struct pt1 *pt1)
220 schedule_timeout_uninterruptible((HZ + 999) / 1000);
221 for (i = 0; i < 10; i++) {
222 ret = pt1_do_enable_ram(pt1);
229 static void pt1_disable_ram(struct pt1 *pt1)
231 pt1_write_reg(pt1, 0, 0x0b0b0000);
234 static void pt1_set_stream(struct pt1 *pt1, int index, int enabled)
236 pt1_write_reg(pt1, 2, 1 << (index + 8) | enabled << index);
239 static void pt1_init_streams(struct pt1 *pt1)
242 for (i = 0; i < PT1_NR_ADAPS; i++)
243 pt1_set_stream(pt1, i, 0);
246 static int pt1_filter(struct pt1 *pt1, struct pt1_buffer_page *page)
251 struct pt1_adapter *adap;
255 if (!page->upackets[PT1_NR_UPACKETS - 1])
258 for (i = 0; i < PT1_NR_UPACKETS; i++) {
259 upacket = le32_to_cpu(page->upackets[i]);
260 index = (upacket >> 29) - 1;
261 if (index < 0 || index >= PT1_NR_ADAPS)
264 adap = pt1->adaps[index];
265 if (upacket >> 25 & 1)
266 adap->upacket_count = 0;
267 else if (!adap->upacket_count)
271 offset = adap->packet_count * 188 + adap->upacket_count * 3;
272 buf[offset] = upacket >> 16;
273 buf[offset + 1] = upacket >> 8;
274 if (adap->upacket_count != 62)
275 buf[offset + 2] = upacket;
277 if (++adap->upacket_count >= 63) {
278 adap->upacket_count = 0;
279 if (++adap->packet_count >= 21) {
280 dvb_dmx_swfilter_packets(&adap->demux, buf, 21);
281 adap->packet_count = 0;
286 page->upackets[PT1_NR_UPACKETS - 1] = 0;
290 static int pt1_thread(void *data)
295 struct pt1_buffer_page *page;
303 while (!kthread_should_stop()) {
306 page = pt1->tables[table_index].bufs[buf_index].page;
307 if (!pt1_filter(pt1, page)) {
308 schedule_timeout_interruptible((HZ + 999) / 1000);
312 if (++buf_index >= PT1_NR_BUFS) {
313 pt1_increment_table_count(pt1);
315 if (++table_index >= pt1_nr_tables)
323 static void pt1_free_page(struct pt1 *pt1, void *page, dma_addr_t addr)
325 dma_free_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, page, addr);
328 static void *pt1_alloc_page(struct pt1 *pt1, dma_addr_t *addrp, u32 *pfnp)
333 page = dma_alloc_coherent(&pt1->pdev->dev, PT1_PAGE_SIZE, &addr,
338 BUG_ON(addr & (PT1_PAGE_SIZE - 1));
339 BUG_ON(addr >> PT1_PAGE_SHIFT >> 31 >> 1);
342 *pfnp = addr >> PT1_PAGE_SHIFT;
346 static void pt1_cleanup_buffer(struct pt1 *pt1, struct pt1_buffer *buf)
348 pt1_free_page(pt1, buf->page, buf->addr);
352 pt1_init_buffer(struct pt1 *pt1, struct pt1_buffer *buf, u32 *pfnp)
354 struct pt1_buffer_page *page;
357 page = pt1_alloc_page(pt1, &addr, pfnp);
361 page->upackets[PT1_NR_UPACKETS - 1] = 0;
368 static void pt1_cleanup_table(struct pt1 *pt1, struct pt1_table *table)
372 for (i = 0; i < PT1_NR_BUFS; i++)
373 pt1_cleanup_buffer(pt1, &table->bufs[i]);
375 pt1_free_page(pt1, table->page, table->addr);
379 pt1_init_table(struct pt1 *pt1, struct pt1_table *table, u32 *pfnp)
381 struct pt1_table_page *page;
386 page = pt1_alloc_page(pt1, &addr, pfnp);
390 for (i = 0; i < PT1_NR_BUFS; i++) {
391 ret = pt1_init_buffer(pt1, &table->bufs[i], &buf_pfn);
395 page->buf_pfns[i] = cpu_to_le32(buf_pfn);
398 pt1_increment_table_count(pt1);
405 pt1_cleanup_buffer(pt1, &table->bufs[i]);
407 pt1_free_page(pt1, page, addr);
411 static void pt1_cleanup_tables(struct pt1 *pt1)
413 struct pt1_table *tables;
416 tables = pt1->tables;
417 pt1_unregister_tables(pt1);
419 for (i = 0; i < pt1_nr_tables; i++)
420 pt1_cleanup_table(pt1, &tables[i]);
425 static int pt1_init_tables(struct pt1 *pt1)
427 struct pt1_table *tables;
431 tables = vmalloc(sizeof(struct pt1_table) * pt1_nr_tables);
435 pt1_init_table_count(pt1);
439 ret = pt1_init_table(pt1, &tables[0], &first_pfn);
445 while (i < pt1_nr_tables) {
446 ret = pt1_init_table(pt1, &tables[i], &pfn);
449 tables[i - 1].page->next_pfn = cpu_to_le32(pfn);
453 tables[pt1_nr_tables - 1].page->next_pfn = cpu_to_le32(first_pfn);
455 pt1_register_tables(pt1, first_pfn);
456 pt1->tables = tables;
461 pt1_cleanup_table(pt1, &tables[i]);
467 static int pt1_start_feed(struct dvb_demux_feed *feed)
469 struct pt1_adapter *adap;
470 adap = container_of(feed->demux, struct pt1_adapter, demux);
472 pt1_set_stream(adap->pt1, adap->index, 1);
476 static int pt1_stop_feed(struct dvb_demux_feed *feed)
478 struct pt1_adapter *adap;
479 adap = container_of(feed->demux, struct pt1_adapter, demux);
481 pt1_set_stream(adap->pt1, adap->index, 0);
486 pt1_set_power(struct pt1 *pt1, int power, int lnb, int reset)
488 pt1_write_reg(pt1, 1, power | lnb << 1 | !reset << 3);
491 static int pt1_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
493 struct pt1_adapter *adap;
496 adap = container_of(fe->dvb, struct pt1_adapter, adap);
499 case SEC_VOLTAGE_13: /* actually 11V */
502 case SEC_VOLTAGE_18: /* actually 15V */
505 case SEC_VOLTAGE_OFF:
512 pt1_set_power(adap->pt1, 1, lnb, 0);
514 if (adap->orig_set_voltage)
515 return adap->orig_set_voltage(fe, voltage);
520 static void pt1_free_adapter(struct pt1_adapter *adap)
522 dvb_unregister_frontend(adap->fe);
523 dvb_net_release(&adap->net);
524 adap->demux.dmx.close(&adap->demux.dmx);
525 dvb_dmxdev_release(&adap->dmxdev);
526 dvb_dmx_release(&adap->demux);
527 dvb_unregister_adapter(&adap->adap);
528 free_page((unsigned long)adap->buf);
532 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
534 static struct pt1_adapter *
535 pt1_alloc_adapter(struct pt1 *pt1, struct dvb_frontend *fe)
537 struct pt1_adapter *adap;
539 struct dvb_adapter *dvb_adap;
540 struct dvb_demux *demux;
541 struct dmxdev *dmxdev;
544 adap = kzalloc(sizeof(struct pt1_adapter), GFP_KERNEL);
552 adap->orig_set_voltage = fe->ops.set_voltage;
553 fe->ops.set_voltage = pt1_set_voltage;
555 buf = (u8 *)__get_free_page(GFP_KERNEL);
562 adap->upacket_count = 0;
563 adap->packet_count = 0;
565 dvb_adap = &adap->adap;
566 dvb_adap->priv = adap;
567 ret = dvb_register_adapter(dvb_adap, DRIVER_NAME, THIS_MODULE,
568 &pt1->pdev->dev, adapter_nr);
572 demux = &adap->demux;
573 demux->dmx.capabilities = DMX_TS_FILTERING | DMX_SECTION_FILTERING;
575 demux->feednum = 256;
576 demux->filternum = 256;
577 demux->start_feed = pt1_start_feed;
578 demux->stop_feed = pt1_stop_feed;
579 demux->write_to_decoder = NULL;
580 ret = dvb_dmx_init(demux);
582 goto err_unregister_adapter;
584 dmxdev = &adap->dmxdev;
585 dmxdev->filternum = 256;
586 dmxdev->demux = &demux->dmx;
587 dmxdev->capabilities = 0;
588 ret = dvb_dmxdev_init(dmxdev, dvb_adap);
590 goto err_dmx_release;
592 dvb_net_init(dvb_adap, &adap->net, &demux->dmx);
594 ret = dvb_register_frontend(dvb_adap, fe);
596 goto err_net_release;
602 dvb_net_release(&adap->net);
603 adap->demux.dmx.close(&adap->demux.dmx);
604 dvb_dmxdev_release(&adap->dmxdev);
606 dvb_dmx_release(demux);
607 err_unregister_adapter:
608 dvb_unregister_adapter(dvb_adap);
610 free_page((unsigned long)buf);
617 static void pt1_cleanup_adapters(struct pt1 *pt1)
620 for (i = 0; i < PT1_NR_ADAPS; i++)
621 pt1_free_adapter(pt1->adaps[i]);
625 struct va1j5jf8007s_config va1j5jf8007s_config;
626 struct va1j5jf8007t_config va1j5jf8007t_config;
629 static const struct pt1_config pt1_configs[2] = {
631 { .demod_address = 0x1b },
632 { .demod_address = 0x1a },
634 { .demod_address = 0x19 },
635 { .demod_address = 0x18 },
639 static int pt1_init_adapters(struct pt1 *pt1)
642 struct i2c_adapter *i2c_adap;
643 const struct pt1_config *config;
644 struct dvb_frontend *fe[4];
645 struct pt1_adapter *adap;
651 i2c_adap = &pt1->i2c_adap;
653 config = &pt1_configs[i / 2];
655 fe[i] = va1j5jf8007s_attach(&config->va1j5jf8007s_config,
658 ret = -ENODEV; /* This does not sound nice... */
663 fe[i] = va1j5jf8007t_attach(&config->va1j5jf8007t_config,
671 ret = va1j5jf8007s_prepare(fe[i - 2]);
675 ret = va1j5jf8007t_prepare(fe[i - 1]);
682 adap = pt1_alloc_adapter(pt1, fe[j]);
686 pt1->adaps[j] = adap;
693 fe[i]->ops.release(fe[i]);
696 pt1_free_adapter(pt1->adaps[j]);
701 static void pt1_i2c_emit(struct pt1 *pt1, int addr, int busy, int read_enable,
702 int clock, int data, int next_addr)
704 pt1_write_reg(pt1, 4, addr << 18 | busy << 13 | read_enable << 12 |
705 !clock << 11 | !data << 10 | next_addr);
708 static void pt1_i2c_write_bit(struct pt1 *pt1, int addr, int *addrp, int data)
710 pt1_i2c_emit(pt1, addr, 1, 0, 0, data, addr + 1);
711 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, data, addr + 2);
712 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, data, addr + 3);
716 static void pt1_i2c_read_bit(struct pt1 *pt1, int addr, int *addrp)
718 pt1_i2c_emit(pt1, addr, 1, 0, 0, 1, addr + 1);
719 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 1, addr + 2);
720 pt1_i2c_emit(pt1, addr + 2, 1, 1, 1, 1, addr + 3);
721 pt1_i2c_emit(pt1, addr + 3, 1, 0, 0, 1, addr + 4);
725 static void pt1_i2c_write_byte(struct pt1 *pt1, int addr, int *addrp, int data)
728 for (i = 0; i < 8; i++)
729 pt1_i2c_write_bit(pt1, addr, &addr, data >> (7 - i) & 1);
730 pt1_i2c_write_bit(pt1, addr, &addr, 1);
734 static void pt1_i2c_read_byte(struct pt1 *pt1, int addr, int *addrp, int last)
737 for (i = 0; i < 8; i++)
738 pt1_i2c_read_bit(pt1, addr, &addr);
739 pt1_i2c_write_bit(pt1, addr, &addr, last);
743 static void pt1_i2c_prepare(struct pt1 *pt1, int addr, int *addrp)
745 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
746 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
747 pt1_i2c_emit(pt1, addr + 2, 1, 0, 0, 0, addr + 3);
752 pt1_i2c_write_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
755 pt1_i2c_prepare(pt1, addr, &addr);
756 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1);
757 for (i = 0; i < msg->len; i++)
758 pt1_i2c_write_byte(pt1, addr, &addr, msg->buf[i]);
763 pt1_i2c_read_msg(struct pt1 *pt1, int addr, int *addrp, struct i2c_msg *msg)
766 pt1_i2c_prepare(pt1, addr, &addr);
767 pt1_i2c_write_byte(pt1, addr, &addr, msg->addr << 1 | 1);
768 for (i = 0; i < msg->len; i++)
769 pt1_i2c_read_byte(pt1, addr, &addr, i == msg->len - 1);
773 static int pt1_i2c_end(struct pt1 *pt1, int addr)
775 pt1_i2c_emit(pt1, addr, 1, 0, 0, 0, addr + 1);
776 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
777 pt1_i2c_emit(pt1, addr + 2, 1, 0, 1, 1, 0);
779 pt1_write_reg(pt1, 0, 0x00000004);
781 if (signal_pending(current))
783 schedule_timeout_interruptible((HZ + 999) / 1000);
784 } while (pt1_read_reg(pt1, 0) & 0x00000080);
788 static void pt1_i2c_begin(struct pt1 *pt1, int *addrp)
793 pt1_i2c_emit(pt1, addr, 0, 0, 1, 1, addr /* itself */);
796 if (!pt1->i2c_running) {
797 pt1_i2c_emit(pt1, addr, 1, 0, 1, 1, addr + 1);
798 pt1_i2c_emit(pt1, addr + 1, 1, 0, 1, 0, addr + 2);
800 pt1->i2c_running = 1;
805 static int pt1_i2c_xfer(struct i2c_adapter *adap, struct i2c_msg *msgs, int num)
809 struct i2c_msg *msg, *next_msg;
814 pt1 = i2c_get_adapdata(adap);
816 for (i = 0; i < num; i++) {
818 if (msg->flags & I2C_M_RD)
822 next_msg = &msgs[i + 1];
826 if (next_msg && next_msg->flags & I2C_M_RD) {
833 pt1_i2c_begin(pt1, &addr);
834 pt1_i2c_write_msg(pt1, addr, &addr, msg);
835 pt1_i2c_read_msg(pt1, addr, &addr, next_msg);
836 ret = pt1_i2c_end(pt1, addr);
840 word = pt1_read_reg(pt1, 2);
842 next_msg->buf[len] = word;
846 pt1_i2c_begin(pt1, &addr);
847 pt1_i2c_write_msg(pt1, addr, &addr, msg);
848 ret = pt1_i2c_end(pt1, addr);
857 static u32 pt1_i2c_func(struct i2c_adapter *adap)
862 static const struct i2c_algorithm pt1_i2c_algo = {
863 .master_xfer = pt1_i2c_xfer,
864 .functionality = pt1_i2c_func,
867 static void pt1_i2c_wait(struct pt1 *pt1)
870 for (i = 0; i < 128; i++)
871 pt1_i2c_emit(pt1, 0, 0, 0, 1, 1, 0);
874 static void pt1_i2c_init(struct pt1 *pt1)
877 for (i = 0; i < 1024; i++)
878 pt1_i2c_emit(pt1, i, 0, 0, 1, 1, 0);
881 static void __devexit pt1_remove(struct pci_dev *pdev)
886 pt1 = pci_get_drvdata(pdev);
889 kthread_stop(pt1->kthread);
890 pt1_cleanup_tables(pt1);
891 pt1_cleanup_adapters(pt1);
892 pt1_disable_ram(pt1);
893 pt1_set_power(pt1, 0, 0, 1);
894 i2c_del_adapter(&pt1->i2c_adap);
895 pci_set_drvdata(pdev, NULL);
897 pci_iounmap(pdev, regs);
898 pci_release_regions(pdev);
899 pci_disable_device(pdev);
903 pt1_probe(struct pci_dev *pdev, const struct pci_device_id *ent)
908 struct i2c_adapter *i2c_adap;
909 struct task_struct *kthread;
911 ret = pci_enable_device(pdev);
915 ret = pci_set_dma_mask(pdev, DMA_BIT_MASK(32));
917 goto err_pci_disable_device;
919 pci_set_master(pdev);
921 ret = pci_request_regions(pdev, DRIVER_NAME);
923 goto err_pci_disable_device;
925 regs = pci_iomap(pdev, 0, 0);
928 goto err_pci_release_regions;
931 pt1 = kzalloc(sizeof(struct pt1), GFP_KERNEL);
934 goto err_pci_iounmap;
939 pci_set_drvdata(pdev, pt1);
941 i2c_adap = &pt1->i2c_adap;
942 i2c_adap->class = I2C_CLASS_TV_DIGITAL;
943 i2c_adap->algo = &pt1_i2c_algo;
944 i2c_adap->algo_data = NULL;
945 i2c_adap->dev.parent = &pdev->dev;
946 i2c_set_adapdata(i2c_adap, pt1);
947 ret = i2c_add_adapter(i2c_adap);
951 pt1_set_power(pt1, 0, 0, 1);
958 goto err_i2c_del_adapter;
962 ret = pt1_unlock(pt1);
964 goto err_i2c_del_adapter;
966 ret = pt1_reset_pci(pt1);
968 goto err_i2c_del_adapter;
970 ret = pt1_reset_ram(pt1);
972 goto err_i2c_del_adapter;
974 ret = pt1_enable_ram(pt1);
976 goto err_i2c_del_adapter;
978 pt1_init_streams(pt1);
980 pt1_set_power(pt1, 1, 0, 1);
981 schedule_timeout_uninterruptible((HZ + 49) / 50);
983 pt1_set_power(pt1, 1, 0, 0);
984 schedule_timeout_uninterruptible((HZ + 999) / 1000);
986 ret = pt1_init_adapters(pt1);
988 goto err_pt1_disable_ram;
990 ret = pt1_init_tables(pt1);
992 goto err_pt1_cleanup_adapters;
994 kthread = kthread_run(pt1_thread, pt1, "pt1");
995 if (IS_ERR(kthread)) {
996 ret = PTR_ERR(kthread);
997 goto err_pt1_cleanup_tables;
1000 pt1->kthread = kthread;
1003 err_pt1_cleanup_tables:
1004 pt1_cleanup_tables(pt1);
1005 err_pt1_cleanup_adapters:
1006 pt1_cleanup_adapters(pt1);
1007 err_pt1_disable_ram:
1008 pt1_disable_ram(pt1);
1009 pt1_set_power(pt1, 0, 0, 1);
1010 err_i2c_del_adapter:
1011 i2c_del_adapter(i2c_adap);
1013 pci_set_drvdata(pdev, NULL);
1016 pci_iounmap(pdev, regs);
1017 err_pci_release_regions:
1018 pci_release_regions(pdev);
1019 err_pci_disable_device:
1020 pci_disable_device(pdev);
1026 static struct pci_device_id pt1_id_table[] = {
1027 { PCI_DEVICE(0x10ee, 0x211a) },
1030 MODULE_DEVICE_TABLE(pci, pt1_id_table);
1032 static struct pci_driver pt1_driver = {
1033 .name = DRIVER_NAME,
1035 .remove = __devexit_p(pt1_remove),
1036 .id_table = pt1_id_table,
1040 static int __init pt1_init(void)
1042 return pci_register_driver(&pt1_driver);
1046 static void __exit pt1_cleanup(void)
1048 pci_unregister_driver(&pt1_driver);
1051 module_init(pt1_init);
1052 module_exit(pt1_cleanup);
1054 MODULE_AUTHOR("Takahito HIRANO <hiranotaka@zng.info>");
1055 MODULE_DESCRIPTION("Earthsoft PT1 Driver");
1056 MODULE_LICENSE("GPL");