drivers/media/dvb-frontends/af9033.c

   1 /*
   2  * Afatech AF9033 demodulator driver
   3  *
   4  * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
   5  * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
   6  *
   7  *    This program is free software; you can redistribute it and/or modify
   8  *    it under the terms of the GNU General Public License as published by
   9  *    the Free Software Foundation; either version 2 of the License, or
  10  *    (at your option) any later version.
  11  *
  12  *    This program is distributed in the hope that it will be useful,
  13  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *    GNU General Public License for more details.
  16  *
  17  *    You should have received a copy of the GNU General Public License along
  18  *    with this program; if not, write to the Free Software Foundation, Inc.,
  19  *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20  */
  21
  22 #include "af9033_priv.h"
  23
  24 /* Max transfer size done by I2C transfer functions */
  25 #define MAX_XFER_SIZE  64
  26
  27 struct af9033_dev {
  28         struct i2c_client *client;
  29         struct dvb_frontend fe;
  30         struct af9033_config cfg;
  31         bool is_af9035;
  32         bool is_it9135;
  33
  34         u32 bandwidth_hz;
  35         bool ts_mode_parallel;
  36         bool ts_mode_serial;
  37
  38         fe_status_t fe_status;
  39         u32 ber;
  40         u32 ucb;
  41         u64 post_bit_error;
  42         u64 post_bit_count;
  43         u64 error_block_count;
  44         u64 total_block_count;
  45         struct delayed_work stat_work;
  46         unsigned long last_stat_check;
  47 };
  48
  49 /* write multiple registers */
  50 static int af9033_wr_regs(struct af9033_dev *dev, u32 reg, const u8 *val,
  51                 int len)
  52 {
  53         int ret;
  54         u8 buf[MAX_XFER_SIZE];
  55         struct i2c_msg msg[1] = {
  56                 {
  57                         .addr = dev->client->addr,
  58                         .flags = 0,
  59                         .len = 3 + len,
  60                         .buf = buf,
  61                 }
  62         };
  63
  64         if (3 + len > sizeof(buf)) {
  65                 dev_warn(&dev->client->dev,
  66                                 "i2c wr reg=%04x: len=%d is too big!\n",
  67                                 reg, len);
  68                 return -EINVAL;
  69         }
  70
  71         buf[0] = (reg >> 16) & 0xff;
  72         buf[1] = (reg >>  8) & 0xff;
  73         buf[2] = (reg >>  0) & 0xff;
  74         memcpy(&buf[3], val, len);
  75
  76         ret = i2c_transfer(dev->client->adapter, msg, 1);
  77         if (ret == 1) {
  78                 ret = 0;
  79         } else {
  80                 dev_warn(&dev->client->dev, "i2c wr failed=%d reg=%06x len=%d\n",
  81                                 ret, reg, len);
  82                 ret = -EREMOTEIO;
  83         }
  84
  85         return ret;
  86 }
  87
  88 /* read multiple registers */
  89 static int af9033_rd_regs(struct af9033_dev *dev, u32 reg, u8 *val, int len)
  90 {
  91         int ret;
  92         u8 buf[3] = { (reg >> 16) & 0xff, (reg >> 8) & 0xff,
  93                         (reg >> 0) & 0xff };
  94         struct i2c_msg msg[2] = {
  95                 {
  96                         .addr = dev->client->addr,
  97                         .flags = 0,
  98                         .len = sizeof(buf),
  99                         .buf = buf
 100                 }, {
 101                         .addr = dev->client->addr,
 102                         .flags = I2C_M_RD,
 103                         .len = len,
 104                         .buf = val
 105                 }
 106         };
 107
 108         ret = i2c_transfer(dev->client->adapter, msg, 2);
 109         if (ret == 2) {
 110                 ret = 0;
 111         } else {
 112                 dev_warn(&dev->client->dev, "i2c rd failed=%d reg=%06x len=%d\n",
 113                                 ret, reg, len);
 114                 ret = -EREMOTEIO;
 115         }
 116
 117         return ret;
 118 }
 119
 120
 121 /* write single register */
 122 static int af9033_wr_reg(struct af9033_dev *dev, u32 reg, u8 val)
 123 {
 124         return af9033_wr_regs(dev, reg, &val, 1);
 125 }
 126
 127 /* read single register */
 128 static int af9033_rd_reg(struct af9033_dev *dev, u32 reg, u8 *val)
 129 {
 130         return af9033_rd_regs(dev, reg, val, 1);
 131 }
 132
 133 /* write single register with mask */
 134 static int af9033_wr_reg_mask(struct af9033_dev *dev, u32 reg, u8 val,
 135                 u8 mask)
 136 {
 137         int ret;
 138         u8 tmp;
 139
 140         /* no need for read if whole reg is written */
 141         if (mask != 0xff) {
 142                 ret = af9033_rd_regs(dev, reg, &tmp, 1);
 143                 if (ret)
 144                         return ret;
 145
 146                 val &= mask;
 147                 tmp &= ~mask;
 148                 val |= tmp;
 149         }
 150
 151         return af9033_wr_regs(dev, reg, &val, 1);
 152 }
 153
 154 /* read single register with mask */
 155 static int af9033_rd_reg_mask(struct af9033_dev *dev, u32 reg, u8 *val,
 156                 u8 mask)
 157 {
 158         int ret, i;
 159         u8 tmp;
 160
 161         ret = af9033_rd_regs(dev, reg, &tmp, 1);
 162         if (ret)
 163                 return ret;
 164
 165         tmp &= mask;
 166
 167         /* find position of the first bit */
 168         for (i = 0; i < 8; i++) {
 169                 if ((mask >> i) & 0x01)
 170                         break;
 171         }
 172         *val = tmp >> i;
 173
 174         return 0;
 175 }
 176
 177 /* write reg val table using reg addr auto increment */
 178 static int af9033_wr_reg_val_tab(struct af9033_dev *dev,
 179                 const struct reg_val *tab, int tab_len)
 180 {
 181 #define MAX_TAB_LEN 212
 182         int ret, i, j;
 183         u8 buf[1 + MAX_TAB_LEN];
 184
 185         dev_dbg(&dev->client->dev, "tab_len=%d\n", tab_len);
 186
 187         if (tab_len > sizeof(buf)) {
 188                 dev_warn(&dev->client->dev, "tab len %d is too big\n", tab_len);
 189                 return -EINVAL;
 190         }
 191
 192         for (i = 0, j = 0; i < tab_len; i++) {
 193                 buf[j] = tab[i].val;
 194
 195                 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1) {
 196                         ret = af9033_wr_regs(dev, tab[i].reg - j, buf, j + 1);
 197                         if (ret < 0)
 198                                 goto err;
 199
 200                         j = 0;
 201                 } else {
 202                         j++;
 203                 }
 204         }
 205
 206         return 0;
 207
 208 err:
 209         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 210
 211         return ret;
 212 }
 213
 214 static u32 af9033_div(struct af9033_dev *dev, u32 a, u32 b, u32 x)
 215 {
 216         u32 r = 0, c = 0, i;
 217
 218         dev_dbg(&dev->client->dev, "a=%d b=%d x=%d\n", a, b, x);
 219
 220         if (a > b) {
 221                 c = a / b;
 222                 a = a - c * b;
 223         }
 224
 225         for (i = 0; i < x; i++) {
 226                 if (a >= b) {
 227                         r += 1;
 228                         a -= b;
 229                 }
 230                 a <<= 1;
 231                 r <<= 1;
 232         }
 233         r = (c << (u32)x) + r;
 234
 235         dev_dbg(&dev->client->dev, "a=%d b=%d x=%d r=%d r=%x\n", a, b, x, r, r);
 236
 237         return r;
 238 }
 239
 240 static int af9033_init(struct dvb_frontend *fe)
 241 {
 242         struct af9033_dev *dev = fe->demodulator_priv;
 243         int ret, i, len;
 244         const struct reg_val *init;
 245         u8 buf[4];
 246         u32 adc_cw, clock_cw;
 247         struct reg_val_mask tab[] = {
 248                 { 0x80fb24, 0x00, 0x08 },
 249                 { 0x80004c, 0x00, 0xff },
 250                 { 0x00f641, dev->cfg.tuner, 0xff },
 251                 { 0x80f5ca, 0x01, 0x01 },
 252                 { 0x80f715, 0x01, 0x01 },
 253                 { 0x00f41f, 0x04, 0x04 },
 254                 { 0x00f41a, 0x01, 0x01 },
 255                 { 0x80f731, 0x00, 0x01 },
 256                 { 0x00d91e, 0x00, 0x01 },
 257                 { 0x00d919, 0x00, 0x01 },
 258                 { 0x80f732, 0x00, 0x01 },
 259                 { 0x00d91f, 0x00, 0x01 },
 260                 { 0x00d91a, 0x00, 0x01 },
 261                 { 0x80f730, 0x00, 0x01 },
 262                 { 0x80f778, 0x00, 0xff },
 263                 { 0x80f73c, 0x01, 0x01 },
 264                 { 0x80f776, 0x00, 0x01 },
 265                 { 0x00d8fd, 0x01, 0xff },
 266                 { 0x00d830, 0x01, 0xff },
 267                 { 0x00d831, 0x00, 0xff },
 268                 { 0x00d832, 0x00, 0xff },
 269                 { 0x80f985, dev->ts_mode_serial, 0x01 },
 270                 { 0x80f986, dev->ts_mode_parallel, 0x01 },
 271                 { 0x00d827, 0x00, 0xff },
 272                 { 0x00d829, 0x00, 0xff },
 273                 { 0x800045, dev->cfg.adc_multiplier, 0xff },
 274         };
 275
 276         /* program clock control */
 277         clock_cw = af9033_div(dev, dev->cfg.clock, 1000000ul, 19ul);
 278         buf[0] = (clock_cw >>  0) & 0xff;
 279         buf[1] = (clock_cw >>  8) & 0xff;
 280         buf[2] = (clock_cw >> 16) & 0xff;
 281         buf[3] = (clock_cw >> 24) & 0xff;
 282
 283         dev_dbg(&dev->client->dev, "clock=%d clock_cw=%08x\n",
 284                         dev->cfg.clock, clock_cw);
 285
 286         ret = af9033_wr_regs(dev, 0x800025, buf, 4);
 287         if (ret < 0)
 288                 goto err;
 289
 290         /* program ADC control */
 291         for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 292                 if (clock_adc_lut[i].clock == dev->cfg.clock)
 293                         break;
 294         }
 295
 296         adc_cw = af9033_div(dev, clock_adc_lut[i].adc, 1000000ul, 19ul);
 297         buf[0] = (adc_cw >>  0) & 0xff;
 298         buf[1] = (adc_cw >>  8) & 0xff;
 299         buf[2] = (adc_cw >> 16) & 0xff;
 300
 301         dev_dbg(&dev->client->dev, "adc=%d adc_cw=%06x\n",
 302                         clock_adc_lut[i].adc, adc_cw);
 303
 304         ret = af9033_wr_regs(dev, 0x80f1cd, buf, 3);
 305         if (ret < 0)
 306                 goto err;
 307
 308         /* program register table */
 309         for (i = 0; i < ARRAY_SIZE(tab); i++) {
 310                 ret = af9033_wr_reg_mask(dev, tab[i].reg, tab[i].val,
 311                                 tab[i].mask);
 312                 if (ret < 0)
 313                         goto err;
 314         }
 315
 316         /* clock output */
 317         if (dev->cfg.dyn0_clk) {
 318                 ret = af9033_wr_reg(dev, 0x80fba8, 0x00);
 319                 if (ret < 0)
 320                         goto err;
 321         }
 322
 323         /* settings for TS interface */
 324         if (dev->cfg.ts_mode == AF9033_TS_MODE_USB) {
 325                 ret = af9033_wr_reg_mask(dev, 0x80f9a5, 0x00, 0x01);
 326                 if (ret < 0)
 327                         goto err;
 328
 329                 ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x01, 0x01);
 330                 if (ret < 0)
 331                         goto err;
 332         } else {
 333                 ret = af9033_wr_reg_mask(dev, 0x80f990, 0x00, 0x01);
 334                 if (ret < 0)
 335                         goto err;
 336
 337                 ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x00, 0x01);
 338                 if (ret < 0)
 339                         goto err;
 340         }
 341
 342         /* load OFSM settings */
 343         dev_dbg(&dev->client->dev, "load ofsm settings\n");
 344         switch (dev->cfg.tuner) {
 345         case AF9033_TUNER_IT9135_38:
 346         case AF9033_TUNER_IT9135_51:
 347         case AF9033_TUNER_IT9135_52:
 348                 len = ARRAY_SIZE(ofsm_init_it9135_v1);
 349                 init = ofsm_init_it9135_v1;
 350                 break;
 351         case AF9033_TUNER_IT9135_60:
 352         case AF9033_TUNER_IT9135_61:
 353         case AF9033_TUNER_IT9135_62:
 354                 len = ARRAY_SIZE(ofsm_init_it9135_v2);
 355                 init = ofsm_init_it9135_v2;
 356                 break;
 357         default:
 358                 len = ARRAY_SIZE(ofsm_init);
 359                 init = ofsm_init;
 360                 break;
 361         }
 362
 363         ret = af9033_wr_reg_val_tab(dev, init, len);
 364         if (ret < 0)
 365                 goto err;
 366
 367         /* load tuner specific settings */
 368         dev_dbg(&dev->client->dev, "load tuner specific settings\n");
 369         switch (dev->cfg.tuner) {
 370         case AF9033_TUNER_TUA9001:
 371                 len = ARRAY_SIZE(tuner_init_tua9001);
 372                 init = tuner_init_tua9001;
 373                 break;
 374         case AF9033_TUNER_FC0011:
 375                 len = ARRAY_SIZE(tuner_init_fc0011);
 376                 init = tuner_init_fc0011;
 377                 break;
 378         case AF9033_TUNER_MXL5007T:
 379                 len = ARRAY_SIZE(tuner_init_mxl5007t);
 380                 init = tuner_init_mxl5007t;
 381                 break;
 382         case AF9033_TUNER_TDA18218:
 383                 len = ARRAY_SIZE(tuner_init_tda18218);
 384                 init = tuner_init_tda18218;
 385                 break;
 386         case AF9033_TUNER_FC2580:
 387                 len = ARRAY_SIZE(tuner_init_fc2580);
 388                 init = tuner_init_fc2580;
 389                 break;
 390         case AF9033_TUNER_FC0012:
 391                 len = ARRAY_SIZE(tuner_init_fc0012);
 392                 init = tuner_init_fc0012;
 393                 break;
 394         case AF9033_TUNER_IT9135_38:
 395                 len = ARRAY_SIZE(tuner_init_it9135_38);
 396                 init = tuner_init_it9135_38;
 397                 break;
 398         case AF9033_TUNER_IT9135_51:
 399                 len = ARRAY_SIZE(tuner_init_it9135_51);
 400                 init = tuner_init_it9135_51;
 401                 break;
 402         case AF9033_TUNER_IT9135_52:
 403                 len = ARRAY_SIZE(tuner_init_it9135_52);
 404                 init = tuner_init_it9135_52;
 405                 break;
 406         case AF9033_TUNER_IT9135_60:
 407                 len = ARRAY_SIZE(tuner_init_it9135_60);
 408                 init = tuner_init_it9135_60;
 409                 break;
 410         case AF9033_TUNER_IT9135_61:
 411                 len = ARRAY_SIZE(tuner_init_it9135_61);
 412                 init = tuner_init_it9135_61;
 413                 break;
 414         case AF9033_TUNER_IT9135_62:
 415                 len = ARRAY_SIZE(tuner_init_it9135_62);
 416                 init = tuner_init_it9135_62;
 417                 break;
 418         default:
 419                 dev_dbg(&dev->client->dev, "unsupported tuner ID=%d\n",
 420                                 dev->cfg.tuner);
 421                 ret = -ENODEV;
 422                 goto err;
 423         }
 424
 425         ret = af9033_wr_reg_val_tab(dev, init, len);
 426         if (ret < 0)
 427                 goto err;
 428
 429         if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
 430                 ret = af9033_wr_reg_mask(dev, 0x00d91c, 0x01, 0x01);
 431                 if (ret < 0)
 432                         goto err;
 433
 434                 ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
 435                 if (ret < 0)
 436                         goto err;
 437
 438                 ret = af9033_wr_reg_mask(dev, 0x00d916, 0x00, 0x01);
 439                 if (ret < 0)
 440                         goto err;
 441         }
 442
 443         switch (dev->cfg.tuner) {
 444         case AF9033_TUNER_IT9135_60:
 445         case AF9033_TUNER_IT9135_61:
 446         case AF9033_TUNER_IT9135_62:
 447                 ret = af9033_wr_reg(dev, 0x800000, 0x01);
 448                 if (ret < 0)
 449                         goto err;
 450         }
 451
 452         dev->bandwidth_hz = 0; /* force to program all parameters */
 453         /* start statistics polling */
 454         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
 455
 456         return 0;
 457
 458 err:
 459         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 460
 461         return ret;
 462 }
 463
 464 static int af9033_sleep(struct dvb_frontend *fe)
 465 {
 466         struct af9033_dev *dev = fe->demodulator_priv;
 467         int ret, i;
 468         u8 tmp;
 469
 470         /* stop statistics polling */
 471         cancel_delayed_work_sync(&dev->stat_work);
 472
 473         ret = af9033_wr_reg(dev, 0x80004c, 1);
 474         if (ret < 0)
 475                 goto err;
 476
 477         ret = af9033_wr_reg(dev, 0x800000, 0);
 478         if (ret < 0)
 479                 goto err;
 480
 481         for (i = 100, tmp = 1; i && tmp; i--) {
 482                 ret = af9033_rd_reg(dev, 0x80004c, &tmp);
 483                 if (ret < 0)
 484                         goto err;
 485
 486                 usleep_range(200, 10000);
 487         }
 488
 489         dev_dbg(&dev->client->dev, "loop=%d\n", i);
 490
 491         if (i == 0) {
 492                 ret = -ETIMEDOUT;
 493                 goto err;
 494         }
 495
 496         ret = af9033_wr_reg_mask(dev, 0x80fb24, 0x08, 0x08);
 497         if (ret < 0)
 498                 goto err;
 499
 500         /* prevent current leak (?) */
 501         if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
 502                 /* enable parallel TS */
 503                 ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
 504                 if (ret < 0)
 505                         goto err;
 506
 507                 ret = af9033_wr_reg_mask(dev, 0x00d916, 0x01, 0x01);
 508                 if (ret < 0)
 509                         goto err;
 510         }
 511
 512         return 0;
 513
 514 err:
 515         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 516
 517         return ret;
 518 }
 519
 520 static int af9033_get_tune_settings(struct dvb_frontend *fe,
 521                 struct dvb_frontend_tune_settings *fesettings)
 522 {
 523         /* 800 => 2000 because IT9135 v2 is slow to gain lock */
 524         fesettings->min_delay_ms = 2000;
 525         fesettings->step_size = 0;
 526         fesettings->max_drift = 0;
 527
 528         return 0;
 529 }
 530
 531 static int af9033_set_frontend(struct dvb_frontend *fe)
 532 {
 533         struct af9033_dev *dev = fe->demodulator_priv;
 534         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 535         int ret, i, spec_inv, sampling_freq;
 536         u8 tmp, buf[3], bandwidth_reg_val;
 537         u32 if_frequency, freq_cw, adc_freq;
 538
 539         dev_dbg(&dev->client->dev, "frequency=%d bandwidth_hz=%d\n",
 540                         c->frequency, c->bandwidth_hz);
 541
 542         /* check bandwidth */
 543         switch (c->bandwidth_hz) {
 544         case 6000000:
 545                 bandwidth_reg_val = 0x00;
 546                 break;
 547         case 7000000:
 548                 bandwidth_reg_val = 0x01;
 549                 break;
 550         case 8000000:
 551                 bandwidth_reg_val = 0x02;
 552                 break;
 553         default:
 554                 dev_dbg(&dev->client->dev, "invalid bandwidth_hz\n");
 555                 ret = -EINVAL;
 556                 goto err;
 557         }
 558
 559         /* program tuner */
 560         if (fe->ops.tuner_ops.set_params)
 561                 fe->ops.tuner_ops.set_params(fe);
 562
 563         /* program CFOE coefficients */
 564         if (c->bandwidth_hz != dev->bandwidth_hz) {
 565                 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
 566                         if (coeff_lut[i].clock == dev->cfg.clock &&
 567                                 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
 568                                 break;
 569                         }
 570                 }
 571                 ret =  af9033_wr_regs(dev, 0x800001,
 572                                 coeff_lut[i].val, sizeof(coeff_lut[i].val));
 573         }
 574
 575         /* program frequency control */
 576         if (c->bandwidth_hz != dev->bandwidth_hz) {
 577                 spec_inv = dev->cfg.spec_inv ? -1 : 1;
 578
 579                 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 580                         if (clock_adc_lut[i].clock == dev->cfg.clock)
 581                                 break;
 582                 }
 583                 adc_freq = clock_adc_lut[i].adc;
 584
 585                 /* get used IF frequency */
 586                 if (fe->ops.tuner_ops.get_if_frequency)
 587                         fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
 588                 else
 589                         if_frequency = 0;
 590
 591                 sampling_freq = if_frequency;
 592
 593                 while (sampling_freq > (adc_freq / 2))
 594                         sampling_freq -= adc_freq;
 595
 596                 if (sampling_freq >= 0)
 597                         spec_inv *= -1;
 598                 else
 599                         sampling_freq *= -1;
 600
 601                 freq_cw = af9033_div(dev, sampling_freq, adc_freq, 23ul);
 602
 603                 if (spec_inv == -1)
 604                         freq_cw = 0x800000 - freq_cw;
 605
 606                 if (dev->cfg.adc_multiplier == AF9033_ADC_MULTIPLIER_2X)
 607                         freq_cw /= 2;
 608
 609                 buf[0] = (freq_cw >>  0) & 0xff;
 610                 buf[1] = (freq_cw >>  8) & 0xff;
 611                 buf[2] = (freq_cw >> 16) & 0x7f;
 612
 613                 /* FIXME: there seems to be calculation error here... */
 614                 if (if_frequency == 0)
 615                         buf[2] = 0;
 616
 617                 ret = af9033_wr_regs(dev, 0x800029, buf, 3);
 618                 if (ret < 0)
 619                         goto err;
 620
 621                 dev->bandwidth_hz = c->bandwidth_hz;
 622         }
 623
 624         ret = af9033_wr_reg_mask(dev, 0x80f904, bandwidth_reg_val, 0x03);
 625         if (ret < 0)
 626                 goto err;
 627
 628         ret = af9033_wr_reg(dev, 0x800040, 0x00);
 629         if (ret < 0)
 630                 goto err;
 631
 632         ret = af9033_wr_reg(dev, 0x800047, 0x00);
 633         if (ret < 0)
 634                 goto err;
 635
 636         ret = af9033_wr_reg_mask(dev, 0x80f999, 0x00, 0x01);
 637         if (ret < 0)
 638                 goto err;
 639
 640         if (c->frequency <= 230000000)
 641                 tmp = 0x00; /* VHF */
 642         else
 643                 tmp = 0x01; /* UHF */
 644
 645         ret = af9033_wr_reg(dev, 0x80004b, tmp);
 646         if (ret < 0)
 647                 goto err;
 648
 649         ret = af9033_wr_reg(dev, 0x800000, 0x00);
 650         if (ret < 0)
 651                 goto err;
 652
 653         return 0;
 654
 655 err:
 656         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 657
 658         return ret;
 659 }
 660
 661 static int af9033_get_frontend(struct dvb_frontend *fe)
 662 {
 663         struct af9033_dev *dev = fe->demodulator_priv;
 664         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 665         int ret;
 666         u8 buf[8];
 667
 668         dev_dbg(&dev->client->dev, "\n");
 669
 670         /* read all needed registers */
 671         ret = af9033_rd_regs(dev, 0x80f900, buf, sizeof(buf));
 672         if (ret < 0)
 673                 goto err;
 674
 675         switch ((buf[0] >> 0) & 3) {
 676         case 0:
 677                 c->transmission_mode = TRANSMISSION_MODE_2K;
 678                 break;
 679         case 1:
 680                 c->transmission_mode = TRANSMISSION_MODE_8K;
 681                 break;
 682         }
 683
 684         switch ((buf[1] >> 0) & 3) {
 685         case 0:
 686                 c->guard_interval = GUARD_INTERVAL_1_32;
 687                 break;
 688         case 1:
 689                 c->guard_interval = GUARD_INTERVAL_1_16;
 690                 break;
 691         case 2:
 692                 c->guard_interval = GUARD_INTERVAL_1_8;
 693                 break;
 694         case 3:
 695                 c->guard_interval = GUARD_INTERVAL_1_4;
 696                 break;
 697         }
 698
 699         switch ((buf[2] >> 0) & 7) {
 700         case 0:
 701                 c->hierarchy = HIERARCHY_NONE;
 702                 break;
 703         case 1:
 704                 c->hierarchy = HIERARCHY_1;
 705                 break;
 706         case 2:
 707                 c->hierarchy = HIERARCHY_2;
 708                 break;
 709         case 3:
 710                 c->hierarchy = HIERARCHY_4;
 711                 break;
 712         }
 713
 714         switch ((buf[3] >> 0) & 3) {
 715         case 0:
 716                 c->modulation = QPSK;
 717                 break;
 718         case 1:
 719                 c->modulation = QAM_16;
 720                 break;
 721         case 2:
 722                 c->modulation = QAM_64;
 723                 break;
 724         }
 725
 726         switch ((buf[4] >> 0) & 3) {
 727         case 0:
 728                 c->bandwidth_hz = 6000000;
 729                 break;
 730         case 1:
 731                 c->bandwidth_hz = 7000000;
 732                 break;
 733         case 2:
 734                 c->bandwidth_hz = 8000000;
 735                 break;
 736         }
 737
 738         switch ((buf[6] >> 0) & 7) {
 739         case 0:
 740                 c->code_rate_HP = FEC_1_2;
 741                 break;
 742         case 1:
 743                 c->code_rate_HP = FEC_2_3;
 744                 break;
 745         case 2:
 746                 c->code_rate_HP = FEC_3_4;
 747                 break;
 748         case 3:
 749                 c->code_rate_HP = FEC_5_6;
 750                 break;
 751         case 4:
 752                 c->code_rate_HP = FEC_7_8;
 753                 break;
 754         case 5:
 755                 c->code_rate_HP = FEC_NONE;
 756                 break;
 757         }
 758
 759         switch ((buf[7] >> 0) & 7) {
 760         case 0:
 761                 c->code_rate_LP = FEC_1_2;
 762                 break;
 763         case 1:
 764                 c->code_rate_LP = FEC_2_3;
 765                 break;
 766         case 2:
 767                 c->code_rate_LP = FEC_3_4;
 768                 break;
 769         case 3:
 770                 c->code_rate_LP = FEC_5_6;
 771                 break;
 772         case 4:
 773                 c->code_rate_LP = FEC_7_8;
 774                 break;
 775         case 5:
 776                 c->code_rate_LP = FEC_NONE;
 777                 break;
 778         }
 779
 780         return 0;
 781
 782 err:
 783         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 784
 785         return ret;
 786 }
 787
 788 static int af9033_read_status(struct dvb_frontend *fe, fe_status_t *status)
 789 {
 790         struct af9033_dev *dev = fe->demodulator_priv;
 791         int ret;
 792         u8 tmp;
 793
 794         *status = 0;
 795
 796         /* radio channel status, 0=no result, 1=has signal, 2=no signal */
 797         ret = af9033_rd_reg(dev, 0x800047, &tmp);
 798         if (ret < 0)
 799                 goto err;
 800
 801         /* has signal */
 802         if (tmp == 0x01)
 803                 *status |= FE_HAS_SIGNAL;
 804
 805         if (tmp != 0x02) {
 806                 /* TPS lock */
 807                 ret = af9033_rd_reg_mask(dev, 0x80f5a9, &tmp, 0x01);
 808                 if (ret < 0)
 809                         goto err;
 810
 811                 if (tmp)
 812                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 813                                         FE_HAS_VITERBI;
 814
 815                 /* full lock */
 816                 ret = af9033_rd_reg_mask(dev, 0x80f999, &tmp, 0x01);
 817                 if (ret < 0)
 818                         goto err;
 819
 820                 if (tmp)
 821                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 822                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 823                                         FE_HAS_LOCK;
 824         }
 825
 826         dev->fe_status = *status;
 827
 828         return 0;
 829
 830 err:
 831         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 832
 833         return ret;
 834 }
 835
 836 static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr)
 837 {
 838         struct af9033_dev *dev = fe->demodulator_priv;
 839         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 840
 841         /* use DVBv5 CNR */
 842         if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL)
 843                 *snr = div_s64(c->cnr.stat[0].svalue, 100); /* 1000x => 10x */
 844         else
 845                 *snr = 0;
 846
 847         return 0;
 848 }
 849
 850 static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 851 {
 852         struct af9033_dev *dev = fe->demodulator_priv;
 853         int ret;
 854         u8 strength2;
 855
 856         /* read signal strength of 0-100 scale */
 857         ret = af9033_rd_reg(dev, 0x800048, &strength2);
 858         if (ret < 0)
 859                 goto err;
 860
 861         /* scale value to 0x0000-0xffff */
 862         *strength = strength2 * 0xffff / 100;
 863
 864         return 0;
 865
 866 err:
 867         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 868
 869         return ret;
 870 }
 871
 872 static int af9033_update_ch_stat(struct af9033_dev *dev)
 873 {
 874         int ret = 0;
 875         u32 err_cnt, bit_cnt;
 876         u16 abort_cnt;
 877         u8 buf[7];
 878
 879         /* only update data every half second */
 880         if (time_after(jiffies, dev->last_stat_check + msecs_to_jiffies(500))) {
 881                 ret = af9033_rd_regs(dev, 0x800032, buf, sizeof(buf));
 882                 if (ret < 0)
 883                         goto err;
 884                 /* in 8 byte packets? */
 885                 abort_cnt = (buf[1] << 8) + buf[0];
 886                 /* in bits */
 887                 err_cnt = (buf[4] << 16) + (buf[3] << 8) + buf[2];
 888                 /* in 8 byte packets? always(?) 0x2710 = 10000 */
 889                 bit_cnt = (buf[6] << 8) + buf[5];
 890
 891                 if (bit_cnt < abort_cnt) {
 892                         abort_cnt = 1000;
 893                         dev->ber = 0xffffffff;
 894                 } else {
 895                         /*
 896                          * 8 byte packets, that have not been rejected already
 897                          */
 898                         bit_cnt -= (u32)abort_cnt;
 899                         if (bit_cnt == 0) {
 900                                 dev->ber = 0xffffffff;
 901                         } else {
 902                                 err_cnt -= (u32)abort_cnt * 8 * 8;
 903                                 bit_cnt *= 8 * 8;
 904                                 dev->ber = err_cnt * (0xffffffff / bit_cnt);
 905                         }
 906                 }
 907                 dev->ucb += abort_cnt;
 908                 dev->last_stat_check = jiffies;
 909         }
 910
 911         return 0;
 912 err:
 913         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 914
 915         return ret;
 916 }
 917
 918 static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber)
 919 {
 920         struct af9033_dev *dev = fe->demodulator_priv;
 921         int ret;
 922
 923         ret = af9033_update_ch_stat(dev);
 924         if (ret < 0)
 925                 return ret;
 926
 927         *ber = dev->ber;
 928
 929         return 0;
 930 }
 931
 932 static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 933 {
 934         struct af9033_dev *dev = fe->demodulator_priv;
 935
 936         *ucblocks = dev->error_block_count;
 937         return 0;
 938 }
 939
 940 static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 941 {
 942         struct af9033_dev *dev = fe->demodulator_priv;
 943         int ret;
 944
 945         dev_dbg(&dev->client->dev, "enable=%d\n", enable);
 946
 947         ret = af9033_wr_reg_mask(dev, 0x00fa04, enable, 0x01);
 948         if (ret < 0)
 949                 goto err;
 950
 951         return 0;
 952
 953 err:
 954         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 955
 956         return ret;
 957 }
 958
 959 static int af9033_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
 960 {
 961         struct af9033_dev *dev = fe->demodulator_priv;
 962         int ret;
 963
 964         dev_dbg(&dev->client->dev, "onoff=%d\n", onoff);
 965
 966         ret = af9033_wr_reg_mask(dev, 0x80f993, onoff, 0x01);
 967         if (ret < 0)
 968                 goto err;
 969
 970         return 0;
 971
 972 err:
 973         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 974
 975         return ret;
 976 }
 977
 978 static int af9033_pid_filter(struct dvb_frontend *fe, int index, u16 pid,
 979                 int onoff)
 980 {
 981         struct af9033_dev *dev = fe->demodulator_priv;
 982         int ret;
 983         u8 wbuf[2] = {(pid >> 0) & 0xff, (pid >> 8) & 0xff};
 984
 985         dev_dbg(&dev->client->dev, "index=%d pid=%04x onoff=%d\n",
 986                         index, pid, onoff);
 987
 988         if (pid > 0x1fff)
 989                 return 0;
 990
 991         ret = af9033_wr_regs(dev, 0x80f996, wbuf, 2);
 992         if (ret < 0)
 993                 goto err;
 994
 995         ret = af9033_wr_reg(dev, 0x80f994, onoff);
 996         if (ret < 0)
 997                 goto err;
 998
 999         ret = af9033_wr_reg(dev, 0x80f995, index);
1000         if (ret < 0)
1001                 goto err;
1002
1003         return 0;
1004
1005 err:
1006         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1007
1008         return ret;
1009 }
1010
1011 static void af9033_stat_work(struct work_struct *work)
1012 {
1013         struct af9033_dev *dev = container_of(work, struct af9033_dev, stat_work.work);
1014         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
1015         int ret, tmp, i, len;
1016         u8 u8tmp, buf[7];
1017
1018         dev_dbg(&dev->client->dev, "\n");
1019
1020         /* signal strength */
1021         if (dev->fe_status & FE_HAS_SIGNAL) {
1022                 if (dev->is_af9035) {
1023                         ret = af9033_rd_reg(dev, 0x80004a, &u8tmp);
1024                         tmp = -u8tmp * 1000;
1025                 } else {
1026                         ret = af9033_rd_reg(dev, 0x8000f7, &u8tmp);
1027                         tmp = (u8tmp - 100) * 1000;
1028                 }
1029                 if (ret)
1030                         goto err;
1031
1032                 c->strength.len = 1;
1033                 c->strength.stat[0].scale = FE_SCALE_DECIBEL;
1034                 c->strength.stat[0].svalue = tmp;
1035         } else {
1036                 c->strength.len = 1;
1037                 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1038         }
1039
1040         /* CNR */
1041         if (dev->fe_status & FE_HAS_VITERBI) {
1042                 u32 snr_val;
1043                 const struct val_snr *snr_lut;
1044
1045                 /* read value */
1046                 ret = af9033_rd_regs(dev, 0x80002c, buf, 3);
1047                 if (ret)
1048                         goto err;
1049
1050                 snr_val = (buf[2] << 16) | (buf[1] << 8) | (buf[0] << 0);
1051
1052                 /* read current modulation */
1053                 ret = af9033_rd_reg(dev, 0x80f903, &u8tmp);
1054                 if (ret)
1055                         goto err;
1056
1057                 switch ((u8tmp >> 0) & 3) {
1058                 case 0:
1059                         len = ARRAY_SIZE(qpsk_snr_lut);
1060                         snr_lut = qpsk_snr_lut;
1061                         break;
1062                 case 1:
1063                         len = ARRAY_SIZE(qam16_snr_lut);
1064                         snr_lut = qam16_snr_lut;
1065                         break;
1066                 case 2:
1067                         len = ARRAY_SIZE(qam64_snr_lut);
1068                         snr_lut = qam64_snr_lut;
1069                         break;
1070                 default:
1071                         goto err_schedule_delayed_work;
1072                 }
1073
1074                 for (i = 0; i < len; i++) {
1075                         tmp = snr_lut[i].snr * 1000;
1076                         if (snr_val < snr_lut[i].val)
1077                                 break;
1078                 }
1079
1080                 c->cnr.len = 1;
1081                 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
1082                 c->cnr.stat[0].svalue = tmp;
1083         } else {
1084                 c->cnr.len = 1;
1085                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1086         }
1087
1088         /* UCB/PER/BER */
1089         if (dev->fe_status & FE_HAS_LOCK) {
1090                 /* outer FEC, 204 byte packets */
1091                 u16 abort_packet_count, rsd_packet_count;
1092                 /* inner FEC, bits */
1093                 u32 rsd_bit_err_count;
1094
1095                 /*
1096                  * Packet count used for measurement is 10000
1097                  * (rsd_packet_count). Maybe it should be increased?
1098                  */
1099
1100                 ret = af9033_rd_regs(dev, 0x800032, buf, 7);
1101                 if (ret)
1102                         goto err;
1103
1104                 abort_packet_count = (buf[1] << 8) | (buf[0] << 0);
1105                 rsd_bit_err_count = (buf[4] << 16) | (buf[3] << 8) | buf[2];
1106                 rsd_packet_count = (buf[6] << 8) | (buf[5] << 0);
1107
1108                 dev->error_block_count += abort_packet_count;
1109                 dev->total_block_count += rsd_packet_count;
1110                 dev->post_bit_error += rsd_bit_err_count;
1111                 dev->post_bit_count += rsd_packet_count * 204 * 8;
1112
1113                 c->block_count.len = 1;
1114                 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
1115                 c->block_count.stat[0].uvalue = dev->total_block_count;
1116
1117                 c->block_error.len = 1;
1118                 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
1119                 c->block_error.stat[0].uvalue = dev->error_block_count;
1120
1121                 c->post_bit_count.len = 1;
1122                 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
1123                 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
1124
1125                 c->post_bit_error.len = 1;
1126                 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
1127                 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
1128         }
1129
1130 err_schedule_delayed_work:
1131         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
1132         return;
1133 err:
1134         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1135 }
1136
1137 static struct dvb_frontend_ops af9033_ops = {
1138         .delsys = { SYS_DVBT },
1139         .info = {
1140                 .name = "Afatech AF9033 (DVB-T)",
1141                 .frequency_min = 174000000,
1142                 .frequency_max = 862000000,
1143                 .frequency_stepsize = 250000,
1144                 .frequency_tolerance = 0,
1145                 .caps = FE_CAN_FEC_1_2 |
1146                         FE_CAN_FEC_2_3 |
1147                         FE_CAN_FEC_3_4 |
1148                         FE_CAN_FEC_5_6 |
1149                         FE_CAN_FEC_7_8 |
1150                         FE_CAN_FEC_AUTO |
1151                         FE_CAN_QPSK |
1152                         FE_CAN_QAM_16 |
1153                         FE_CAN_QAM_64 |
1154                         FE_CAN_QAM_AUTO |
1155                         FE_CAN_TRANSMISSION_MODE_AUTO |
1156                         FE_CAN_GUARD_INTERVAL_AUTO |
1157                         FE_CAN_HIERARCHY_AUTO |
1158                         FE_CAN_RECOVER |
1159                         FE_CAN_MUTE_TS
1160         },
1161
1162         .init = af9033_init,
1163         .sleep = af9033_sleep,
1164
1165         .get_tune_settings = af9033_get_tune_settings,
1166         .set_frontend = af9033_set_frontend,
1167         .get_frontend = af9033_get_frontend,
1168
1169         .read_status = af9033_read_status,
1170         .read_snr = af9033_read_snr,
1171         .read_signal_strength = af9033_read_signal_strength,
1172         .read_ber = af9033_read_ber,
1173         .read_ucblocks = af9033_read_ucblocks,
1174
1175         .i2c_gate_ctrl = af9033_i2c_gate_ctrl,
1176 };
1177
1178 static int af9033_probe(struct i2c_client *client,
1179                 const struct i2c_device_id *id)
1180 {
1181         struct af9033_config *cfg = client->dev.platform_data;
1182         struct af9033_dev *dev;
1183         int ret;
1184         u8 buf[8];
1185         u32 reg;
1186
1187         /* allocate memory for the internal state */
1188         dev = kzalloc(sizeof(struct af9033_dev), GFP_KERNEL);
1189         if (dev == NULL) {
1190                 ret = -ENOMEM;
1191                 dev_err(&client->dev, "Could not allocate memory for state\n");
1192                 goto err;
1193         }
1194
1195         /* setup the state */
1196         dev->client = client;
1197         INIT_DELAYED_WORK(&dev->stat_work, af9033_stat_work);
1198         memcpy(&dev->cfg, cfg, sizeof(struct af9033_config));
1199
1200         if (dev->cfg.clock != 12000000) {
1201                 ret = -ENODEV;
1202                 dev_err(&dev->client->dev,
1203                                 "unsupported clock %d Hz, only 12000000 Hz is supported currently\n",
1204                                 dev->cfg.clock);
1205                 goto err_kfree;
1206         }
1207
1208         /* firmware version */
1209         switch (dev->cfg.tuner) {
1210         case AF9033_TUNER_IT9135_38:
1211         case AF9033_TUNER_IT9135_51:
1212         case AF9033_TUNER_IT9135_52:
1213         case AF9033_TUNER_IT9135_60:
1214         case AF9033_TUNER_IT9135_61:
1215         case AF9033_TUNER_IT9135_62:
1216                 dev->is_it9135 = true;
1217                 reg = 0x004bfc;
1218                 break;
1219         default:
1220                 dev->is_af9035 = true;
1221                 reg = 0x0083e9;
1222                 break;
1223         }
1224
1225         ret = af9033_rd_regs(dev, reg, &buf[0], 4);
1226         if (ret < 0)
1227                 goto err_kfree;
1228
1229         ret = af9033_rd_regs(dev, 0x804191, &buf[4], 4);
1230         if (ret < 0)
1231                 goto err_kfree;
1232
1233         dev_info(&dev->client->dev,
1234                         "firmware version: LINK %d.%d.%d.%d - OFDM %d.%d.%d.%d\n",
1235                         buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
1236                         buf[7]);
1237
1238         /* sleep */
1239         switch (dev->cfg.tuner) {
1240         case AF9033_TUNER_IT9135_38:
1241         case AF9033_TUNER_IT9135_51:
1242         case AF9033_TUNER_IT9135_52:
1243         case AF9033_TUNER_IT9135_60:
1244         case AF9033_TUNER_IT9135_61:
1245         case AF9033_TUNER_IT9135_62:
1246                 /* IT9135 did not like to sleep at that early */
1247                 break;
1248         default:
1249                 ret = af9033_wr_reg(dev, 0x80004c, 1);
1250                 if (ret < 0)
1251                         goto err_kfree;
1252
1253                 ret = af9033_wr_reg(dev, 0x800000, 0);
1254                 if (ret < 0)
1255                         goto err_kfree;
1256         }
1257
1258         /* configure internal TS mode */
1259         switch (dev->cfg.ts_mode) {
1260         case AF9033_TS_MODE_PARALLEL:
1261                 dev->ts_mode_parallel = true;
1262                 break;
1263         case AF9033_TS_MODE_SERIAL:
1264                 dev->ts_mode_serial = true;
1265                 break;
1266         case AF9033_TS_MODE_USB:
1267                 /* usb mode for AF9035 */
1268         default:
1269                 break;
1270         }
1271
1272         /* create dvb_frontend */
1273         memcpy(&dev->fe.ops, &af9033_ops, sizeof(struct dvb_frontend_ops));
1274         dev->fe.demodulator_priv = dev;
1275         *cfg->fe = &dev->fe;
1276         if (cfg->ops) {
1277                 cfg->ops->pid_filter = af9033_pid_filter;
1278                 cfg->ops->pid_filter_ctrl = af9033_pid_filter_ctrl;
1279         }
1280         i2c_set_clientdata(client, dev);
1281
1282         dev_info(&dev->client->dev, "Afatech AF9033 successfully attached\n");
1283         return 0;
1284 err_kfree:
1285         kfree(dev);
1286 err:
1287         dev_dbg(&client->dev, "failed=%d\n", ret);
1288         return ret;
1289 }
1290
1291 static int af9033_remove(struct i2c_client *client)
1292 {
1293         struct af9033_dev *dev = i2c_get_clientdata(client);
1294
1295         dev_dbg(&dev->client->dev, "\n");
1296
1297         dev->fe.ops.release = NULL;
1298         dev->fe.demodulator_priv = NULL;
1299         kfree(dev);
1300
1301         return 0;
1302 }
1303
1304 static const struct i2c_device_id af9033_id_table[] = {
1305         {"af9033", 0},
1306         {}
1307 };
1308 MODULE_DEVICE_TABLE(i2c, af9033_id_table);
1309
1310 static struct i2c_driver af9033_driver = {
1311         .driver = {
1312                 .owner  = THIS_MODULE,
1313                 .name   = "af9033",
1314         },
1315         .probe          = af9033_probe,
1316         .remove         = af9033_remove,
1317         .id_table       = af9033_id_table,
1318 };
1319
1320 module_i2c_driver(af9033_driver);
1321
1322 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1323 MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver");
1324 MODULE_LICENSE("GPL");