drivers/media/dvb-frontends/af9033.c

   1 /*
   2  * Afatech AF9033 demodulator driver
   3  *
   4  * Copyright (C) 2009 Antti Palosaari <crope@iki.fi>
   5  * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
   6  *
   7  *    This program is free software; you can redistribute it and/or modify
   8  *    it under the terms of the GNU General Public License as published by
   9  *    the Free Software Foundation; either version 2 of the License, or
  10  *    (at your option) any later version.
  11  *
  12  *    This program is distributed in the hope that it will be useful,
  13  *    but WITHOUT ANY WARRANTY; without even the implied warranty of
  14  *    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  15  *    GNU General Public License for more details.
  16  *
  17  *    You should have received a copy of the GNU General Public License along
  18  *    with this program; if not, write to the Free Software Foundation, Inc.,
  19  *    51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
  20  */
  21
  22 #include "af9033_priv.h"
  23
  24 /* Max transfer size done by I2C transfer functions */
  25 #define MAX_XFER_SIZE  64
  26
  27 struct af9033_dev {
  28         struct i2c_client *client;
  29         struct dvb_frontend fe;
  30         struct af9033_config cfg;
  31         bool is_af9035;
  32         bool is_it9135;
  33
  34         u32 bandwidth_hz;
  35         bool ts_mode_parallel;
  36         bool ts_mode_serial;
  37
  38         fe_status_t fe_status;
  39         u64 post_bit_error_prev; /* for old read_ber we return (curr - prev) */
  40         u64 post_bit_error;
  41         u64 post_bit_count;
  42         u64 error_block_count;
  43         u64 total_block_count;
  44         struct delayed_work stat_work;
  45 };
  46
  47 /* write multiple registers */
  48 static int af9033_wr_regs(struct af9033_dev *dev, u32 reg, const u8 *val,
  49                 int len)
  50 {
  51         int ret;
  52         u8 buf[MAX_XFER_SIZE];
  53         struct i2c_msg msg[1] = {
  54                 {
  55                         .addr = dev->client->addr,
  56                         .flags = 0,
  57                         .len = 3 + len,
  58                         .buf = buf,
  59                 }
  60         };
  61
  62         if (3 + len > sizeof(buf)) {
  63                 dev_warn(&dev->client->dev,
  64                                 "i2c wr reg=%04x: len=%d is too big!\n",
  65                                 reg, len);
  66                 return -EINVAL;
  67         }
  68
  69         buf[0] = (reg >> 16) & 0xff;
  70         buf[1] = (reg >>  8) & 0xff;
  71         buf[2] = (reg >>  0) & 0xff;
  72         memcpy(&buf[3], val, len);
  73
  74         ret = i2c_transfer(dev->client->adapter, msg, 1);
  75         if (ret == 1) {
  76                 ret = 0;
  77         } else {
  78                 dev_warn(&dev->client->dev, "i2c wr failed=%d reg=%06x len=%d\n",
  79                                 ret, reg, len);
  80                 ret = -EREMOTEIO;
  81         }
  82
  83         return ret;
  84 }
  85
  86 /* read multiple registers */
  87 static int af9033_rd_regs(struct af9033_dev *dev, u32 reg, u8 *val, int len)
  88 {
  89         int ret;
  90         u8 buf[3] = { (reg >> 16) & 0xff, (reg >> 8) & 0xff,
  91                         (reg >> 0) & 0xff };
  92         struct i2c_msg msg[2] = {
  93                 {
  94                         .addr = dev->client->addr,
  95                         .flags = 0,
  96                         .len = sizeof(buf),
  97                         .buf = buf
  98                 }, {
  99                         .addr = dev->client->addr,
 100                         .flags = I2C_M_RD,
 101                         .len = len,
 102                         .buf = val
 103                 }
 104         };
 105
 106         ret = i2c_transfer(dev->client->adapter, msg, 2);
 107         if (ret == 2) {
 108                 ret = 0;
 109         } else {
 110                 dev_warn(&dev->client->dev, "i2c rd failed=%d reg=%06x len=%d\n",
 111                                 ret, reg, len);
 112                 ret = -EREMOTEIO;
 113         }
 114
 115         return ret;
 116 }
 117
 118
 119 /* write single register */
 120 static int af9033_wr_reg(struct af9033_dev *dev, u32 reg, u8 val)
 121 {
 122         return af9033_wr_regs(dev, reg, &val, 1);
 123 }
 124
 125 /* read single register */
 126 static int af9033_rd_reg(struct af9033_dev *dev, u32 reg, u8 *val)
 127 {
 128         return af9033_rd_regs(dev, reg, val, 1);
 129 }
 130
 131 /* write single register with mask */
 132 static int af9033_wr_reg_mask(struct af9033_dev *dev, u32 reg, u8 val,
 133                 u8 mask)
 134 {
 135         int ret;
 136         u8 tmp;
 137
 138         /* no need for read if whole reg is written */
 139         if (mask != 0xff) {
 140                 ret = af9033_rd_regs(dev, reg, &tmp, 1);
 141                 if (ret)
 142                         return ret;
 143
 144                 val &= mask;
 145                 tmp &= ~mask;
 146                 val |= tmp;
 147         }
 148
 149         return af9033_wr_regs(dev, reg, &val, 1);
 150 }
 151
 152 /* read single register with mask */
 153 static int af9033_rd_reg_mask(struct af9033_dev *dev, u32 reg, u8 *val,
 154                 u8 mask)
 155 {
 156         int ret, i;
 157         u8 tmp;
 158
 159         ret = af9033_rd_regs(dev, reg, &tmp, 1);
 160         if (ret)
 161                 return ret;
 162
 163         tmp &= mask;
 164
 165         /* find position of the first bit */
 166         for (i = 0; i < 8; i++) {
 167                 if ((mask >> i) & 0x01)
 168                         break;
 169         }
 170         *val = tmp >> i;
 171
 172         return 0;
 173 }
 174
 175 /* write reg val table using reg addr auto increment */
 176 static int af9033_wr_reg_val_tab(struct af9033_dev *dev,
 177                 const struct reg_val *tab, int tab_len)
 178 {
 179 #define MAX_TAB_LEN 212
 180         int ret, i, j;
 181         u8 buf[1 + MAX_TAB_LEN];
 182
 183         dev_dbg(&dev->client->dev, "tab_len=%d\n", tab_len);
 184
 185         if (tab_len > sizeof(buf)) {
 186                 dev_warn(&dev->client->dev, "tab len %d is too big\n", tab_len);
 187                 return -EINVAL;
 188         }
 189
 190         for (i = 0, j = 0; i < tab_len; i++) {
 191                 buf[j] = tab[i].val;
 192
 193                 if (i == tab_len - 1 || tab[i].reg != tab[i + 1].reg - 1) {
 194                         ret = af9033_wr_regs(dev, tab[i].reg - j, buf, j + 1);
 195                         if (ret < 0)
 196                                 goto err;
 197
 198                         j = 0;
 199                 } else {
 200                         j++;
 201                 }
 202         }
 203
 204         return 0;
 205
 206 err:
 207         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 208
 209         return ret;
 210 }
 211
 212 static u32 af9033_div(struct af9033_dev *dev, u32 a, u32 b, u32 x)
 213 {
 214         u32 r = 0, c = 0, i;
 215
 216         dev_dbg(&dev->client->dev, "a=%d b=%d x=%d\n", a, b, x);
 217
 218         if (a > b) {
 219                 c = a / b;
 220                 a = a - c * b;
 221         }
 222
 223         for (i = 0; i < x; i++) {
 224                 if (a >= b) {
 225                         r += 1;
 226                         a -= b;
 227                 }
 228                 a <<= 1;
 229                 r <<= 1;
 230         }
 231         r = (c << (u32)x) + r;
 232
 233         dev_dbg(&dev->client->dev, "a=%d b=%d x=%d r=%d r=%x\n", a, b, x, r, r);
 234
 235         return r;
 236 }
 237
 238 static int af9033_init(struct dvb_frontend *fe)
 239 {
 240         struct af9033_dev *dev = fe->demodulator_priv;
 241         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 242         int ret, i, len;
 243         const struct reg_val *init;
 244         u8 buf[4];
 245         u32 adc_cw, clock_cw;
 246         struct reg_val_mask tab[] = {
 247                 { 0x80fb24, 0x00, 0x08 },
 248                 { 0x80004c, 0x00, 0xff },
 249                 { 0x00f641, dev->cfg.tuner, 0xff },
 250                 { 0x80f5ca, 0x01, 0x01 },
 251                 { 0x80f715, 0x01, 0x01 },
 252                 { 0x00f41f, 0x04, 0x04 },
 253                 { 0x00f41a, 0x01, 0x01 },
 254                 { 0x80f731, 0x00, 0x01 },
 255                 { 0x00d91e, 0x00, 0x01 },
 256                 { 0x00d919, 0x00, 0x01 },
 257                 { 0x80f732, 0x00, 0x01 },
 258                 { 0x00d91f, 0x00, 0x01 },
 259                 { 0x00d91a, 0x00, 0x01 },
 260                 { 0x80f730, 0x00, 0x01 },
 261                 { 0x80f778, 0x00, 0xff },
 262                 { 0x80f73c, 0x01, 0x01 },
 263                 { 0x80f776, 0x00, 0x01 },
 264                 { 0x00d8fd, 0x01, 0xff },
 265                 { 0x00d830, 0x01, 0xff },
 266                 { 0x00d831, 0x00, 0xff },
 267                 { 0x00d832, 0x00, 0xff },
 268                 { 0x80f985, dev->ts_mode_serial, 0x01 },
 269                 { 0x80f986, dev->ts_mode_parallel, 0x01 },
 270                 { 0x00d827, 0x00, 0xff },
 271                 { 0x00d829, 0x00, 0xff },
 272                 { 0x800045, dev->cfg.adc_multiplier, 0xff },
 273         };
 274
 275         /* program clock control */
 276         clock_cw = af9033_div(dev, dev->cfg.clock, 1000000ul, 19ul);
 277         buf[0] = (clock_cw >>  0) & 0xff;
 278         buf[1] = (clock_cw >>  8) & 0xff;
 279         buf[2] = (clock_cw >> 16) & 0xff;
 280         buf[3] = (clock_cw >> 24) & 0xff;
 281
 282         dev_dbg(&dev->client->dev, "clock=%d clock_cw=%08x\n",
 283                         dev->cfg.clock, clock_cw);
 284
 285         ret = af9033_wr_regs(dev, 0x800025, buf, 4);
 286         if (ret < 0)
 287                 goto err;
 288
 289         /* program ADC control */
 290         for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 291                 if (clock_adc_lut[i].clock == dev->cfg.clock)
 292                         break;
 293         }
 294
 295         adc_cw = af9033_div(dev, clock_adc_lut[i].adc, 1000000ul, 19ul);
 296         buf[0] = (adc_cw >>  0) & 0xff;
 297         buf[1] = (adc_cw >>  8) & 0xff;
 298         buf[2] = (adc_cw >> 16) & 0xff;
 299
 300         dev_dbg(&dev->client->dev, "adc=%d adc_cw=%06x\n",
 301                         clock_adc_lut[i].adc, adc_cw);
 302
 303         ret = af9033_wr_regs(dev, 0x80f1cd, buf, 3);
 304         if (ret < 0)
 305                 goto err;
 306
 307         /* program register table */
 308         for (i = 0; i < ARRAY_SIZE(tab); i++) {
 309                 ret = af9033_wr_reg_mask(dev, tab[i].reg, tab[i].val,
 310                                 tab[i].mask);
 311                 if (ret < 0)
 312                         goto err;
 313         }
 314
 315         /* clock output */
 316         if (dev->cfg.dyn0_clk) {
 317                 ret = af9033_wr_reg(dev, 0x80fba8, 0x00);
 318                 if (ret < 0)
 319                         goto err;
 320         }
 321
 322         /* settings for TS interface */
 323         if (dev->cfg.ts_mode == AF9033_TS_MODE_USB) {
 324                 ret = af9033_wr_reg_mask(dev, 0x80f9a5, 0x00, 0x01);
 325                 if (ret < 0)
 326                         goto err;
 327
 328                 ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x01, 0x01);
 329                 if (ret < 0)
 330                         goto err;
 331         } else {
 332                 ret = af9033_wr_reg_mask(dev, 0x80f990, 0x00, 0x01);
 333                 if (ret < 0)
 334                         goto err;
 335
 336                 ret = af9033_wr_reg_mask(dev, 0x80f9b5, 0x00, 0x01);
 337                 if (ret < 0)
 338                         goto err;
 339         }
 340
 341         /* load OFSM settings */
 342         dev_dbg(&dev->client->dev, "load ofsm settings\n");
 343         switch (dev->cfg.tuner) {
 344         case AF9033_TUNER_IT9135_38:
 345         case AF9033_TUNER_IT9135_51:
 346         case AF9033_TUNER_IT9135_52:
 347                 len = ARRAY_SIZE(ofsm_init_it9135_v1);
 348                 init = ofsm_init_it9135_v1;
 349                 break;
 350         case AF9033_TUNER_IT9135_60:
 351         case AF9033_TUNER_IT9135_61:
 352         case AF9033_TUNER_IT9135_62:
 353                 len = ARRAY_SIZE(ofsm_init_it9135_v2);
 354                 init = ofsm_init_it9135_v2;
 355                 break;
 356         default:
 357                 len = ARRAY_SIZE(ofsm_init);
 358                 init = ofsm_init;
 359                 break;
 360         }
 361
 362         ret = af9033_wr_reg_val_tab(dev, init, len);
 363         if (ret < 0)
 364                 goto err;
 365
 366         /* load tuner specific settings */
 367         dev_dbg(&dev->client->dev, "load tuner specific settings\n");
 368         switch (dev->cfg.tuner) {
 369         case AF9033_TUNER_TUA9001:
 370                 len = ARRAY_SIZE(tuner_init_tua9001);
 371                 init = tuner_init_tua9001;
 372                 break;
 373         case AF9033_TUNER_FC0011:
 374                 len = ARRAY_SIZE(tuner_init_fc0011);
 375                 init = tuner_init_fc0011;
 376                 break;
 377         case AF9033_TUNER_MXL5007T:
 378                 len = ARRAY_SIZE(tuner_init_mxl5007t);
 379                 init = tuner_init_mxl5007t;
 380                 break;
 381         case AF9033_TUNER_TDA18218:
 382                 len = ARRAY_SIZE(tuner_init_tda18218);
 383                 init = tuner_init_tda18218;
 384                 break;
 385         case AF9033_TUNER_FC2580:
 386                 len = ARRAY_SIZE(tuner_init_fc2580);
 387                 init = tuner_init_fc2580;
 388                 break;
 389         case AF9033_TUNER_FC0012:
 390                 len = ARRAY_SIZE(tuner_init_fc0012);
 391                 init = tuner_init_fc0012;
 392                 break;
 393         case AF9033_TUNER_IT9135_38:
 394                 len = ARRAY_SIZE(tuner_init_it9135_38);
 395                 init = tuner_init_it9135_38;
 396                 break;
 397         case AF9033_TUNER_IT9135_51:
 398                 len = ARRAY_SIZE(tuner_init_it9135_51);
 399                 init = tuner_init_it9135_51;
 400                 break;
 401         case AF9033_TUNER_IT9135_52:
 402                 len = ARRAY_SIZE(tuner_init_it9135_52);
 403                 init = tuner_init_it9135_52;
 404                 break;
 405         case AF9033_TUNER_IT9135_60:
 406                 len = ARRAY_SIZE(tuner_init_it9135_60);
 407                 init = tuner_init_it9135_60;
 408                 break;
 409         case AF9033_TUNER_IT9135_61:
 410                 len = ARRAY_SIZE(tuner_init_it9135_61);
 411                 init = tuner_init_it9135_61;
 412                 break;
 413         case AF9033_TUNER_IT9135_62:
 414                 len = ARRAY_SIZE(tuner_init_it9135_62);
 415                 init = tuner_init_it9135_62;
 416                 break;
 417         default:
 418                 dev_dbg(&dev->client->dev, "unsupported tuner ID=%d\n",
 419                                 dev->cfg.tuner);
 420                 ret = -ENODEV;
 421                 goto err;
 422         }
 423
 424         ret = af9033_wr_reg_val_tab(dev, init, len);
 425         if (ret < 0)
 426                 goto err;
 427
 428         if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
 429                 ret = af9033_wr_reg_mask(dev, 0x00d91c, 0x01, 0x01);
 430                 if (ret < 0)
 431                         goto err;
 432
 433                 ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
 434                 if (ret < 0)
 435                         goto err;
 436
 437                 ret = af9033_wr_reg_mask(dev, 0x00d916, 0x00, 0x01);
 438                 if (ret < 0)
 439                         goto err;
 440         }
 441
 442         switch (dev->cfg.tuner) {
 443         case AF9033_TUNER_IT9135_60:
 444         case AF9033_TUNER_IT9135_61:
 445         case AF9033_TUNER_IT9135_62:
 446                 ret = af9033_wr_reg(dev, 0x800000, 0x01);
 447                 if (ret < 0)
 448                         goto err;
 449         }
 450
 451         dev->bandwidth_hz = 0; /* force to program all parameters */
 452         /* init stats here in order signal app which stats are supported */
 453         c->strength.len = 1;
 454         c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 455         c->cnr.len = 1;
 456         c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 457         c->block_count.len = 1;
 458         c->block_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 459         c->block_error.len = 1;
 460         c->block_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 461         c->post_bit_count.len = 1;
 462         c->post_bit_count.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 463         c->post_bit_error.len = 1;
 464         c->post_bit_error.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
 465         /* start statistics polling */
 466         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
 467
 468         return 0;
 469
 470 err:
 471         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 472
 473         return ret;
 474 }
 475
 476 static int af9033_sleep(struct dvb_frontend *fe)
 477 {
 478         struct af9033_dev *dev = fe->demodulator_priv;
 479         int ret, i;
 480         u8 tmp;
 481
 482         /* stop statistics polling */
 483         cancel_delayed_work_sync(&dev->stat_work);
 484
 485         ret = af9033_wr_reg(dev, 0x80004c, 1);
 486         if (ret < 0)
 487                 goto err;
 488
 489         ret = af9033_wr_reg(dev, 0x800000, 0);
 490         if (ret < 0)
 491                 goto err;
 492
 493         for (i = 100, tmp = 1; i && tmp; i--) {
 494                 ret = af9033_rd_reg(dev, 0x80004c, &tmp);
 495                 if (ret < 0)
 496                         goto err;
 497
 498                 usleep_range(200, 10000);
 499         }
 500
 501         dev_dbg(&dev->client->dev, "loop=%d\n", i);
 502
 503         if (i == 0) {
 504                 ret = -ETIMEDOUT;
 505                 goto err;
 506         }
 507
 508         ret = af9033_wr_reg_mask(dev, 0x80fb24, 0x08, 0x08);
 509         if (ret < 0)
 510                 goto err;
 511
 512         /* prevent current leak (?) */
 513         if (dev->cfg.ts_mode == AF9033_TS_MODE_SERIAL) {
 514                 /* enable parallel TS */
 515                 ret = af9033_wr_reg_mask(dev, 0x00d917, 0x00, 0x01);
 516                 if (ret < 0)
 517                         goto err;
 518
 519                 ret = af9033_wr_reg_mask(dev, 0x00d916, 0x01, 0x01);
 520                 if (ret < 0)
 521                         goto err;
 522         }
 523
 524         return 0;
 525
 526 err:
 527         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 528
 529         return ret;
 530 }
 531
 532 static int af9033_get_tune_settings(struct dvb_frontend *fe,
 533                 struct dvb_frontend_tune_settings *fesettings)
 534 {
 535         /* 800 => 2000 because IT9135 v2 is slow to gain lock */
 536         fesettings->min_delay_ms = 2000;
 537         fesettings->step_size = 0;
 538         fesettings->max_drift = 0;
 539
 540         return 0;
 541 }
 542
 543 static int af9033_set_frontend(struct dvb_frontend *fe)
 544 {
 545         struct af9033_dev *dev = fe->demodulator_priv;
 546         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 547         int ret, i, spec_inv, sampling_freq;
 548         u8 tmp, buf[3], bandwidth_reg_val;
 549         u32 if_frequency, freq_cw, adc_freq;
 550
 551         dev_dbg(&dev->client->dev, "frequency=%d bandwidth_hz=%d\n",
 552                         c->frequency, c->bandwidth_hz);
 553
 554         /* check bandwidth */
 555         switch (c->bandwidth_hz) {
 556         case 6000000:
 557                 bandwidth_reg_val = 0x00;
 558                 break;
 559         case 7000000:
 560                 bandwidth_reg_val = 0x01;
 561                 break;
 562         case 8000000:
 563                 bandwidth_reg_val = 0x02;
 564                 break;
 565         default:
 566                 dev_dbg(&dev->client->dev, "invalid bandwidth_hz\n");
 567                 ret = -EINVAL;
 568                 goto err;
 569         }
 570
 571         /* program tuner */
 572         if (fe->ops.tuner_ops.set_params)
 573                 fe->ops.tuner_ops.set_params(fe);
 574
 575         /* program CFOE coefficients */
 576         if (c->bandwidth_hz != dev->bandwidth_hz) {
 577                 for (i = 0; i < ARRAY_SIZE(coeff_lut); i++) {
 578                         if (coeff_lut[i].clock == dev->cfg.clock &&
 579                                 coeff_lut[i].bandwidth_hz == c->bandwidth_hz) {
 580                                 break;
 581                         }
 582                 }
 583                 ret =  af9033_wr_regs(dev, 0x800001,
 584                                 coeff_lut[i].val, sizeof(coeff_lut[i].val));
 585         }
 586
 587         /* program frequency control */
 588         if (c->bandwidth_hz != dev->bandwidth_hz) {
 589                 spec_inv = dev->cfg.spec_inv ? -1 : 1;
 590
 591                 for (i = 0; i < ARRAY_SIZE(clock_adc_lut); i++) {
 592                         if (clock_adc_lut[i].clock == dev->cfg.clock)
 593                                 break;
 594                 }
 595                 adc_freq = clock_adc_lut[i].adc;
 596
 597                 /* get used IF frequency */
 598                 if (fe->ops.tuner_ops.get_if_frequency)
 599                         fe->ops.tuner_ops.get_if_frequency(fe, &if_frequency);
 600                 else
 601                         if_frequency = 0;
 602
 603                 sampling_freq = if_frequency;
 604
 605                 while (sampling_freq > (adc_freq / 2))
 606                         sampling_freq -= adc_freq;
 607
 608                 if (sampling_freq >= 0)
 609                         spec_inv *= -1;
 610                 else
 611                         sampling_freq *= -1;
 612
 613                 freq_cw = af9033_div(dev, sampling_freq, adc_freq, 23ul);
 614
 615                 if (spec_inv == -1)
 616                         freq_cw = 0x800000 - freq_cw;
 617
 618                 if (dev->cfg.adc_multiplier == AF9033_ADC_MULTIPLIER_2X)
 619                         freq_cw /= 2;
 620
 621                 buf[0] = (freq_cw >>  0) & 0xff;
 622                 buf[1] = (freq_cw >>  8) & 0xff;
 623                 buf[2] = (freq_cw >> 16) & 0x7f;
 624
 625                 /* FIXME: there seems to be calculation error here... */
 626                 if (if_frequency == 0)
 627                         buf[2] = 0;
 628
 629                 ret = af9033_wr_regs(dev, 0x800029, buf, 3);
 630                 if (ret < 0)
 631                         goto err;
 632
 633                 dev->bandwidth_hz = c->bandwidth_hz;
 634         }
 635
 636         ret = af9033_wr_reg_mask(dev, 0x80f904, bandwidth_reg_val, 0x03);
 637         if (ret < 0)
 638                 goto err;
 639
 640         ret = af9033_wr_reg(dev, 0x800040, 0x00);
 641         if (ret < 0)
 642                 goto err;
 643
 644         ret = af9033_wr_reg(dev, 0x800047, 0x00);
 645         if (ret < 0)
 646                 goto err;
 647
 648         ret = af9033_wr_reg_mask(dev, 0x80f999, 0x00, 0x01);
 649         if (ret < 0)
 650                 goto err;
 651
 652         if (c->frequency <= 230000000)
 653                 tmp = 0x00; /* VHF */
 654         else
 655                 tmp = 0x01; /* UHF */
 656
 657         ret = af9033_wr_reg(dev, 0x80004b, tmp);
 658         if (ret < 0)
 659                 goto err;
 660
 661         ret = af9033_wr_reg(dev, 0x800000, 0x00);
 662         if (ret < 0)
 663                 goto err;
 664
 665         return 0;
 666
 667 err:
 668         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 669
 670         return ret;
 671 }
 672
 673 static int af9033_get_frontend(struct dvb_frontend *fe)
 674 {
 675         struct af9033_dev *dev = fe->demodulator_priv;
 676         struct dtv_frontend_properties *c = &fe->dtv_property_cache;
 677         int ret;
 678         u8 buf[8];
 679
 680         dev_dbg(&dev->client->dev, "\n");
 681
 682         /* read all needed registers */
 683         ret = af9033_rd_regs(dev, 0x80f900, buf, sizeof(buf));
 684         if (ret < 0)
 685                 goto err;
 686
 687         switch ((buf[0] >> 0) & 3) {
 688         case 0:
 689                 c->transmission_mode = TRANSMISSION_MODE_2K;
 690                 break;
 691         case 1:
 692                 c->transmission_mode = TRANSMISSION_MODE_8K;
 693                 break;
 694         }
 695
 696         switch ((buf[1] >> 0) & 3) {
 697         case 0:
 698                 c->guard_interval = GUARD_INTERVAL_1_32;
 699                 break;
 700         case 1:
 701                 c->guard_interval = GUARD_INTERVAL_1_16;
 702                 break;
 703         case 2:
 704                 c->guard_interval = GUARD_INTERVAL_1_8;
 705                 break;
 706         case 3:
 707                 c->guard_interval = GUARD_INTERVAL_1_4;
 708                 break;
 709         }
 710
 711         switch ((buf[2] >> 0) & 7) {
 712         case 0:
 713                 c->hierarchy = HIERARCHY_NONE;
 714                 break;
 715         case 1:
 716                 c->hierarchy = HIERARCHY_1;
 717                 break;
 718         case 2:
 719                 c->hierarchy = HIERARCHY_2;
 720                 break;
 721         case 3:
 722                 c->hierarchy = HIERARCHY_4;
 723                 break;
 724         }
 725
 726         switch ((buf[3] >> 0) & 3) {
 727         case 0:
 728                 c->modulation = QPSK;
 729                 break;
 730         case 1:
 731                 c->modulation = QAM_16;
 732                 break;
 733         case 2:
 734                 c->modulation = QAM_64;
 735                 break;
 736         }
 737
 738         switch ((buf[4] >> 0) & 3) {
 739         case 0:
 740                 c->bandwidth_hz = 6000000;
 741                 break;
 742         case 1:
 743                 c->bandwidth_hz = 7000000;
 744                 break;
 745         case 2:
 746                 c->bandwidth_hz = 8000000;
 747                 break;
 748         }
 749
 750         switch ((buf[6] >> 0) & 7) {
 751         case 0:
 752                 c->code_rate_HP = FEC_1_2;
 753                 break;
 754         case 1:
 755                 c->code_rate_HP = FEC_2_3;
 756                 break;
 757         case 2:
 758                 c->code_rate_HP = FEC_3_4;
 759                 break;
 760         case 3:
 761                 c->code_rate_HP = FEC_5_6;
 762                 break;
 763         case 4:
 764                 c->code_rate_HP = FEC_7_8;
 765                 break;
 766         case 5:
 767                 c->code_rate_HP = FEC_NONE;
 768                 break;
 769         }
 770
 771         switch ((buf[7] >> 0) & 7) {
 772         case 0:
 773                 c->code_rate_LP = FEC_1_2;
 774                 break;
 775         case 1:
 776                 c->code_rate_LP = FEC_2_3;
 777                 break;
 778         case 2:
 779                 c->code_rate_LP = FEC_3_4;
 780                 break;
 781         case 3:
 782                 c->code_rate_LP = FEC_5_6;
 783                 break;
 784         case 4:
 785                 c->code_rate_LP = FEC_7_8;
 786                 break;
 787         case 5:
 788                 c->code_rate_LP = FEC_NONE;
 789                 break;
 790         }
 791
 792         return 0;
 793
 794 err:
 795         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 796
 797         return ret;
 798 }
 799
 800 static int af9033_read_status(struct dvb_frontend *fe, fe_status_t *status)
 801 {
 802         struct af9033_dev *dev = fe->demodulator_priv;
 803         int ret;
 804         u8 tmp;
 805
 806         *status = 0;
 807
 808         /* radio channel status, 0=no result, 1=has signal, 2=no signal */
 809         ret = af9033_rd_reg(dev, 0x800047, &tmp);
 810         if (ret < 0)
 811                 goto err;
 812
 813         /* has signal */
 814         if (tmp == 0x01)
 815                 *status |= FE_HAS_SIGNAL;
 816
 817         if (tmp != 0x02) {
 818                 /* TPS lock */
 819                 ret = af9033_rd_reg_mask(dev, 0x80f5a9, &tmp, 0x01);
 820                 if (ret < 0)
 821                         goto err;
 822
 823                 if (tmp)
 824                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 825                                         FE_HAS_VITERBI;
 826
 827                 /* full lock */
 828                 ret = af9033_rd_reg_mask(dev, 0x80f999, &tmp, 0x01);
 829                 if (ret < 0)
 830                         goto err;
 831
 832                 if (tmp)
 833                         *status |= FE_HAS_SIGNAL | FE_HAS_CARRIER |
 834                                         FE_HAS_VITERBI | FE_HAS_SYNC |
 835                                         FE_HAS_LOCK;
 836         }
 837
 838         dev->fe_status = *status;
 839
 840         return 0;
 841
 842 err:
 843         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 844
 845         return ret;
 846 }
 847
 848 static int af9033_read_snr(struct dvb_frontend *fe, u16 *snr)
 849 {
 850         struct af9033_dev *dev = fe->demodulator_priv;
 851         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 852         int ret;
 853         u8 u8tmp;
 854
 855         /* use DVBv5 CNR */
 856         if (c->cnr.stat[0].scale == FE_SCALE_DECIBEL) {
 857                 /* Return 0.1 dB for AF9030 and 0-0xffff for IT9130. */
 858                 if (dev->is_af9035) {
 859                         /* 1000x => 10x (0.1 dB) */
 860                         *snr = div_s64(c->cnr.stat[0].svalue, 100);
 861                 } else {
 862                         /* 1000x => 1x (1 dB) */
 863                         *snr = div_s64(c->cnr.stat[0].svalue, 1000);
 864
 865                         /* read current modulation */
 866                         ret = af9033_rd_reg(dev, 0x80f903, &u8tmp);
 867                         if (ret)
 868                                 goto err;
 869
 870                         /* scale value to 0x0000-0xffff */
 871                         switch ((u8tmp >> 0) & 3) {
 872                         case 0:
 873                                 *snr = *snr * 0xffff / 23;
 874                                 break;
 875                         case 1:
 876                                 *snr = *snr * 0xffff / 26;
 877                                 break;
 878                         case 2:
 879                                 *snr = *snr * 0xffff / 32;
 880                                 break;
 881                         default:
 882                                 goto err;
 883                         }
 884                 }
 885         } else {
 886                 *snr = 0;
 887         }
 888
 889         return 0;
 890
 891 err:
 892         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 893
 894         return ret;
 895 }
 896
 897 static int af9033_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
 898 {
 899         struct af9033_dev *dev = fe->demodulator_priv;
 900         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
 901         int ret, tmp, power_real;
 902         u8 u8tmp, gain_offset, buf[7];
 903
 904         if (dev->is_af9035) {
 905                 /* read signal strength of 0-100 scale */
 906                 ret = af9033_rd_reg(dev, 0x800048, &u8tmp);
 907                 if (ret < 0)
 908                         goto err;
 909
 910                 /* scale value to 0x0000-0xffff */
 911                 *strength = u8tmp * 0xffff / 100;
 912         } else {
 913                 ret = af9033_rd_reg(dev, 0x8000f7, &u8tmp);
 914                 if (ret < 0)
 915                         goto err;
 916
 917                 ret = af9033_rd_regs(dev, 0x80f900, buf, 7);
 918                 if (ret < 0)
 919                         goto err;
 920
 921                 if (c->frequency <= 300000000)
 922                         gain_offset = 7; /* VHF */
 923                 else
 924                         gain_offset = 4; /* UHF */
 925
 926                 power_real = (u8tmp - 100 - gain_offset) -
 927                         power_reference[((buf[3] >> 0) & 3)][((buf[6] >> 0) & 7)];
 928
 929                 if (power_real < -15)
 930                         tmp = 0;
 931                 else if ((power_real >= -15) && (power_real < 0))
 932                         tmp = (2 * (power_real + 15)) / 3;
 933                 else if ((power_real >= 0) && (power_real < 20))
 934                         tmp = 4 * power_real + 10;
 935                 else if ((power_real >= 20) && (power_real < 35))
 936                         tmp = (2 * (power_real - 20)) / 3 + 90;
 937                 else
 938                         tmp = 100;
 939
 940                 /* scale value to 0x0000-0xffff */
 941                 *strength = tmp * 0xffff / 100;
 942         }
 943
 944         return 0;
 945
 946 err:
 947         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 948
 949         return ret;
 950 }
 951
 952 static int af9033_read_ber(struct dvb_frontend *fe, u32 *ber)
 953 {
 954         struct af9033_dev *dev = fe->demodulator_priv;
 955
 956         *ber = (dev->post_bit_error - dev->post_bit_error_prev);
 957         dev->post_bit_error_prev = dev->post_bit_error;
 958
 959         return 0;
 960 }
 961
 962 static int af9033_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
 963 {
 964         struct af9033_dev *dev = fe->demodulator_priv;
 965
 966         *ucblocks = dev->error_block_count;
 967         return 0;
 968 }
 969
 970 static int af9033_i2c_gate_ctrl(struct dvb_frontend *fe, int enable)
 971 {
 972         struct af9033_dev *dev = fe->demodulator_priv;
 973         int ret;
 974
 975         dev_dbg(&dev->client->dev, "enable=%d\n", enable);
 976
 977         ret = af9033_wr_reg_mask(dev, 0x00fa04, enable, 0x01);
 978         if (ret < 0)
 979                 goto err;
 980
 981         return 0;
 982
 983 err:
 984         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
 985
 986         return ret;
 987 }
 988
 989 static int af9033_pid_filter_ctrl(struct dvb_frontend *fe, int onoff)
 990 {
 991         struct af9033_dev *dev = fe->demodulator_priv;
 992         int ret;
 993
 994         dev_dbg(&dev->client->dev, "onoff=%d\n", onoff);
 995
 996         ret = af9033_wr_reg_mask(dev, 0x80f993, onoff, 0x01);
 997         if (ret < 0)
 998                 goto err;
 999
1000         return 0;
1001
1002 err:
1003         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1004
1005         return ret;
1006 }
1007
1008 static int af9033_pid_filter(struct dvb_frontend *fe, int index, u16 pid,
1009                 int onoff)
1010 {
1011         struct af9033_dev *dev = fe->demodulator_priv;
1012         int ret;
1013         u8 wbuf[2] = {(pid >> 0) & 0xff, (pid >> 8) & 0xff};
1014
1015         dev_dbg(&dev->client->dev, "index=%d pid=%04x onoff=%d\n",
1016                         index, pid, onoff);
1017
1018         if (pid > 0x1fff)
1019                 return 0;
1020
1021         ret = af9033_wr_regs(dev, 0x80f996, wbuf, 2);
1022         if (ret < 0)
1023                 goto err;
1024
1025         ret = af9033_wr_reg(dev, 0x80f994, onoff);
1026         if (ret < 0)
1027                 goto err;
1028
1029         ret = af9033_wr_reg(dev, 0x80f995, index);
1030         if (ret < 0)
1031                 goto err;
1032
1033         return 0;
1034
1035 err:
1036         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1037
1038         return ret;
1039 }
1040
1041 static void af9033_stat_work(struct work_struct *work)
1042 {
1043         struct af9033_dev *dev = container_of(work, struct af9033_dev, stat_work.work);
1044         struct dtv_frontend_properties *c = &dev->fe.dtv_property_cache;
1045         int ret, tmp, i, len;
1046         u8 u8tmp, buf[7];
1047
1048         dev_dbg(&dev->client->dev, "\n");
1049
1050         /* signal strength */
1051         if (dev->fe_status & FE_HAS_SIGNAL) {
1052                 if (dev->is_af9035) {
1053                         ret = af9033_rd_reg(dev, 0x80004a, &u8tmp);
1054                         tmp = -u8tmp * 1000;
1055                 } else {
1056                         ret = af9033_rd_reg(dev, 0x8000f7, &u8tmp);
1057                         tmp = (u8tmp - 100) * 1000;
1058                 }
1059                 if (ret)
1060                         goto err;
1061
1062                 c->strength.len = 1;
1063                 c->strength.stat[0].scale = FE_SCALE_DECIBEL;
1064                 c->strength.stat[0].svalue = tmp;
1065         } else {
1066                 c->strength.len = 1;
1067                 c->strength.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1068         }
1069
1070         /* CNR */
1071         if (dev->fe_status & FE_HAS_VITERBI) {
1072                 u32 snr_val;
1073                 const struct val_snr *snr_lut;
1074
1075                 /* read value */
1076                 ret = af9033_rd_regs(dev, 0x80002c, buf, 3);
1077                 if (ret)
1078                         goto err;
1079
1080                 snr_val = (buf[2] << 16) | (buf[1] << 8) | (buf[0] << 0);
1081
1082                 /* read superframe number */
1083                 ret = af9033_rd_reg(dev, 0x80f78b, &u8tmp);
1084                 if (ret)
1085                         goto err;
1086
1087                 if (u8tmp)
1088                         snr_val /= u8tmp;
1089
1090                 /* read current transmission mode */
1091                 ret = af9033_rd_reg(dev, 0x80f900, &u8tmp);
1092                 if (ret)
1093                         goto err;
1094
1095                 switch ((u8tmp >> 0) & 3) {
1096                 case 0:
1097                         snr_val *= 4;
1098                         break;
1099                 case 1:
1100                         snr_val *= 1;
1101                         break;
1102                 case 2:
1103                         snr_val *= 2;
1104                         break;
1105                 default:
1106                         goto err_schedule_delayed_work;
1107                 }
1108
1109                 /* read current modulation */
1110                 ret = af9033_rd_reg(dev, 0x80f903, &u8tmp);
1111                 if (ret)
1112                         goto err;
1113
1114                 switch ((u8tmp >> 0) & 3) {
1115                 case 0:
1116                         len = ARRAY_SIZE(qpsk_snr_lut);
1117                         snr_lut = qpsk_snr_lut;
1118                         break;
1119                 case 1:
1120                         len = ARRAY_SIZE(qam16_snr_lut);
1121                         snr_lut = qam16_snr_lut;
1122                         break;
1123                 case 2:
1124                         len = ARRAY_SIZE(qam64_snr_lut);
1125                         snr_lut = qam64_snr_lut;
1126                         break;
1127                 default:
1128                         goto err_schedule_delayed_work;
1129                 }
1130
1131                 for (i = 0; i < len; i++) {
1132                         tmp = snr_lut[i].snr * 1000;
1133                         if (snr_val < snr_lut[i].val)
1134                                 break;
1135                 }
1136
1137                 c->cnr.len = 1;
1138                 c->cnr.stat[0].scale = FE_SCALE_DECIBEL;
1139                 c->cnr.stat[0].svalue = tmp;
1140         } else {
1141                 c->cnr.len = 1;
1142                 c->cnr.stat[0].scale = FE_SCALE_NOT_AVAILABLE;
1143         }
1144
1145         /* UCB/PER/BER */
1146         if (dev->fe_status & FE_HAS_LOCK) {
1147                 /* outer FEC, 204 byte packets */
1148                 u16 abort_packet_count, rsd_packet_count;
1149                 /* inner FEC, bits */
1150                 u32 rsd_bit_err_count;
1151
1152                 /*
1153                  * Packet count used for measurement is 10000
1154                  * (rsd_packet_count). Maybe it should be increased?
1155                  */
1156
1157                 ret = af9033_rd_regs(dev, 0x800032, buf, 7);
1158                 if (ret)
1159                         goto err;
1160
1161                 abort_packet_count = (buf[1] << 8) | (buf[0] << 0);
1162                 rsd_bit_err_count = (buf[4] << 16) | (buf[3] << 8) | buf[2];
1163                 rsd_packet_count = (buf[6] << 8) | (buf[5] << 0);
1164
1165                 dev->error_block_count += abort_packet_count;
1166                 dev->total_block_count += rsd_packet_count;
1167                 dev->post_bit_error += rsd_bit_err_count;
1168                 dev->post_bit_count += rsd_packet_count * 204 * 8;
1169
1170                 c->block_count.len = 1;
1171                 c->block_count.stat[0].scale = FE_SCALE_COUNTER;
1172                 c->block_count.stat[0].uvalue = dev->total_block_count;
1173
1174                 c->block_error.len = 1;
1175                 c->block_error.stat[0].scale = FE_SCALE_COUNTER;
1176                 c->block_error.stat[0].uvalue = dev->error_block_count;
1177
1178                 c->post_bit_count.len = 1;
1179                 c->post_bit_count.stat[0].scale = FE_SCALE_COUNTER;
1180                 c->post_bit_count.stat[0].uvalue = dev->post_bit_count;
1181
1182                 c->post_bit_error.len = 1;
1183                 c->post_bit_error.stat[0].scale = FE_SCALE_COUNTER;
1184                 c->post_bit_error.stat[0].uvalue = dev->post_bit_error;
1185         }
1186
1187 err_schedule_delayed_work:
1188         schedule_delayed_work(&dev->stat_work, msecs_to_jiffies(2000));
1189         return;
1190 err:
1191         dev_dbg(&dev->client->dev, "failed=%d\n", ret);
1192 }
1193
1194 static struct dvb_frontend_ops af9033_ops = {
1195         .delsys = { SYS_DVBT },
1196         .info = {
1197                 .name = "Afatech AF9033 (DVB-T)",
1198                 .frequency_min = 174000000,
1199                 .frequency_max = 862000000,
1200                 .frequency_stepsize = 250000,
1201                 .frequency_tolerance = 0,
1202                 .caps = FE_CAN_FEC_1_2 |
1203                         FE_CAN_FEC_2_3 |
1204                         FE_CAN_FEC_3_4 |
1205                         FE_CAN_FEC_5_6 |
1206                         FE_CAN_FEC_7_8 |
1207                         FE_CAN_FEC_AUTO |
1208                         FE_CAN_QPSK |
1209                         FE_CAN_QAM_16 |
1210                         FE_CAN_QAM_64 |
1211                         FE_CAN_QAM_AUTO |
1212                         FE_CAN_TRANSMISSION_MODE_AUTO |
1213                         FE_CAN_GUARD_INTERVAL_AUTO |
1214                         FE_CAN_HIERARCHY_AUTO |
1215                         FE_CAN_RECOVER |
1216                         FE_CAN_MUTE_TS
1217         },
1218
1219         .init = af9033_init,
1220         .sleep = af9033_sleep,
1221
1222         .get_tune_settings = af9033_get_tune_settings,
1223         .set_frontend = af9033_set_frontend,
1224         .get_frontend = af9033_get_frontend,
1225
1226         .read_status = af9033_read_status,
1227         .read_snr = af9033_read_snr,
1228         .read_signal_strength = af9033_read_signal_strength,
1229         .read_ber = af9033_read_ber,
1230         .read_ucblocks = af9033_read_ucblocks,
1231
1232         .i2c_gate_ctrl = af9033_i2c_gate_ctrl,
1233 };
1234
1235 static int af9033_probe(struct i2c_client *client,
1236                 const struct i2c_device_id *id)
1237 {
1238         struct af9033_config *cfg = client->dev.platform_data;
1239         struct af9033_dev *dev;
1240         int ret;
1241         u8 buf[8];
1242         u32 reg;
1243
1244         /* allocate memory for the internal state */
1245         dev = kzalloc(sizeof(struct af9033_dev), GFP_KERNEL);
1246         if (dev == NULL) {
1247                 ret = -ENOMEM;
1248                 dev_err(&client->dev, "Could not allocate memory for state\n");
1249                 goto err;
1250         }
1251
1252         /* setup the state */
1253         dev->client = client;
1254         INIT_DELAYED_WORK(&dev->stat_work, af9033_stat_work);
1255         memcpy(&dev->cfg, cfg, sizeof(struct af9033_config));
1256
1257         if (dev->cfg.clock != 12000000) {
1258                 ret = -ENODEV;
1259                 dev_err(&dev->client->dev,
1260                                 "unsupported clock %d Hz, only 12000000 Hz is supported currently\n",
1261                                 dev->cfg.clock);
1262                 goto err_kfree;
1263         }
1264
1265         /* firmware version */
1266         switch (dev->cfg.tuner) {
1267         case AF9033_TUNER_IT9135_38:
1268         case AF9033_TUNER_IT9135_51:
1269         case AF9033_TUNER_IT9135_52:
1270         case AF9033_TUNER_IT9135_60:
1271         case AF9033_TUNER_IT9135_61:
1272         case AF9033_TUNER_IT9135_62:
1273                 dev->is_it9135 = true;
1274                 reg = 0x004bfc;
1275                 break;
1276         default:
1277                 dev->is_af9035 = true;
1278                 reg = 0x0083e9;
1279                 break;
1280         }
1281
1282         ret = af9033_rd_regs(dev, reg, &buf[0], 4);
1283         if (ret < 0)
1284                 goto err_kfree;
1285
1286         ret = af9033_rd_regs(dev, 0x804191, &buf[4], 4);
1287         if (ret < 0)
1288                 goto err_kfree;
1289
1290         dev_info(&dev->client->dev,
1291                         "firmware version: LINK %d.%d.%d.%d - OFDM %d.%d.%d.%d\n",
1292                         buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6],
1293                         buf[7]);
1294
1295         /* sleep */
1296         switch (dev->cfg.tuner) {
1297         case AF9033_TUNER_IT9135_38:
1298         case AF9033_TUNER_IT9135_51:
1299         case AF9033_TUNER_IT9135_52:
1300         case AF9033_TUNER_IT9135_60:
1301         case AF9033_TUNER_IT9135_61:
1302         case AF9033_TUNER_IT9135_62:
1303                 /* IT9135 did not like to sleep at that early */
1304                 break;
1305         default:
1306                 ret = af9033_wr_reg(dev, 0x80004c, 1);
1307                 if (ret < 0)
1308                         goto err_kfree;
1309
1310                 ret = af9033_wr_reg(dev, 0x800000, 0);
1311                 if (ret < 0)
1312                         goto err_kfree;
1313         }
1314
1315         /* configure internal TS mode */
1316         switch (dev->cfg.ts_mode) {
1317         case AF9033_TS_MODE_PARALLEL:
1318                 dev->ts_mode_parallel = true;
1319                 break;
1320         case AF9033_TS_MODE_SERIAL:
1321                 dev->ts_mode_serial = true;
1322                 break;
1323         case AF9033_TS_MODE_USB:
1324                 /* usb mode for AF9035 */
1325         default:
1326                 break;
1327         }
1328
1329         /* create dvb_frontend */
1330         memcpy(&dev->fe.ops, &af9033_ops, sizeof(struct dvb_frontend_ops));
1331         dev->fe.demodulator_priv = dev;
1332         *cfg->fe = &dev->fe;
1333         if (cfg->ops) {
1334                 cfg->ops->pid_filter = af9033_pid_filter;
1335                 cfg->ops->pid_filter_ctrl = af9033_pid_filter_ctrl;
1336         }
1337         i2c_set_clientdata(client, dev);
1338
1339         dev_info(&dev->client->dev, "Afatech AF9033 successfully attached\n");
1340         return 0;
1341 err_kfree:
1342         kfree(dev);
1343 err:
1344         dev_dbg(&client->dev, "failed=%d\n", ret);
1345         return ret;
1346 }
1347
1348 static int af9033_remove(struct i2c_client *client)
1349 {
1350         struct af9033_dev *dev = i2c_get_clientdata(client);
1351
1352         dev_dbg(&dev->client->dev, "\n");
1353
1354         dev->fe.ops.release = NULL;
1355         dev->fe.demodulator_priv = NULL;
1356         kfree(dev);
1357
1358         return 0;
1359 }
1360
1361 static const struct i2c_device_id af9033_id_table[] = {
1362         {"af9033", 0},
1363         {}
1364 };
1365 MODULE_DEVICE_TABLE(i2c, af9033_id_table);
1366
1367 static struct i2c_driver af9033_driver = {
1368         .driver = {
1369                 .owner  = THIS_MODULE,
1370                 .name   = "af9033",
1371         },
1372         .probe          = af9033_probe,
1373         .remove         = af9033_remove,
1374         .id_table       = af9033_id_table,
1375 };
1376
1377 module_i2c_driver(af9033_driver);
1378
1379 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
1380 MODULE_DESCRIPTION("Afatech AF9033 DVB-T demodulator driver");
1381 MODULE_LICENSE("GPL");