2 * Driver for Conexant CX24113/CX24128 Tuner (Satellite)
4 * Copyright (C) 2007-8 Patrick Boettcher <pb@linuxtv.org>
6 * Developed for BBTI / Technisat
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
20 #include <linux/slab.h>
21 #include <linux/kernel.h>
22 #include <linux/module.h>
23 #include <linux/init.h>
25 #include "dvb_frontend.h"
30 #define cx_info(args...) do { printk(KERN_INFO "CX24113: " args); } while (0)
31 #define cx_err(args...) do { printk(KERN_ERR "CX24113: " args); } while (0)
33 #define dprintk(args...) \
36 printk(KERN_DEBUG "CX24113: %s: ", __func__); \
41 struct cx24113_state {
42 struct i2c_adapter *i2c;
43 const struct cx24113_config *config;
45 #define REV_CX24113 0x23
62 #define LNA_MIN_GAIN 0
63 #define LNA_MID_GAIN 1
64 #define LNA_MAX_GAIN 2
71 #define VCOBANDSEL_6 0x80
72 #define VCOBANDSEL_5 0x01
73 #define VCOBANDSEL_4 0x02
74 #define VCOBANDSEL_3 0x04
75 #define VCOBANDSEL_2 0x08
76 #define VCOBANDSEL_1 0x10
100 static int cx24113_writereg(struct cx24113_state *state, int reg, int data)
102 u8 buf[] = { reg, data };
103 struct i2c_msg msg = { .addr = state->config->i2c_addr,
104 .flags = 0, .buf = buf, .len = 2 };
105 int err = i2c_transfer(state->i2c, &msg, 1);
107 printk(KERN_DEBUG "%s: writereg error(err == %i, reg == 0x%02x, data == 0x%02x)\n",
108 __func__, err, reg, data);
115 static int cx24113_readreg(struct cx24113_state *state, u8 reg)
119 struct i2c_msg msg[] = {
120 { .addr = state->config->i2c_addr,
121 .flags = 0, .buf = ®, .len = 1 },
122 { .addr = state->config->i2c_addr,
123 .flags = I2C_M_RD, .buf = &b, .len = 1 }
126 ret = i2c_transfer(state->i2c, msg, 2);
129 printk(KERN_DEBUG "%s: reg=0x%x (error=%d)\n",
137 static void cx24113_set_parameters(struct cx24113_state *state)
141 r = cx24113_readreg(state, 0x10) & 0x82;
142 r |= state->icp_mode;
143 r |= state->icp_man << 4;
144 r |= state->icp_dig << 2;
145 r |= state->prescaler_mode << 5;
146 cx24113_writereg(state, 0x10, r);
148 r = (state->icp_auto_low << 0) | (state->icp_auto_mlow << 2)
149 | (state->icp_auto_mhi << 4) | (state->icp_auto_hi << 6);
150 cx24113_writereg(state, 0x11, r);
152 if (state->rev == REV_CX24113) {
153 r = cx24113_readreg(state, 0x20) & 0xec;
154 r |= state->lna_gain;
155 r |= state->rfvga_bias_ctrl << 4;
156 cx24113_writereg(state, 0x20, r);
159 r = cx24113_readreg(state, 0x12) & 0x03;
160 r |= state->acp_on << 2;
161 r |= state->bs_delay << 4;
162 cx24113_writereg(state, 0x12, r);
164 r = cx24113_readreg(state, 0x18) & 0x40;
165 r |= state->vco_shift;
166 if (state->vco_band == VCOBANDSEL_6)
169 r |= (state->vco_band << 1);
170 cx24113_writereg(state, 0x18, r);
172 r = cx24113_readreg(state, 0x14) & 0x20;
173 r |= (state->vco_mode << 6) | ((state->bs_freqcnt >> 8) & 0x1f);
174 cx24113_writereg(state, 0x14, r);
175 cx24113_writereg(state, 0x15, (state->bs_freqcnt & 0xff));
177 cx24113_writereg(state, 0x16, (state->bs_rdiv >> 4) & 0xff);
178 r = (cx24113_readreg(state, 0x17) & 0x0f) |
179 ((state->bs_rdiv & 0x0f) << 4);
180 cx24113_writereg(state, 0x17, r);
197 static int cx24113_set_gain_settings(struct cx24113_state *state,
198 s16 power_estimation)
200 u8 ampout = cx24113_readreg(state, 0x1d) & 0xf0,
201 vga = cx24113_readreg(state, 0x1f) & 0x3f,
202 rfvga = cx24113_readreg(state, 0x20) & 0xf3;
203 u8 gain_level = power_estimation >= state->tuner_gain_thres;
205 dprintk("power estimation: %d, thres: %d, gain_level: %d/%d\n",
206 power_estimation, state->tuner_gain_thres,
207 state->gain_level, gain_level);
209 if (gain_level == state->gain_level)
210 return 0; /* nothing to be done */
215 rfvga |= RFVGA_0 << 2;
216 vga |= (VGA_7 << 3) | VGA_7;
218 rfvga |= RFVGA_2 << 2;
219 vga |= (VGA_6 << 3) | VGA_2;
221 state->gain_level = gain_level;
223 cx24113_writereg(state, 0x1d, ampout);
224 cx24113_writereg(state, 0x1f, vga);
225 cx24113_writereg(state, 0x20, rfvga);
227 return 1; /* did something */
230 static int cx24113_set_Fref(struct cx24113_state *state, u8 high)
232 u8 xtal = cx24113_readreg(state, 0x02);
233 if (state->rev == 0x43 && state->vcodiv == VCODIV4)
239 return cx24113_writereg(state, 0x02, xtal);
242 static int cx24113_enable(struct cx24113_state *state, u8 enable)
244 u8 r21 = (cx24113_readreg(state, 0x21) & 0xc0) | enable;
245 if (state->rev == REV_CX24113)
247 return cx24113_writereg(state, 0x21, r21);
250 static int cx24113_set_bandwidth(struct cx24113_state *state, u32 bandwidth_khz)
254 if (bandwidth_khz <= 19000)
256 else if (bandwidth_khz <= 25000)
261 dprintk("bandwidth to be set: %d\n", bandwidth_khz);
263 bandwidth_khz -= 10000;
264 bandwidth_khz /= 1000;
268 dprintk("bandwidth: %d %d\n", r >> 6, bandwidth_khz);
270 r |= bandwidth_khz & 0x3f;
272 return cx24113_writereg(state, 0x1e, r);
275 static int cx24113_set_clk_inversion(struct cx24113_state *state, u8 on)
277 u8 r = (cx24113_readreg(state, 0x10) & 0x7f) | ((on & 0x1) << 7);
278 return cx24113_writereg(state, 0x10, r);
281 static int cx24113_get_status(struct dvb_frontend *fe, u32 *status)
283 struct cx24113_state *state = fe->tuner_priv;
284 u8 r = (cx24113_readreg(state, 0x10) & 0x02) >> 1;
286 *status |= TUNER_STATUS_LOCKED;
287 dprintk("PLL locked: %d\n", r);
291 static u8 cx24113_set_ref_div(struct cx24113_state *state, u8 refdiv)
293 if (state->rev == 0x43 && state->vcodiv == VCODIV4)
295 return state->refdiv = refdiv;
298 static void cx24113_calc_pll_nf(struct cx24113_state *state, u16 *n, s32 *f)
306 s32 freq_hz = state->frequency * 1000;
308 if (state->config->xtal_khz < 20000)
313 if (state->rev == REV_CX24113) {
314 if (state->frequency >= 1100000)
319 if (state->frequency >= 1165000)
324 state->vcodiv = vcodiv;
326 dprintk("calculating N/F for %dHz with vcodiv %d\n", freq_hz, vcodiv);
329 R = cx24113_set_ref_div(state, R + 1);
331 /* calculate tuner PLL settings: */
332 N = (freq_hz / 100 * vcodiv) * R;
333 N /= (state->config->xtal_khz) * factor * 2;
334 N += 5; /* For round up. */
337 } while (N < 6 && R < 3);
340 cx_err("strange frequency: N < 6\n");
344 F *= (u64) (R * vcodiv * 262144);
345 dprintk("1 N: %d, F: %lld, R: %d\n", N, (long long)F, R);
346 /* do_div needs an u64 as first argument */
348 do_div(dividend, state->config->xtal_khz * 1000 * factor * 2);
350 dprintk("2 N: %d, F: %lld, R: %d\n", N, (long long)F, R);
351 F -= (N + 32) * 262144;
353 dprintk("3 N: %d, F: %lld, R: %d\n", N, (long long)F, R);
355 if (state->Fwindow_enabled) {
356 if (F > (262144 / 2 - 1638))
357 F = 262144 / 2 - 1638;
358 if (F < (-262144 / 2 + 1638))
359 F = -262144 / 2 + 1638;
360 if ((F < 3277 && F > 0) || (F > -3277 && F < 0)) {
362 r = cx24113_readreg(state, 0x10);
363 cx24113_writereg(state, 0x10, r | (1 << 6));
366 dprintk("4 N: %d, F: %lld, R: %d\n", N, (long long)F, R);
373 static void cx24113_set_nfr(struct cx24113_state *state, u16 n, s32 f, u8 r)
376 cx24113_writereg(state, 0x19, (n >> 1) & 0xff);
378 reg = ((n & 0x1) << 7) | ((f >> 11) & 0x7f);
379 cx24113_writereg(state, 0x1a, reg);
381 cx24113_writereg(state, 0x1b, (f >> 3) & 0xff);
383 reg = cx24113_readreg(state, 0x1c) & 0x1f;
384 cx24113_writereg(state, 0x1c, reg | ((f & 0x7) << 5));
386 cx24113_set_Fref(state, r - 1);
389 static int cx24113_set_frequency(struct cx24113_state *state, u32 frequency)
395 r = cx24113_readreg(state, 0x14);
396 cx24113_writereg(state, 0x14, r & 0x3f);
398 r = cx24113_readreg(state, 0x10);
399 cx24113_writereg(state, 0x10, r & 0xbf);
401 state->frequency = frequency;
403 dprintk("tuning to frequency: %d\n", frequency);
405 cx24113_calc_pll_nf(state, &n, &f);
406 cx24113_set_nfr(state, n, f, state->refdiv);
408 r = cx24113_readreg(state, 0x18) & 0xbf;
409 if (state->vcodiv != VCODIV2)
411 cx24113_writereg(state, 0x18, r);
413 /* The need for this sleep is not clear. But helps in some cases */
416 r = cx24113_readreg(state, 0x1c) & 0xef;
417 cx24113_writereg(state, 0x1c, r | (1 << 4));
421 static int cx24113_init(struct dvb_frontend *fe)
423 struct cx24113_state *state = fe->tuner_priv;
426 state->tuner_gain_thres = -50;
427 state->gain_level = 255; /* to force a gain-setting initialization */
430 if (state->config->xtal_khz < 11000) {
431 state->icp_auto_hi = ICP_LEVEL4;
432 state->icp_auto_mhi = ICP_LEVEL4;
433 state->icp_auto_mlow = ICP_LEVEL3;
434 state->icp_auto_low = ICP_LEVEL3;
436 state->icp_auto_hi = ICP_LEVEL4;
437 state->icp_auto_mhi = ICP_LEVEL4;
438 state->icp_auto_mlow = ICP_LEVEL3;
439 state->icp_auto_low = ICP_LEVEL2;
442 state->icp_dig = ICP_LEVEL3;
443 state->icp_man = ICP_LEVEL1;
446 state->vco_shift = 0;
447 state->vco_band = VCOBANDSEL_1;
449 state->bs_freqcnt = 0x0fff;
450 state->bs_rdiv = 0x0fff;
451 state->prescaler_mode = 0;
452 state->lna_gain = LNA_MAX_GAIN;
453 state->rfvga_bias_ctrl = 1;
454 state->Fwindow_enabled = 1;
456 cx24113_set_Fref(state, 0);
457 cx24113_enable(state, 0x3d);
458 cx24113_set_parameters(state);
460 cx24113_set_gain_settings(state, -30);
462 cx24113_set_bandwidth(state, 18025);
463 cx24113_set_clk_inversion(state, 1);
465 if (state->config->xtal_khz >= 40000)
466 ret = cx24113_writereg(state, 0x02,
467 (cx24113_readreg(state, 0x02) & 0xfb) | (1 << 2));
469 ret = cx24113_writereg(state, 0x02,
470 (cx24113_readreg(state, 0x02) & 0xfb) | (0 << 2));
475 static int cx24113_set_params(struct dvb_frontend *fe)
477 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
478 struct cx24113_state *state = fe->tuner_priv;
479 /* for a ROLL-OFF factor of 0.35, 0.2: 600, 0.25: 625 */
483 bw = ((c->symbol_rate/100) * roll_off) / 1000;
484 bw += (10000000/100) + 5;
487 cx24113_set_bandwidth(state, bw);
489 cx24113_set_frequency(state, c->frequency);
491 return cx24113_get_status(fe, &bw);
494 static s8 cx24113_agc_table[2][10] = {
495 {-54, -41, -35, -30, -25, -21, -16, -10, -6, -2},
496 {-39, -35, -30, -25, -19, -15, -11, -5, 1, 9},
499 void cx24113_agc_callback(struct dvb_frontend *fe)
501 struct cx24113_state *state = fe->tuner_priv;
503 if (!fe->ops.read_signal_strength)
507 /* this only works with the current CX24123 implementation */
508 fe->ops.read_signal_strength(fe, (u16 *) &s);
510 dprintk("signal strength: %d\n", s);
511 for (i = 0; i < sizeof(cx24113_agc_table[0]); i++)
512 if (cx24113_agc_table[state->gain_level][i] > s)
515 } while (cx24113_set_gain_settings(state, s));
517 EXPORT_SYMBOL(cx24113_agc_callback);
519 static int cx24113_get_frequency(struct dvb_frontend *fe, u32 *frequency)
521 struct cx24113_state *state = fe->tuner_priv;
522 *frequency = state->frequency;
526 static void cx24113_release(struct dvb_frontend *fe)
528 struct cx24113_state *state = fe->tuner_priv;
530 fe->tuner_priv = NULL;
534 static const struct dvb_tuner_ops cx24113_tuner_ops = {
536 .name = "Conexant CX24113",
537 .frequency_min = 950000,
538 .frequency_max = 2150000,
539 .frequency_step = 125,
542 .release = cx24113_release,
544 .init = cx24113_init,
546 .set_params = cx24113_set_params,
547 .get_frequency = cx24113_get_frequency,
548 .get_status = cx24113_get_status,
551 struct dvb_frontend *cx24113_attach(struct dvb_frontend *fe,
552 const struct cx24113_config *config, struct i2c_adapter *i2c)
554 /* allocate memory for the internal state */
555 struct cx24113_state *state =
556 kzalloc(sizeof(struct cx24113_state), GFP_KERNEL);
559 cx_err("Unable to kzalloc\n");
563 /* setup the state */
564 state->config = config;
567 cx_info("trying to detect myself\n");
569 /* making a dummy read, because of some expected troubles
571 cx24113_readreg(state, 0x00);
573 rc = cx24113_readreg(state, 0x00);
575 cx_info("CX24113 not found.\n");
582 cx_info("detected CX24113 variant\n");
585 cx_info("successfully detected\n");
588 cx_err("unsupported device id: %x\n", state->rev);
591 state->ver = cx24113_readreg(state, 0x01);
592 cx_info("version: %x\n", state->ver);
594 /* create dvb_frontend */
595 memcpy(&fe->ops.tuner_ops, &cx24113_tuner_ops,
596 sizeof(struct dvb_tuner_ops));
597 fe->tuner_priv = state;
605 EXPORT_SYMBOL(cx24113_attach);
607 module_param(debug, int, 0644);
608 MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
610 MODULE_AUTHOR("Patrick Boettcher <pb@linuxtv.org>");
611 MODULE_DESCRIPTION("DVB Frontend module for Conexant CX24113/CX24128hardware");
612 MODULE_LICENSE("GPL");