2 * Fujitu mb86a20s ISDB-T/ISDB-Tsb Module driver
4 * Copyright (C) 2010 Mauro Carvalho Chehab <mchehab@redhat.com>
5 * Copyright (C) 2009-2010 Douglas Landgraf <dougsland@redhat.com>
7 * FIXME: Need to port to DVB v5.2 API
9 * This program is free software; you can redistribute it and/or
10 * modify it under the terms of the GNU General Public License as
11 * published by the Free Software Foundation version 2.
13 * This program is distributed in the hope that it will be useful,
14 * but WITHOUT ANY WARRANTY; without even the implied warranty of
15 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the GNU
16 * General Public License for more details.
19 #include <linux/kernel.h>
20 #include <asm/div64.h>
22 #include "dvb_frontend.h"
26 module_param(debug, int, 0644);
27 MODULE_PARM_DESC(debug, "Activates frontend debugging (default:0)");
29 #define rc(args...) do { \
30 printk(KERN_ERR "mb86a20s: " args); \
33 #define dprintk(args...) \
36 printk(KERN_DEBUG "mb86a20s: %s: ", __func__); \
41 struct mb86a20s_state {
42 struct i2c_adapter *i2c;
43 const struct mb86a20s_config *config;
45 struct dvb_frontend frontend;
56 * Initialization sequence: Use whatevere default values that PV SBTVD
57 * does on its initialisation, obtained via USB snoop
59 static struct regdata mb86a20s_init[] = {
64 { 0x50, 0xd1 }, { 0x51, 0x22 },
67 { 0x28, 0x2a }, { 0x29, 0x00 }, { 0x2a, 0xff }, { 0x2b, 0x80 },
68 { 0x28, 0x20 }, { 0x29, 0x33 }, { 0x2a, 0xdf }, { 0x2b, 0xa9 },
69 { 0x28, 0x22 }, { 0x29, 0x00 }, { 0x2a, 0x1f }, { 0x2b, 0xf0 },
73 { 0x04, 0x08 }, { 0x05, 0x05 },
74 { 0x04, 0x0e }, { 0x05, 0x00 },
75 { 0x04, 0x0f }, { 0x05, 0x14 },
76 { 0x04, 0x0b }, { 0x05, 0x8c },
77 { 0x04, 0x00 }, { 0x05, 0x00 },
78 { 0x04, 0x01 }, { 0x05, 0x07 },
79 { 0x04, 0x02 }, { 0x05, 0x0f },
80 { 0x04, 0x03 }, { 0x05, 0xa0 },
81 { 0x04, 0x09 }, { 0x05, 0x00 },
82 { 0x04, 0x0a }, { 0x05, 0xff },
83 { 0x04, 0x27 }, { 0x05, 0x64 },
84 { 0x04, 0x28 }, { 0x05, 0x00 },
85 { 0x04, 0x1e }, { 0x05, 0xff },
86 { 0x04, 0x29 }, { 0x05, 0x0a },
87 { 0x04, 0x32 }, { 0x05, 0x0a },
88 { 0x04, 0x14 }, { 0x05, 0x02 },
89 { 0x04, 0x04 }, { 0x05, 0x00 },
90 { 0x04, 0x05 }, { 0x05, 0x22 },
91 { 0x04, 0x06 }, { 0x05, 0x0e },
92 { 0x04, 0x07 }, { 0x05, 0xd8 },
93 { 0x04, 0x12 }, { 0x05, 0x00 },
94 { 0x04, 0x13 }, { 0x05, 0xff },
95 { 0x04, 0x15 }, { 0x05, 0x4e },
96 { 0x04, 0x16 }, { 0x05, 0x20 },
98 { 0x50, 0xa7 }, { 0x51, 0xff },
99 { 0x50, 0xa8 }, { 0x51, 0xff },
100 { 0x50, 0xa9 }, { 0x51, 0xff },
101 { 0x50, 0xaa }, { 0x51, 0xff },
102 { 0x50, 0xab }, { 0x51, 0xff },
103 { 0x50, 0xac }, { 0x51, 0xff },
104 { 0x50, 0xad }, { 0x51, 0xff },
105 { 0x50, 0xae }, { 0x51, 0xff },
106 { 0x50, 0xaf }, { 0x51, 0xff },
108 { 0x50, 0xdc }, { 0x51, 0x01 },
109 { 0x50, 0xdd }, { 0x51, 0xf4 },
110 { 0x50, 0xde }, { 0x51, 0x01 },
111 { 0x50, 0xdf }, { 0x51, 0xf4 },
112 { 0x50, 0xe0 }, { 0x51, 0x01 },
113 { 0x50, 0xe1 }, { 0x51, 0xf4 },
114 { 0x50, 0xb0 }, { 0x51, 0x07 },
115 { 0x50, 0xb2 }, { 0x51, 0xff },
116 { 0x50, 0xb3 }, { 0x51, 0xff },
117 { 0x50, 0xb4 }, { 0x51, 0xff },
118 { 0x50, 0xb5 }, { 0x51, 0xff },
119 { 0x50, 0xb6 }, { 0x51, 0xff },
120 { 0x50, 0xb7 }, { 0x51, 0xff },
121 { 0x50, 0x50 }, { 0x51, 0x02 },
122 { 0x50, 0x51 }, { 0x51, 0x04 },
125 { 0x50, 0xd5 }, { 0x51, 0x01 }, /* Serial */
126 { 0x50, 0xd6 }, { 0x51, 0x1f },
127 { 0x50, 0xd2 }, { 0x51, 0x03 },
128 { 0x50, 0xd7 }, { 0x51, 0x3f },
129 { 0x28, 0x74 }, { 0x29, 0x00 }, { 0x28, 0x74 }, { 0x29, 0x40 },
130 { 0x28, 0x46 }, { 0x29, 0x2c }, { 0x28, 0x46 }, { 0x29, 0x0c },
131 { 0x04, 0x40 }, { 0x05, 0x01 },
132 { 0x28, 0x00 }, { 0x29, 0x10 },
133 { 0x28, 0x05 }, { 0x29, 0x02 },
135 { 0x28, 0x06 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x03 },
136 { 0x28, 0x07 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0d },
137 { 0x28, 0x08 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x02 },
138 { 0x28, 0x09 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x01 },
139 { 0x28, 0x0a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x21 },
140 { 0x28, 0x0b }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x29 },
141 { 0x28, 0x0c }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x16 },
142 { 0x28, 0x0d }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x31 },
143 { 0x28, 0x0e }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0e },
144 { 0x28, 0x0f }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x4e },
145 { 0x28, 0x10 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x46 },
146 { 0x28, 0x11 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x0f },
147 { 0x28, 0x12 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x56 },
148 { 0x28, 0x13 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x35 },
149 { 0x28, 0x14 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbe },
150 { 0x28, 0x15 }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0x84 },
151 { 0x28, 0x16 }, { 0x29, 0x00 }, { 0x2a, 0x03 }, { 0x2b, 0xee },
152 { 0x28, 0x17 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x98 },
153 { 0x28, 0x18 }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x9f },
154 { 0x28, 0x19 }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0xb2 },
155 { 0x28, 0x1a }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0xc2 },
156 { 0x28, 0x1b }, { 0x29, 0x00 }, { 0x2a, 0x07 }, { 0x2b, 0x4a },
157 { 0x28, 0x1c }, { 0x29, 0x00 }, { 0x2a, 0x01 }, { 0x2b, 0xbc },
158 { 0x28, 0x1d }, { 0x29, 0x00 }, { 0x2a, 0x04 }, { 0x2b, 0xba },
159 { 0x28, 0x1e }, { 0x29, 0x00 }, { 0x2a, 0x06 }, { 0x2b, 0x14 },
160 { 0x50, 0x1e }, { 0x51, 0x5d },
161 { 0x50, 0x22 }, { 0x51, 0x00 },
162 { 0x50, 0x23 }, { 0x51, 0xc8 },
163 { 0x50, 0x24 }, { 0x51, 0x00 },
164 { 0x50, 0x25 }, { 0x51, 0xf0 },
165 { 0x50, 0x26 }, { 0x51, 0x00 },
166 { 0x50, 0x27 }, { 0x51, 0xc3 },
167 { 0x50, 0x39 }, { 0x51, 0x02 },
168 { 0x28, 0x6a }, { 0x29, 0x00 }, { 0x2a, 0x00 }, { 0x2b, 0x00 },
172 static struct regdata mb86a20s_reset_reception[] = {
179 static int mb86a20s_i2c_writereg(struct mb86a20s_state *state,
180 u8 i2c_addr, int reg, int data)
182 u8 buf[] = { reg, data };
183 struct i2c_msg msg = {
184 .addr = i2c_addr, .flags = 0, .buf = buf, .len = 2
188 rc = i2c_transfer(state->i2c, &msg, 1);
190 printk("%s: writereg error (rc == %i, reg == 0x%02x,"
191 " data == 0x%02x)\n", __func__, rc, reg, data);
198 static int mb86a20s_i2c_writeregdata(struct mb86a20s_state *state,
199 u8 i2c_addr, struct regdata *rd, int size)
203 for (i = 0; i < size; i++) {
204 rc = mb86a20s_i2c_writereg(state, i2c_addr, rd[i].reg,
212 static int mb86a20s_i2c_readreg(struct mb86a20s_state *state,
217 struct i2c_msg msg[] = {
218 { .addr = i2c_addr, .flags = 0, .buf = ®, .len = 1 },
219 { .addr = i2c_addr, .flags = I2C_M_RD, .buf = &val, .len = 1 }
222 rc = i2c_transfer(state->i2c, msg, 2);
225 rc("%s: reg=0x%x (error=%d)\n", __func__, reg, rc);
232 #define mb86a20s_readreg(state, reg) \
233 mb86a20s_i2c_readreg(state, state->config->demod_address, reg)
234 #define mb86a20s_writereg(state, reg, val) \
235 mb86a20s_i2c_writereg(state, state->config->demod_address, reg, val)
236 #define mb86a20s_writeregdata(state, regdata) \
237 mb86a20s_i2c_writeregdata(state, state->config->demod_address, \
238 regdata, ARRAY_SIZE(regdata))
240 static int mb86a20s_initfe(struct dvb_frontend *fe)
242 struct mb86a20s_state *state = fe->demodulator_priv;
248 if (fe->ops.i2c_gate_ctrl)
249 fe->ops.i2c_gate_ctrl(fe, 0);
251 /* Initialize the frontend */
252 rc = mb86a20s_writeregdata(state, mb86a20s_init);
256 if (!state->config->is_serial) {
259 rc = mb86a20s_writereg(state, 0x50, 0xd5);
262 rc = mb86a20s_writereg(state, 0x51, regD5);
267 if (fe->ops.i2c_gate_ctrl)
268 fe->ops.i2c_gate_ctrl(fe, 1);
272 state->need_init = true;
273 printk(KERN_INFO "mb86a20s: Init failed. Will try again later\n");
275 state->need_init = false;
276 dprintk("Initialization succeeded.\n");
281 static int mb86a20s_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
283 struct mb86a20s_state *state = fe->demodulator_priv;
284 unsigned rf_max, rf_min, rf;
289 if (fe->ops.i2c_gate_ctrl)
290 fe->ops.i2c_gate_ctrl(fe, 0);
292 /* Does a binary search to get RF strength */
296 rf = (rf_max + rf_min) / 2;
297 mb86a20s_writereg(state, 0x04, 0x1f);
298 mb86a20s_writereg(state, 0x05, rf >> 8);
299 mb86a20s_writereg(state, 0x04, 0x20);
300 mb86a20s_writereg(state, 0x04, rf);
302 val = mb86a20s_readreg(state, 0x02);
304 rf_min = (rf_max + rf_min) / 2;
306 rf_max = (rf_max + rf_min) / 2;
307 if (rf_max - rf_min < 4) {
308 *strength = (((rf_max + rf_min) / 2) * 65535) / 4095;
313 dprintk("signal strength = %d\n", *strength);
315 if (fe->ops.i2c_gate_ctrl)
316 fe->ops.i2c_gate_ctrl(fe, 1);
321 static int mb86a20s_read_status(struct dvb_frontend *fe, fe_status_t *status)
323 struct mb86a20s_state *state = fe->demodulator_priv;
329 if (fe->ops.i2c_gate_ctrl)
330 fe->ops.i2c_gate_ctrl(fe, 0);
331 val = mb86a20s_readreg(state, 0x0a) & 0xf;
332 if (fe->ops.i2c_gate_ctrl)
333 fe->ops.i2c_gate_ctrl(fe, 1);
336 *status |= FE_HAS_SIGNAL;
339 *status |= FE_HAS_CARRIER;
342 *status |= FE_HAS_VITERBI;
345 *status |= FE_HAS_SYNC;
347 if (val >= 8) /* Maybe 9? */
348 *status |= FE_HAS_LOCK;
350 dprintk("val = %d, status = 0x%02x\n", val, *status);
355 static int mb86a20s_set_frontend(struct dvb_frontend *fe)
357 struct mb86a20s_state *state = fe->demodulator_priv;
361 * FIXME: Properly implement the set frontend properties
363 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
368 if (fe->ops.i2c_gate_ctrl)
369 fe->ops.i2c_gate_ctrl(fe, 1);
370 dprintk("Calling tuner set parameters\n");
371 fe->ops.tuner_ops.set_params(fe);
374 * Make it more reliable: if, for some reason, the initial
375 * device initialization doesn't happen, initialize it when
376 * a SBTVD parameters are adjusted.
378 * Unfortunately, due to a hard to track bug at tda829x/tda18271,
379 * the agc callback logic is not called during DVB attach time,
380 * causing mb86a20s to not be initialized with Kworld SBTVD.
381 * So, this hack is needed, in order to make Kworld SBTVD to work.
383 if (state->need_init)
386 if (fe->ops.i2c_gate_ctrl)
387 fe->ops.i2c_gate_ctrl(fe, 0);
388 rc = mb86a20s_writeregdata(state, mb86a20s_reset_reception);
389 if (fe->ops.i2c_gate_ctrl)
390 fe->ops.i2c_gate_ctrl(fe, 1);
395 static int mb86a20s_get_modulation(struct mb86a20s_state *state,
399 static unsigned char reg[] = {
400 [0] = 0x86, /* Layer A */
401 [1] = 0x8a, /* Layer B */
402 [2] = 0x8e, /* Layer C */
405 if (layer >= ARRAY_SIZE(reg))
407 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
410 rc = mb86a20s_readreg(state, 0x6e);
413 switch ((rc & 0x70) >> 4) {
427 static int mb86a20s_get_fec(struct mb86a20s_state *state,
432 static unsigned char reg[] = {
433 [0] = 0x87, /* Layer A */
434 [1] = 0x8b, /* Layer B */
435 [2] = 0x8f, /* Layer C */
438 if (layer >= ARRAY_SIZE(reg))
440 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
443 rc = mb86a20s_readreg(state, 0x6e);
462 static int mb86a20s_get_interleaving(struct mb86a20s_state *state,
467 static unsigned char reg[] = {
468 [0] = 0x88, /* Layer A */
469 [1] = 0x8c, /* Layer B */
470 [2] = 0x90, /* Layer C */
473 if (layer >= ARRAY_SIZE(reg))
475 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
478 rc = mb86a20s_readreg(state, 0x6e);
482 return -EINVAL; /* Not used */
486 static int mb86a20s_get_segment_count(struct mb86a20s_state *state,
491 static unsigned char reg[] = {
492 [0] = 0x89, /* Layer A */
493 [1] = 0x8d, /* Layer B */
494 [2] = 0x91, /* Layer C */
497 if (layer >= ARRAY_SIZE(reg))
499 rc = mb86a20s_writereg(state, 0x6d, reg[layer]);
502 rc = mb86a20s_readreg(state, 0x6e);
505 count = (rc >> 4) & 0x0f;
510 static int mb86a20s_get_frontend(struct dvb_frontend *fe)
512 struct mb86a20s_state *state = fe->demodulator_priv;
513 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
516 /* Fixed parameters */
517 p->delivery_system = SYS_ISDBT;
518 p->bandwidth_hz = 6000000;
520 if (fe->ops.i2c_gate_ctrl)
521 fe->ops.i2c_gate_ctrl(fe, 0);
523 /* Check for partial reception */
524 rc = mb86a20s_writereg(state, 0x6d, 0x85);
526 rc = mb86a20s_readreg(state, 0x6e);
528 p->isdbt_partial_reception = (rc & 0x10) ? 1 : 0;
530 /* Get per-layer data */
531 p->isdbt_layer_enabled = 0;
532 for (i = 0; i < 3; i++) {
533 rc = mb86a20s_get_segment_count(state, i);
534 if (rc >= 0 && rc < 14)
535 p->layer[i].segment_count = rc;
538 p->isdbt_layer_enabled |= 1 << i;
539 rc = mb86a20s_get_modulation(state, i);
541 p->layer[i].modulation = rc;
542 rc = mb86a20s_get_fec(state, i);
544 p->layer[i].fec = rc;
545 rc = mb86a20s_get_interleaving(state, i);
547 p->layer[i].interleaving = rc;
550 p->isdbt_sb_mode = 0;
551 rc = mb86a20s_writereg(state, 0x6d, 0x84);
552 if ((rc >= 0) && ((rc & 0x60) == 0x20)) {
553 p->isdbt_sb_mode = 1;
554 /* At least, one segment should exist */
555 if (!p->isdbt_sb_segment_count)
556 p->isdbt_sb_segment_count = 1;
558 p->isdbt_sb_segment_count = 0;
560 /* Get transmission mode and guard interval */
561 p->transmission_mode = TRANSMISSION_MODE_AUTO;
562 p->guard_interval = GUARD_INTERVAL_AUTO;
563 rc = mb86a20s_readreg(state, 0x07);
565 if ((rc & 0x60) == 0x20) {
566 switch (rc & 0x0c >> 2) {
568 p->transmission_mode = TRANSMISSION_MODE_2K;
571 p->transmission_mode = TRANSMISSION_MODE_4K;
574 p->transmission_mode = TRANSMISSION_MODE_8K;
581 p->guard_interval = GUARD_INTERVAL_1_4;
584 p->guard_interval = GUARD_INTERVAL_1_8;
587 p->guard_interval = GUARD_INTERVAL_1_16;
593 if (fe->ops.i2c_gate_ctrl)
594 fe->ops.i2c_gate_ctrl(fe, 1);
599 static int mb86a20s_tune(struct dvb_frontend *fe,
601 unsigned int mode_flags,
610 rc = mb86a20s_set_frontend(fe);
612 if (!(mode_flags & FE_TUNE_MODE_ONESHOT))
613 mb86a20s_read_status(fe, status);
618 static void mb86a20s_release(struct dvb_frontend *fe)
620 struct mb86a20s_state *state = fe->demodulator_priv;
627 static struct dvb_frontend_ops mb86a20s_ops;
629 struct dvb_frontend *mb86a20s_attach(const struct mb86a20s_config *config,
630 struct i2c_adapter *i2c)
634 /* allocate memory for the internal state */
635 struct mb86a20s_state *state =
636 kzalloc(sizeof(struct mb86a20s_state), GFP_KERNEL);
640 rc("Unable to kzalloc\n");
644 /* setup the state */
645 state->config = config;
648 /* create dvb_frontend */
649 memcpy(&state->frontend.ops, &mb86a20s_ops,
650 sizeof(struct dvb_frontend_ops));
651 state->frontend.demodulator_priv = state;
653 /* Check if it is a mb86a20s frontend */
654 rev = mb86a20s_readreg(state, 0);
657 printk(KERN_INFO "Detected a Fujitsu mb86a20s frontend\n");
659 printk(KERN_ERR "Frontend revision %d is unknown - aborting.\n",
664 return &state->frontend;
670 EXPORT_SYMBOL(mb86a20s_attach);
672 static struct dvb_frontend_ops mb86a20s_ops = {
673 .delsys = { SYS_ISDBT },
674 /* Use dib8000 values per default */
676 .name = "Fujitsu mb86A20s",
677 .caps = FE_CAN_INVERSION_AUTO | FE_CAN_RECOVER |
678 FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
679 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
680 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 |
681 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_QAM_AUTO |
682 FE_CAN_GUARD_INTERVAL_AUTO | FE_CAN_HIERARCHY_AUTO,
683 /* Actually, those values depend on the used tuner */
684 .frequency_min = 45000000,
685 .frequency_max = 864000000,
686 .frequency_stepsize = 62500,
689 .release = mb86a20s_release,
691 .init = mb86a20s_initfe,
692 .set_frontend = mb86a20s_set_frontend,
693 .get_frontend = mb86a20s_get_frontend,
694 .read_status = mb86a20s_read_status,
695 .read_signal_strength = mb86a20s_read_signal_strength,
696 .tune = mb86a20s_tune,
699 MODULE_DESCRIPTION("DVB Frontend module for Fujitsu mb86A20s hardware");
700 MODULE_AUTHOR("Mauro Carvalho Chehab <mchehab@redhat.com>");
701 MODULE_LICENSE("GPL");