2 * Support for NXT2002 and NXT2004 - VSB/QAM
4 * Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
5 * Copyright (C) 2006-2014 Michael Krufky <mkrufky@linuxtv.org>
6 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
7 * and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
19 * You should have received a copy of the GNU General Public License
20 * along with this program; if not, write to the Free Software
21 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
26 * NOTES ABOUT THIS DRIVER
28 * This Linux driver supports:
29 * B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
30 * AverTVHD MCE A180 (NXT2004)
31 * ATI HDTV Wonder (NXT2004)
33 * This driver needs external firmware. Please use the command
34 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
35 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
36 * download/extract the appropriate firmware, and then copy it to
37 * /usr/lib/hotplug/firmware/ or /lib/firmware/
38 * (depending on configuration of firmware hotplug).
40 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
42 /* Max transfer size done by I2C transfer functions */
43 #define MAX_XFER_SIZE 256
45 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
46 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
47 #define CRC_CCIT_MASK 0x1021
49 #include <linux/kernel.h>
50 #include <linux/init.h>
51 #include <linux/module.h>
52 #include <linux/slab.h>
53 #include <linux/string.h>
55 #include "dvb_frontend.h"
58 struct nxt200x_state {
60 struct i2c_adapter* i2c;
61 const struct nxt200x_config* config;
62 struct dvb_frontend frontend;
64 /* demodulator private data */
65 nxt_chip_type demod_chip;
70 #define dprintk(args...) do { if (debug) pr_debug(args); } while (0)
72 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
75 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
77 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
78 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
85 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
88 struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
90 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
91 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
98 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
99 const u8 *buf, u8 len)
101 u8 buf2[MAX_XFER_SIZE];
103 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
105 if (1 + len > sizeof(buf2)) {
106 pr_warn("%s: i2c wr reg=%04x: len=%d is too big!\n",
112 memcpy(&buf2[1], buf, len);
114 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
115 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
116 __func__, state->config->demod_address, err);
122 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
124 u8 reg2 [] = { reg };
126 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
127 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
131 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
132 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
133 __func__, state->config->demod_address, err);
139 static u16 nxt200x_crc(u16 crc, u8 c)
142 u16 input = (u16) c & 0xFF;
146 if((crc^input) & 0x8000)
147 crc=(crc<<1)^CRC_CCIT_MASK;
155 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
158 dprintk("%s\n", __func__);
160 /* set mutli register register */
161 nxt200x_writebytes(state, 0x35, ®, 1);
163 /* send the actual data */
164 nxt200x_writebytes(state, 0x36, data, len);
166 switch (state->demod_chip) {
172 /* probably not right, but gives correct values */
180 len2 = ((attr << 4) | 0x10) | len;
188 /* set multi register length */
189 nxt200x_writebytes(state, 0x34, &len2, 1);
191 /* toggle the multireg write bit */
192 nxt200x_writebytes(state, 0x21, &buf, 1);
194 nxt200x_readbytes(state, 0x21, &buf, 1);
196 switch (state->demod_chip) {
198 if ((buf & 0x02) == 0)
210 pr_warn("Error writing multireg register 0x%02X\n", reg);
215 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
219 dprintk("%s\n", __func__);
221 /* set mutli register register */
222 nxt200x_writebytes(state, 0x35, ®, 1);
224 switch (state->demod_chip) {
226 /* set multi register length */
228 nxt200x_writebytes(state, 0x34, &len2, 1);
230 /* read the actual data */
231 nxt200x_readbytes(state, reg, data, len);
235 /* probably not right, but gives correct values */
243 /* set multi register length */
244 len2 = (attr << 4) | len;
245 nxt200x_writebytes(state, 0x34, &len2, 1);
247 /* toggle the multireg bit*/
249 nxt200x_writebytes(state, 0x21, &buf, 1);
251 /* read the actual data */
252 for(i = 0; i < len; i++) {
253 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
263 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
265 u8 buf, stopval, counter = 0;
266 dprintk("%s\n", __func__);
268 /* set correct stop value */
269 switch (state->demod_chip) {
282 nxt200x_writebytes(state, 0x22, &buf, 1);
284 while (counter < 20) {
285 nxt200x_readbytes(state, 0x31, &buf, 1);
292 pr_warn("Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
296 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
299 dprintk("%s\n", __func__);
302 nxt200x_writebytes(state, 0x22, &buf, 1);
305 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
309 dprintk("%s\n", __func__);
312 nxt200x_writebytes(state, 0x2b, buf, 1);
314 nxt200x_writebytes(state, 0x34, buf, 1);
316 nxt200x_writebytes(state, 0x35, buf, 1);
317 buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
318 buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
319 nxt200x_writebytes(state, 0x36, buf, 9);
321 nxt200x_writebytes(state, 0x21, buf, 1);
323 while (counter < 20) {
324 nxt200x_readbytes(state, 0x21, buf, 1);
331 pr_warn("Timeout waiting for nxt2004 to init.\n");
336 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
340 dprintk("%s\n", __func__);
342 dprintk("Tuner Bytes: %*ph\n", 4, data + 1);
344 /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
345 * direct write is required for Philips TUV1236D and ALPS TDHU2 */
346 switch (state->demod_chip) {
348 if (i2c_writebytes(state, data[0], data+1, 4))
349 pr_warn("error writing to tuner\n");
350 /* wait until we have a lock */
352 i2c_readbytes(state, data[0], &buf, 1);
358 pr_warn("timeout waiting for tuner lock\n");
361 /* set the i2c transfer speed to the tuner */
363 nxt200x_writebytes(state, 0x20, &buf, 1);
365 /* setup to transfer 4 bytes via i2c */
367 nxt200x_writebytes(state, 0x34, &buf, 1);
369 /* write actual tuner bytes */
370 nxt200x_writebytes(state, 0x36, data+1, 4);
372 /* set tuner i2c address */
374 nxt200x_writebytes(state, 0x35, &buf, 1);
376 /* write UC Opmode to begin transfer */
378 nxt200x_writebytes(state, 0x21, &buf, 1);
381 nxt200x_readbytes(state, 0x21, &buf, 1);
382 if ((buf & 0x80)== 0x00)
387 pr_warn("timeout error writing to tuner\n");
396 static void nxt200x_agc_reset(struct nxt200x_state* state)
399 dprintk("%s\n", __func__);
401 switch (state->demod_chip) {
404 nxt200x_writebytes(state, 0x08, &buf, 1);
406 nxt200x_writebytes(state, 0x08, &buf, 1);
409 nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
411 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
413 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
421 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
424 struct nxt200x_state* state = fe->demodulator_priv;
425 u8 buf[3], written = 0, chunkpos = 0;
426 u16 rambase, position, crc = 0;
428 dprintk("%s\n", __func__);
429 dprintk("Firmware is %zu bytes\n", fw->size);
431 /* Get the RAM base for this nxt2002 */
432 nxt200x_readbytes(state, 0x10, buf, 1);
439 dprintk("rambase on this nxt2002 is %04X\n", rambase);
441 /* Hold the micro in reset while loading firmware */
443 nxt200x_writebytes(state, 0x2B, buf, 1);
445 for (position = 0; position < fw->size; position++) {
449 buf[0] = ((rambase + position) >> 8);
450 buf[1] = (rambase + position) & 0xFF;
452 /* write starting address */
453 nxt200x_writebytes(state, 0x29, buf, 3);
458 if ((written % 4) == 0)
459 nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
461 crc = nxt200x_crc(crc, fw->data[position]);
463 if ((written == 255) || (position+1 == fw->size)) {
464 /* write remaining bytes of firmware */
465 nxt200x_writebytes(state, chunkpos+4-(written %4),
466 &fw->data[position-(written %4) + 1],
472 nxt200x_writebytes(state, 0x2C, buf, 2);
474 /* do a read to stop things */
475 nxt200x_readbytes(state, 0x2A, buf, 1);
477 /* set transfer mode to complete */
479 nxt200x_writebytes(state, 0x2B, buf, 1);
488 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
491 struct nxt200x_state* state = fe->demodulator_priv;
493 u16 rambase, position, crc=0;
495 dprintk("%s\n", __func__);
496 dprintk("Firmware is %zu bytes\n", fw->size);
501 /* hold the micro in reset while loading firmware */
503 nxt200x_writebytes(state, 0x2B, buf,1);
505 /* calculate firmware CRC */
506 for (position = 0; position < fw->size; position++) {
507 crc = nxt200x_crc(crc, fw->data[position]);
510 buf[0] = rambase >> 8;
511 buf[1] = rambase & 0xFF;
513 /* write starting address */
514 nxt200x_writebytes(state,0x29,buf,3);
516 for (position = 0; position < fw->size;) {
517 nxt200x_writebytes(state, 0x2C, &fw->data[position],
518 fw->size-position > 255 ? 255 : fw->size-position);
519 position += (fw->size-position > 255 ? 255 : fw->size-position);
524 dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
527 nxt200x_writebytes(state, 0x2C, buf,2);
529 /* do a read to stop things */
530 nxt200x_readbytes(state, 0x2C, buf, 1);
532 /* set transfer mode to complete */
534 nxt200x_writebytes(state, 0x2B, buf,1);
539 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
541 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
542 struct nxt200x_state* state = fe->demodulator_priv;
545 /* stop the micro first */
546 nxt200x_microcontroller_stop(state);
548 if (state->demod_chip == NXT2004) {
549 /* make sure demod is set to digital */
551 nxt200x_writebytes(state, 0x14, buf, 1);
553 nxt200x_writebytes(state, 0x17, buf, 1);
556 /* set additional params */
557 switch (p->modulation) {
560 /* Set punctured clock for QAM */
561 /* This is just a guess since I am unable to test it */
562 if (state->config->set_ts_params)
563 state->config->set_ts_params(fe, 1);
566 /* Set non-punctured clock for VSB */
567 if (state->config->set_ts_params)
568 state->config->set_ts_params(fe, 0);
575 if (fe->ops.tuner_ops.calc_regs) {
576 /* get tuning information */
577 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
579 /* write frequency information */
580 nxt200x_writetuner(state, buf);
583 /* reset the agc now that tuning has been completed */
584 nxt200x_agc_reset(state);
586 /* set target power level */
587 switch (p->modulation) {
599 nxt200x_writebytes(state, 0x42, buf, 1);
602 switch (state->demod_chip) {
613 nxt200x_writebytes(state, 0x57, buf, 1);
615 /* write sdm1 input */
618 switch (state->demod_chip) {
620 nxt200x_writereg_multibyte(state, 0x58, buf, 2);
623 nxt200x_writebytes(state, 0x58, buf, 2);
630 /* write sdmx input */
631 switch (p->modulation) {
646 switch (state->demod_chip) {
648 nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
651 nxt200x_writebytes(state, 0x5C, buf, 2);
658 /* write adc power lpf fc */
660 nxt200x_writebytes(state, 0x43, buf, 1);
662 if (state->demod_chip == NXT2004) {
666 nxt200x_writebytes(state, 0x46, buf, 2);
669 /* write accumulator2 input */
672 switch (state->demod_chip) {
674 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
677 nxt200x_writebytes(state, 0x4B, buf, 2);
686 nxt200x_writebytes(state, 0x4D, buf, 1);
688 /* write sdm12 lpf fc */
690 nxt200x_writebytes(state, 0x55, buf, 1);
692 /* write agc control reg */
694 nxt200x_writebytes(state, 0x41, buf, 1);
696 if (state->demod_chip == NXT2004) {
697 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
699 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
702 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
704 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
705 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
707 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
709 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
711 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
713 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
714 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
715 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
716 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
718 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
719 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
721 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
724 /* write agc ucgp0 */
725 switch (p->modulation) {
739 nxt200x_writebytes(state, 0x30, buf, 1);
741 /* write agc control reg */
743 nxt200x_writebytes(state, 0x41, buf, 1);
745 /* write accumulator2 input */
748 switch (state->demod_chip) {
750 nxt200x_writereg_multibyte(state, 0x49, buf, 2);
751 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
754 nxt200x_writebytes(state, 0x49, buf, 2);
755 nxt200x_writebytes(state, 0x4B, buf, 2);
762 /* write agc control reg */
764 nxt200x_writebytes(state, 0x41, buf, 1);
766 nxt200x_microcontroller_start(state);
768 if (state->demod_chip == NXT2004) {
769 nxt2004_microcontroller_init(state);
774 nxt200x_writebytes(state, 0x5C, buf, 2);
777 /* adjacent channel detection should be done here, but I don't
778 have any stations with this need so I cannot test it */
783 static int nxt200x_read_status(struct dvb_frontend *fe, enum fe_status *status)
785 struct nxt200x_state* state = fe->demodulator_priv;
787 nxt200x_readbytes(state, 0x31, &lock, 1);
791 *status |= FE_HAS_SIGNAL;
792 *status |= FE_HAS_CARRIER;
793 *status |= FE_HAS_VITERBI;
794 *status |= FE_HAS_SYNC;
795 *status |= FE_HAS_LOCK;
800 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
802 struct nxt200x_state* state = fe->demodulator_priv;
805 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
807 *ber = ((b[0] << 8) + b[1]) * 8;
812 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
814 struct nxt200x_state* state = fe->demodulator_priv;
818 /* setup to read cluster variance */
820 nxt200x_writebytes(state, 0xA1, b, 1);
822 /* get multreg val */
823 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
825 temp = (b[0] << 8) | b[1];
826 *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
831 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
834 struct nxt200x_state* state = fe->demodulator_priv;
839 /* setup to read cluster variance */
841 nxt200x_writebytes(state, 0xA1, b, 1);
843 /* get multreg val from 0xA6 */
844 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
846 temp = (b[0] << 8) | b[1];
847 temp2 = 0x7FFF - temp;
849 /* snr will be in db */
851 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
852 else if (temp2 > 0x7EC0)
853 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
854 else if (temp2 > 0x7C00)
855 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
857 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
859 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
860 *snr = snrdb * (0xFFFF/32000);
865 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
867 struct nxt200x_state* state = fe->demodulator_priv;
870 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
876 static int nxt200x_sleep(struct dvb_frontend* fe)
881 static int nxt2002_init(struct dvb_frontend* fe)
883 struct nxt200x_state* state = fe->demodulator_priv;
884 const struct firmware *fw;
888 /* request the firmware, this will block until someone uploads it */
889 pr_debug("%s: Waiting for firmware upload (%s)...\n",
890 __func__, NXT2002_DEFAULT_FIRMWARE);
891 ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE,
892 state->i2c->dev.parent);
893 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
895 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
900 ret = nxt2002_load_firmware(fe, fw);
901 release_firmware(fw);
903 pr_err("%s: Writing firmware to device failed\n", __func__);
906 pr_info("%s: Firmware upload complete\n", __func__);
908 /* Put the micro into reset */
909 nxt200x_microcontroller_stop(state);
911 /* ensure transfer is complete */
913 nxt200x_writebytes(state, 0x2B, buf, 1);
915 /* Put the micro into reset for real this time */
916 nxt200x_microcontroller_stop(state);
918 /* soft reset everything (agc,frontend,eq,fec)*/
920 nxt200x_writebytes(state, 0x08, buf, 1);
922 nxt200x_writebytes(state, 0x08, buf, 1);
924 /* write agc sdm configure */
926 nxt200x_writebytes(state, 0x57, buf, 1);
928 /* write mod output format */
930 nxt200x_writebytes(state, 0x09, buf, 1);
932 /* write fec mpeg mode */
935 nxt200x_writebytes(state, 0xE9, buf, 2);
937 /* write mux selection */
939 nxt200x_writebytes(state, 0xCC, buf, 1);
944 static int nxt2004_init(struct dvb_frontend* fe)
946 struct nxt200x_state* state = fe->demodulator_priv;
947 const struct firmware *fw;
953 nxt200x_writebytes(state, 0x1E, buf, 1);
955 /* request the firmware, this will block until someone uploads it */
956 pr_debug("%s: Waiting for firmware upload (%s)...\n",
957 __func__, NXT2004_DEFAULT_FIRMWARE);
958 ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE,
959 state->i2c->dev.parent);
960 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
962 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
967 ret = nxt2004_load_firmware(fe, fw);
968 release_firmware(fw);
970 pr_err("%s: Writing firmware to device failed\n", __func__);
973 pr_info("%s: Firmware upload complete\n", __func__);
975 /* ensure transfer is complete */
977 nxt200x_writebytes(state, 0x19, buf, 1);
979 nxt2004_microcontroller_init(state);
980 nxt200x_microcontroller_stop(state);
981 nxt200x_microcontroller_stop(state);
982 nxt2004_microcontroller_init(state);
983 nxt200x_microcontroller_stop(state);
985 /* soft reset everything (agc,frontend,eq,fec)*/
987 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
989 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
991 /* write agc sdm configure */
993 nxt200x_writebytes(state, 0x57, buf, 1);
998 nxt200x_writebytes(state, 0x35, buf, 2);
1000 nxt200x_writebytes(state, 0x34, buf, 1);
1002 nxt200x_writebytes(state, 0x21, buf, 1);
1006 nxt200x_writebytes(state, 0x0A, buf, 1);
1010 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1012 /* write fec mpeg mode */
1015 nxt200x_writebytes(state, 0xE9, buf, 2);
1017 /* write mux selection */
1019 nxt200x_writebytes(state, 0xCC, buf, 1);
1022 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1024 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1027 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1029 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1030 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1032 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1035 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1037 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1039 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1040 buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1041 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1043 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1045 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1046 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1048 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1050 nxt200x_readbytes(state, 0x10, buf, 1);
1052 nxt200x_writebytes(state, 0x10, buf, 1);
1053 nxt200x_readbytes(state, 0x0A, buf, 1);
1055 nxt200x_writebytes(state, 0x0A, buf, 1);
1057 nxt2004_microcontroller_init(state);
1060 nxt200x_writebytes(state, 0x0A, buf, 1);
1062 nxt200x_writebytes(state, 0xE9, buf, 1);
1064 nxt200x_writebytes(state, 0xEA, buf, 1);
1066 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1068 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1069 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1071 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1074 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1076 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1077 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1079 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1081 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1083 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1085 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1086 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1087 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1089 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1091 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1093 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1095 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1097 /* initialize tuner */
1098 nxt200x_readbytes(state, 0x10, buf, 1);
1100 nxt200x_writebytes(state, 0x10, buf, 1);
1102 nxt200x_writebytes(state, 0x13, buf, 1);
1104 nxt200x_writebytes(state, 0x16, buf, 1);
1106 nxt200x_writebytes(state, 0x14, buf, 1);
1108 nxt200x_writebytes(state, 0x14, buf, 1);
1109 nxt200x_writebytes(state, 0x17, buf, 1);
1110 nxt200x_writebytes(state, 0x14, buf, 1);
1111 nxt200x_writebytes(state, 0x17, buf, 1);
1116 static int nxt200x_init(struct dvb_frontend* fe)
1118 struct nxt200x_state* state = fe->demodulator_priv;
1121 if (!state->initialised) {
1122 switch (state->demod_chip) {
1124 ret = nxt2002_init(fe);
1127 ret = nxt2004_init(fe);
1133 state->initialised = 1;
1138 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1140 fesettings->min_delay_ms = 500;
1141 fesettings->step_size = 0;
1142 fesettings->max_drift = 0;
1146 static void nxt200x_release(struct dvb_frontend* fe)
1148 struct nxt200x_state* state = fe->demodulator_priv;
1152 static const struct dvb_frontend_ops nxt200x_ops;
1154 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1155 struct i2c_adapter* i2c)
1157 struct nxt200x_state* state = NULL;
1158 u8 buf [] = {0,0,0,0,0};
1160 /* allocate memory for the internal state */
1161 state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1165 /* setup the state */
1166 state->config = config;
1168 state->initialised = 0;
1171 nxt200x_readbytes(state, 0x00, buf, 5);
1172 dprintk("NXT info: %*ph\n", 5, buf);
1174 /* set demod chip */
1177 state->demod_chip = NXT2002;
1178 pr_info("NXT2002 Detected\n");
1181 state->demod_chip = NXT2004;
1182 pr_info("NXT2004 Detected\n");
1188 /* make sure demod chip is supported */
1189 switch (state->demod_chip) {
1191 if (buf[0] != 0x04) goto error; /* device id */
1192 if (buf[1] != 0x02) goto error; /* fab id */
1193 if (buf[2] != 0x11) goto error; /* month */
1194 if (buf[3] != 0x20) goto error; /* year msb */
1195 if (buf[4] != 0x00) goto error; /* year lsb */
1198 if (buf[0] != 0x05) goto error; /* device id */
1204 /* create dvb_frontend */
1205 memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1206 state->frontend.demodulator_priv = state;
1207 return &state->frontend;
1211 pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf);
1215 static const struct dvb_frontend_ops nxt200x_ops = {
1216 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1218 .name = "Nextwave NXT200X VSB/QAM frontend",
1219 .frequency_min = 54000000,
1220 .frequency_max = 860000000,
1221 .frequency_stepsize = 166666, /* stepsize is just a guess */
1222 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1223 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1224 FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1227 .release = nxt200x_release,
1229 .init = nxt200x_init,
1230 .sleep = nxt200x_sleep,
1232 .set_frontend = nxt200x_setup_frontend_parameters,
1233 .get_tune_settings = nxt200x_get_tune_settings,
1235 .read_status = nxt200x_read_status,
1236 .read_ber = nxt200x_read_ber,
1237 .read_signal_strength = nxt200x_read_signal_strength,
1238 .read_snr = nxt200x_read_snr,
1239 .read_ucblocks = nxt200x_read_ucblocks,
1242 module_param(debug, int, 0644);
1243 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1245 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1246 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1247 MODULE_LICENSE("GPL");
1249 EXPORT_SYMBOL(nxt200x_attach);