2 * Support for NXT2002 and NXT2004 - VSB/QAM
4 * Copyright (C) 2005 Kirk Lapray <kirk.lapray@gmail.com>
5 * Copyright (C) 2006-2014 Michael Krufky <mkrufky@linuxtv.org>
6 * based on nxt2002 by Taylor Jacob <rtjacob@earthlink.net>
7 * and nxt2004 by Jean-Francois Thibert <jeanfrancois@sagetv.com>
9 * This program is free software; you can redistribute it and/or modify
10 * it under the terms of the GNU General Public License as published by
11 * the Free Software Foundation; either version 2 of the License, or
12 * (at your option) any later version.
14 * This program is distributed in the hope that it will be useful,
15 * but WITHOUT ANY WARRANTY; without even the implied warranty of
16 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 * GNU General Public License for more details.
22 * NOTES ABOUT THIS DRIVER
24 * This Linux driver supports:
25 * B2C2/BBTI Technisat Air2PC - ATSC (NXT2002)
26 * AverTVHD MCE A180 (NXT2004)
27 * ATI HDTV Wonder (NXT2004)
29 * This driver needs external firmware. Please use the command
30 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2002" or
31 * "<kerneldir>/Documentation/dvb/get_dvb_firmware nxt2004" to
32 * download/extract the appropriate firmware, and then copy it to
33 * /usr/lib/hotplug/firmware/ or /lib/firmware/
34 * (depending on configuration of firmware hotplug).
36 #define pr_fmt(fmt) KBUILD_MODNAME ": " fmt
38 /* Max transfer size done by I2C transfer functions */
39 #define MAX_XFER_SIZE 256
41 #define NXT2002_DEFAULT_FIRMWARE "dvb-fe-nxt2002.fw"
42 #define NXT2004_DEFAULT_FIRMWARE "dvb-fe-nxt2004.fw"
43 #define CRC_CCIT_MASK 0x1021
45 #include <linux/kernel.h>
46 #include <linux/init.h>
47 #include <linux/module.h>
48 #include <linux/slab.h>
49 #include <linux/string.h>
51 #include "dvb_frontend.h"
54 struct nxt200x_state {
56 struct i2c_adapter* i2c;
57 const struct nxt200x_config* config;
58 struct dvb_frontend frontend;
60 /* demodulator private data */
61 nxt_chip_type demod_chip;
66 #define dprintk(args...) do { if (debug) pr_debug(args); } while (0)
68 static int i2c_writebytes (struct nxt200x_state* state, u8 addr, u8 *buf, u8 len)
71 struct i2c_msg msg = { .addr = addr, .flags = 0, .buf = buf, .len = len };
73 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
74 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
81 static int i2c_readbytes(struct nxt200x_state *state, u8 addr, u8 *buf, u8 len)
84 struct i2c_msg msg = { .addr = addr, .flags = I2C_M_RD, .buf = buf, .len = len };
86 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
87 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
94 static int nxt200x_writebytes (struct nxt200x_state* state, u8 reg,
95 const u8 *buf, u8 len)
97 u8 buf2[MAX_XFER_SIZE];
99 struct i2c_msg msg = { .addr = state->config->demod_address, .flags = 0, .buf = buf2, .len = len + 1 };
101 if (1 + len > sizeof(buf2)) {
102 pr_warn("%s: i2c wr reg=%04x: len=%d is too big!\n",
108 memcpy(&buf2[1], buf, len);
110 if ((err = i2c_transfer (state->i2c, &msg, 1)) != 1) {
111 pr_warn("%s: i2c write error (addr 0x%02x, err == %i)\n",
112 __func__, state->config->demod_address, err);
118 static int nxt200x_readbytes(struct nxt200x_state *state, u8 reg, u8 *buf, u8 len)
120 u8 reg2 [] = { reg };
122 struct i2c_msg msg [] = { { .addr = state->config->demod_address, .flags = 0, .buf = reg2, .len = 1 },
123 { .addr = state->config->demod_address, .flags = I2C_M_RD, .buf = buf, .len = len } };
127 if ((err = i2c_transfer (state->i2c, msg, 2)) != 2) {
128 pr_warn("%s: i2c read error (addr 0x%02x, err == %i)\n",
129 __func__, state->config->demod_address, err);
135 static u16 nxt200x_crc(u16 crc, u8 c)
138 u16 input = (u16) c & 0xFF;
142 if((crc^input) & 0x8000)
143 crc=(crc<<1)^CRC_CCIT_MASK;
151 static int nxt200x_writereg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
154 dprintk("%s\n", __func__);
156 /* set mutli register register */
157 nxt200x_writebytes(state, 0x35, ®, 1);
159 /* send the actual data */
160 nxt200x_writebytes(state, 0x36, data, len);
162 switch (state->demod_chip) {
168 /* probably not right, but gives correct values */
176 len2 = ((attr << 4) | 0x10) | len;
184 /* set multi register length */
185 nxt200x_writebytes(state, 0x34, &len2, 1);
187 /* toggle the multireg write bit */
188 nxt200x_writebytes(state, 0x21, &buf, 1);
190 nxt200x_readbytes(state, 0x21, &buf, 1);
192 switch (state->demod_chip) {
194 if ((buf & 0x02) == 0)
206 pr_warn("Error writing multireg register 0x%02X\n", reg);
211 static int nxt200x_readreg_multibyte (struct nxt200x_state* state, u8 reg, u8* data, u8 len)
215 dprintk("%s\n", __func__);
217 /* set mutli register register */
218 nxt200x_writebytes(state, 0x35, ®, 1);
220 switch (state->demod_chip) {
222 /* set multi register length */
224 nxt200x_writebytes(state, 0x34, &len2, 1);
226 /* read the actual data */
227 nxt200x_readbytes(state, reg, data, len);
231 /* probably not right, but gives correct values */
239 /* set multi register length */
240 len2 = (attr << 4) | len;
241 nxt200x_writebytes(state, 0x34, &len2, 1);
243 /* toggle the multireg bit*/
245 nxt200x_writebytes(state, 0x21, &buf, 1);
247 /* read the actual data */
248 for(i = 0; i < len; i++) {
249 nxt200x_readbytes(state, 0x36 + i, &data[i], 1);
259 static void nxt200x_microcontroller_stop (struct nxt200x_state* state)
261 u8 buf, stopval, counter = 0;
262 dprintk("%s\n", __func__);
264 /* set correct stop value */
265 switch (state->demod_chip) {
278 nxt200x_writebytes(state, 0x22, &buf, 1);
280 while (counter < 20) {
281 nxt200x_readbytes(state, 0x31, &buf, 1);
288 pr_warn("Timeout waiting for nxt200x to stop. This is ok after firmware upload.\n");
292 static void nxt200x_microcontroller_start (struct nxt200x_state* state)
295 dprintk("%s\n", __func__);
298 nxt200x_writebytes(state, 0x22, &buf, 1);
301 static void nxt2004_microcontroller_init (struct nxt200x_state* state)
305 dprintk("%s\n", __func__);
308 nxt200x_writebytes(state, 0x2b, buf, 1);
310 nxt200x_writebytes(state, 0x34, buf, 1);
312 nxt200x_writebytes(state, 0x35, buf, 1);
313 buf[0] = 0x01; buf[1] = 0x23; buf[2] = 0x45; buf[3] = 0x67; buf[4] = 0x89;
314 buf[5] = 0xAB; buf[6] = 0xCD; buf[7] = 0xEF; buf[8] = 0xC0;
315 nxt200x_writebytes(state, 0x36, buf, 9);
317 nxt200x_writebytes(state, 0x21, buf, 1);
319 while (counter < 20) {
320 nxt200x_readbytes(state, 0x21, buf, 1);
327 pr_warn("Timeout waiting for nxt2004 to init.\n");
332 static int nxt200x_writetuner (struct nxt200x_state* state, u8* data)
336 dprintk("%s\n", __func__);
338 dprintk("Tuner Bytes: %*ph\n", 4, data + 1);
340 /* if NXT2004, write directly to tuner. if NXT2002, write through NXT chip.
341 * direct write is required for Philips TUV1236D and ALPS TDHU2 */
342 switch (state->demod_chip) {
344 if (i2c_writebytes(state, data[0], data+1, 4))
345 pr_warn("error writing to tuner\n");
346 /* wait until we have a lock */
348 i2c_readbytes(state, data[0], &buf, 1);
354 pr_warn("timeout waiting for tuner lock\n");
357 /* set the i2c transfer speed to the tuner */
359 nxt200x_writebytes(state, 0x20, &buf, 1);
361 /* setup to transfer 4 bytes via i2c */
363 nxt200x_writebytes(state, 0x34, &buf, 1);
365 /* write actual tuner bytes */
366 nxt200x_writebytes(state, 0x36, data+1, 4);
368 /* set tuner i2c address */
370 nxt200x_writebytes(state, 0x35, &buf, 1);
372 /* write UC Opmode to begin transfer */
374 nxt200x_writebytes(state, 0x21, &buf, 1);
377 nxt200x_readbytes(state, 0x21, &buf, 1);
378 if ((buf & 0x80)== 0x00)
383 pr_warn("timeout error writing to tuner\n");
392 static void nxt200x_agc_reset(struct nxt200x_state* state)
395 dprintk("%s\n", __func__);
397 switch (state->demod_chip) {
400 nxt200x_writebytes(state, 0x08, &buf, 1);
402 nxt200x_writebytes(state, 0x08, &buf, 1);
405 nxt200x_readreg_multibyte(state, 0x08, &buf, 1);
407 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
409 nxt200x_writereg_multibyte(state, 0x08, &buf, 1);
417 static int nxt2002_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
420 struct nxt200x_state* state = fe->demodulator_priv;
421 u8 buf[3], written = 0, chunkpos = 0;
422 u16 rambase, position, crc = 0;
424 dprintk("%s\n", __func__);
425 dprintk("Firmware is %zu bytes\n", fw->size);
427 /* Get the RAM base for this nxt2002 */
428 nxt200x_readbytes(state, 0x10, buf, 1);
435 dprintk("rambase on this nxt2002 is %04X\n", rambase);
437 /* Hold the micro in reset while loading firmware */
439 nxt200x_writebytes(state, 0x2B, buf, 1);
441 for (position = 0; position < fw->size; position++) {
445 buf[0] = ((rambase + position) >> 8);
446 buf[1] = (rambase + position) & 0xFF;
448 /* write starting address */
449 nxt200x_writebytes(state, 0x29, buf, 3);
454 if ((written % 4) == 0)
455 nxt200x_writebytes(state, chunkpos, &fw->data[position-3], 4);
457 crc = nxt200x_crc(crc, fw->data[position]);
459 if ((written == 255) || (position+1 == fw->size)) {
460 /* write remaining bytes of firmware */
461 nxt200x_writebytes(state, chunkpos+4-(written %4),
462 &fw->data[position-(written %4) + 1],
468 nxt200x_writebytes(state, 0x2C, buf, 2);
470 /* do a read to stop things */
471 nxt200x_readbytes(state, 0x2A, buf, 1);
473 /* set transfer mode to complete */
475 nxt200x_writebytes(state, 0x2B, buf, 1);
484 static int nxt2004_load_firmware (struct dvb_frontend* fe, const struct firmware *fw)
487 struct nxt200x_state* state = fe->demodulator_priv;
489 u16 rambase, position, crc=0;
491 dprintk("%s\n", __func__);
492 dprintk("Firmware is %zu bytes\n", fw->size);
497 /* hold the micro in reset while loading firmware */
499 nxt200x_writebytes(state, 0x2B, buf,1);
501 /* calculate firmware CRC */
502 for (position = 0; position < fw->size; position++) {
503 crc = nxt200x_crc(crc, fw->data[position]);
506 buf[0] = rambase >> 8;
507 buf[1] = rambase & 0xFF;
509 /* write starting address */
510 nxt200x_writebytes(state,0x29,buf,3);
512 for (position = 0; position < fw->size;) {
513 nxt200x_writebytes(state, 0x2C, &fw->data[position],
514 fw->size-position > 255 ? 255 : fw->size-position);
515 position += (fw->size-position > 255 ? 255 : fw->size-position);
520 dprintk("firmware crc is 0x%02X 0x%02X\n", buf[0], buf[1]);
523 nxt200x_writebytes(state, 0x2C, buf,2);
525 /* do a read to stop things */
526 nxt200x_readbytes(state, 0x2C, buf, 1);
528 /* set transfer mode to complete */
530 nxt200x_writebytes(state, 0x2B, buf,1);
535 static int nxt200x_setup_frontend_parameters(struct dvb_frontend *fe)
537 struct dtv_frontend_properties *p = &fe->dtv_property_cache;
538 struct nxt200x_state* state = fe->demodulator_priv;
541 /* stop the micro first */
542 nxt200x_microcontroller_stop(state);
544 if (state->demod_chip == NXT2004) {
545 /* make sure demod is set to digital */
547 nxt200x_writebytes(state, 0x14, buf, 1);
549 nxt200x_writebytes(state, 0x17, buf, 1);
552 /* set additional params */
553 switch (p->modulation) {
556 /* Set punctured clock for QAM */
557 /* This is just a guess since I am unable to test it */
558 if (state->config->set_ts_params)
559 state->config->set_ts_params(fe, 1);
562 /* Set non-punctured clock for VSB */
563 if (state->config->set_ts_params)
564 state->config->set_ts_params(fe, 0);
571 if (fe->ops.tuner_ops.calc_regs) {
572 /* get tuning information */
573 fe->ops.tuner_ops.calc_regs(fe, buf, 5);
575 /* write frequency information */
576 nxt200x_writetuner(state, buf);
579 /* reset the agc now that tuning has been completed */
580 nxt200x_agc_reset(state);
582 /* set target power level */
583 switch (p->modulation) {
595 nxt200x_writebytes(state, 0x42, buf, 1);
598 switch (state->demod_chip) {
609 nxt200x_writebytes(state, 0x57, buf, 1);
611 /* write sdm1 input */
614 switch (state->demod_chip) {
616 nxt200x_writereg_multibyte(state, 0x58, buf, 2);
619 nxt200x_writebytes(state, 0x58, buf, 2);
626 /* write sdmx input */
627 switch (p->modulation) {
642 switch (state->demod_chip) {
644 nxt200x_writereg_multibyte(state, 0x5C, buf, 2);
647 nxt200x_writebytes(state, 0x5C, buf, 2);
654 /* write adc power lpf fc */
656 nxt200x_writebytes(state, 0x43, buf, 1);
658 if (state->demod_chip == NXT2004) {
662 nxt200x_writebytes(state, 0x46, buf, 2);
665 /* write accumulator2 input */
668 switch (state->demod_chip) {
670 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
673 nxt200x_writebytes(state, 0x4B, buf, 2);
682 nxt200x_writebytes(state, 0x4D, buf, 1);
684 /* write sdm12 lpf fc */
686 nxt200x_writebytes(state, 0x55, buf, 1);
688 /* write agc control reg */
690 nxt200x_writebytes(state, 0x41, buf, 1);
692 if (state->demod_chip == NXT2004) {
693 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
695 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
698 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
700 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
701 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
703 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
705 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
707 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
709 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
710 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
711 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
712 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
714 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
715 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
717 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
720 /* write agc ucgp0 */
721 switch (p->modulation) {
735 nxt200x_writebytes(state, 0x30, buf, 1);
737 /* write agc control reg */
739 nxt200x_writebytes(state, 0x41, buf, 1);
741 /* write accumulator2 input */
744 switch (state->demod_chip) {
746 nxt200x_writereg_multibyte(state, 0x49, buf, 2);
747 nxt200x_writereg_multibyte(state, 0x4B, buf, 2);
750 nxt200x_writebytes(state, 0x49, buf, 2);
751 nxt200x_writebytes(state, 0x4B, buf, 2);
758 /* write agc control reg */
760 nxt200x_writebytes(state, 0x41, buf, 1);
762 nxt200x_microcontroller_start(state);
764 if (state->demod_chip == NXT2004) {
765 nxt2004_microcontroller_init(state);
770 nxt200x_writebytes(state, 0x5C, buf, 2);
773 /* adjacent channel detection should be done here, but I don't
774 have any stations with this need so I cannot test it */
779 static int nxt200x_read_status(struct dvb_frontend *fe, enum fe_status *status)
781 struct nxt200x_state* state = fe->demodulator_priv;
783 nxt200x_readbytes(state, 0x31, &lock, 1);
787 *status |= FE_HAS_SIGNAL;
788 *status |= FE_HAS_CARRIER;
789 *status |= FE_HAS_VITERBI;
790 *status |= FE_HAS_SYNC;
791 *status |= FE_HAS_LOCK;
796 static int nxt200x_read_ber(struct dvb_frontend* fe, u32* ber)
798 struct nxt200x_state* state = fe->demodulator_priv;
801 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
803 *ber = ((b[0] << 8) + b[1]) * 8;
808 static int nxt200x_read_signal_strength(struct dvb_frontend* fe, u16* strength)
810 struct nxt200x_state* state = fe->demodulator_priv;
814 /* setup to read cluster variance */
816 nxt200x_writebytes(state, 0xA1, b, 1);
818 /* get multreg val */
819 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
821 temp = (b[0] << 8) | b[1];
822 *strength = ((0x7FFF - temp) & 0x0FFF) * 16;
827 static int nxt200x_read_snr(struct dvb_frontend* fe, u16* snr)
830 struct nxt200x_state* state = fe->demodulator_priv;
835 /* setup to read cluster variance */
837 nxt200x_writebytes(state, 0xA1, b, 1);
839 /* get multreg val from 0xA6 */
840 nxt200x_readreg_multibyte(state, 0xA6, b, 2);
842 temp = (b[0] << 8) | b[1];
843 temp2 = 0x7FFF - temp;
845 /* snr will be in db */
847 snrdb = 1000*24 + ( 1000*(30-24) * ( temp2 - 0x7F00 ) / ( 0x7FFF - 0x7F00 ) );
848 else if (temp2 > 0x7EC0)
849 snrdb = 1000*18 + ( 1000*(24-18) * ( temp2 - 0x7EC0 ) / ( 0x7F00 - 0x7EC0 ) );
850 else if (temp2 > 0x7C00)
851 snrdb = 1000*12 + ( 1000*(18-12) * ( temp2 - 0x7C00 ) / ( 0x7EC0 - 0x7C00 ) );
853 snrdb = 1000*0 + ( 1000*(12-0) * ( temp2 - 0 ) / ( 0x7C00 - 0 ) );
855 /* the value reported back from the frontend will be FFFF=32db 0000=0db */
856 *snr = snrdb * (0xFFFF/32000);
861 static int nxt200x_read_ucblocks(struct dvb_frontend* fe, u32* ucblocks)
863 struct nxt200x_state* state = fe->demodulator_priv;
866 nxt200x_readreg_multibyte(state, 0xE6, b, 3);
872 static int nxt200x_sleep(struct dvb_frontend* fe)
877 static int nxt2002_init(struct dvb_frontend* fe)
879 struct nxt200x_state* state = fe->demodulator_priv;
880 const struct firmware *fw;
884 /* request the firmware, this will block until someone uploads it */
885 pr_debug("%s: Waiting for firmware upload (%s)...\n",
886 __func__, NXT2002_DEFAULT_FIRMWARE);
887 ret = request_firmware(&fw, NXT2002_DEFAULT_FIRMWARE,
888 state->i2c->dev.parent);
889 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
891 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
896 ret = nxt2002_load_firmware(fe, fw);
897 release_firmware(fw);
899 pr_err("%s: Writing firmware to device failed\n", __func__);
902 pr_info("%s: Firmware upload complete\n", __func__);
904 /* Put the micro into reset */
905 nxt200x_microcontroller_stop(state);
907 /* ensure transfer is complete */
909 nxt200x_writebytes(state, 0x2B, buf, 1);
911 /* Put the micro into reset for real this time */
912 nxt200x_microcontroller_stop(state);
914 /* soft reset everything (agc,frontend,eq,fec)*/
916 nxt200x_writebytes(state, 0x08, buf, 1);
918 nxt200x_writebytes(state, 0x08, buf, 1);
920 /* write agc sdm configure */
922 nxt200x_writebytes(state, 0x57, buf, 1);
924 /* write mod output format */
926 nxt200x_writebytes(state, 0x09, buf, 1);
928 /* write fec mpeg mode */
931 nxt200x_writebytes(state, 0xE9, buf, 2);
933 /* write mux selection */
935 nxt200x_writebytes(state, 0xCC, buf, 1);
940 static int nxt2004_init(struct dvb_frontend* fe)
942 struct nxt200x_state* state = fe->demodulator_priv;
943 const struct firmware *fw;
949 nxt200x_writebytes(state, 0x1E, buf, 1);
951 /* request the firmware, this will block until someone uploads it */
952 pr_debug("%s: Waiting for firmware upload (%s)...\n",
953 __func__, NXT2004_DEFAULT_FIRMWARE);
954 ret = request_firmware(&fw, NXT2004_DEFAULT_FIRMWARE,
955 state->i2c->dev.parent);
956 pr_debug("%s: Waiting for firmware upload(2)...\n", __func__);
958 pr_err("%s: No firmware uploaded (timeout or file not found?)\n",
963 ret = nxt2004_load_firmware(fe, fw);
964 release_firmware(fw);
966 pr_err("%s: Writing firmware to device failed\n", __func__);
969 pr_info("%s: Firmware upload complete\n", __func__);
971 /* ensure transfer is complete */
973 nxt200x_writebytes(state, 0x19, buf, 1);
975 nxt2004_microcontroller_init(state);
976 nxt200x_microcontroller_stop(state);
977 nxt200x_microcontroller_stop(state);
978 nxt2004_microcontroller_init(state);
979 nxt200x_microcontroller_stop(state);
981 /* soft reset everything (agc,frontend,eq,fec)*/
983 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
985 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
987 /* write agc sdm configure */
989 nxt200x_writebytes(state, 0x57, buf, 1);
994 nxt200x_writebytes(state, 0x35, buf, 2);
996 nxt200x_writebytes(state, 0x34, buf, 1);
998 nxt200x_writebytes(state, 0x21, buf, 1);
1002 nxt200x_writebytes(state, 0x0A, buf, 1);
1006 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1008 /* write fec mpeg mode */
1011 nxt200x_writebytes(state, 0xE9, buf, 2);
1013 /* write mux selection */
1015 nxt200x_writebytes(state, 0xCC, buf, 1);
1018 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1020 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1023 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1025 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1026 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1028 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1031 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1033 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1035 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1036 buf[0] = 0x31; buf[1] = 0x5E; buf[2] = 0x66;
1037 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1039 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1041 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1042 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1044 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1046 nxt200x_readbytes(state, 0x10, buf, 1);
1048 nxt200x_writebytes(state, 0x10, buf, 1);
1049 nxt200x_readbytes(state, 0x0A, buf, 1);
1051 nxt200x_writebytes(state, 0x0A, buf, 1);
1053 nxt2004_microcontroller_init(state);
1056 nxt200x_writebytes(state, 0x0A, buf, 1);
1058 nxt200x_writebytes(state, 0xE9, buf, 1);
1060 nxt200x_writebytes(state, 0xEA, buf, 1);
1062 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1064 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1065 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1067 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1070 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1072 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1073 nxt200x_readreg_multibyte(state, 0x08, buf, 1);
1075 nxt200x_writereg_multibyte(state, 0x08, buf, 1);
1077 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1079 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1081 nxt200x_writereg_multibyte(state, 0x81, buf, 1);
1082 buf[0] = 0x80; buf[1] = 0x00; buf[2] = 0x00;
1083 nxt200x_writereg_multibyte(state, 0x82, buf, 3);
1085 nxt200x_readreg_multibyte(state, 0x88, buf, 1);
1087 nxt200x_writereg_multibyte(state, 0x88, buf, 1);
1089 nxt200x_readreg_multibyte(state, 0x80, buf, 1);
1091 nxt200x_writereg_multibyte(state, 0x80, buf, 1);
1093 /* initialize tuner */
1094 nxt200x_readbytes(state, 0x10, buf, 1);
1096 nxt200x_writebytes(state, 0x10, buf, 1);
1098 nxt200x_writebytes(state, 0x13, buf, 1);
1100 nxt200x_writebytes(state, 0x16, buf, 1);
1102 nxt200x_writebytes(state, 0x14, buf, 1);
1104 nxt200x_writebytes(state, 0x14, buf, 1);
1105 nxt200x_writebytes(state, 0x17, buf, 1);
1106 nxt200x_writebytes(state, 0x14, buf, 1);
1107 nxt200x_writebytes(state, 0x17, buf, 1);
1112 static int nxt200x_init(struct dvb_frontend* fe)
1114 struct nxt200x_state* state = fe->demodulator_priv;
1117 if (!state->initialised) {
1118 switch (state->demod_chip) {
1120 ret = nxt2002_init(fe);
1123 ret = nxt2004_init(fe);
1129 state->initialised = 1;
1134 static int nxt200x_get_tune_settings(struct dvb_frontend* fe, struct dvb_frontend_tune_settings* fesettings)
1136 fesettings->min_delay_ms = 500;
1137 fesettings->step_size = 0;
1138 fesettings->max_drift = 0;
1142 static void nxt200x_release(struct dvb_frontend* fe)
1144 struct nxt200x_state* state = fe->demodulator_priv;
1148 static const struct dvb_frontend_ops nxt200x_ops;
1150 struct dvb_frontend* nxt200x_attach(const struct nxt200x_config* config,
1151 struct i2c_adapter* i2c)
1153 struct nxt200x_state* state = NULL;
1154 u8 buf [] = {0,0,0,0,0};
1156 /* allocate memory for the internal state */
1157 state = kzalloc(sizeof(struct nxt200x_state), GFP_KERNEL);
1161 /* setup the state */
1162 state->config = config;
1164 state->initialised = 0;
1167 nxt200x_readbytes(state, 0x00, buf, 5);
1168 dprintk("NXT info: %*ph\n", 5, buf);
1170 /* set demod chip */
1173 state->demod_chip = NXT2002;
1174 pr_info("NXT2002 Detected\n");
1177 state->demod_chip = NXT2004;
1178 pr_info("NXT2004 Detected\n");
1184 /* make sure demod chip is supported */
1185 switch (state->demod_chip) {
1187 if (buf[0] != 0x04) goto error; /* device id */
1188 if (buf[1] != 0x02) goto error; /* fab id */
1189 if (buf[2] != 0x11) goto error; /* month */
1190 if (buf[3] != 0x20) goto error; /* year msb */
1191 if (buf[4] != 0x00) goto error; /* year lsb */
1194 if (buf[0] != 0x05) goto error; /* device id */
1200 /* create dvb_frontend */
1201 memcpy(&state->frontend.ops, &nxt200x_ops, sizeof(struct dvb_frontend_ops));
1202 state->frontend.demodulator_priv = state;
1203 return &state->frontend;
1207 pr_err("Unknown/Unsupported NXT chip: %*ph\n", 5, buf);
1211 static const struct dvb_frontend_ops nxt200x_ops = {
1212 .delsys = { SYS_ATSC, SYS_DVBC_ANNEX_B },
1214 .name = "Nextwave NXT200X VSB/QAM frontend",
1215 .frequency_min = 54000000,
1216 .frequency_max = 860000000,
1217 .frequency_stepsize = 166666, /* stepsize is just a guess */
1218 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 | FE_CAN_FEC_3_4 |
1219 FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 | FE_CAN_FEC_AUTO |
1220 FE_CAN_8VSB | FE_CAN_QAM_64 | FE_CAN_QAM_256
1223 .release = nxt200x_release,
1225 .init = nxt200x_init,
1226 .sleep = nxt200x_sleep,
1228 .set_frontend = nxt200x_setup_frontend_parameters,
1229 .get_tune_settings = nxt200x_get_tune_settings,
1231 .read_status = nxt200x_read_status,
1232 .read_ber = nxt200x_read_ber,
1233 .read_signal_strength = nxt200x_read_signal_strength,
1234 .read_snr = nxt200x_read_snr,
1235 .read_ucblocks = nxt200x_read_ucblocks,
1238 module_param(debug, int, 0644);
1239 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
1241 MODULE_DESCRIPTION("NXT200X (ATSC 8VSB & ITU-T J.83 AnnexB 64/256 QAM) Demodulator Driver");
1242 MODULE_AUTHOR("Kirk Lapray, Michael Krufky, Jean-Francois Thibert, and Taylor Jacob");
1243 MODULE_LICENSE("GPL");
1245 EXPORT_SYMBOL(nxt200x_attach);