2 * Driver for Zarlink DVB-T ZL10353 demodulator
4 * Copyright (C) 2006, 2007 Christopher Pascoe <c.pascoe@itee.uq.edu.au>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/kernel.h>
19 #include <linux/module.h>
20 #include <linux/init.h>
21 #include <linux/delay.h>
22 #include <linux/string.h>
23 #include <linux/slab.h>
24 #include <asm/div64.h>
26 #include "dvb_frontend.h"
27 #include "zl10353_priv.h"
30 struct zl10353_state {
31 struct i2c_adapter *i2c;
32 struct dvb_frontend frontend;
34 struct zl10353_config config;
42 #define dprintk(args...) \
44 if (debug) printk(KERN_DEBUG "zl10353: " args); \
47 static int debug_regs;
49 static int zl10353_single_write(struct dvb_frontend *fe, u8 reg, u8 val)
51 struct zl10353_state *state = fe->demodulator_priv;
52 u8 buf[2] = { reg, val };
53 struct i2c_msg msg = { .addr = state->config.demod_address, .flags = 0,
54 .buf = buf, .len = 2 };
55 int err = i2c_transfer(state->i2c, &msg, 1);
57 printk("zl10353: write to reg %x failed (err = %d)!\n", reg, err);
63 static int zl10353_write(struct dvb_frontend *fe, const u8 ibuf[], int ilen)
66 for (i = 0; i < ilen - 1; i++)
67 if ((err = zl10353_single_write(fe, ibuf[0] + i, ibuf[i + 1])))
73 static int zl10353_read_register(struct zl10353_state *state, u8 reg)
78 struct i2c_msg msg[2] = { { .addr = state->config.demod_address,
80 .buf = b0, .len = 1 },
81 { .addr = state->config.demod_address,
83 .buf = b1, .len = 1 } };
85 ret = i2c_transfer(state->i2c, msg, 2);
88 printk("%s: readreg error (reg=%d, ret==%i)\n",
96 static void zl10353_dump_regs(struct dvb_frontend *fe)
98 struct zl10353_state *state = fe->demodulator_priv;
102 /* Dump all registers. */
103 for (reg = 0; ; reg++) {
106 printk(KERN_CONT "\n");
107 printk(KERN_DEBUG "%02x:", reg);
109 ret = zl10353_read_register(state, reg);
111 printk(KERN_CONT " %02x", (u8)ret);
113 printk(KERN_CONT " --");
117 printk(KERN_CONT "\n");
120 static void zl10353_calc_nominal_rate(struct dvb_frontend *fe,
124 struct zl10353_state *state = fe->demodulator_priv;
125 u32 adc_clock = 450560; /* 45.056 MHz */
127 u8 bw = bandwidth / 1000000;
129 if (state->config.adc_clock)
130 adc_clock = state->config.adc_clock;
132 value = (u64)10 * (1 << 23) / 7 * 125;
133 value = (bw * value) + adc_clock / 2;
134 *nominal_rate = div_u64(value, adc_clock);
136 dprintk("%s: bw %d, adc_clock %d => 0x%x\n",
137 __func__, bw, adc_clock, *nominal_rate);
140 static void zl10353_calc_input_freq(struct dvb_frontend *fe,
143 struct zl10353_state *state = fe->demodulator_priv;
144 u32 adc_clock = 450560; /* 45.056 MHz */
145 int if2 = 361667; /* 36.1667 MHz */
149 if (state->config.adc_clock)
150 adc_clock = state->config.adc_clock;
151 if (state->config.if2)
152 if2 = state->config.if2;
154 if (adc_clock >= if2 * 2)
157 ife = adc_clock - (if2 % adc_clock);
158 if (ife > adc_clock / 2)
159 ife = adc_clock - ife;
161 value = div_u64((u64)65536 * ife + adc_clock / 2, adc_clock);
162 *input_freq = -value;
164 dprintk("%s: if2 %d, ife %d, adc_clock %d => %d / 0x%x\n",
165 __func__, if2, ife, adc_clock, -(int)value, *input_freq);
168 static int zl10353_sleep(struct dvb_frontend *fe)
170 static u8 zl10353_softdown[] = { 0x50, 0x0C, 0x44 };
172 zl10353_write(fe, zl10353_softdown, sizeof(zl10353_softdown));
176 static int zl10353_set_parameters(struct dvb_frontend *fe)
178 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
179 struct zl10353_state *state = fe->demodulator_priv;
180 u16 nominal_rate, input_freq;
181 u8 pllbuf[6] = { 0x67 }, acq_ctl = 0;
184 state->frequency = c->frequency;
186 zl10353_single_write(fe, RESET, 0x80);
188 zl10353_single_write(fe, 0xEA, 0x01);
190 zl10353_single_write(fe, 0xEA, 0x00);
192 zl10353_single_write(fe, AGC_TARGET, 0x28);
194 if (c->transmission_mode != TRANSMISSION_MODE_AUTO)
196 if (c->guard_interval != GUARD_INTERVAL_AUTO)
198 zl10353_single_write(fe, ACQ_CTL, acq_ctl);
200 switch (c->bandwidth_hz) {
202 /* These are extrapolated from the 7 and 8MHz values */
203 zl10353_single_write(fe, MCLK_RATIO, 0x97);
204 zl10353_single_write(fe, 0x64, 0x34);
205 zl10353_single_write(fe, 0xcc, 0xdd);
208 zl10353_single_write(fe, MCLK_RATIO, 0x86);
209 zl10353_single_write(fe, 0x64, 0x35);
210 zl10353_single_write(fe, 0xcc, 0x73);
213 c->bandwidth_hz = 8000000;
216 zl10353_single_write(fe, MCLK_RATIO, 0x75);
217 zl10353_single_write(fe, 0x64, 0x36);
218 zl10353_single_write(fe, 0xcc, 0x73);
221 zl10353_calc_nominal_rate(fe, c->bandwidth_hz, &nominal_rate);
222 zl10353_single_write(fe, TRL_NOMINAL_RATE_1, msb(nominal_rate));
223 zl10353_single_write(fe, TRL_NOMINAL_RATE_0, lsb(nominal_rate));
224 state->bandwidth = c->bandwidth_hz;
226 zl10353_calc_input_freq(fe, &input_freq);
227 zl10353_single_write(fe, INPUT_FREQ_1, msb(input_freq));
228 zl10353_single_write(fe, INPUT_FREQ_0, lsb(input_freq));
230 /* Hint at TPS settings */
231 switch (c->code_rate_HP) {
251 switch (c->code_rate_LP) {
268 if (c->hierarchy == HIERARCHY_AUTO ||
269 c->hierarchy == HIERARCHY_NONE)
275 switch (c->modulation) {
289 switch (c->transmission_mode) {
290 case TRANSMISSION_MODE_2K:
291 case TRANSMISSION_MODE_AUTO:
293 case TRANSMISSION_MODE_8K:
300 switch (c->guard_interval) {
301 case GUARD_INTERVAL_1_32:
302 case GUARD_INTERVAL_AUTO:
304 case GUARD_INTERVAL_1_16:
307 case GUARD_INTERVAL_1_8:
310 case GUARD_INTERVAL_1_4:
317 switch (c->hierarchy) {
334 zl10353_single_write(fe, TPS_GIVEN_1, msb(tps));
335 zl10353_single_write(fe, TPS_GIVEN_0, lsb(tps));
337 if (fe->ops.i2c_gate_ctrl)
338 fe->ops.i2c_gate_ctrl(fe, 0);
341 * If there is no tuner attached to the secondary I2C bus, we call
342 * set_params to program a potential tuner attached somewhere else.
343 * Otherwise, we update the PLL registers via calc_regs.
345 if (state->config.no_tuner) {
346 if (fe->ops.tuner_ops.set_params) {
347 fe->ops.tuner_ops.set_params(fe);
348 if (fe->ops.i2c_gate_ctrl)
349 fe->ops.i2c_gate_ctrl(fe, 0);
351 } else if (fe->ops.tuner_ops.calc_regs) {
352 fe->ops.tuner_ops.calc_regs(fe, pllbuf + 1, 5);
354 zl10353_write(fe, pllbuf, sizeof(pllbuf));
357 zl10353_single_write(fe, 0x5F, 0x13);
359 /* If no attached tuner or invalid PLL registers, just start the FSM. */
360 if (state->config.no_tuner || fe->ops.tuner_ops.calc_regs == NULL)
361 zl10353_single_write(fe, FSM_GO, 0x01);
363 zl10353_single_write(fe, TUNER_GO, 0x01);
368 static int zl10353_get_parameters(struct dvb_frontend *fe,
369 struct dtv_frontend_properties *c)
371 struct zl10353_state *state = fe->demodulator_priv;
374 static const u8 tps_fec_to_api[8] = {
385 s6 = zl10353_read_register(state, STATUS_6);
386 s9 = zl10353_read_register(state, STATUS_9);
387 if (s6 < 0 || s9 < 0)
389 if ((s6 & (1 << 5)) == 0 || (s9 & (1 << 4)) == 0)
390 return -EINVAL; /* no FE or TPS lock */
392 tps = zl10353_read_register(state, TPS_RECEIVED_1) << 8 |
393 zl10353_read_register(state, TPS_RECEIVED_0);
395 c->code_rate_HP = tps_fec_to_api[(tps >> 7) & 7];
396 c->code_rate_LP = tps_fec_to_api[(tps >> 4) & 7];
398 switch ((tps >> 13) & 3) {
400 c->modulation = QPSK;
403 c->modulation = QAM_16;
406 c->modulation = QAM_64;
409 c->modulation = QAM_AUTO;
413 c->transmission_mode = (tps & 0x01) ? TRANSMISSION_MODE_8K :
414 TRANSMISSION_MODE_2K;
416 switch ((tps >> 2) & 3) {
418 c->guard_interval = GUARD_INTERVAL_1_32;
421 c->guard_interval = GUARD_INTERVAL_1_16;
424 c->guard_interval = GUARD_INTERVAL_1_8;
427 c->guard_interval = GUARD_INTERVAL_1_4;
430 c->guard_interval = GUARD_INTERVAL_AUTO;
434 switch ((tps >> 10) & 7) {
436 c->hierarchy = HIERARCHY_NONE;
439 c->hierarchy = HIERARCHY_1;
442 c->hierarchy = HIERARCHY_2;
445 c->hierarchy = HIERARCHY_4;
448 c->hierarchy = HIERARCHY_AUTO;
452 c->frequency = state->frequency;
453 c->bandwidth_hz = state->bandwidth;
454 c->inversion = INVERSION_AUTO;
459 static int zl10353_read_status(struct dvb_frontend *fe, enum fe_status *status)
461 struct zl10353_state *state = fe->demodulator_priv;
464 if ((s6 = zl10353_read_register(state, STATUS_6)) < 0)
466 if ((s7 = zl10353_read_register(state, STATUS_7)) < 0)
468 if ((s8 = zl10353_read_register(state, STATUS_8)) < 0)
473 *status |= FE_HAS_CARRIER;
475 *status |= FE_HAS_VITERBI;
477 *status |= FE_HAS_LOCK;
479 *status |= FE_HAS_SYNC;
481 *status |= FE_HAS_SIGNAL;
483 if ((*status & (FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC)) !=
484 (FE_HAS_CARRIER | FE_HAS_VITERBI | FE_HAS_SYNC))
485 *status &= ~FE_HAS_LOCK;
490 static int zl10353_read_ber(struct dvb_frontend *fe, u32 *ber)
492 struct zl10353_state *state = fe->demodulator_priv;
494 *ber = zl10353_read_register(state, RS_ERR_CNT_2) << 16 |
495 zl10353_read_register(state, RS_ERR_CNT_1) << 8 |
496 zl10353_read_register(state, RS_ERR_CNT_0);
501 static int zl10353_read_signal_strength(struct dvb_frontend *fe, u16 *strength)
503 struct zl10353_state *state = fe->demodulator_priv;
505 u16 signal = zl10353_read_register(state, AGC_GAIN_1) << 10 |
506 zl10353_read_register(state, AGC_GAIN_0) << 2 | 3;
513 static int zl10353_read_snr(struct dvb_frontend *fe, u16 *snr)
515 struct zl10353_state *state = fe->demodulator_priv;
519 zl10353_dump_regs(fe);
521 _snr = zl10353_read_register(state, SNR);
522 *snr = 10 * _snr / 8;
527 static int zl10353_read_ucblocks(struct dvb_frontend *fe, u32 *ucblocks)
529 struct zl10353_state *state = fe->demodulator_priv;
532 ubl = zl10353_read_register(state, RS_UBC_1) << 8 |
533 zl10353_read_register(state, RS_UBC_0);
535 state->ucblocks += ubl;
536 *ucblocks = state->ucblocks;
541 static int zl10353_get_tune_settings(struct dvb_frontend *fe,
542 struct dvb_frontend_tune_settings
545 fe_tune_settings->min_delay_ms = 1000;
546 fe_tune_settings->step_size = 0;
547 fe_tune_settings->max_drift = 0;
552 static int zl10353_init(struct dvb_frontend *fe)
554 struct zl10353_state *state = fe->demodulator_priv;
555 u8 zl10353_reset_attach[6] = { 0x50, 0x03, 0x64, 0x46, 0x15, 0x0F };
558 zl10353_dump_regs(fe);
559 if (state->config.parallel_ts)
560 zl10353_reset_attach[2] &= ~0x20;
561 if (state->config.clock_ctl_1)
562 zl10353_reset_attach[3] = state->config.clock_ctl_1;
563 if (state->config.pll_0)
564 zl10353_reset_attach[4] = state->config.pll_0;
566 /* Do a "hard" reset if not already done */
567 if (zl10353_read_register(state, 0x50) != zl10353_reset_attach[1] ||
568 zl10353_read_register(state, 0x51) != zl10353_reset_attach[2]) {
569 zl10353_write(fe, zl10353_reset_attach,
570 sizeof(zl10353_reset_attach));
572 zl10353_dump_regs(fe);
578 static int zl10353_i2c_gate_ctrl(struct dvb_frontend* fe, int enable)
580 struct zl10353_state *state = fe->demodulator_priv;
583 if (state->config.disable_i2c_gate_ctrl) {
584 /* No tuner attached to the internal I2C bus */
585 /* If set enable I2C bridge, the main I2C bus stopped hardly */
592 return zl10353_single_write(fe, 0x62, val);
595 static void zl10353_release(struct dvb_frontend *fe)
597 struct zl10353_state *state = fe->demodulator_priv;
601 static const struct dvb_frontend_ops zl10353_ops;
603 struct dvb_frontend *zl10353_attach(const struct zl10353_config *config,
604 struct i2c_adapter *i2c)
606 struct zl10353_state *state = NULL;
609 /* allocate memory for the internal state */
610 state = kzalloc(sizeof(struct zl10353_state), GFP_KERNEL);
614 /* setup the state */
616 memcpy(&state->config, config, sizeof(struct zl10353_config));
618 /* check if the demod is there */
619 id = zl10353_read_register(state, CHIP_ID);
620 if ((id != ID_ZL10353) && (id != ID_CE6230) && (id != ID_CE6231))
623 /* create dvb_frontend */
624 memcpy(&state->frontend.ops, &zl10353_ops, sizeof(struct dvb_frontend_ops));
625 state->frontend.demodulator_priv = state;
627 return &state->frontend;
633 static const struct dvb_frontend_ops zl10353_ops = {
634 .delsys = { SYS_DVBT },
636 .name = "Zarlink ZL10353 DVB-T",
637 .frequency_min = 174000000,
638 .frequency_max = 862000000,
639 .frequency_stepsize = 166667,
640 .frequency_tolerance = 0,
641 .caps = FE_CAN_FEC_1_2 | FE_CAN_FEC_2_3 |
642 FE_CAN_FEC_3_4 | FE_CAN_FEC_5_6 | FE_CAN_FEC_7_8 |
644 FE_CAN_QPSK | FE_CAN_QAM_16 | FE_CAN_QAM_64 | FE_CAN_QAM_AUTO |
645 FE_CAN_TRANSMISSION_MODE_AUTO | FE_CAN_GUARD_INTERVAL_AUTO |
646 FE_CAN_HIERARCHY_AUTO | FE_CAN_RECOVER |
650 .release = zl10353_release,
652 .init = zl10353_init,
653 .sleep = zl10353_sleep,
654 .i2c_gate_ctrl = zl10353_i2c_gate_ctrl,
655 .write = zl10353_write,
657 .set_frontend = zl10353_set_parameters,
658 .get_frontend = zl10353_get_parameters,
659 .get_tune_settings = zl10353_get_tune_settings,
661 .read_status = zl10353_read_status,
662 .read_ber = zl10353_read_ber,
663 .read_signal_strength = zl10353_read_signal_strength,
664 .read_snr = zl10353_read_snr,
665 .read_ucblocks = zl10353_read_ucblocks,
668 module_param(debug, int, 0644);
669 MODULE_PARM_DESC(debug, "Turn on/off frontend debugging (default:off).");
671 module_param(debug_regs, int, 0644);
672 MODULE_PARM_DESC(debug_regs, "Turn on/off frontend register dumps (default:off).");
674 MODULE_DESCRIPTION("Zarlink ZL10353 DVB-T demodulator driver");
675 MODULE_AUTHOR("Chris Pascoe");
676 MODULE_LICENSE("GPL");
678 EXPORT_SYMBOL(zl10353_attach);