drivers/media/i2c/adv7604.c

   1 /*
   2  * adv7604 - Analog Devices ADV7604 video decoder driver
   3  *
   4  * Copyright 2012 Cisco Systems, Inc. and/or its affiliates. All rights reserved.
   5  *
   6  * This program is free software; you may redistribute it and/or modify
   7  * it under the terms of the GNU General Public License as published by
   8  * the Free Software Foundation; version 2 of the License.
   9  *
  10  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
  11  * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
  12  * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
  13  * NONINFRINGEMENT. IN NO EVENT SHALL THE AUTHORS OR COPYRIGHT HOLDERS
  14  * BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN
  15  * ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
  16  * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE
  17  * SOFTWARE.
  18  *
  19  */
  20
  21 /*
  22  * References (c = chapter, p = page):
  23  * REF_01 - Analog devices, ADV7604, Register Settings Recommendations,
  24  *              Revision 2.5, June 2010
  25  * REF_02 - Analog devices, Register map documentation, Documentation of
  26  *              the register maps, Software manual, Rev. F, June 2010
  27  * REF_03 - Analog devices, ADV7604, Hardware Manual, Rev. F, August 2010
  28  */
  29
  30
  31 #include <linux/kernel.h>
  32 #include <linux/module.h>
  33 #include <linux/slab.h>
  34 #include <linux/i2c.h>
  35 #include <linux/delay.h>
  36 #include <linux/videodev2.h>
  37 #include <linux/workqueue.h>
  38 #include <linux/v4l2-dv-timings.h>
  39 #include <media/v4l2-device.h>
  40 #include <media/v4l2-ctrls.h>
  41 #include <media/v4l2-chip-ident.h>
  42 #include <media/adv7604.h>
  43
  44 static int debug;
  45 module_param(debug, int, 0644);
  46 MODULE_PARM_DESC(debug, "debug level (0-2)");
  47
  48 MODULE_DESCRIPTION("Analog Devices ADV7604 video decoder driver");
  49 MODULE_AUTHOR("Hans Verkuil <hans.verkuil@cisco.com>");
  50 MODULE_AUTHOR("Mats Randgaard <mats.randgaard@cisco.com>");
  51 MODULE_LICENSE("GPL");
  52
  53 /* ADV7604 system clock frequency */
  54 #define ADV7604_fsc (28636360)
  55
  56 #define DIGITAL_INPUT ((state->prim_mode == ADV7604_PRIM_MODE_HDMI_COMP) || \
  57                         (state->prim_mode == ADV7604_PRIM_MODE_HDMI_GR))
  58
  59 /*
  60  **********************************************************************
  61  *
  62  *  Arrays with configuration parameters for the ADV7604
  63  *
  64  **********************************************************************
  65  */
  66 struct adv7604_state {
  67         struct adv7604_platform_data pdata;
  68         struct v4l2_subdev sd;
  69         struct media_pad pad;
  70         struct v4l2_ctrl_handler hdl;
  71         enum adv7604_prim_mode prim_mode;
  72         struct v4l2_dv_timings timings;
  73         u8 edid[256];
  74         unsigned edid_blocks;
  75         struct v4l2_fract aspect_ratio;
  76         u32 rgb_quantization_range;
  77         struct workqueue_struct *work_queues;
  78         struct delayed_work delayed_work_enable_hotplug;
  79         bool connector_hdmi;
  80
  81         /* i2c clients */
  82         struct i2c_client *i2c_avlink;
  83         struct i2c_client *i2c_cec;
  84         struct i2c_client *i2c_infoframe;
  85         struct i2c_client *i2c_esdp;
  86         struct i2c_client *i2c_dpp;
  87         struct i2c_client *i2c_afe;
  88         struct i2c_client *i2c_repeater;
  89         struct i2c_client *i2c_edid;
  90         struct i2c_client *i2c_hdmi;
  91         struct i2c_client *i2c_test;
  92         struct i2c_client *i2c_cp;
  93         struct i2c_client *i2c_vdp;
  94
  95         /* controls */
  96         struct v4l2_ctrl *detect_tx_5v_ctrl;
  97         struct v4l2_ctrl *analog_sampling_phase_ctrl;
  98         struct v4l2_ctrl *free_run_color_manual_ctrl;
  99         struct v4l2_ctrl *free_run_color_ctrl;
 100         struct v4l2_ctrl *rgb_quantization_range_ctrl;
 101 };
 102
 103 /* Supported CEA and DMT timings */
 104 static const struct v4l2_dv_timings adv7604_timings[] = {
 105         V4L2_DV_BT_CEA_720X480P59_94,
 106         V4L2_DV_BT_CEA_720X576P50,
 107         V4L2_DV_BT_CEA_1280X720P24,
 108         V4L2_DV_BT_CEA_1280X720P25,
 109         V4L2_DV_BT_CEA_1280X720P30,
 110         V4L2_DV_BT_CEA_1280X720P50,
 111         V4L2_DV_BT_CEA_1280X720P60,
 112         V4L2_DV_BT_CEA_1920X1080P24,
 113         V4L2_DV_BT_CEA_1920X1080P25,
 114         V4L2_DV_BT_CEA_1920X1080P30,
 115         V4L2_DV_BT_CEA_1920X1080P50,
 116         V4L2_DV_BT_CEA_1920X1080P60,
 117
 118         V4L2_DV_BT_DMT_640X350P85,
 119         V4L2_DV_BT_DMT_640X400P85,
 120         V4L2_DV_BT_DMT_720X400P85,
 121         V4L2_DV_BT_DMT_640X480P60,
 122         V4L2_DV_BT_DMT_640X480P72,
 123         V4L2_DV_BT_DMT_640X480P75,
 124         V4L2_DV_BT_DMT_640X480P85,
 125         V4L2_DV_BT_DMT_800X600P56,
 126         V4L2_DV_BT_DMT_800X600P60,
 127         V4L2_DV_BT_DMT_800X600P72,
 128         V4L2_DV_BT_DMT_800X600P75,
 129         V4L2_DV_BT_DMT_800X600P85,
 130         V4L2_DV_BT_DMT_848X480P60,
 131         V4L2_DV_BT_DMT_1024X768P60,
 132         V4L2_DV_BT_DMT_1024X768P70,
 133         V4L2_DV_BT_DMT_1024X768P75,
 134         V4L2_DV_BT_DMT_1024X768P85,
 135         V4L2_DV_BT_DMT_1152X864P75,
 136         V4L2_DV_BT_DMT_1280X768P60_RB,
 137         V4L2_DV_BT_DMT_1280X768P60,
 138         V4L2_DV_BT_DMT_1280X768P75,
 139         V4L2_DV_BT_DMT_1280X768P85,
 140         V4L2_DV_BT_DMT_1280X800P60_RB,
 141         V4L2_DV_BT_DMT_1280X800P60,
 142         V4L2_DV_BT_DMT_1280X800P75,
 143         V4L2_DV_BT_DMT_1280X800P85,
 144         V4L2_DV_BT_DMT_1280X960P60,
 145         V4L2_DV_BT_DMT_1280X960P85,
 146         V4L2_DV_BT_DMT_1280X1024P60,
 147         V4L2_DV_BT_DMT_1280X1024P75,
 148         V4L2_DV_BT_DMT_1280X1024P85,
 149         V4L2_DV_BT_DMT_1360X768P60,
 150         V4L2_DV_BT_DMT_1400X1050P60_RB,
 151         V4L2_DV_BT_DMT_1400X1050P60,
 152         V4L2_DV_BT_DMT_1400X1050P75,
 153         V4L2_DV_BT_DMT_1400X1050P85,
 154         V4L2_DV_BT_DMT_1440X900P60_RB,
 155         V4L2_DV_BT_DMT_1440X900P60,
 156         V4L2_DV_BT_DMT_1600X1200P60,
 157         V4L2_DV_BT_DMT_1680X1050P60_RB,
 158         V4L2_DV_BT_DMT_1680X1050P60,
 159         V4L2_DV_BT_DMT_1792X1344P60,
 160         V4L2_DV_BT_DMT_1856X1392P60,
 161         V4L2_DV_BT_DMT_1920X1200P60_RB,
 162         V4L2_DV_BT_DMT_1366X768P60,
 163         V4L2_DV_BT_DMT_1920X1080P60,
 164         { },
 165 };
 166
 167 /* ----------------------------------------------------------------------- */
 168
 169 static inline struct adv7604_state *to_state(struct v4l2_subdev *sd)
 170 {
 171         return container_of(sd, struct adv7604_state, sd);
 172 }
 173
 174 static inline struct v4l2_subdev *to_sd(struct v4l2_ctrl *ctrl)
 175 {
 176         return &container_of(ctrl->handler, struct adv7604_state, hdl)->sd;
 177 }
 178
 179 static inline unsigned hblanking(const struct v4l2_bt_timings *t)
 180 {
 181         return t->hfrontporch + t->hsync + t->hbackporch;
 182 }
 183
 184 static inline unsigned htotal(const struct v4l2_bt_timings *t)
 185 {
 186         return t->width + t->hfrontporch + t->hsync + t->hbackporch;
 187 }
 188
 189 static inline unsigned vblanking(const struct v4l2_bt_timings *t)
 190 {
 191         return t->vfrontporch + t->vsync + t->vbackporch;
 192 }
 193
 194 static inline unsigned vtotal(const struct v4l2_bt_timings *t)
 195 {
 196         return t->height + t->vfrontporch + t->vsync + t->vbackporch;
 197 }
 198
 199 /* ----------------------------------------------------------------------- */
 200
 201 static s32 adv_smbus_read_byte_data_check(struct i2c_client *client,
 202                 u8 command, bool check)
 203 {
 204         union i2c_smbus_data data;
 205
 206         if (!i2c_smbus_xfer(client->adapter, client->addr, client->flags,
 207                         I2C_SMBUS_READ, command,
 208                         I2C_SMBUS_BYTE_DATA, &data))
 209                 return data.byte;
 210         if (check)
 211                 v4l_err(client, "error reading %02x, %02x\n",
 212                                 client->addr, command);
 213         return -EIO;
 214 }
 215
 216 static s32 adv_smbus_read_byte_data(struct i2c_client *client, u8 command)
 217 {
 218         return adv_smbus_read_byte_data_check(client, command, true);
 219 }
 220
 221 static s32 adv_smbus_write_byte_data(struct i2c_client *client,
 222                                         u8 command, u8 value)
 223 {
 224         union i2c_smbus_data data;
 225         int err;
 226         int i;
 227
 228         data.byte = value;
 229         for (i = 0; i < 3; i++) {
 230                 err = i2c_smbus_xfer(client->adapter, client->addr,
 231                                 client->flags,
 232                                 I2C_SMBUS_WRITE, command,
 233                                 I2C_SMBUS_BYTE_DATA, &data);
 234                 if (!err)
 235                         break;
 236         }
 237         if (err < 0)
 238                 v4l_err(client, "error writing %02x, %02x, %02x\n",
 239                                 client->addr, command, value);
 240         return err;
 241 }
 242
 243 static s32 adv_smbus_write_i2c_block_data(struct i2c_client *client,
 244                u8 command, unsigned length, const u8 *values)
 245 {
 246         union i2c_smbus_data data;
 247
 248         if (length > I2C_SMBUS_BLOCK_MAX)
 249                 length = I2C_SMBUS_BLOCK_MAX;
 250         data.block[0] = length;
 251         memcpy(data.block + 1, values, length);
 252         return i2c_smbus_xfer(client->adapter, client->addr, client->flags,
 253                               I2C_SMBUS_WRITE, command,
 254                               I2C_SMBUS_I2C_BLOCK_DATA, &data);
 255 }
 256
 257 /* ----------------------------------------------------------------------- */
 258
 259 static inline int io_read(struct v4l2_subdev *sd, u8 reg)
 260 {
 261         struct i2c_client *client = v4l2_get_subdevdata(sd);
 262
 263         return adv_smbus_read_byte_data(client, reg);
 264 }
 265
 266 static inline int io_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 267 {
 268         struct i2c_client *client = v4l2_get_subdevdata(sd);
 269
 270         return adv_smbus_write_byte_data(client, reg, val);
 271 }
 272
 273 static inline int io_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
 274 {
 275         return io_write(sd, reg, (io_read(sd, reg) & mask) | val);
 276 }
 277
 278 static inline int avlink_read(struct v4l2_subdev *sd, u8 reg)
 279 {
 280         struct adv7604_state *state = to_state(sd);
 281
 282         return adv_smbus_read_byte_data(state->i2c_avlink, reg);
 283 }
 284
 285 static inline int avlink_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 286 {
 287         struct adv7604_state *state = to_state(sd);
 288
 289         return adv_smbus_write_byte_data(state->i2c_avlink, reg, val);
 290 }
 291
 292 static inline int cec_read(struct v4l2_subdev *sd, u8 reg)
 293 {
 294         struct adv7604_state *state = to_state(sd);
 295
 296         return adv_smbus_read_byte_data(state->i2c_cec, reg);
 297 }
 298
 299 static inline int cec_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 300 {
 301         struct adv7604_state *state = to_state(sd);
 302
 303         return adv_smbus_write_byte_data(state->i2c_cec, reg, val);
 304 }
 305
 306 static inline int cec_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
 307 {
 308         return cec_write(sd, reg, (cec_read(sd, reg) & mask) | val);
 309 }
 310
 311 static inline int infoframe_read(struct v4l2_subdev *sd, u8 reg)
 312 {
 313         struct adv7604_state *state = to_state(sd);
 314
 315         return adv_smbus_read_byte_data(state->i2c_infoframe, reg);
 316 }
 317
 318 static inline int infoframe_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 319 {
 320         struct adv7604_state *state = to_state(sd);
 321
 322         return adv_smbus_write_byte_data(state->i2c_infoframe, reg, val);
 323 }
 324
 325 static inline int esdp_read(struct v4l2_subdev *sd, u8 reg)
 326 {
 327         struct adv7604_state *state = to_state(sd);
 328
 329         return adv_smbus_read_byte_data(state->i2c_esdp, reg);
 330 }
 331
 332 static inline int esdp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 333 {
 334         struct adv7604_state *state = to_state(sd);
 335
 336         return adv_smbus_write_byte_data(state->i2c_esdp, reg, val);
 337 }
 338
 339 static inline int dpp_read(struct v4l2_subdev *sd, u8 reg)
 340 {
 341         struct adv7604_state *state = to_state(sd);
 342
 343         return adv_smbus_read_byte_data(state->i2c_dpp, reg);
 344 }
 345
 346 static inline int dpp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 347 {
 348         struct adv7604_state *state = to_state(sd);
 349
 350         return adv_smbus_write_byte_data(state->i2c_dpp, reg, val);
 351 }
 352
 353 static inline int afe_read(struct v4l2_subdev *sd, u8 reg)
 354 {
 355         struct adv7604_state *state = to_state(sd);
 356
 357         return adv_smbus_read_byte_data(state->i2c_afe, reg);
 358 }
 359
 360 static inline int afe_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 361 {
 362         struct adv7604_state *state = to_state(sd);
 363
 364         return adv_smbus_write_byte_data(state->i2c_afe, reg, val);
 365 }
 366
 367 static inline int rep_read(struct v4l2_subdev *sd, u8 reg)
 368 {
 369         struct adv7604_state *state = to_state(sd);
 370
 371         return adv_smbus_read_byte_data(state->i2c_repeater, reg);
 372 }
 373
 374 static inline int rep_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 375 {
 376         struct adv7604_state *state = to_state(sd);
 377
 378         return adv_smbus_write_byte_data(state->i2c_repeater, reg, val);
 379 }
 380
 381 static inline int rep_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
 382 {
 383         return rep_write(sd, reg, (rep_read(sd, reg) & mask) | val);
 384 }
 385
 386 static inline int edid_read(struct v4l2_subdev *sd, u8 reg)
 387 {
 388         struct adv7604_state *state = to_state(sd);
 389
 390         return adv_smbus_read_byte_data(state->i2c_edid, reg);
 391 }
 392
 393 static inline int edid_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 394 {
 395         struct adv7604_state *state = to_state(sd);
 396
 397         return adv_smbus_write_byte_data(state->i2c_edid, reg, val);
 398 }
 399
 400 static inline int edid_read_block(struct v4l2_subdev *sd, unsigned len, u8 *val)
 401 {
 402         struct adv7604_state *state = to_state(sd);
 403         struct i2c_client *client = state->i2c_edid;
 404         u8 msgbuf0[1] = { 0 };
 405         u8 msgbuf1[256];
 406         struct i2c_msg msg[2] = {
 407                 {
 408                         .addr = client->addr,
 409                         .len = 1,
 410                         .buf = msgbuf0
 411                 },
 412                 {
 413                         .addr = client->addr,
 414                         .flags = I2C_M_RD,
 415                         .len = len,
 416                         .buf = msgbuf1
 417                 },
 418         };
 419
 420         if (i2c_transfer(client->adapter, msg, 2) < 0)
 421                 return -EIO;
 422         memcpy(val, msgbuf1, len);
 423         return 0;
 424 }
 425
 426 static void adv7604_delayed_work_enable_hotplug(struct work_struct *work)
 427 {
 428         struct delayed_work *dwork = to_delayed_work(work);
 429         struct adv7604_state *state = container_of(dwork, struct adv7604_state,
 430                                                 delayed_work_enable_hotplug);
 431         struct v4l2_subdev *sd = &state->sd;
 432
 433         v4l2_dbg(2, debug, sd, "%s: enable hotplug\n", __func__);
 434
 435         v4l2_subdev_notify(sd, ADV7604_HOTPLUG, (void *)1);
 436 }
 437
 438 static inline int edid_write_block(struct v4l2_subdev *sd,
 439                                         unsigned len, const u8 *val)
 440 {
 441         struct i2c_client *client = v4l2_get_subdevdata(sd);
 442         struct adv7604_state *state = to_state(sd);
 443         int err = 0;
 444         int i;
 445
 446         v4l2_dbg(2, debug, sd, "%s: write EDID block (%d byte)\n", __func__, len);
 447
 448         v4l2_subdev_notify(sd, ADV7604_HOTPLUG, (void *)0);
 449
 450         /* Disables I2C access to internal EDID ram from DDC port */
 451         rep_write_and_or(sd, 0x77, 0xf0, 0x0);
 452
 453         for (i = 0; !err && i < len; i += I2C_SMBUS_BLOCK_MAX)
 454                 err = adv_smbus_write_i2c_block_data(state->i2c_edid, i,
 455                                 I2C_SMBUS_BLOCK_MAX, val + i);
 456         if (err)
 457                 return err;
 458
 459         /* adv7604 calculates the checksums and enables I2C access to internal
 460            EDID ram from DDC port. */
 461         rep_write_and_or(sd, 0x77, 0xf0, 0x1);
 462
 463         for (i = 0; i < 1000; i++) {
 464                 if (rep_read(sd, 0x7d) & 1)
 465                         break;
 466                 mdelay(1);
 467         }
 468         if (i == 1000) {
 469                 v4l_err(client, "error enabling edid\n");
 470                 return -EIO;
 471         }
 472
 473         /* enable hotplug after 100 ms */
 474         queue_delayed_work(state->work_queues,
 475                         &state->delayed_work_enable_hotplug, HZ / 10);
 476         return 0;
 477 }
 478
 479 static inline int hdmi_read(struct v4l2_subdev *sd, u8 reg)
 480 {
 481         struct adv7604_state *state = to_state(sd);
 482
 483         return adv_smbus_read_byte_data(state->i2c_hdmi, reg);
 484 }
 485
 486 static inline int hdmi_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 487 {
 488         struct adv7604_state *state = to_state(sd);
 489
 490         return adv_smbus_write_byte_data(state->i2c_hdmi, reg, val);
 491 }
 492
 493 static inline int test_read(struct v4l2_subdev *sd, u8 reg)
 494 {
 495         struct adv7604_state *state = to_state(sd);
 496
 497         return adv_smbus_read_byte_data(state->i2c_test, reg);
 498 }
 499
 500 static inline int test_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 501 {
 502         struct adv7604_state *state = to_state(sd);
 503
 504         return adv_smbus_write_byte_data(state->i2c_test, reg, val);
 505 }
 506
 507 static inline int cp_read(struct v4l2_subdev *sd, u8 reg)
 508 {
 509         struct adv7604_state *state = to_state(sd);
 510
 511         return adv_smbus_read_byte_data(state->i2c_cp, reg);
 512 }
 513
 514 static inline int cp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 515 {
 516         struct adv7604_state *state = to_state(sd);
 517
 518         return adv_smbus_write_byte_data(state->i2c_cp, reg, val);
 519 }
 520
 521 static inline int cp_write_and_or(struct v4l2_subdev *sd, u8 reg, u8 mask, u8 val)
 522 {
 523         return cp_write(sd, reg, (cp_read(sd, reg) & mask) | val);
 524 }
 525
 526 static inline int vdp_read(struct v4l2_subdev *sd, u8 reg)
 527 {
 528         struct adv7604_state *state = to_state(sd);
 529
 530         return adv_smbus_read_byte_data(state->i2c_vdp, reg);
 531 }
 532
 533 static inline int vdp_write(struct v4l2_subdev *sd, u8 reg, u8 val)
 534 {
 535         struct adv7604_state *state = to_state(sd);
 536
 537         return adv_smbus_write_byte_data(state->i2c_vdp, reg, val);
 538 }
 539
 540 /* ----------------------------------------------------------------------- */
 541
 542 #ifdef CONFIG_VIDEO_ADV_DEBUG
 543 static void adv7604_inv_register(struct v4l2_subdev *sd)
 544 {
 545         v4l2_info(sd, "0x000-0x0ff: IO Map\n");
 546         v4l2_info(sd, "0x100-0x1ff: AVLink Map\n");
 547         v4l2_info(sd, "0x200-0x2ff: CEC Map\n");
 548         v4l2_info(sd, "0x300-0x3ff: InfoFrame Map\n");
 549         v4l2_info(sd, "0x400-0x4ff: ESDP Map\n");
 550         v4l2_info(sd, "0x500-0x5ff: DPP Map\n");
 551         v4l2_info(sd, "0x600-0x6ff: AFE Map\n");
 552         v4l2_info(sd, "0x700-0x7ff: Repeater Map\n");
 553         v4l2_info(sd, "0x800-0x8ff: EDID Map\n");
 554         v4l2_info(sd, "0x900-0x9ff: HDMI Map\n");
 555         v4l2_info(sd, "0xa00-0xaff: Test Map\n");
 556         v4l2_info(sd, "0xb00-0xbff: CP Map\n");
 557         v4l2_info(sd, "0xc00-0xcff: VDP Map\n");
 558 }
 559
 560 static int adv7604_g_register(struct v4l2_subdev *sd,
 561                                         struct v4l2_dbg_register *reg)
 562 {
 563         struct i2c_client *client = v4l2_get_subdevdata(sd);
 564
 565         if (!v4l2_chip_match_i2c_client(client, &reg->match))
 566                 return -EINVAL;
 567         if (!capable(CAP_SYS_ADMIN))
 568                 return -EPERM;
 569         reg->size = 1;
 570         switch (reg->reg >> 8) {
 571         case 0:
 572                 reg->val = io_read(sd, reg->reg & 0xff);
 573                 break;
 574         case 1:
 575                 reg->val = avlink_read(sd, reg->reg & 0xff);
 576                 break;
 577         case 2:
 578                 reg->val = cec_read(sd, reg->reg & 0xff);
 579                 break;
 580         case 3:
 581                 reg->val = infoframe_read(sd, reg->reg & 0xff);
 582                 break;
 583         case 4:
 584                 reg->val = esdp_read(sd, reg->reg & 0xff);
 585                 break;
 586         case 5:
 587                 reg->val = dpp_read(sd, reg->reg & 0xff);
 588                 break;
 589         case 6:
 590                 reg->val = afe_read(sd, reg->reg & 0xff);
 591                 break;
 592         case 7:
 593                 reg->val = rep_read(sd, reg->reg & 0xff);
 594                 break;
 595         case 8:
 596                 reg->val = edid_read(sd, reg->reg & 0xff);
 597                 break;
 598         case 9:
 599                 reg->val = hdmi_read(sd, reg->reg & 0xff);
 600                 break;
 601         case 0xa:
 602                 reg->val = test_read(sd, reg->reg & 0xff);
 603                 break;
 604         case 0xb:
 605                 reg->val = cp_read(sd, reg->reg & 0xff);
 606                 break;
 607         case 0xc:
 608                 reg->val = vdp_read(sd, reg->reg & 0xff);
 609                 break;
 610         default:
 611                 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
 612                 adv7604_inv_register(sd);
 613                 break;
 614         }
 615         return 0;
 616 }
 617
 618 static int adv7604_s_register(struct v4l2_subdev *sd,
 619                                         struct v4l2_dbg_register *reg)
 620 {
 621         struct i2c_client *client = v4l2_get_subdevdata(sd);
 622
 623         if (!v4l2_chip_match_i2c_client(client, &reg->match))
 624                 return -EINVAL;
 625         if (!capable(CAP_SYS_ADMIN))
 626                 return -EPERM;
 627         switch (reg->reg >> 8) {
 628         case 0:
 629                 io_write(sd, reg->reg & 0xff, reg->val & 0xff);
 630                 break;
 631         case 1:
 632                 avlink_write(sd, reg->reg & 0xff, reg->val & 0xff);
 633                 break;
 634         case 2:
 635                 cec_write(sd, reg->reg & 0xff, reg->val & 0xff);
 636                 break;
 637         case 3:
 638                 infoframe_write(sd, reg->reg & 0xff, reg->val & 0xff);
 639                 break;
 640         case 4:
 641                 esdp_write(sd, reg->reg & 0xff, reg->val & 0xff);
 642                 break;
 643         case 5:
 644                 dpp_write(sd, reg->reg & 0xff, reg->val & 0xff);
 645                 break;
 646         case 6:
 647                 afe_write(sd, reg->reg & 0xff, reg->val & 0xff);
 648                 break;
 649         case 7:
 650                 rep_write(sd, reg->reg & 0xff, reg->val & 0xff);
 651                 break;
 652         case 8:
 653                 edid_write(sd, reg->reg & 0xff, reg->val & 0xff);
 654                 break;
 655         case 9:
 656                 hdmi_write(sd, reg->reg & 0xff, reg->val & 0xff);
 657                 break;
 658         case 0xa:
 659                 test_write(sd, reg->reg & 0xff, reg->val & 0xff);
 660                 break;
 661         case 0xb:
 662                 cp_write(sd, reg->reg & 0xff, reg->val & 0xff);
 663                 break;
 664         case 0xc:
 665                 vdp_write(sd, reg->reg & 0xff, reg->val & 0xff);
 666                 break;
 667         default:
 668                 v4l2_info(sd, "Register %03llx not supported\n", reg->reg);
 669                 adv7604_inv_register(sd);
 670                 break;
 671         }
 672         return 0;
 673 }
 674 #endif
 675
 676 static int adv7604_s_detect_tx_5v_ctrl(struct v4l2_subdev *sd)
 677 {
 678         struct adv7604_state *state = to_state(sd);
 679
 680         /* port A only */
 681         return v4l2_ctrl_s_ctrl(state->detect_tx_5v_ctrl,
 682                                 ((io_read(sd, 0x6f) & 0x10) >> 4));
 683 }
 684
 685 static void configure_free_run(struct v4l2_subdev *sd, const struct v4l2_bt_timings *timings)
 686 {
 687         struct i2c_client *client = v4l2_get_subdevdata(sd);
 688         u32 width = htotal(timings);
 689         u32 height = vtotal(timings);
 690         u16 ch1_fr_ll = (((u32)timings->pixelclock / 100) > 0) ?
 691                 ((width * (ADV7604_fsc / 100)) / ((u32)timings->pixelclock / 100)) : 0;
 692
 693         v4l2_dbg(2, debug, sd, "%s\n", __func__);
 694
 695         cp_write(sd, 0x8f, (ch1_fr_ll >> 8) & 0x7);     /* CH1_FR_LL */
 696         cp_write(sd, 0x90, ch1_fr_ll & 0xff);           /* CH1_FR_LL */
 697         cp_write(sd, 0xab, (height >> 4) & 0xff); /* CP_LCOUNT_MAX */
 698         cp_write(sd, 0xac, (height & 0x0f) << 4); /* CP_LCOUNT_MAX */
 699         /* TODO support interlaced */
 700         cp_write(sd, 0x91, 0x10);       /* INTERLACED */
 701
 702         /* Should only be set in auto-graphics mode [REF_02 p. 91-92] */
 703         if ((io_read(sd, 0x00) == 0x07) && (io_read(sd, 0x01) == 0x02)) {
 704                 u16 cp_start_sav, cp_start_eav, cp_start_vbi, cp_end_vbi;
 705                 const u8 pll[2] = {
 706                         (0xc0 | ((width >> 8) & 0x1f)),
 707                         (width & 0xff)
 708                 };
 709
 710                 /* setup PLL_DIV_MAN_EN and PLL_DIV_RATIO */
 711                 /* IO-map reg. 0x16 and 0x17 should be written in sequence */
 712                 if (adv_smbus_write_i2c_block_data(client, 0x16, 2, pll)) {
 713                         v4l2_err(sd, "writing to reg 0x16 and 0x17 failed\n");
 714                         return;
 715                 }
 716
 717                 /* active video - horizontal timing */
 718                 cp_start_sav = timings->hsync + timings->hbackporch - 4;
 719                 cp_start_eav = width - timings->hfrontporch;
 720                 cp_write(sd, 0xa2, (cp_start_sav >> 4) & 0xff);
 721                 cp_write(sd, 0xa3, ((cp_start_sav & 0x0f) << 4) | ((cp_start_eav >> 8) & 0x0f));
 722                 cp_write(sd, 0xa4, cp_start_eav & 0xff);
 723
 724                 /* active video - vertical timing */
 725                 cp_start_vbi = height - timings->vfrontporch;
 726                 cp_end_vbi = timings->vsync + timings->vbackporch;
 727                 cp_write(sd, 0xa5, (cp_start_vbi >> 4) & 0xff);
 728                 cp_write(sd, 0xa6, ((cp_start_vbi & 0xf) << 4) | ((cp_end_vbi >> 8) & 0xf));
 729                 cp_write(sd, 0xa7, cp_end_vbi & 0xff);
 730         } else {
 731                 /* reset to default values */
 732                 io_write(sd, 0x16, 0x43);
 733                 io_write(sd, 0x17, 0x5a);
 734                 cp_write(sd, 0xa2, 0x00);
 735                 cp_write(sd, 0xa3, 0x00);
 736                 cp_write(sd, 0xa4, 0x00);
 737                 cp_write(sd, 0xa5, 0x00);
 738                 cp_write(sd, 0xa6, 0x00);
 739                 cp_write(sd, 0xa7, 0x00);
 740         }
 741 }
 742
 743
 744 static void set_rgb_quantization_range(struct v4l2_subdev *sd)
 745 {
 746         struct adv7604_state *state = to_state(sd);
 747
 748         switch (state->rgb_quantization_range) {
 749         case V4L2_DV_RGB_RANGE_AUTO:
 750                 /* automatic */
 751                 if ((hdmi_read(sd, 0x05) & 0x80) ||
 752                                 (state->prim_mode == ADV7604_PRIM_MODE_COMP) ||
 753                                 (state->prim_mode == ADV7604_PRIM_MODE_RGB)) {
 754                         /* receiving HDMI or analog signal */
 755                         io_write_and_or(sd, 0x02, 0x0f, 0xf0);
 756                 } else {
 757                         /* receiving DVI-D signal */
 758
 759                         /* ADV7604 selects RGB limited range regardless of
 760                            input format (CE/IT) in automatic mode */
 761                         if (state->timings.bt.standards & V4L2_DV_BT_STD_CEA861) {
 762                                 /* RGB limited range (16-235) */
 763                                 io_write_and_or(sd, 0x02, 0x0f, 0x00);
 764
 765                         } else {
 766                                 /* RGB full range (0-255) */
 767                                 io_write_and_or(sd, 0x02, 0x0f, 0x10);
 768                         }
 769                 }
 770                 break;
 771         case V4L2_DV_RGB_RANGE_LIMITED:
 772                 /* RGB limited range (16-235) */
 773                 io_write_and_or(sd, 0x02, 0x0f, 0x00);
 774                 break;
 775         case V4L2_DV_RGB_RANGE_FULL:
 776                 /* RGB full range (0-255) */
 777                 io_write_and_or(sd, 0x02, 0x0f, 0x10);
 778                 break;
 779         }
 780 }
 781
 782
 783 static int adv7604_s_ctrl(struct v4l2_ctrl *ctrl)
 784 {
 785         struct v4l2_subdev *sd = to_sd(ctrl);
 786         struct adv7604_state *state = to_state(sd);
 787
 788         switch (ctrl->id) {
 789         case V4L2_CID_BRIGHTNESS:
 790                 cp_write(sd, 0x3c, ctrl->val);
 791                 return 0;
 792         case V4L2_CID_CONTRAST:
 793                 cp_write(sd, 0x3a, ctrl->val);
 794                 return 0;
 795         case V4L2_CID_SATURATION:
 796                 cp_write(sd, 0x3b, ctrl->val);
 797                 return 0;
 798         case V4L2_CID_HUE:
 799                 cp_write(sd, 0x3d, ctrl->val);
 800                 return 0;
 801         case  V4L2_CID_DV_RX_RGB_RANGE:
 802                 state->rgb_quantization_range = ctrl->val;
 803                 set_rgb_quantization_range(sd);
 804                 return 0;
 805         case V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE:
 806                 /* Set the analog sampling phase. This is needed to find the
 807                    best sampling phase for analog video: an application or
 808                    driver has to try a number of phases and analyze the picture
 809                    quality before settling on the best performing phase. */
 810                 afe_write(sd, 0xc8, ctrl->val);
 811                 return 0;
 812         case V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL:
 813                 /* Use the default blue color for free running mode,
 814                    or supply your own. */
 815                 cp_write_and_or(sd, 0xbf, ~0x04, (ctrl->val << 2));
 816                 return 0;
 817         case V4L2_CID_ADV_RX_FREE_RUN_COLOR:
 818                 cp_write(sd, 0xc0, (ctrl->val & 0xff0000) >> 16);
 819                 cp_write(sd, 0xc1, (ctrl->val & 0x00ff00) >> 8);
 820                 cp_write(sd, 0xc2, (u8)(ctrl->val & 0x0000ff));
 821                 return 0;
 822         }
 823         return -EINVAL;
 824 }
 825
 826 static int adv7604_g_chip_ident(struct v4l2_subdev *sd,
 827                                         struct v4l2_dbg_chip_ident *chip)
 828 {
 829         struct i2c_client *client = v4l2_get_subdevdata(sd);
 830
 831         return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_ADV7604, 0);
 832 }
 833
 834 /* ----------------------------------------------------------------------- */
 835
 836 static inline bool no_power(struct v4l2_subdev *sd)
 837 {
 838         /* Entire chip or CP powered off */
 839         return io_read(sd, 0x0c) & 0x24;
 840 }
 841
 842 static inline bool no_signal_tmds(struct v4l2_subdev *sd)
 843 {
 844         /* TODO port B, C and D */
 845         return !(io_read(sd, 0x6a) & 0x10);
 846 }
 847
 848 static inline bool no_lock_tmds(struct v4l2_subdev *sd)
 849 {
 850         return (io_read(sd, 0x6a) & 0xe0) != 0xe0;
 851 }
 852
 853 static inline bool no_lock_sspd(struct v4l2_subdev *sd)
 854 {
 855         /* TODO channel 2 */
 856         return ((cp_read(sd, 0xb5) & 0xd0) != 0xd0);
 857 }
 858
 859 static inline bool no_lock_stdi(struct v4l2_subdev *sd)
 860 {
 861         /* TODO channel 2 */
 862         return !(cp_read(sd, 0xb1) & 0x80);
 863 }
 864
 865 static inline bool no_signal(struct v4l2_subdev *sd)
 866 {
 867         struct adv7604_state *state = to_state(sd);
 868         bool ret;
 869
 870         ret = no_power(sd);
 871
 872         ret |= no_lock_stdi(sd);
 873         ret |= no_lock_sspd(sd);
 874
 875         if (DIGITAL_INPUT) {
 876                 ret |= no_lock_tmds(sd);
 877                 ret |= no_signal_tmds(sd);
 878         }
 879
 880         return ret;
 881 }
 882
 883 static inline bool no_lock_cp(struct v4l2_subdev *sd)
 884 {
 885         /* CP has detected a non standard number of lines on the incoming
 886            video compared to what it is configured to receive by s_dv_timings */
 887         return io_read(sd, 0x12) & 0x01;
 888 }
 889
 890 static int adv7604_g_input_status(struct v4l2_subdev *sd, u32 *status)
 891 {
 892         struct adv7604_state *state = to_state(sd);
 893
 894         *status = 0;
 895         *status |= no_power(sd) ? V4L2_IN_ST_NO_POWER : 0;
 896         *status |= no_signal(sd) ? V4L2_IN_ST_NO_SIGNAL : 0;
 897         if (no_lock_cp(sd))
 898                 *status |= DIGITAL_INPUT ? V4L2_IN_ST_NO_SYNC : V4L2_IN_ST_NO_H_LOCK;
 899
 900         v4l2_dbg(1, debug, sd, "%s: status = 0x%x\n", __func__, *status);
 901
 902         return 0;
 903 }
 904
 905 /* ----------------------------------------------------------------------- */
 906
 907 static void adv7604_print_timings(struct v4l2_subdev *sd,
 908         struct v4l2_dv_timings *timings, const char *txt, bool detailed)
 909 {
 910         struct v4l2_bt_timings *bt = &timings->bt;
 911         u32 htot, vtot;
 912
 913         if (timings->type != V4L2_DV_BT_656_1120)
 914                 return;
 915
 916         htot = htotal(bt);
 917         vtot = vtotal(bt);
 918
 919         v4l2_info(sd, "%s %dx%d%s%d (%dx%d)",
 920                         txt, bt->width, bt->height, bt->interlaced ? "i" : "p",
 921                         (htot * vtot) > 0 ? ((u32)bt->pixelclock /
 922                                 (htot * vtot)) : 0,
 923                         htot, vtot);
 924
 925         if (detailed) {
 926                 v4l2_info(sd, "    horizontal: fp = %d, %ssync = %d, bp = %d\n",
 927                                 bt->hfrontporch,
 928                                 (bt->polarities & V4L2_DV_HSYNC_POS_POL) ? "+" : "-",
 929                                 bt->hsync, bt->hbackporch);
 930                 v4l2_info(sd, "    vertical: fp = %d, %ssync = %d, bp = %d\n",
 931                                 bt->vfrontporch,
 932                                 (bt->polarities & V4L2_DV_VSYNC_POS_POL) ? "+" : "-",
 933                                 bt->vsync, bt->vbackporch);
 934                 v4l2_info(sd, "    pixelclock: %lld, flags: 0x%x, standards: 0x%x\n",
 935                                 bt->pixelclock, bt->flags, bt->standards);
 936         }
 937 }
 938
 939 struct stdi_readback {
 940         u16 bl, lcf, lcvs;
 941         u8 hs_pol, vs_pol;
 942         bool interlaced;
 943 };
 944
 945 static int stdi2dv_timings(struct v4l2_subdev *sd,
 946                 struct stdi_readback *stdi,
 947                 struct v4l2_dv_timings *timings)
 948 {
 949         struct adv7604_state *state = to_state(sd);
 950         u32 hfreq = (ADV7604_fsc * 8) / stdi->bl;
 951         u32 pix_clk;
 952         int i;
 953
 954         for (i = 0; adv7604_timings[i].bt.height; i++) {
 955                 if (vtotal(&adv7604_timings[i].bt) != stdi->lcf + 1)
 956                         continue;
 957                 if (adv7604_timings[i].bt.vsync != stdi->lcvs)
 958                         continue;
 959
 960                 pix_clk = hfreq * htotal(&adv7604_timings[i].bt);
 961
 962                 if ((pix_clk < adv7604_timings[i].bt.pixelclock + 1000000) &&
 963                     (pix_clk > adv7604_timings[i].bt.pixelclock - 1000000)) {
 964                         *timings = adv7604_timings[i];
 965                         return 0;
 966                 }
 967         }
 968
 969         if (v4l2_detect_cvt(stdi->lcf + 1, hfreq, stdi->lcvs,
 970                         (stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
 971                         (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
 972                         timings))
 973                 return 0;
 974         if (v4l2_detect_gtf(stdi->lcf + 1, hfreq, stdi->lcvs,
 975                         (stdi->hs_pol == '+' ? V4L2_DV_HSYNC_POS_POL : 0) |
 976                         (stdi->vs_pol == '+' ? V4L2_DV_VSYNC_POS_POL : 0),
 977                         state->aspect_ratio, timings))
 978                 return 0;
 979
 980         v4l2_dbg(2, debug, sd, "%s: No format candidate found for lcf=%d, bl = %d\n",
 981                         __func__, stdi->lcf, stdi->bl);
 982         return -1;
 983 }
 984
 985 static int read_stdi(struct v4l2_subdev *sd, struct stdi_readback *stdi)
 986 {
 987         if (no_lock_stdi(sd) || no_lock_sspd(sd)) {
 988                 v4l2_dbg(2, debug, sd, "%s: STDI and/or SSPD not locked\n", __func__);
 989                 return -1;
 990         }
 991
 992         /* read STDI */
 993         stdi->bl = ((cp_read(sd, 0xb1) & 0x3f) << 8) | cp_read(sd, 0xb2);
 994         stdi->lcf = ((cp_read(sd, 0xb3) & 0x7) << 8) | cp_read(sd, 0xb4);
 995         stdi->lcvs = cp_read(sd, 0xb3) >> 3;
 996         stdi->interlaced = io_read(sd, 0x12) & 0x10;
 997
 998         /* read SSPD */
 999         if ((cp_read(sd, 0xb5) & 0x03) == 0x01) {
1000                 stdi->hs_pol = ((cp_read(sd, 0xb5) & 0x10) ?
1001                                 ((cp_read(sd, 0xb5) & 0x08) ? '+' : '-') : 'x');
1002                 stdi->vs_pol = ((cp_read(sd, 0xb5) & 0x40) ?
1003                                 ((cp_read(sd, 0xb5) & 0x20) ? '+' : '-') : 'x');
1004         } else {
1005                 stdi->hs_pol = 'x';
1006                 stdi->vs_pol = 'x';
1007         }
1008
1009         if (no_lock_stdi(sd) || no_lock_sspd(sd)) {
1010                 v4l2_dbg(2, debug, sd,
1011                         "%s: signal lost during readout of STDI/SSPD\n", __func__);
1012                 return -1;
1013         }
1014
1015         if (stdi->lcf < 239 || stdi->bl < 8 || stdi->bl == 0x3fff) {
1016                 v4l2_dbg(2, debug, sd, "%s: invalid signal\n", __func__);
1017                 memset(stdi, 0, sizeof(struct stdi_readback));
1018                 return -1;
1019         }
1020
1021         v4l2_dbg(2, debug, sd,
1022                 "%s: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %chsync, %cvsync, %s\n",
1023                 __func__, stdi->lcf, stdi->bl, stdi->lcvs,
1024                 stdi->hs_pol, stdi->vs_pol,
1025                 stdi->interlaced ? "interlaced" : "progressive");
1026
1027         return 0;
1028 }
1029
1030 static int adv7604_enum_dv_timings(struct v4l2_subdev *sd,
1031                         struct v4l2_enum_dv_timings *timings)
1032 {
1033         if (timings->index >= ARRAY_SIZE(adv7604_timings) - 1)
1034                 return -EINVAL;
1035         memset(timings->reserved, 0, sizeof(timings->reserved));
1036         timings->timings = adv7604_timings[timings->index];
1037         return 0;
1038 }
1039
1040 static int adv7604_dv_timings_cap(struct v4l2_subdev *sd,
1041                         struct v4l2_dv_timings_cap *cap)
1042 {
1043         struct adv7604_state *state = to_state(sd);
1044
1045         cap->type = V4L2_DV_BT_656_1120;
1046         cap->bt.max_width = 1920;
1047         cap->bt.max_height = 1200;
1048         cap->bt.min_pixelclock = 27000000;
1049         if (DIGITAL_INPUT)
1050                 cap->bt.max_pixelclock = 225000000;
1051         else
1052                 cap->bt.max_pixelclock = 170000000;
1053         cap->bt.standards = V4L2_DV_BT_STD_CEA861 | V4L2_DV_BT_STD_DMT |
1054                          V4L2_DV_BT_STD_GTF | V4L2_DV_BT_STD_CVT;
1055         cap->bt.capabilities = V4L2_DV_BT_CAP_PROGRESSIVE |
1056                 V4L2_DV_BT_CAP_REDUCED_BLANKING | V4L2_DV_BT_CAP_CUSTOM;
1057         return 0;
1058 }
1059
1060 /* Fill the optional fields .standards and .flags in struct v4l2_dv_timings
1061    if the format is listed in adv7604_timings[] */
1062 static void adv7604_fill_optional_dv_timings_fields(struct v4l2_subdev *sd,
1063                 struct v4l2_dv_timings *timings)
1064 {
1065         struct adv7604_state *state = to_state(sd);
1066         int i;
1067
1068         for (i = 0; adv7604_timings[i].bt.width; i++) {
1069                 if (v4l_match_dv_timings(timings, &adv7604_timings[i],
1070                                         DIGITAL_INPUT ? 250000 : 1000000)) {
1071                         *timings = adv7604_timings[i];
1072                         break;
1073                 }
1074         }
1075 }
1076
1077 static int adv7604_query_dv_timings(struct v4l2_subdev *sd,
1078                         struct v4l2_dv_timings *timings)
1079 {
1080         struct adv7604_state *state = to_state(sd);
1081         struct v4l2_bt_timings *bt = &timings->bt;
1082         struct stdi_readback stdi;
1083
1084         if (!timings)
1085                 return -EINVAL;
1086
1087         memset(timings, 0, sizeof(struct v4l2_dv_timings));
1088
1089         if (no_signal(sd)) {
1090                 v4l2_dbg(1, debug, sd, "%s: no valid signal\n", __func__);
1091                 return -ENOLINK;
1092         }
1093
1094         /* read STDI */
1095         if (read_stdi(sd, &stdi)) {
1096                 v4l2_dbg(1, debug, sd, "%s: STDI/SSPD not locked\n", __func__);
1097                 return -ENOLINK;
1098         }
1099         bt->interlaced = stdi.interlaced ?
1100                 V4L2_DV_INTERLACED : V4L2_DV_PROGRESSIVE;
1101
1102         if (DIGITAL_INPUT) {
1103                 timings->type = V4L2_DV_BT_656_1120;
1104
1105                 bt->width = (hdmi_read(sd, 0x07) & 0x0f) * 256 + hdmi_read(sd, 0x08);
1106                 bt->height = (hdmi_read(sd, 0x09) & 0x0f) * 256 + hdmi_read(sd, 0x0a);
1107                 bt->pixelclock = (hdmi_read(sd, 0x06) * 1000000) +
1108                         ((hdmi_read(sd, 0x3b) & 0x30) >> 4) * 250000;
1109                 bt->hfrontporch = (hdmi_read(sd, 0x20) & 0x03) * 256 +
1110                         hdmi_read(sd, 0x21);
1111                 bt->hsync = (hdmi_read(sd, 0x22) & 0x03) * 256 +
1112                         hdmi_read(sd, 0x23);
1113                 bt->hbackporch = (hdmi_read(sd, 0x24) & 0x03) * 256 +
1114                         hdmi_read(sd, 0x25);
1115                 bt->vfrontporch = ((hdmi_read(sd, 0x2a) & 0x1f) * 256 +
1116                         hdmi_read(sd, 0x2b)) / 2;
1117                 bt->vsync = ((hdmi_read(sd, 0x2e) & 0x1f) * 256 +
1118                         hdmi_read(sd, 0x2f)) / 2;
1119                 bt->vbackporch = ((hdmi_read(sd, 0x32) & 0x1f) * 256 +
1120                         hdmi_read(sd, 0x33)) / 2;
1121                 bt->polarities = ((hdmi_read(sd, 0x05) & 0x10) ? V4L2_DV_VSYNC_POS_POL : 0) |
1122                         ((hdmi_read(sd, 0x05) & 0x20) ? V4L2_DV_HSYNC_POS_POL : 0);
1123                 if (bt->interlaced == V4L2_DV_INTERLACED) {
1124                         bt->height += (hdmi_read(sd, 0x0b) & 0x0f) * 256 +
1125                                         hdmi_read(sd, 0x0c);
1126                         bt->il_vfrontporch = ((hdmi_read(sd, 0x2c) & 0x1f) * 256 +
1127                                         hdmi_read(sd, 0x2d)) / 2;
1128                         bt->il_vsync = ((hdmi_read(sd, 0x30) & 0x1f) * 256 +
1129                                         hdmi_read(sd, 0x31)) / 2;
1130                         bt->vbackporch = ((hdmi_read(sd, 0x34) & 0x1f) * 256 +
1131                                         hdmi_read(sd, 0x35)) / 2;
1132                 }
1133                 adv7604_fill_optional_dv_timings_fields(sd, timings);
1134         } else {
1135                 /* find format
1136                  * Since LCVS values are inaccurate (REF_03, page 275-276),
1137                  * stdi2dv_timings() is called with lcvs +-1 if the first attempt fails.
1138                  */
1139                 if (!stdi2dv_timings(sd, &stdi, timings))
1140                         goto found;
1141                 stdi.lcvs += 1;
1142                 v4l2_dbg(1, debug, sd, "%s: lcvs + 1 = %d\n", __func__, stdi.lcvs);
1143                 if (!stdi2dv_timings(sd, &stdi, timings))
1144                         goto found;
1145                 stdi.lcvs -= 2;
1146                 v4l2_dbg(1, debug, sd, "%s: lcvs - 1 = %d\n", __func__, stdi.lcvs);
1147                 if (stdi2dv_timings(sd, &stdi, timings)) {
1148                         v4l2_dbg(1, debug, sd, "%s: format not supported\n", __func__);
1149                         return -ERANGE;
1150                 }
1151         }
1152 found:
1153
1154         if (no_signal(sd)) {
1155                 v4l2_dbg(1, debug, sd, "%s: signal lost during readout\n", __func__);
1156                 memset(timings, 0, sizeof(struct v4l2_dv_timings));
1157                 return -ENOLINK;
1158         }
1159
1160         if ((!DIGITAL_INPUT && bt->pixelclock > 170000000) ||
1161                         (DIGITAL_INPUT && bt->pixelclock > 225000000)) {
1162                 v4l2_dbg(1, debug, sd, "%s: pixelclock out of range %d\n",
1163                                 __func__, (u32)bt->pixelclock);
1164                 return -ERANGE;
1165         }
1166
1167         if (debug > 1)
1168                 adv7604_print_timings(sd, timings,
1169                                 "adv7604_query_dv_timings:", true);
1170
1171         return 0;
1172 }
1173
1174 static int adv7604_s_dv_timings(struct v4l2_subdev *sd,
1175                 struct v4l2_dv_timings *timings)
1176 {
1177         struct adv7604_state *state = to_state(sd);
1178         struct v4l2_bt_timings *bt;
1179
1180         if (!timings)
1181                 return -EINVAL;
1182
1183         bt = &timings->bt;
1184
1185         if ((!DIGITAL_INPUT && bt->pixelclock > 170000000) ||
1186                         (DIGITAL_INPUT && bt->pixelclock > 225000000)) {
1187                 v4l2_dbg(1, debug, sd, "%s: pixelclock out of range %d\n",
1188                                 __func__, (u32)bt->pixelclock);
1189                 return -ERANGE;
1190         }
1191         adv7604_fill_optional_dv_timings_fields(sd, timings);
1192
1193         state->timings = *timings;
1194
1195         /* freerun */
1196         configure_free_run(sd, bt);
1197
1198         set_rgb_quantization_range(sd);
1199
1200
1201         if (debug > 1)
1202                 adv7604_print_timings(sd, timings,
1203                                 "adv7604_s_dv_timings:", true);
1204         return 0;
1205 }
1206
1207 static int adv7604_g_dv_timings(struct v4l2_subdev *sd,
1208                 struct v4l2_dv_timings *timings)
1209 {
1210         struct adv7604_state *state = to_state(sd);
1211
1212         *timings = state->timings;
1213         return 0;
1214 }
1215
1216 static void enable_input(struct v4l2_subdev *sd, enum adv7604_prim_mode prim_mode)
1217 {
1218         switch (prim_mode) {
1219         case ADV7604_PRIM_MODE_COMP:
1220         case ADV7604_PRIM_MODE_RGB:
1221                 /* enable */
1222                 io_write(sd, 0x15, 0xb0);   /* Disable Tristate of Pins (no audio) */
1223                 break;
1224         case ADV7604_PRIM_MODE_HDMI_COMP:
1225         case ADV7604_PRIM_MODE_HDMI_GR:
1226                 /* enable */
1227                 hdmi_write(sd, 0x1a, 0x0a); /* Unmute audio */
1228                 hdmi_write(sd, 0x01, 0x00); /* Enable HDMI clock terminators */
1229                 io_write(sd, 0x15, 0xa0);   /* Disable Tristate of Pins */
1230                 break;
1231         default:
1232                 v4l2_err(sd, "%s: reserved primary mode 0x%0x\n",
1233                                 __func__, prim_mode);
1234                 break;
1235         }
1236 }
1237
1238 static void disable_input(struct v4l2_subdev *sd)
1239 {
1240         /* disable */
1241         io_write(sd, 0x15, 0xbe);   /* Tristate all outputs from video core */
1242         hdmi_write(sd, 0x1a, 0x1a); /* Mute audio */
1243         hdmi_write(sd, 0x01, 0x78); /* Disable HDMI clock terminators */
1244 }
1245
1246 static void select_input(struct v4l2_subdev *sd, enum adv7604_prim_mode prim_mode)
1247 {
1248         switch (prim_mode) {
1249         case ADV7604_PRIM_MODE_COMP:
1250         case ADV7604_PRIM_MODE_RGB:
1251                 /* set mode and select free run resolution */
1252                 io_write(sd, 0x00, 0x07); /* video std */
1253                 io_write(sd, 0x01, 0x02); /* prim mode */
1254                 /* enable embedded syncs for auto graphics mode */
1255                 cp_write_and_or(sd, 0x81, 0xef, 0x10);
1256
1257                 /* reset ADI recommended settings for HDMI: */
1258                 /* "ADV7604 Register Settings Recommendations (rev. 2.5, June 2010)" p. 4. */
1259                 hdmi_write(sd, 0x0d, 0x04); /* HDMI filter optimization */
1260                 hdmi_write(sd, 0x3d, 0x00); /* DDC bus active pull-up control */
1261                 hdmi_write(sd, 0x3e, 0x74); /* TMDS PLL optimization */
1262                 hdmi_write(sd, 0x4e, 0x3b); /* TMDS PLL optimization */
1263                 hdmi_write(sd, 0x57, 0x74); /* TMDS PLL optimization */
1264                 hdmi_write(sd, 0x58, 0x63); /* TMDS PLL optimization */
1265                 hdmi_write(sd, 0x8d, 0x18); /* equaliser */
1266                 hdmi_write(sd, 0x8e, 0x34); /* equaliser */
1267                 hdmi_write(sd, 0x93, 0x88); /* equaliser */
1268                 hdmi_write(sd, 0x94, 0x2e); /* equaliser */
1269                 hdmi_write(sd, 0x96, 0x00); /* enable automatic EQ changing */
1270
1271                 afe_write(sd, 0x00, 0x08); /* power up ADC */
1272                 afe_write(sd, 0x01, 0x06); /* power up Analog Front End */
1273                 afe_write(sd, 0xc8, 0x00); /* phase control */
1274
1275                 /* set ADI recommended settings for digitizer */
1276                 /* "ADV7604 Register Settings Recommendations (rev. 2.5, June 2010)" p. 17. */
1277                 afe_write(sd, 0x12, 0x7b); /* ADC noise shaping filter controls */
1278                 afe_write(sd, 0x0c, 0x1f); /* CP core gain controls */
1279                 cp_write(sd, 0x3e, 0x04); /* CP core pre-gain control */
1280                 cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */
1281                 cp_write(sd, 0x40, 0x5c); /* CP core pre-gain control. Graphics mode */
1282                 break;
1283
1284         case ADV7604_PRIM_MODE_HDMI_COMP:
1285         case ADV7604_PRIM_MODE_HDMI_GR:
1286                 /* set mode and select free run resolution */
1287                 /* video std */
1288                 io_write(sd, 0x00,
1289                         (prim_mode == ADV7604_PRIM_MODE_HDMI_GR) ? 0x02 : 0x1e);
1290                 io_write(sd, 0x01, prim_mode); /* prim mode */
1291                 /* disable embedded syncs for auto graphics mode */
1292                 cp_write_and_or(sd, 0x81, 0xef, 0x00);
1293
1294                 /* set ADI recommended settings for HDMI: */
1295                 /* "ADV7604 Register Settings Recommendations (rev. 2.5, June 2010)" p. 4. */
1296                 hdmi_write(sd, 0x0d, 0x84); /* HDMI filter optimization */
1297                 hdmi_write(sd, 0x3d, 0x10); /* DDC bus active pull-up control */
1298                 hdmi_write(sd, 0x3e, 0x39); /* TMDS PLL optimization */
1299                 hdmi_write(sd, 0x4e, 0x3b); /* TMDS PLL optimization */
1300                 hdmi_write(sd, 0x57, 0xb6); /* TMDS PLL optimization */
1301                 hdmi_write(sd, 0x58, 0x03); /* TMDS PLL optimization */
1302                 hdmi_write(sd, 0x8d, 0x18); /* equaliser */
1303                 hdmi_write(sd, 0x8e, 0x34); /* equaliser */
1304                 hdmi_write(sd, 0x93, 0x8b); /* equaliser */
1305                 hdmi_write(sd, 0x94, 0x2d); /* equaliser */
1306                 hdmi_write(sd, 0x96, 0x01); /* enable automatic EQ changing */
1307
1308                 afe_write(sd, 0x00, 0xff); /* power down ADC */
1309                 afe_write(sd, 0x01, 0xfe); /* power down Analog Front End */
1310                 afe_write(sd, 0xc8, 0x40); /* phase control */
1311
1312                 /* reset ADI recommended settings for digitizer */
1313                 /* "ADV7604 Register Settings Recommendations (rev. 2.5, June 2010)" p. 17. */
1314                 afe_write(sd, 0x12, 0xfb); /* ADC noise shaping filter controls */
1315                 afe_write(sd, 0x0c, 0x0d); /* CP core gain controls */
1316                 cp_write(sd, 0x3e, 0x00); /* CP core pre-gain control */
1317                 cp_write(sd, 0xc3, 0x39); /* CP coast control. Graphics mode */
1318                 cp_write(sd, 0x40, 0x80); /* CP core pre-gain control. Graphics mode */
1319
1320                 break;
1321         default:
1322                 v4l2_err(sd, "%s: reserved primary mode 0x%0x\n", __func__, prim_mode);
1323                 break;
1324         }
1325 }
1326
1327 static int adv7604_s_routing(struct v4l2_subdev *sd,
1328                 u32 input, u32 output, u32 config)
1329 {
1330         struct adv7604_state *state = to_state(sd);
1331
1332         v4l2_dbg(2, debug, sd, "%s: input %d", __func__, input);
1333
1334         switch (input) {
1335         case 0:
1336                 /* TODO select HDMI_COMP or HDMI_GR */
1337                 state->prim_mode = ADV7604_PRIM_MODE_HDMI_COMP;
1338                 break;
1339         case 1:
1340                 state->prim_mode = ADV7604_PRIM_MODE_RGB;
1341                 break;
1342         case 2:
1343                 state->prim_mode = ADV7604_PRIM_MODE_COMP;
1344                 break;
1345         default:
1346                 return -EINVAL;
1347         }
1348
1349         disable_input(sd);
1350
1351         select_input(sd, state->prim_mode);
1352
1353         enable_input(sd, state->prim_mode);
1354
1355         return 0;
1356 }
1357
1358 static int adv7604_enum_mbus_fmt(struct v4l2_subdev *sd, unsigned int index,
1359                              enum v4l2_mbus_pixelcode *code)
1360 {
1361         if (index)
1362                 return -EINVAL;
1363         /* Good enough for now */
1364         *code = V4L2_MBUS_FMT_FIXED;
1365         return 0;
1366 }
1367
1368 static int adv7604_g_mbus_fmt(struct v4l2_subdev *sd,
1369                 struct v4l2_mbus_framefmt *fmt)
1370 {
1371         struct adv7604_state *state = to_state(sd);
1372
1373         fmt->width = state->timings.bt.width;
1374         fmt->height = state->timings.bt.height;
1375         fmt->code = V4L2_MBUS_FMT_FIXED;
1376         fmt->field = V4L2_FIELD_NONE;
1377         if (state->timings.bt.standards & V4L2_DV_BT_STD_CEA861) {
1378                 fmt->colorspace = (state->timings.bt.height <= 576) ?
1379                         V4L2_COLORSPACE_SMPTE170M : V4L2_COLORSPACE_REC709;
1380         }
1381         return 0;
1382 }
1383
1384 static int adv7604_isr(struct v4l2_subdev *sd, u32 status, bool *handled)
1385 {
1386         struct adv7604_state *state = to_state(sd);
1387         u8 fmt_change, fmt_change_digital, tx_5v;
1388
1389         /* format change */
1390         fmt_change = io_read(sd, 0x43) & 0x98;
1391         if (fmt_change)
1392                 io_write(sd, 0x44, fmt_change);
1393         fmt_change_digital = DIGITAL_INPUT ? (io_read(sd, 0x6b) & 0xc0) : 0;
1394         if (fmt_change_digital)
1395                 io_write(sd, 0x6c, fmt_change_digital);
1396         if (fmt_change || fmt_change_digital) {
1397                 v4l2_dbg(1, debug, sd,
1398                         "%s: ADV7604_FMT_CHANGE, fmt_change = 0x%x, fmt_change_digital = 0x%x\n",
1399                         __func__, fmt_change, fmt_change_digital);
1400                 v4l2_subdev_notify(sd, ADV7604_FMT_CHANGE, NULL);
1401                 if (handled)
1402                         *handled = true;
1403         }
1404         /* tx 5v detect */
1405         tx_5v = io_read(sd, 0x70) & 0x10;
1406         if (tx_5v) {
1407                 v4l2_dbg(1, debug, sd, "%s: tx_5v: 0x%x\n", __func__, tx_5v);
1408                 io_write(sd, 0x71, tx_5v);
1409                 adv7604_s_detect_tx_5v_ctrl(sd);
1410                 if (handled)
1411                         *handled = true;
1412         }
1413         return 0;
1414 }
1415
1416 static int adv7604_get_edid(struct v4l2_subdev *sd, struct v4l2_subdev_edid *edid)
1417 {
1418         struct adv7604_state *state = to_state(sd);
1419
1420         if (edid->pad != 0)
1421                 return -EINVAL;
1422         if (edid->blocks == 0)
1423                 return -EINVAL;
1424         if (edid->start_block >= state->edid_blocks)
1425                 return -EINVAL;
1426         if (edid->start_block + edid->blocks > state->edid_blocks)
1427                 edid->blocks = state->edid_blocks - edid->start_block;
1428         if (!edid->edid)
1429                 return -EINVAL;
1430         memcpy(edid->edid + edid->start_block * 128,
1431                state->edid + edid->start_block * 128,
1432                edid->blocks * 128);
1433         return 0;
1434 }
1435
1436 static int adv7604_set_edid(struct v4l2_subdev *sd, struct v4l2_subdev_edid *edid)
1437 {
1438         struct adv7604_state *state = to_state(sd);
1439         int err;
1440
1441         if (edid->pad != 0)
1442                 return -EINVAL;
1443         if (edid->start_block != 0)
1444                 return -EINVAL;
1445         if (edid->blocks == 0) {
1446                 /* Pull down the hotplug pin */
1447                 v4l2_subdev_notify(sd, ADV7604_HOTPLUG, (void *)0);
1448                 /* Disables I2C access to internal EDID ram from DDC port */
1449                 rep_write_and_or(sd, 0x77, 0xf0, 0x0);
1450                 state->edid_blocks = 0;
1451                 /* Fall back to a 16:9 aspect ratio */
1452                 state->aspect_ratio.numerator = 16;
1453                 state->aspect_ratio.denominator = 9;
1454                 return 0;
1455         }
1456         if (edid->blocks > 2)
1457                 return -E2BIG;
1458         if (!edid->edid)
1459                 return -EINVAL;
1460         memcpy(state->edid, edid->edid, 128 * edid->blocks);
1461         state->edid_blocks = edid->blocks;
1462         state->aspect_ratio = v4l2_calc_aspect_ratio(edid->edid[0x15],
1463                         edid->edid[0x16]);
1464         err = edid_write_block(sd, 128 * edid->blocks, state->edid);
1465         if (err < 0)
1466                 v4l2_err(sd, "error %d writing edid\n", err);
1467         return err;
1468 }
1469
1470 /*********** avi info frame CEA-861-E **************/
1471
1472 static void print_avi_infoframe(struct v4l2_subdev *sd)
1473 {
1474         int i;
1475         u8 buf[14];
1476         u8 avi_len;
1477         u8 avi_ver;
1478
1479         if (!(hdmi_read(sd, 0x05) & 0x80)) {
1480                 v4l2_info(sd, "receive DVI-D signal (AVI infoframe not supported)\n");
1481                 return;
1482         }
1483         if (!(io_read(sd, 0x60) & 0x01)) {
1484                 v4l2_info(sd, "AVI infoframe not received\n");
1485                 return;
1486         }
1487
1488         if (io_read(sd, 0x83) & 0x01) {
1489                 v4l2_info(sd, "AVI infoframe checksum error has occurred earlier\n");
1490                 io_write(sd, 0x85, 0x01); /* clear AVI_INF_CKS_ERR_RAW */
1491                 if (io_read(sd, 0x83) & 0x01) {
1492                         v4l2_info(sd, "AVI infoframe checksum error still present\n");
1493                         io_write(sd, 0x85, 0x01); /* clear AVI_INF_CKS_ERR_RAW */
1494                 }
1495         }
1496
1497         avi_len = infoframe_read(sd, 0xe2);
1498         avi_ver = infoframe_read(sd, 0xe1);
1499         v4l2_info(sd, "AVI infoframe version %d (%d byte)\n",
1500                         avi_ver, avi_len);
1501
1502         if (avi_ver != 0x02)
1503                 return;
1504
1505         for (i = 0; i < 14; i++)
1506                 buf[i] = infoframe_read(sd, i);
1507
1508         v4l2_info(sd,
1509                 "\t%02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x %02x\n",
1510                 buf[0], buf[1], buf[2], buf[3], buf[4], buf[5], buf[6], buf[7],
1511                 buf[8], buf[9], buf[10], buf[11], buf[12], buf[13]);
1512 }
1513
1514 static int adv7604_log_status(struct v4l2_subdev *sd)
1515 {
1516         struct adv7604_state *state = to_state(sd);
1517         struct v4l2_dv_timings timings;
1518         struct stdi_readback stdi;
1519         u8 reg_io_0x02 = io_read(sd, 0x02);
1520
1521         char *csc_coeff_sel_rb[16] = {
1522                 "bypassed", "YPbPr601 -> RGB", "reserved", "YPbPr709 -> RGB",
1523                 "reserved", "RGB -> YPbPr601", "reserved", "RGB -> YPbPr709",
1524                 "reserved", "YPbPr709 -> YPbPr601", "YPbPr601 -> YPbPr709",
1525                 "reserved", "reserved", "reserved", "reserved", "manual"
1526         };
1527         char *input_color_space_txt[16] = {
1528                 "RGB limited range (16-235)", "RGB full range (0-255)",
1529                 "YCbCr Bt.601 (16-235)", "YCbCr Bt.709 (16-235)",
1530                 "XvYCC Bt.601", "XvYCC Bt.709",
1531                 "YCbCr Bt.601 (0-255)", "YCbCr Bt.709 (0-255)",
1532                 "invalid", "invalid", "invalid", "invalid", "invalid",
1533                 "invalid", "invalid", "automatic"
1534         };
1535         char *rgb_quantization_range_txt[] = {
1536                 "Automatic",
1537                 "RGB limited range (16-235)",
1538                 "RGB full range (0-255)",
1539         };
1540
1541         v4l2_info(sd, "-----Chip status-----\n");
1542         v4l2_info(sd, "Chip power: %s\n", no_power(sd) ? "off" : "on");
1543         v4l2_info(sd, "Connector type: %s\n", state->connector_hdmi ?
1544                         "HDMI" : (DIGITAL_INPUT ? "DVI-D" : "DVI-A"));
1545         v4l2_info(sd, "EDID: %s\n", ((rep_read(sd, 0x7d) & 0x01) &&
1546                         (rep_read(sd, 0x77) & 0x01)) ? "enabled" : "disabled ");
1547         v4l2_info(sd, "CEC: %s\n", !!(cec_read(sd, 0x2a) & 0x01) ?
1548                         "enabled" : "disabled");
1549
1550         v4l2_info(sd, "-----Signal status-----\n");
1551         v4l2_info(sd, "Cable detected (+5V power): %s\n",
1552                         (io_read(sd, 0x6f) & 0x10) ? "true" : "false");
1553         v4l2_info(sd, "TMDS signal detected: %s\n",
1554                         no_signal_tmds(sd) ? "false" : "true");
1555         v4l2_info(sd, "TMDS signal locked: %s\n",
1556                         no_lock_tmds(sd) ? "false" : "true");
1557         v4l2_info(sd, "SSPD locked: %s\n", no_lock_sspd(sd) ? "false" : "true");
1558         v4l2_info(sd, "STDI locked: %s\n", no_lock_stdi(sd) ? "false" : "true");
1559         v4l2_info(sd, "CP locked: %s\n", no_lock_cp(sd) ? "false" : "true");
1560         v4l2_info(sd, "CP free run: %s\n",
1561                         (!!(cp_read(sd, 0xff) & 0x10) ? "on" : "off"));
1562         v4l2_info(sd, "Prim-mode = 0x%x, video std = 0x%x\n",
1563                         io_read(sd, 0x01) & 0x0f, io_read(sd, 0x00) & 0x3f);
1564
1565         v4l2_info(sd, "-----Video Timings-----\n");
1566         if (read_stdi(sd, &stdi))
1567                 v4l2_info(sd, "STDI: not locked\n");
1568         else
1569                 v4l2_info(sd, "STDI: lcf (frame height - 1) = %d, bl = %d, lcvs (vsync) = %d, %s, %chsync, %cvsync\n",
1570                                 stdi.lcf, stdi.bl, stdi.lcvs,
1571                                 stdi.interlaced ? "interlaced" : "progressive",
1572                                 stdi.hs_pol, stdi.vs_pol);
1573         if (adv7604_query_dv_timings(sd, &timings))
1574                 v4l2_info(sd, "No video detected\n");
1575         else
1576                 adv7604_print_timings(sd, &timings, "Detected format:", true);
1577         adv7604_print_timings(sd, &state->timings, "Configured format:", true);
1578
1579         v4l2_info(sd, "-----Color space-----\n");
1580         v4l2_info(sd, "RGB quantization range ctrl: %s\n",
1581                         rgb_quantization_range_txt[state->rgb_quantization_range]);
1582         v4l2_info(sd, "Input color space: %s\n",
1583                         input_color_space_txt[reg_io_0x02 >> 4]);
1584         v4l2_info(sd, "Output color space: %s %s, saturator %s\n",
1585                         (reg_io_0x02 & 0x02) ? "RGB" : "YCbCr",
1586                         (reg_io_0x02 & 0x04) ? "(16-235)" : "(0-255)",
1587                         ((reg_io_0x02 & 0x04) ^ (reg_io_0x02 & 0x01)) ?
1588                                         "enabled" : "disabled");
1589         v4l2_info(sd, "Color space conversion: %s\n",
1590                         csc_coeff_sel_rb[cp_read(sd, 0xfc) >> 4]);
1591
1592         /* Digital video */
1593         if (DIGITAL_INPUT) {
1594                 v4l2_info(sd, "-----HDMI status-----\n");
1595                 v4l2_info(sd, "HDCP encrypted content: %s\n",
1596                                 hdmi_read(sd, 0x05) & 0x40 ? "true" : "false");
1597
1598                 print_avi_infoframe(sd);
1599         }
1600
1601         return 0;
1602 }
1603
1604 /* ----------------------------------------------------------------------- */
1605
1606 static const struct v4l2_ctrl_ops adv7604_ctrl_ops = {
1607         .s_ctrl = adv7604_s_ctrl,
1608 };
1609
1610 static const struct v4l2_subdev_core_ops adv7604_core_ops = {
1611         .log_status = adv7604_log_status,
1612         .g_ext_ctrls = v4l2_subdev_g_ext_ctrls,
1613         .try_ext_ctrls = v4l2_subdev_try_ext_ctrls,
1614         .s_ext_ctrls = v4l2_subdev_s_ext_ctrls,
1615         .g_ctrl = v4l2_subdev_g_ctrl,
1616         .s_ctrl = v4l2_subdev_s_ctrl,
1617         .queryctrl = v4l2_subdev_queryctrl,
1618         .querymenu = v4l2_subdev_querymenu,
1619         .g_chip_ident = adv7604_g_chip_ident,
1620         .interrupt_service_routine = adv7604_isr,
1621 #ifdef CONFIG_VIDEO_ADV_DEBUG
1622         .g_register = adv7604_g_register,
1623         .s_register = adv7604_s_register,
1624 #endif
1625 };
1626
1627 static const struct v4l2_subdev_video_ops adv7604_video_ops = {
1628         .s_routing = adv7604_s_routing,
1629         .g_input_status = adv7604_g_input_status,
1630         .s_dv_timings = adv7604_s_dv_timings,
1631         .g_dv_timings = adv7604_g_dv_timings,
1632         .query_dv_timings = adv7604_query_dv_timings,
1633         .enum_dv_timings = adv7604_enum_dv_timings,
1634         .dv_timings_cap = adv7604_dv_timings_cap,
1635         .enum_mbus_fmt = adv7604_enum_mbus_fmt,
1636         .g_mbus_fmt = adv7604_g_mbus_fmt,
1637         .try_mbus_fmt = adv7604_g_mbus_fmt,
1638         .s_mbus_fmt = adv7604_g_mbus_fmt,
1639 };
1640
1641 static const struct v4l2_subdev_pad_ops adv7604_pad_ops = {
1642         .get_edid = adv7604_get_edid,
1643         .set_edid = adv7604_set_edid,
1644 };
1645
1646 static const struct v4l2_subdev_ops adv7604_ops = {
1647         .core = &adv7604_core_ops,
1648         .video = &adv7604_video_ops,
1649         .pad = &adv7604_pad_ops,
1650 };
1651
1652 /* -------------------------- custom ctrls ---------------------------------- */
1653
1654 static const struct v4l2_ctrl_config adv7604_ctrl_analog_sampling_phase = {
1655         .ops = &adv7604_ctrl_ops,
1656         .id = V4L2_CID_ADV_RX_ANALOG_SAMPLING_PHASE,
1657         .name = "Analog Sampling Phase",
1658         .type = V4L2_CTRL_TYPE_INTEGER,
1659         .min = 0,
1660         .max = 0x1f,
1661         .step = 1,
1662         .def = 0,
1663 };
1664
1665 static const struct v4l2_ctrl_config adv7604_ctrl_free_run_color_manual = {
1666         .ops = &adv7604_ctrl_ops,
1667         .id = V4L2_CID_ADV_RX_FREE_RUN_COLOR_MANUAL,
1668         .name = "Free Running Color, Manual",
1669         .type = V4L2_CTRL_TYPE_BOOLEAN,
1670         .min = false,
1671         .max = true,
1672         .step = 1,
1673         .def = false,
1674 };
1675
1676 static const struct v4l2_ctrl_config adv7604_ctrl_free_run_color = {
1677         .ops = &adv7604_ctrl_ops,
1678         .id = V4L2_CID_ADV_RX_FREE_RUN_COLOR,
1679         .name = "Free Running Color",
1680         .type = V4L2_CTRL_TYPE_INTEGER,
1681         .min = 0x0,
1682         .max = 0xffffff,
1683         .step = 0x1,
1684         .def = 0x0,
1685 };
1686
1687 /* ----------------------------------------------------------------------- */
1688
1689 static int adv7604_core_init(struct v4l2_subdev *sd)
1690 {
1691         struct adv7604_state *state = to_state(sd);
1692         struct adv7604_platform_data *pdata = &state->pdata;
1693
1694         hdmi_write(sd, 0x48,
1695                 (pdata->disable_pwrdnb ? 0x80 : 0) |
1696                 (pdata->disable_cable_det_rst ? 0x40 : 0));
1697
1698         disable_input(sd);
1699
1700         /* power */
1701         io_write(sd, 0x0c, 0x42);   /* Power up part and power down VDP */
1702         io_write(sd, 0x0b, 0x44);   /* Power down ESDP block */
1703         cp_write(sd, 0xcf, 0x01);   /* Power down macrovision */
1704
1705         /* video format */
1706         io_write_and_or(sd, 0x02, 0xf0,
1707                         pdata->alt_gamma << 3 |
1708                         pdata->op_656_range << 2 |
1709                         pdata->rgb_out << 1 |
1710                         pdata->alt_data_sat << 0);
1711         io_write(sd, 0x03, pdata->op_format_sel);
1712         io_write_and_or(sd, 0x04, 0x1f, pdata->op_ch_sel << 5);
1713         io_write_and_or(sd, 0x05, 0xf0, pdata->blank_data << 3 |
1714                                         pdata->insert_av_codes << 2 |
1715                                         pdata->replicate_av_codes << 1 |
1716                                         pdata->invert_cbcr << 0);
1717
1718         /* TODO from platform data */
1719         cp_write(sd, 0x69, 0x30);   /* Enable CP CSC */
1720         io_write(sd, 0x06, 0xa6);   /* positive VS and HS */
1721         io_write(sd, 0x14, 0x7f);   /* Drive strength adjusted to max */
1722         cp_write(sd, 0xba, (pdata->hdmi_free_run_mode << 1) | 0x01); /* HDMI free run */
1723         cp_write(sd, 0xf3, 0xdc); /* Low threshold to enter/exit free run mode */
1724         cp_write(sd, 0xf9, 0x23); /*  STDI ch. 1 - LCVS change threshold -
1725                                       ADI recommended setting [REF_01 c. 2.3.3] */
1726         cp_write(sd, 0x45, 0x23); /*  STDI ch. 2 - LCVS change threshold -
1727                                       ADI recommended setting [REF_01 c. 2.3.3] */
1728         cp_write(sd, 0xc9, 0x2d); /* use prim_mode and vid_std as free run resolution
1729                                      for digital formats */
1730
1731         /* TODO from platform data */
1732         afe_write(sd, 0xb5, 0x01);  /* Setting MCLK to 256Fs */
1733
1734         afe_write(sd, 0x02, pdata->ain_sel); /* Select analog input muxing mode */
1735         io_write_and_or(sd, 0x30, ~(1 << 4), pdata->output_bus_lsb_to_msb << 4);
1736
1737         state->prim_mode = pdata->prim_mode;
1738         select_input(sd, pdata->prim_mode);
1739
1740         enable_input(sd, pdata->prim_mode);
1741
1742         /* interrupts */
1743         io_write(sd, 0x40, 0xc2); /* Configure INT1 */
1744         io_write(sd, 0x41, 0xd7); /* STDI irq for any change, disable INT2 */
1745         io_write(sd, 0x46, 0x98); /* Enable SSPD, STDI and CP unlocked interrupts */
1746         io_write(sd, 0x6e, 0xc0); /* Enable V_LOCKED and DE_REGEN_LCK interrupts */
1747         io_write(sd, 0x73, 0x10); /* Enable CABLE_DET_A_ST (+5v) interrupt */
1748
1749         return v4l2_ctrl_handler_setup(sd->ctrl_handler);
1750 }
1751
1752 static void adv7604_unregister_clients(struct adv7604_state *state)
1753 {
1754         if (state->i2c_avlink)
1755                 i2c_unregister_device(state->i2c_avlink);
1756         if (state->i2c_cec)
1757                 i2c_unregister_device(state->i2c_cec);
1758         if (state->i2c_infoframe)
1759                 i2c_unregister_device(state->i2c_infoframe);
1760         if (state->i2c_esdp)
1761                 i2c_unregister_device(state->i2c_esdp);
1762         if (state->i2c_dpp)
1763                 i2c_unregister_device(state->i2c_dpp);
1764         if (state->i2c_afe)
1765                 i2c_unregister_device(state->i2c_afe);
1766         if (state->i2c_repeater)
1767                 i2c_unregister_device(state->i2c_repeater);
1768         if (state->i2c_edid)
1769                 i2c_unregister_device(state->i2c_edid);
1770         if (state->i2c_hdmi)
1771                 i2c_unregister_device(state->i2c_hdmi);
1772         if (state->i2c_test)
1773                 i2c_unregister_device(state->i2c_test);
1774         if (state->i2c_cp)
1775                 i2c_unregister_device(state->i2c_cp);
1776         if (state->i2c_vdp)
1777                 i2c_unregister_device(state->i2c_vdp);
1778 }
1779
1780 static struct i2c_client *adv7604_dummy_client(struct v4l2_subdev *sd,
1781                                                         u8 addr, u8 io_reg)
1782 {
1783         struct i2c_client *client = v4l2_get_subdevdata(sd);
1784
1785         if (addr)
1786                 io_write(sd, io_reg, addr << 1);
1787         return i2c_new_dummy(client->adapter, io_read(sd, io_reg) >> 1);
1788 }
1789
1790 static int adv7604_probe(struct i2c_client *client,
1791                          const struct i2c_device_id *id)
1792 {
1793         struct adv7604_state *state;
1794         struct adv7604_platform_data *pdata = client->dev.platform_data;
1795         struct v4l2_ctrl_handler *hdl;
1796         struct v4l2_subdev *sd;
1797         int err;
1798
1799         /* Check if the adapter supports the needed features */
1800         if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1801                 return -EIO;
1802         v4l_dbg(1, debug, client, "detecting adv7604 client on address 0x%x\n",
1803                         client->addr << 1);
1804
1805         state = kzalloc(sizeof(struct adv7604_state), GFP_KERNEL);
1806         if (!state) {
1807                 v4l_err(client, "Could not allocate adv7604_state memory!\n");
1808                 return -ENOMEM;
1809         }
1810
1811         /* platform data */
1812         if (!pdata) {
1813                 v4l_err(client, "No platform data!\n");
1814                 err = -ENODEV;
1815                 goto err_state;
1816         }
1817         memcpy(&state->pdata, pdata, sizeof(state->pdata));
1818
1819         sd = &state->sd;
1820         v4l2_i2c_subdev_init(sd, client, &adv7604_ops);
1821         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1822         state->connector_hdmi = pdata->connector_hdmi;
1823
1824         /* i2c access to adv7604? */
1825         if (adv_smbus_read_byte_data_check(client, 0xfb, false) != 0x68) {
1826                 v4l2_info(sd, "not an adv7604 on address 0x%x\n",
1827                                 client->addr << 1);
1828                 err = -ENODEV;
1829                 goto err_state;
1830         }
1831
1832         /* control handlers */
1833         hdl = &state->hdl;
1834         v4l2_ctrl_handler_init(hdl, 9);
1835
1836         v4l2_ctrl_new_std(hdl, &adv7604_ctrl_ops,
1837                         V4L2_CID_BRIGHTNESS, -128, 127, 1, 0);
1838         v4l2_ctrl_new_std(hdl, &adv7604_ctrl_ops,
1839                         V4L2_CID_CONTRAST, 0, 255, 1, 128);
1840         v4l2_ctrl_new_std(hdl, &adv7604_ctrl_ops,
1841                         V4L2_CID_SATURATION, 0, 255, 1, 128);
1842         v4l2_ctrl_new_std(hdl, &adv7604_ctrl_ops,
1843                         V4L2_CID_HUE, 0, 128, 1, 0);
1844
1845         /* private controls */
1846         state->detect_tx_5v_ctrl = v4l2_ctrl_new_std(hdl, NULL,
1847                         V4L2_CID_DV_RX_POWER_PRESENT, 0, 1, 0, 0);
1848         state->detect_tx_5v_ctrl->is_private = true;
1849         state->rgb_quantization_range_ctrl =
1850                 v4l2_ctrl_new_std_menu(hdl, &adv7604_ctrl_ops,
1851                         V4L2_CID_DV_RX_RGB_RANGE, V4L2_DV_RGB_RANGE_FULL,
1852                         0, V4L2_DV_RGB_RANGE_AUTO);
1853         state->rgb_quantization_range_ctrl->is_private = true;
1854
1855         /* custom controls */
1856         state->analog_sampling_phase_ctrl =
1857                 v4l2_ctrl_new_custom(hdl, &adv7604_ctrl_analog_sampling_phase, NULL);
1858         state->analog_sampling_phase_ctrl->is_private = true;
1859         state->free_run_color_manual_ctrl =
1860                 v4l2_ctrl_new_custom(hdl, &adv7604_ctrl_free_run_color_manual, NULL);
1861         state->free_run_color_manual_ctrl->is_private = true;
1862         state->free_run_color_ctrl =
1863                 v4l2_ctrl_new_custom(hdl, &adv7604_ctrl_free_run_color, NULL);
1864         state->free_run_color_ctrl->is_private = true;
1865
1866         sd->ctrl_handler = hdl;
1867         if (hdl->error) {
1868                 err = hdl->error;
1869                 goto err_hdl;
1870         }
1871         if (adv7604_s_detect_tx_5v_ctrl(sd)) {
1872                 err = -ENODEV;
1873                 goto err_hdl;
1874         }
1875
1876         state->i2c_avlink = adv7604_dummy_client(sd, pdata->i2c_avlink, 0xf3);
1877         state->i2c_cec = adv7604_dummy_client(sd, pdata->i2c_cec, 0xf4);
1878         state->i2c_infoframe = adv7604_dummy_client(sd, pdata->i2c_infoframe, 0xf5);
1879         state->i2c_esdp = adv7604_dummy_client(sd, pdata->i2c_esdp, 0xf6);
1880         state->i2c_dpp = adv7604_dummy_client(sd, pdata->i2c_dpp, 0xf7);
1881         state->i2c_afe = adv7604_dummy_client(sd, pdata->i2c_afe, 0xf8);
1882         state->i2c_repeater = adv7604_dummy_client(sd, pdata->i2c_repeater, 0xf9);
1883         state->i2c_edid = adv7604_dummy_client(sd, pdata->i2c_edid, 0xfa);
1884         state->i2c_hdmi = adv7604_dummy_client(sd, pdata->i2c_hdmi, 0xfb);
1885         state->i2c_test = adv7604_dummy_client(sd, pdata->i2c_test, 0xfc);
1886         state->i2c_cp = adv7604_dummy_client(sd, pdata->i2c_cp, 0xfd);
1887         state->i2c_vdp = adv7604_dummy_client(sd, pdata->i2c_vdp, 0xfe);
1888         if (!state->i2c_avlink || !state->i2c_cec || !state->i2c_infoframe ||
1889             !state->i2c_esdp || !state->i2c_dpp || !state->i2c_afe ||
1890             !state->i2c_repeater || !state->i2c_edid || !state->i2c_hdmi ||
1891             !state->i2c_test || !state->i2c_cp || !state->i2c_vdp) {
1892                 err = -ENOMEM;
1893                 v4l2_err(sd, "failed to create all i2c clients\n");
1894                 goto err_i2c;
1895         }
1896
1897         /* work queues */
1898         state->work_queues = create_singlethread_workqueue(client->name);
1899         if (!state->work_queues) {
1900                 v4l2_err(sd, "Could not create work queue\n");
1901                 err = -ENOMEM;
1902                 goto err_i2c;
1903         }
1904
1905         INIT_DELAYED_WORK(&state->delayed_work_enable_hotplug,
1906                         adv7604_delayed_work_enable_hotplug);
1907
1908         state->pad.flags = MEDIA_PAD_FL_SOURCE;
1909         err = media_entity_init(&sd->entity, 1, &state->pad, 0);
1910         if (err)
1911                 goto err_work_queues;
1912
1913         err = adv7604_core_init(sd);
1914         if (err)
1915                 goto err_entity;
1916         v4l2_info(sd, "%s found @ 0x%x (%s)\n", client->name,
1917                         client->addr << 1, client->adapter->name);
1918         return 0;
1919
1920 err_entity:
1921         media_entity_cleanup(&sd->entity);
1922 err_work_queues:
1923         cancel_delayed_work(&state->delayed_work_enable_hotplug);
1924         destroy_workqueue(state->work_queues);
1925 err_i2c:
1926         adv7604_unregister_clients(state);
1927 err_hdl:
1928         v4l2_ctrl_handler_free(hdl);
1929 err_state:
1930         kfree(state);
1931         return err;
1932 }
1933
1934 /* ----------------------------------------------------------------------- */
1935
1936 static int adv7604_remove(struct i2c_client *client)
1937 {
1938         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1939         struct adv7604_state *state = to_state(sd);
1940
1941         cancel_delayed_work(&state->delayed_work_enable_hotplug);
1942         destroy_workqueue(state->work_queues);
1943         v4l2_device_unregister_subdev(sd);
1944         media_entity_cleanup(&sd->entity);
1945         adv7604_unregister_clients(to_state(sd));
1946         v4l2_ctrl_handler_free(sd->ctrl_handler);
1947         kfree(to_state(sd));
1948         return 0;
1949 }
1950
1951 /* ----------------------------------------------------------------------- */
1952
1953 static struct i2c_device_id adv7604_id[] = {
1954         { "adv7604", 0 },
1955         { }
1956 };
1957 MODULE_DEVICE_TABLE(i2c, adv7604_id);
1958
1959 static struct i2c_driver adv7604_driver = {
1960         .driver = {
1961                 .owner = THIS_MODULE,
1962                 .name = "adv7604",
1963         },
1964         .probe = adv7604_probe,
1965         .remove = adv7604_remove,
1966         .id_table = adv7604_id,
1967 };
1968
1969 module_i2c_driver(adv7604_driver);