2 * Driver for MT9V032 CMOS Image Sensor from Micron
4 * Copyright (C) 2010, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
6 * Based on the MT9M001 driver,
8 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/log2.h>
19 #include <linux/mutex.h>
20 #include <linux/slab.h>
21 #include <linux/videodev2.h>
22 #include <linux/v4l2-mediabus.h>
23 #include <linux/module.h>
25 #include <media/mt9v032.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-device.h>
28 #include <media/v4l2-subdev.h>
30 /* The first four rows are black rows. The active area spans 753x481 pixels. */
31 #define MT9V032_PIXEL_ARRAY_HEIGHT 485
32 #define MT9V032_PIXEL_ARRAY_WIDTH 753
34 #define MT9V032_SYSCLK_FREQ_DEF 26600000
36 #define MT9V032_CHIP_VERSION 0x00
37 #define MT9V032_CHIP_ID_REV1 0x1311
38 #define MT9V032_CHIP_ID_REV3 0x1313
39 #define MT9V034_CHIP_ID_REV1 0X1324
40 #define MT9V032_COLUMN_START 0x01
41 #define MT9V032_COLUMN_START_MIN 1
42 #define MT9V032_COLUMN_START_DEF 1
43 #define MT9V032_COLUMN_START_MAX 752
44 #define MT9V032_ROW_START 0x02
45 #define MT9V032_ROW_START_MIN 4
46 #define MT9V032_ROW_START_DEF 5
47 #define MT9V032_ROW_START_MAX 482
48 #define MT9V032_WINDOW_HEIGHT 0x03
49 #define MT9V032_WINDOW_HEIGHT_MIN 1
50 #define MT9V032_WINDOW_HEIGHT_DEF 480
51 #define MT9V032_WINDOW_HEIGHT_MAX 480
52 #define MT9V032_WINDOW_WIDTH 0x04
53 #define MT9V032_WINDOW_WIDTH_MIN 1
54 #define MT9V032_WINDOW_WIDTH_DEF 752
55 #define MT9V032_WINDOW_WIDTH_MAX 752
56 #define MT9V032_HORIZONTAL_BLANKING 0x05
57 #define MT9V032_HORIZONTAL_BLANKING_MIN 43
58 #define MT9V034_HORIZONTAL_BLANKING_MIN 61
59 #define MT9V032_HORIZONTAL_BLANKING_DEF 94
60 #define MT9V032_HORIZONTAL_BLANKING_MAX 1023
61 #define MT9V032_VERTICAL_BLANKING 0x06
62 #define MT9V032_VERTICAL_BLANKING_MIN 4
63 #define MT9V034_VERTICAL_BLANKING_MIN 2
64 #define MT9V032_VERTICAL_BLANKING_DEF 45
65 #define MT9V032_VERTICAL_BLANKING_MAX 3000
66 #define MT9V034_VERTICAL_BLANKING_MAX 32288
67 #define MT9V032_CHIP_CONTROL 0x07
68 #define MT9V032_CHIP_CONTROL_MASTER_MODE (1 << 3)
69 #define MT9V032_CHIP_CONTROL_DOUT_ENABLE (1 << 7)
70 #define MT9V032_CHIP_CONTROL_SEQUENTIAL (1 << 8)
71 #define MT9V032_SHUTTER_WIDTH1 0x08
72 #define MT9V032_SHUTTER_WIDTH2 0x09
73 #define MT9V032_SHUTTER_WIDTH_CONTROL 0x0a
74 #define MT9V032_TOTAL_SHUTTER_WIDTH 0x0b
75 #define MT9V032_TOTAL_SHUTTER_WIDTH_MIN 1
76 #define MT9V034_TOTAL_SHUTTER_WIDTH_MIN 0
77 #define MT9V032_TOTAL_SHUTTER_WIDTH_DEF 480
78 #define MT9V032_TOTAL_SHUTTER_WIDTH_MAX 32767
79 #define MT9V034_TOTAL_SHUTTER_WIDTH_MAX 32765
80 #define MT9V032_RESET 0x0c
81 #define MT9V032_READ_MODE 0x0d
82 #define MT9V032_READ_MODE_ROW_BIN_MASK (3 << 0)
83 #define MT9V032_READ_MODE_ROW_BIN_SHIFT 0
84 #define MT9V032_READ_MODE_COLUMN_BIN_MASK (3 << 2)
85 #define MT9V032_READ_MODE_COLUMN_BIN_SHIFT 2
86 #define MT9V032_READ_MODE_ROW_FLIP (1 << 4)
87 #define MT9V032_READ_MODE_COLUMN_FLIP (1 << 5)
88 #define MT9V032_READ_MODE_DARK_COLUMNS (1 << 6)
89 #define MT9V032_READ_MODE_DARK_ROWS (1 << 7)
90 #define MT9V032_PIXEL_OPERATION_MODE 0x0f
91 #define MT9V034_PIXEL_OPERATION_MODE_HDR (1 << 0)
92 #define MT9V034_PIXEL_OPERATION_MODE_COLOR (1 << 1)
93 #define MT9V032_PIXEL_OPERATION_MODE_COLOR (1 << 2)
94 #define MT9V032_PIXEL_OPERATION_MODE_HDR (1 << 6)
95 #define MT9V032_ANALOG_GAIN 0x35
96 #define MT9V032_ANALOG_GAIN_MIN 16
97 #define MT9V032_ANALOG_GAIN_DEF 16
98 #define MT9V032_ANALOG_GAIN_MAX 64
99 #define MT9V032_MAX_ANALOG_GAIN 0x36
100 #define MT9V032_MAX_ANALOG_GAIN_MAX 127
101 #define MT9V032_FRAME_DARK_AVERAGE 0x42
102 #define MT9V032_DARK_AVG_THRESH 0x46
103 #define MT9V032_DARK_AVG_LOW_THRESH_MASK (255 << 0)
104 #define MT9V032_DARK_AVG_LOW_THRESH_SHIFT 0
105 #define MT9V032_DARK_AVG_HIGH_THRESH_MASK (255 << 8)
106 #define MT9V032_DARK_AVG_HIGH_THRESH_SHIFT 8
107 #define MT9V032_ROW_NOISE_CORR_CONTROL 0x70
108 #define MT9V034_ROW_NOISE_CORR_ENABLE (1 << 0)
109 #define MT9V034_ROW_NOISE_CORR_USE_BLK_AVG (1 << 1)
110 #define MT9V032_ROW_NOISE_CORR_ENABLE (1 << 5)
111 #define MT9V032_ROW_NOISE_CORR_USE_BLK_AVG (1 << 7)
112 #define MT9V032_PIXEL_CLOCK 0x74
113 #define MT9V034_PIXEL_CLOCK 0x72
114 #define MT9V032_PIXEL_CLOCK_INV_LINE (1 << 0)
115 #define MT9V032_PIXEL_CLOCK_INV_FRAME (1 << 1)
116 #define MT9V032_PIXEL_CLOCK_XOR_LINE (1 << 2)
117 #define MT9V032_PIXEL_CLOCK_CONT_LINE (1 << 3)
118 #define MT9V032_PIXEL_CLOCK_INV_PXL_CLK (1 << 4)
119 #define MT9V032_TEST_PATTERN 0x7f
120 #define MT9V032_TEST_PATTERN_DATA_MASK (1023 << 0)
121 #define MT9V032_TEST_PATTERN_DATA_SHIFT 0
122 #define MT9V032_TEST_PATTERN_USE_DATA (1 << 10)
123 #define MT9V032_TEST_PATTERN_GRAY_MASK (3 << 11)
124 #define MT9V032_TEST_PATTERN_GRAY_NONE (0 << 11)
125 #define MT9V032_TEST_PATTERN_GRAY_VERTICAL (1 << 11)
126 #define MT9V032_TEST_PATTERN_GRAY_HORIZONTAL (2 << 11)
127 #define MT9V032_TEST_PATTERN_GRAY_DIAGONAL (3 << 11)
128 #define MT9V032_TEST_PATTERN_ENABLE (1 << 13)
129 #define MT9V032_TEST_PATTERN_FLIP (1 << 14)
130 #define MT9V032_AEC_AGC_ENABLE 0xaf
131 #define MT9V032_AEC_ENABLE (1 << 0)
132 #define MT9V032_AGC_ENABLE (1 << 1)
133 #define MT9V032_THERMAL_INFO 0xc1
136 MT9V032_MODEL_V032_COLOR,
137 MT9V032_MODEL_V032_MONO,
138 MT9V032_MODEL_V034_COLOR,
139 MT9V032_MODEL_V034_MONO,
142 struct mt9v032_model_version {
143 unsigned int version;
147 struct mt9v032_model_data {
148 unsigned int min_row_time;
149 unsigned int min_hblank;
150 unsigned int min_vblank;
151 unsigned int max_vblank;
152 unsigned int min_shutter;
153 unsigned int max_shutter;
154 unsigned int pclk_reg;
157 struct mt9v032_model_info {
158 const struct mt9v032_model_data *data;
162 static const struct mt9v032_model_version mt9v032_versions[] = {
163 { MT9V032_CHIP_ID_REV1, "MT9V032 rev1/2" },
164 { MT9V032_CHIP_ID_REV3, "MT9V032 rev3" },
165 { MT9V034_CHIP_ID_REV1, "MT9V034 rev1" },
168 static const struct mt9v032_model_data mt9v032_model_data[] = {
170 /* MT9V032 revisions 1/2/3 */
172 .min_hblank = MT9V032_HORIZONTAL_BLANKING_MIN,
173 .min_vblank = MT9V032_VERTICAL_BLANKING_MIN,
174 .max_vblank = MT9V032_VERTICAL_BLANKING_MAX,
175 .min_shutter = MT9V032_TOTAL_SHUTTER_WIDTH_MIN,
176 .max_shutter = MT9V032_TOTAL_SHUTTER_WIDTH_MAX,
177 .pclk_reg = MT9V032_PIXEL_CLOCK,
181 .min_hblank = MT9V034_HORIZONTAL_BLANKING_MIN,
182 .min_vblank = MT9V034_VERTICAL_BLANKING_MIN,
183 .max_vblank = MT9V034_VERTICAL_BLANKING_MAX,
184 .min_shutter = MT9V034_TOTAL_SHUTTER_WIDTH_MIN,
185 .max_shutter = MT9V034_TOTAL_SHUTTER_WIDTH_MAX,
186 .pclk_reg = MT9V034_PIXEL_CLOCK,
190 static const struct mt9v032_model_info mt9v032_models[] = {
191 [MT9V032_MODEL_V032_COLOR] = {
192 .data = &mt9v032_model_data[0],
195 [MT9V032_MODEL_V032_MONO] = {
196 .data = &mt9v032_model_data[0],
199 [MT9V032_MODEL_V034_COLOR] = {
200 .data = &mt9v032_model_data[1],
203 [MT9V032_MODEL_V034_MONO] = {
204 .data = &mt9v032_model_data[1],
210 struct v4l2_subdev subdev;
211 struct media_pad pad;
213 struct v4l2_mbus_framefmt format;
214 struct v4l2_rect crop;
218 struct v4l2_ctrl_handler ctrls;
220 struct v4l2_ctrl *link_freq;
221 struct v4l2_ctrl *pixel_rate;
224 struct mutex power_lock;
229 struct mt9v032_platform_data *pdata;
230 const struct mt9v032_model_info *model;
231 const struct mt9v032_model_version *version;
238 struct v4l2_ctrl *test_pattern;
239 struct v4l2_ctrl *test_pattern_color;
243 static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd)
245 return container_of(sd, struct mt9v032, subdev);
248 static int mt9v032_read(struct i2c_client *client, const u8 reg)
250 s32 data = i2c_smbus_read_word_swapped(client, reg);
251 dev_dbg(&client->dev, "%s: read 0x%04x from 0x%02x\n", __func__,
256 static int mt9v032_write(struct i2c_client *client, const u8 reg,
259 dev_dbg(&client->dev, "%s: writing 0x%04x to 0x%02x\n", __func__,
261 return i2c_smbus_write_word_swapped(client, reg, data);
264 static int mt9v032_set_chip_control(struct mt9v032 *mt9v032, u16 clear, u16 set)
266 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
267 u16 value = (mt9v032->chip_control & ~clear) | set;
270 ret = mt9v032_write(client, MT9V032_CHIP_CONTROL, value);
274 mt9v032->chip_control = value;
279 mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable)
281 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
282 u16 value = mt9v032->aec_agc;
290 ret = mt9v032_write(client, MT9V032_AEC_AGC_ENABLE, value);
294 mt9v032->aec_agc = value;
299 mt9v032_update_hblank(struct mt9v032 *mt9v032)
301 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
302 struct v4l2_rect *crop = &mt9v032->crop;
303 unsigned int min_hblank = mt9v032->model->data->min_hblank;
306 if (mt9v032->version->version == MT9V034_CHIP_ID_REV1)
307 min_hblank += (mt9v032->hratio - 1) * 10;
308 min_hblank = max_t(unsigned int, (int)mt9v032->model->data->min_row_time - crop->width,
310 hblank = max_t(unsigned int, mt9v032->hblank, min_hblank);
312 return mt9v032_write(client, MT9V032_HORIZONTAL_BLANKING, hblank);
315 static int mt9v032_power_on(struct mt9v032 *mt9v032)
317 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
320 ret = clk_set_rate(mt9v032->clk, mt9v032->sysclk);
324 ret = clk_prepare_enable(mt9v032->clk);
330 /* Reset the chip and stop data read out */
331 ret = mt9v032_write(client, MT9V032_RESET, 1);
335 ret = mt9v032_write(client, MT9V032_RESET, 0);
339 return mt9v032_write(client, MT9V032_CHIP_CONTROL, 0);
342 static void mt9v032_power_off(struct mt9v032 *mt9v032)
344 clk_disable_unprepare(mt9v032->clk);
347 static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on)
349 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
353 mt9v032_power_off(mt9v032);
357 ret = mt9v032_power_on(mt9v032);
361 /* Configure the pixel clock polarity */
362 if (mt9v032->pdata && mt9v032->pdata->clk_pol) {
363 ret = mt9v032_write(client, mt9v032->model->data->pclk_reg,
364 MT9V032_PIXEL_CLOCK_INV_PXL_CLK);
369 /* Disable the noise correction algorithm and restore the controls. */
370 ret = mt9v032_write(client, MT9V032_ROW_NOISE_CORR_CONTROL, 0);
374 return v4l2_ctrl_handler_setup(&mt9v032->ctrls);
377 /* -----------------------------------------------------------------------------
378 * V4L2 subdev video operations
381 static struct v4l2_mbus_framefmt *
382 __mt9v032_get_pad_format(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
383 unsigned int pad, enum v4l2_subdev_format_whence which)
386 case V4L2_SUBDEV_FORMAT_TRY:
387 return v4l2_subdev_get_try_format(fh, pad);
388 case V4L2_SUBDEV_FORMAT_ACTIVE:
389 return &mt9v032->format;
395 static struct v4l2_rect *
396 __mt9v032_get_pad_crop(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
397 unsigned int pad, enum v4l2_subdev_format_whence which)
400 case V4L2_SUBDEV_FORMAT_TRY:
401 return v4l2_subdev_get_try_crop(fh, pad);
402 case V4L2_SUBDEV_FORMAT_ACTIVE:
403 return &mt9v032->crop;
409 static int mt9v032_s_stream(struct v4l2_subdev *subdev, int enable)
411 const u16 mode = MT9V032_CHIP_CONTROL_MASTER_MODE
412 | MT9V032_CHIP_CONTROL_DOUT_ENABLE
413 | MT9V032_CHIP_CONTROL_SEQUENTIAL;
414 struct i2c_client *client = v4l2_get_subdevdata(subdev);
415 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
416 struct v4l2_rect *crop = &mt9v032->crop;
422 return mt9v032_set_chip_control(mt9v032, mode, 0);
424 /* Configure the window size and row/column bin */
425 hbin = fls(mt9v032->hratio) - 1;
426 vbin = fls(mt9v032->vratio) - 1;
427 ret = mt9v032_write(client, MT9V032_READ_MODE,
428 hbin << MT9V032_READ_MODE_COLUMN_BIN_SHIFT |
429 vbin << MT9V032_READ_MODE_ROW_BIN_SHIFT);
433 ret = mt9v032_write(client, MT9V032_COLUMN_START, crop->left);
437 ret = mt9v032_write(client, MT9V032_ROW_START, crop->top);
441 ret = mt9v032_write(client, MT9V032_WINDOW_WIDTH, crop->width);
445 ret = mt9v032_write(client, MT9V032_WINDOW_HEIGHT, crop->height);
449 ret = mt9v032_update_hblank(mt9v032);
453 /* Switch to master "normal" mode */
454 return mt9v032_set_chip_control(mt9v032, 0, mode);
457 static int mt9v032_enum_mbus_code(struct v4l2_subdev *subdev,
458 struct v4l2_subdev_fh *fh,
459 struct v4l2_subdev_mbus_code_enum *code)
464 code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
468 static int mt9v032_enum_frame_size(struct v4l2_subdev *subdev,
469 struct v4l2_subdev_fh *fh,
470 struct v4l2_subdev_frame_size_enum *fse)
472 if (fse->index >= 3 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
475 fse->min_width = MT9V032_WINDOW_WIDTH_DEF / (1 << fse->index);
476 fse->max_width = fse->min_width;
477 fse->min_height = MT9V032_WINDOW_HEIGHT_DEF / (1 << fse->index);
478 fse->max_height = fse->min_height;
483 static int mt9v032_get_format(struct v4l2_subdev *subdev,
484 struct v4l2_subdev_fh *fh,
485 struct v4l2_subdev_format *format)
487 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
489 format->format = *__mt9v032_get_pad_format(mt9v032, fh, format->pad,
494 static void mt9v032_configure_pixel_rate(struct mt9v032 *mt9v032)
496 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
499 ret = v4l2_ctrl_s_ctrl_int64(mt9v032->pixel_rate,
500 mt9v032->sysclk / mt9v032->hratio);
502 dev_warn(&client->dev, "failed to set pixel rate (%d)\n", ret);
505 static unsigned int mt9v032_calc_ratio(unsigned int input, unsigned int output)
507 /* Compute the power-of-two binning factor closest to the input size to
508 * output size ratio. Given that the output size is bounded by input/4
509 * and input, a generic implementation would be an ineffective luxury.
511 if (output * 3 > input * 2)
513 if (output * 3 > input)
518 static int mt9v032_set_format(struct v4l2_subdev *subdev,
519 struct v4l2_subdev_fh *fh,
520 struct v4l2_subdev_format *format)
522 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
523 struct v4l2_mbus_framefmt *__format;
524 struct v4l2_rect *__crop;
530 __crop = __mt9v032_get_pad_crop(mt9v032, fh, format->pad,
533 /* Clamp the width and height to avoid dividing by zero. */
534 width = clamp(ALIGN(format->format.width, 2),
535 max_t(unsigned int, __crop->width / 4,
536 MT9V032_WINDOW_WIDTH_MIN),
538 height = clamp(ALIGN(format->format.height, 2),
539 max_t(unsigned int, __crop->height / 4,
540 MT9V032_WINDOW_HEIGHT_MIN),
543 hratio = mt9v032_calc_ratio(__crop->width, width);
544 vratio = mt9v032_calc_ratio(__crop->height, height);
546 __format = __mt9v032_get_pad_format(mt9v032, fh, format->pad,
548 __format->width = __crop->width / hratio;
549 __format->height = __crop->height / vratio;
551 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
552 mt9v032->hratio = hratio;
553 mt9v032->vratio = vratio;
554 mt9v032_configure_pixel_rate(mt9v032);
557 format->format = *__format;
562 static int mt9v032_get_crop(struct v4l2_subdev *subdev,
563 struct v4l2_subdev_fh *fh,
564 struct v4l2_subdev_crop *crop)
566 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
568 crop->rect = *__mt9v032_get_pad_crop(mt9v032, fh, crop->pad,
573 static int mt9v032_set_crop(struct v4l2_subdev *subdev,
574 struct v4l2_subdev_fh *fh,
575 struct v4l2_subdev_crop *crop)
577 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
578 struct v4l2_mbus_framefmt *__format;
579 struct v4l2_rect *__crop;
580 struct v4l2_rect rect;
582 /* Clamp the crop rectangle boundaries and align them to a non multiple
583 * of 2 pixels to ensure a GRBG Bayer pattern.
585 rect.left = clamp(ALIGN(crop->rect.left + 1, 2) - 1,
586 MT9V032_COLUMN_START_MIN,
587 MT9V032_COLUMN_START_MAX);
588 rect.top = clamp(ALIGN(crop->rect.top + 1, 2) - 1,
589 MT9V032_ROW_START_MIN,
590 MT9V032_ROW_START_MAX);
591 rect.width = clamp_t(unsigned int, ALIGN(crop->rect.width, 2),
592 MT9V032_WINDOW_WIDTH_MIN,
593 MT9V032_WINDOW_WIDTH_MAX);
594 rect.height = clamp_t(unsigned int, ALIGN(crop->rect.height, 2),
595 MT9V032_WINDOW_HEIGHT_MIN,
596 MT9V032_WINDOW_HEIGHT_MAX);
598 rect.width = min_t(unsigned int,
599 rect.width, MT9V032_PIXEL_ARRAY_WIDTH - rect.left);
600 rect.height = min_t(unsigned int,
601 rect.height, MT9V032_PIXEL_ARRAY_HEIGHT - rect.top);
603 __crop = __mt9v032_get_pad_crop(mt9v032, fh, crop->pad, crop->which);
605 if (rect.width != __crop->width || rect.height != __crop->height) {
606 /* Reset the output image size if the crop rectangle size has
609 __format = __mt9v032_get_pad_format(mt9v032, fh, crop->pad,
611 __format->width = rect.width;
612 __format->height = rect.height;
613 if (crop->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
616 mt9v032_configure_pixel_rate(mt9v032);
626 /* -----------------------------------------------------------------------------
627 * V4L2 subdev control operations
630 #define V4L2_CID_TEST_PATTERN_COLOR (V4L2_CID_USER_BASE | 0x1001)
632 static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl)
634 struct mt9v032 *mt9v032 =
635 container_of(ctrl->handler, struct mt9v032, ctrls);
636 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
641 case V4L2_CID_AUTOGAIN:
642 return mt9v032_update_aec_agc(mt9v032, MT9V032_AGC_ENABLE,
646 return mt9v032_write(client, MT9V032_ANALOG_GAIN, ctrl->val);
648 case V4L2_CID_EXPOSURE_AUTO:
649 return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE,
652 case V4L2_CID_EXPOSURE:
653 return mt9v032_write(client, MT9V032_TOTAL_SHUTTER_WIDTH,
656 case V4L2_CID_HBLANK:
657 mt9v032->hblank = ctrl->val;
658 return mt9v032_update_hblank(mt9v032);
660 case V4L2_CID_VBLANK:
661 return mt9v032_write(client, MT9V032_VERTICAL_BLANKING,
664 case V4L2_CID_PIXEL_RATE:
665 case V4L2_CID_LINK_FREQ:
666 if (mt9v032->link_freq == NULL)
669 freq = mt9v032->pdata->link_freqs[mt9v032->link_freq->val];
670 *mt9v032->pixel_rate->p_new.p_s64 = freq;
671 mt9v032->sysclk = freq;
674 case V4L2_CID_TEST_PATTERN:
675 switch (mt9v032->test_pattern->val) {
680 data = MT9V032_TEST_PATTERN_GRAY_VERTICAL
681 | MT9V032_TEST_PATTERN_ENABLE;
684 data = MT9V032_TEST_PATTERN_GRAY_HORIZONTAL
685 | MT9V032_TEST_PATTERN_ENABLE;
688 data = MT9V032_TEST_PATTERN_GRAY_DIAGONAL
689 | MT9V032_TEST_PATTERN_ENABLE;
692 data = (mt9v032->test_pattern_color->val <<
693 MT9V032_TEST_PATTERN_DATA_SHIFT)
694 | MT9V032_TEST_PATTERN_USE_DATA
695 | MT9V032_TEST_PATTERN_ENABLE
696 | MT9V032_TEST_PATTERN_FLIP;
699 return mt9v032_write(client, MT9V032_TEST_PATTERN, data);
705 static struct v4l2_ctrl_ops mt9v032_ctrl_ops = {
706 .s_ctrl = mt9v032_s_ctrl,
709 static const char * const mt9v032_test_pattern_menu[] = {
711 "Gray Vertical Shade",
712 "Gray Horizontal Shade",
713 "Gray Diagonal Shade",
717 static const struct v4l2_ctrl_config mt9v032_test_pattern_color = {
718 .ops = &mt9v032_ctrl_ops,
719 .id = V4L2_CID_TEST_PATTERN_COLOR,
720 .type = V4L2_CTRL_TYPE_INTEGER,
721 .name = "Test Pattern Color",
729 /* -----------------------------------------------------------------------------
730 * V4L2 subdev core operations
733 static int mt9v032_set_power(struct v4l2_subdev *subdev, int on)
735 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
738 mutex_lock(&mt9v032->power_lock);
740 /* If the power count is modified from 0 to != 0 or from != 0 to 0,
741 * update the power state.
743 if (mt9v032->power_count == !on) {
744 ret = __mt9v032_set_power(mt9v032, !!on);
749 /* Update the power count. */
750 mt9v032->power_count += on ? 1 : -1;
751 WARN_ON(mt9v032->power_count < 0);
754 mutex_unlock(&mt9v032->power_lock);
758 /* -----------------------------------------------------------------------------
759 * V4L2 subdev internal operations
762 static int mt9v032_registered(struct v4l2_subdev *subdev)
764 struct i2c_client *client = v4l2_get_subdevdata(subdev);
765 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
770 dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n",
773 ret = mt9v032_power_on(mt9v032);
775 dev_err(&client->dev, "MT9V032 power up failed\n");
779 /* Read and check the sensor version */
780 version = mt9v032_read(client, MT9V032_CHIP_VERSION);
782 dev_err(&client->dev, "Failed reading chip version\n");
786 for (i = 0; i < ARRAY_SIZE(mt9v032_versions); ++i) {
787 if (mt9v032_versions[i].version == version) {
788 mt9v032->version = &mt9v032_versions[i];
793 if (mt9v032->version == NULL) {
794 dev_err(&client->dev, "Unsupported chip version 0x%04x\n",
799 mt9v032_power_off(mt9v032);
801 dev_info(&client->dev, "%s detected at address 0x%02x\n",
802 mt9v032->version->name, client->addr);
804 mt9v032_configure_pixel_rate(mt9v032);
809 static int mt9v032_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
811 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
812 struct v4l2_mbus_framefmt *format;
813 struct v4l2_rect *crop;
815 crop = v4l2_subdev_get_try_crop(fh, 0);
816 crop->left = MT9V032_COLUMN_START_DEF;
817 crop->top = MT9V032_ROW_START_DEF;
818 crop->width = MT9V032_WINDOW_WIDTH_DEF;
819 crop->height = MT9V032_WINDOW_HEIGHT_DEF;
821 format = v4l2_subdev_get_try_format(fh, 0);
823 if (mt9v032->model->color)
824 format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
826 format->code = V4L2_MBUS_FMT_Y10_1X10;
828 format->width = MT9V032_WINDOW_WIDTH_DEF;
829 format->height = MT9V032_WINDOW_HEIGHT_DEF;
830 format->field = V4L2_FIELD_NONE;
831 format->colorspace = V4L2_COLORSPACE_SRGB;
833 return mt9v032_set_power(subdev, 1);
836 static int mt9v032_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
838 return mt9v032_set_power(subdev, 0);
841 static struct v4l2_subdev_core_ops mt9v032_subdev_core_ops = {
842 .s_power = mt9v032_set_power,
845 static struct v4l2_subdev_video_ops mt9v032_subdev_video_ops = {
846 .s_stream = mt9v032_s_stream,
849 static struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops = {
850 .enum_mbus_code = mt9v032_enum_mbus_code,
851 .enum_frame_size = mt9v032_enum_frame_size,
852 .get_fmt = mt9v032_get_format,
853 .set_fmt = mt9v032_set_format,
854 .get_crop = mt9v032_get_crop,
855 .set_crop = mt9v032_set_crop,
858 static struct v4l2_subdev_ops mt9v032_subdev_ops = {
859 .core = &mt9v032_subdev_core_ops,
860 .video = &mt9v032_subdev_video_ops,
861 .pad = &mt9v032_subdev_pad_ops,
864 static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops = {
865 .registered = mt9v032_registered,
866 .open = mt9v032_open,
867 .close = mt9v032_close,
870 /* -----------------------------------------------------------------------------
871 * Driver initialization and probing
874 static int mt9v032_probe(struct i2c_client *client,
875 const struct i2c_device_id *did)
877 struct mt9v032_platform_data *pdata = client->dev.platform_data;
878 struct mt9v032 *mt9v032;
882 if (!i2c_check_functionality(client->adapter,
883 I2C_FUNC_SMBUS_WORD_DATA)) {
884 dev_warn(&client->adapter->dev,
885 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
889 mt9v032 = devm_kzalloc(&client->dev, sizeof(*mt9v032), GFP_KERNEL);
893 mt9v032->clk = devm_clk_get(&client->dev, NULL);
894 if (IS_ERR(mt9v032->clk))
895 return PTR_ERR(mt9v032->clk);
897 mutex_init(&mt9v032->power_lock);
898 mt9v032->pdata = pdata;
899 mt9v032->model = (const void *)did->driver_data;
901 v4l2_ctrl_handler_init(&mt9v032->ctrls, 10);
903 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
904 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
905 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
906 V4L2_CID_GAIN, MT9V032_ANALOG_GAIN_MIN,
907 MT9V032_ANALOG_GAIN_MAX, 1, MT9V032_ANALOG_GAIN_DEF);
908 v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops,
909 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 0,
911 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
912 V4L2_CID_EXPOSURE, mt9v032->model->data->min_shutter,
913 mt9v032->model->data->max_shutter, 1,
914 MT9V032_TOTAL_SHUTTER_WIDTH_DEF);
915 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
916 V4L2_CID_HBLANK, mt9v032->model->data->min_hblank,
917 MT9V032_HORIZONTAL_BLANKING_MAX, 1,
918 MT9V032_HORIZONTAL_BLANKING_DEF);
919 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
920 V4L2_CID_VBLANK, mt9v032->model->data->min_vblank,
921 mt9v032->model->data->max_vblank, 1,
922 MT9V032_VERTICAL_BLANKING_DEF);
923 mt9v032->test_pattern = v4l2_ctrl_new_std_menu_items(&mt9v032->ctrls,
924 &mt9v032_ctrl_ops, V4L2_CID_TEST_PATTERN,
925 ARRAY_SIZE(mt9v032_test_pattern_menu) - 1, 0, 0,
926 mt9v032_test_pattern_menu);
927 mt9v032->test_pattern_color = v4l2_ctrl_new_custom(&mt9v032->ctrls,
928 &mt9v032_test_pattern_color, NULL);
930 v4l2_ctrl_cluster(2, &mt9v032->test_pattern);
932 mt9v032->pixel_rate =
933 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
934 V4L2_CID_PIXEL_RATE, 1, INT_MAX, 1, 1);
936 if (pdata && pdata->link_freqs) {
937 unsigned int def = 0;
939 for (i = 0; pdata->link_freqs[i]; ++i) {
940 if (pdata->link_freqs[i] == pdata->link_def_freq)
945 v4l2_ctrl_new_int_menu(&mt9v032->ctrls,
947 V4L2_CID_LINK_FREQ, i - 1, def,
949 v4l2_ctrl_cluster(2, &mt9v032->link_freq);
953 mt9v032->subdev.ctrl_handler = &mt9v032->ctrls;
955 if (mt9v032->ctrls.error)
956 printk(KERN_INFO "%s: control initialization error %d\n",
957 __func__, mt9v032->ctrls.error);
959 mt9v032->crop.left = MT9V032_COLUMN_START_DEF;
960 mt9v032->crop.top = MT9V032_ROW_START_DEF;
961 mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF;
962 mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF;
964 if (mt9v032->model->color)
965 mt9v032->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
967 mt9v032->format.code = V4L2_MBUS_FMT_Y10_1X10;
969 mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF;
970 mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF;
971 mt9v032->format.field = V4L2_FIELD_NONE;
972 mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB;
977 mt9v032->aec_agc = MT9V032_AEC_ENABLE | MT9V032_AGC_ENABLE;
978 mt9v032->hblank = MT9V032_HORIZONTAL_BLANKING_DEF;
979 mt9v032->sysclk = MT9V032_SYSCLK_FREQ_DEF;
981 v4l2_i2c_subdev_init(&mt9v032->subdev, client, &mt9v032_subdev_ops);
982 mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops;
983 mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
985 mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE;
986 ret = media_entity_init(&mt9v032->subdev.entity, 1, &mt9v032->pad, 0);
989 v4l2_ctrl_handler_free(&mt9v032->ctrls);
994 static int mt9v032_remove(struct i2c_client *client)
996 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
997 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
999 v4l2_ctrl_handler_free(&mt9v032->ctrls);
1000 v4l2_device_unregister_subdev(subdev);
1001 media_entity_cleanup(&subdev->entity);
1006 static const struct i2c_device_id mt9v032_id[] = {
1007 { "mt9v032", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V032_COLOR] },
1008 { "mt9v032m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V032_MONO] },
1009 { "mt9v034", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V034_COLOR] },
1010 { "mt9v034m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_V034_MONO] },
1013 MODULE_DEVICE_TABLE(i2c, mt9v032_id);
1015 static struct i2c_driver mt9v032_driver = {
1019 .probe = mt9v032_probe,
1020 .remove = mt9v032_remove,
1021 .id_table = mt9v032_id,
1024 module_i2c_driver(mt9v032_driver);
1026 MODULE_DESCRIPTION("Aptina MT9V032 Camera driver");
1027 MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
1028 MODULE_LICENSE("GPL");