2 * Driver for MT9V032 CMOS Image Sensor from Micron
4 * Copyright (C) 2010, Laurent Pinchart <laurent.pinchart@ideasonboard.com>
6 * Based on the MT9M001 driver,
8 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License version 2 as
12 * published by the Free Software Foundation.
15 #include <linux/clk.h>
16 #include <linux/delay.h>
17 #include <linux/i2c.h>
18 #include <linux/log2.h>
19 #include <linux/mutex.h>
20 #include <linux/slab.h>
21 #include <linux/videodev2.h>
22 #include <linux/v4l2-mediabus.h>
23 #include <linux/module.h>
25 #include <media/mt9v032.h>
26 #include <media/v4l2-ctrls.h>
27 #include <media/v4l2-device.h>
28 #include <media/v4l2-subdev.h>
30 /* The first four rows are black rows. The active area spans 753x481 pixels. */
31 #define MT9V032_PIXEL_ARRAY_HEIGHT 485
32 #define MT9V032_PIXEL_ARRAY_WIDTH 753
34 #define MT9V032_SYSCLK_FREQ_DEF 26600000
36 #define MT9V032_CHIP_VERSION 0x00
37 #define MT9V032_CHIP_ID_REV1 0x1311
38 #define MT9V032_CHIP_ID_REV3 0x1313
39 #define MT9V032_COLUMN_START 0x01
40 #define MT9V032_COLUMN_START_MIN 1
41 #define MT9V032_COLUMN_START_DEF 1
42 #define MT9V032_COLUMN_START_MAX 752
43 #define MT9V032_ROW_START 0x02
44 #define MT9V032_ROW_START_MIN 4
45 #define MT9V032_ROW_START_DEF 5
46 #define MT9V032_ROW_START_MAX 482
47 #define MT9V032_WINDOW_HEIGHT 0x03
48 #define MT9V032_WINDOW_HEIGHT_MIN 1
49 #define MT9V032_WINDOW_HEIGHT_DEF 480
50 #define MT9V032_WINDOW_HEIGHT_MAX 480
51 #define MT9V032_WINDOW_WIDTH 0x04
52 #define MT9V032_WINDOW_WIDTH_MIN 1
53 #define MT9V032_WINDOW_WIDTH_DEF 752
54 #define MT9V032_WINDOW_WIDTH_MAX 752
55 #define MT9V032_HORIZONTAL_BLANKING 0x05
56 #define MT9V032_HORIZONTAL_BLANKING_MIN 43
57 #define MT9V032_HORIZONTAL_BLANKING_DEF 94
58 #define MT9V032_HORIZONTAL_BLANKING_MAX 1023
59 #define MT9V032_VERTICAL_BLANKING 0x06
60 #define MT9V032_VERTICAL_BLANKING_MIN 4
61 #define MT9V032_VERTICAL_BLANKING_DEF 45
62 #define MT9V032_VERTICAL_BLANKING_MAX 3000
63 #define MT9V032_CHIP_CONTROL 0x07
64 #define MT9V032_CHIP_CONTROL_MASTER_MODE (1 << 3)
65 #define MT9V032_CHIP_CONTROL_DOUT_ENABLE (1 << 7)
66 #define MT9V032_CHIP_CONTROL_SEQUENTIAL (1 << 8)
67 #define MT9V032_SHUTTER_WIDTH1 0x08
68 #define MT9V032_SHUTTER_WIDTH2 0x09
69 #define MT9V032_SHUTTER_WIDTH_CONTROL 0x0a
70 #define MT9V032_TOTAL_SHUTTER_WIDTH 0x0b
71 #define MT9V032_TOTAL_SHUTTER_WIDTH_MIN 1
72 #define MT9V032_TOTAL_SHUTTER_WIDTH_DEF 480
73 #define MT9V032_TOTAL_SHUTTER_WIDTH_MAX 32767
74 #define MT9V032_RESET 0x0c
75 #define MT9V032_READ_MODE 0x0d
76 #define MT9V032_READ_MODE_ROW_BIN_MASK (3 << 0)
77 #define MT9V032_READ_MODE_ROW_BIN_SHIFT 0
78 #define MT9V032_READ_MODE_COLUMN_BIN_MASK (3 << 2)
79 #define MT9V032_READ_MODE_COLUMN_BIN_SHIFT 2
80 #define MT9V032_READ_MODE_ROW_FLIP (1 << 4)
81 #define MT9V032_READ_MODE_COLUMN_FLIP (1 << 5)
82 #define MT9V032_READ_MODE_DARK_COLUMNS (1 << 6)
83 #define MT9V032_READ_MODE_DARK_ROWS (1 << 7)
84 #define MT9V032_PIXEL_OPERATION_MODE 0x0f
85 #define MT9V032_PIXEL_OPERATION_MODE_COLOR (1 << 2)
86 #define MT9V032_PIXEL_OPERATION_MODE_HDR (1 << 6)
87 #define MT9V032_ANALOG_GAIN 0x35
88 #define MT9V032_ANALOG_GAIN_MIN 16
89 #define MT9V032_ANALOG_GAIN_DEF 16
90 #define MT9V032_ANALOG_GAIN_MAX 64
91 #define MT9V032_MAX_ANALOG_GAIN 0x36
92 #define MT9V032_MAX_ANALOG_GAIN_MAX 127
93 #define MT9V032_FRAME_DARK_AVERAGE 0x42
94 #define MT9V032_DARK_AVG_THRESH 0x46
95 #define MT9V032_DARK_AVG_LOW_THRESH_MASK (255 << 0)
96 #define MT9V032_DARK_AVG_LOW_THRESH_SHIFT 0
97 #define MT9V032_DARK_AVG_HIGH_THRESH_MASK (255 << 8)
98 #define MT9V032_DARK_AVG_HIGH_THRESH_SHIFT 8
99 #define MT9V032_ROW_NOISE_CORR_CONTROL 0x70
100 #define MT9V032_ROW_NOISE_CORR_ENABLE (1 << 5)
101 #define MT9V032_ROW_NOISE_CORR_USE_BLK_AVG (1 << 7)
102 #define MT9V032_PIXEL_CLOCK 0x74
103 #define MT9V032_PIXEL_CLOCK_INV_LINE (1 << 0)
104 #define MT9V032_PIXEL_CLOCK_INV_FRAME (1 << 1)
105 #define MT9V032_PIXEL_CLOCK_XOR_LINE (1 << 2)
106 #define MT9V032_PIXEL_CLOCK_CONT_LINE (1 << 3)
107 #define MT9V032_PIXEL_CLOCK_INV_PXL_CLK (1 << 4)
108 #define MT9V032_TEST_PATTERN 0x7f
109 #define MT9V032_TEST_PATTERN_DATA_MASK (1023 << 0)
110 #define MT9V032_TEST_PATTERN_DATA_SHIFT 0
111 #define MT9V032_TEST_PATTERN_USE_DATA (1 << 10)
112 #define MT9V032_TEST_PATTERN_GRAY_MASK (3 << 11)
113 #define MT9V032_TEST_PATTERN_GRAY_NONE (0 << 11)
114 #define MT9V032_TEST_PATTERN_GRAY_VERTICAL (1 << 11)
115 #define MT9V032_TEST_PATTERN_GRAY_HORIZONTAL (2 << 11)
116 #define MT9V032_TEST_PATTERN_GRAY_DIAGONAL (3 << 11)
117 #define MT9V032_TEST_PATTERN_ENABLE (1 << 13)
118 #define MT9V032_TEST_PATTERN_FLIP (1 << 14)
119 #define MT9V032_AEC_AGC_ENABLE 0xaf
120 #define MT9V032_AEC_ENABLE (1 << 0)
121 #define MT9V032_AGC_ENABLE (1 << 1)
122 #define MT9V032_THERMAL_INFO 0xc1
129 struct mt9v032_model_info {
133 static const struct mt9v032_model_info mt9v032_models[] = {
134 [MT9V032_MODEL_COLOR] = {
137 [MT9V032_MODEL_MONO] = {
143 struct v4l2_subdev subdev;
144 struct media_pad pad;
146 struct v4l2_mbus_framefmt format;
147 struct v4l2_rect crop;
151 struct v4l2_ctrl_handler ctrls;
153 struct v4l2_ctrl *link_freq;
154 struct v4l2_ctrl *pixel_rate;
157 struct mutex power_lock;
162 struct mt9v032_platform_data *pdata;
163 const struct mt9v032_model_info *model;
170 struct v4l2_ctrl *test_pattern;
171 struct v4l2_ctrl *test_pattern_color;
175 static struct mt9v032 *to_mt9v032(struct v4l2_subdev *sd)
177 return container_of(sd, struct mt9v032, subdev);
180 static int mt9v032_read(struct i2c_client *client, const u8 reg)
182 s32 data = i2c_smbus_read_word_swapped(client, reg);
183 dev_dbg(&client->dev, "%s: read 0x%04x from 0x%02x\n", __func__,
188 static int mt9v032_write(struct i2c_client *client, const u8 reg,
191 dev_dbg(&client->dev, "%s: writing 0x%04x to 0x%02x\n", __func__,
193 return i2c_smbus_write_word_swapped(client, reg, data);
196 static int mt9v032_set_chip_control(struct mt9v032 *mt9v032, u16 clear, u16 set)
198 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
199 u16 value = (mt9v032->chip_control & ~clear) | set;
202 ret = mt9v032_write(client, MT9V032_CHIP_CONTROL, value);
206 mt9v032->chip_control = value;
211 mt9v032_update_aec_agc(struct mt9v032 *mt9v032, u16 which, int enable)
213 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
214 u16 value = mt9v032->aec_agc;
222 ret = mt9v032_write(client, MT9V032_AEC_AGC_ENABLE, value);
226 mt9v032->aec_agc = value;
231 mt9v032_update_hblank(struct mt9v032 *mt9v032)
233 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
234 struct v4l2_rect *crop = &mt9v032->crop;
236 return mt9v032_write(client, MT9V032_HORIZONTAL_BLANKING,
237 max_t(s32, mt9v032->hblank, 660 - crop->width));
240 static int mt9v032_power_on(struct mt9v032 *mt9v032)
242 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
245 clk_set_rate(mt9v032->clk, mt9v032->sysclk);
246 clk_prepare_enable(mt9v032->clk);
249 /* Reset the chip and stop data read out */
250 ret = mt9v032_write(client, MT9V032_RESET, 1);
254 ret = mt9v032_write(client, MT9V032_RESET, 0);
258 return mt9v032_write(client, MT9V032_CHIP_CONTROL, 0);
261 static void mt9v032_power_off(struct mt9v032 *mt9v032)
263 clk_disable_unprepare(mt9v032->clk);
266 static int __mt9v032_set_power(struct mt9v032 *mt9v032, bool on)
268 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
272 mt9v032_power_off(mt9v032);
276 ret = mt9v032_power_on(mt9v032);
280 /* Configure the pixel clock polarity */
281 if (mt9v032->pdata && mt9v032->pdata->clk_pol) {
282 ret = mt9v032_write(client, MT9V032_PIXEL_CLOCK,
283 MT9V032_PIXEL_CLOCK_INV_PXL_CLK);
288 /* Disable the noise correction algorithm and restore the controls. */
289 ret = mt9v032_write(client, MT9V032_ROW_NOISE_CORR_CONTROL, 0);
293 return v4l2_ctrl_handler_setup(&mt9v032->ctrls);
296 /* -----------------------------------------------------------------------------
297 * V4L2 subdev video operations
300 static struct v4l2_mbus_framefmt *
301 __mt9v032_get_pad_format(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
302 unsigned int pad, enum v4l2_subdev_format_whence which)
305 case V4L2_SUBDEV_FORMAT_TRY:
306 return v4l2_subdev_get_try_format(fh, pad);
307 case V4L2_SUBDEV_FORMAT_ACTIVE:
308 return &mt9v032->format;
314 static struct v4l2_rect *
315 __mt9v032_get_pad_crop(struct mt9v032 *mt9v032, struct v4l2_subdev_fh *fh,
316 unsigned int pad, enum v4l2_subdev_format_whence which)
319 case V4L2_SUBDEV_FORMAT_TRY:
320 return v4l2_subdev_get_try_crop(fh, pad);
321 case V4L2_SUBDEV_FORMAT_ACTIVE:
322 return &mt9v032->crop;
328 static int mt9v032_s_stream(struct v4l2_subdev *subdev, int enable)
330 const u16 mode = MT9V032_CHIP_CONTROL_MASTER_MODE
331 | MT9V032_CHIP_CONTROL_DOUT_ENABLE
332 | MT9V032_CHIP_CONTROL_SEQUENTIAL;
333 struct i2c_client *client = v4l2_get_subdevdata(subdev);
334 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
335 struct v4l2_rect *crop = &mt9v032->crop;
341 return mt9v032_set_chip_control(mt9v032, mode, 0);
343 /* Configure the window size and row/column bin */
344 hbin = fls(mt9v032->hratio) - 1;
345 vbin = fls(mt9v032->vratio) - 1;
346 ret = mt9v032_write(client, MT9V032_READ_MODE,
347 hbin << MT9V032_READ_MODE_COLUMN_BIN_SHIFT |
348 vbin << MT9V032_READ_MODE_ROW_BIN_SHIFT);
352 ret = mt9v032_write(client, MT9V032_COLUMN_START, crop->left);
356 ret = mt9v032_write(client, MT9V032_ROW_START, crop->top);
360 ret = mt9v032_write(client, MT9V032_WINDOW_WIDTH, crop->width);
364 ret = mt9v032_write(client, MT9V032_WINDOW_HEIGHT, crop->height);
368 ret = mt9v032_update_hblank(mt9v032);
372 /* Switch to master "normal" mode */
373 return mt9v032_set_chip_control(mt9v032, 0, mode);
376 static int mt9v032_enum_mbus_code(struct v4l2_subdev *subdev,
377 struct v4l2_subdev_fh *fh,
378 struct v4l2_subdev_mbus_code_enum *code)
383 code->code = V4L2_MBUS_FMT_SGRBG10_1X10;
387 static int mt9v032_enum_frame_size(struct v4l2_subdev *subdev,
388 struct v4l2_subdev_fh *fh,
389 struct v4l2_subdev_frame_size_enum *fse)
391 if (fse->index >= 3 || fse->code != V4L2_MBUS_FMT_SGRBG10_1X10)
394 fse->min_width = MT9V032_WINDOW_WIDTH_DEF / (1 << fse->index);
395 fse->max_width = fse->min_width;
396 fse->min_height = MT9V032_WINDOW_HEIGHT_DEF / (1 << fse->index);
397 fse->max_height = fse->min_height;
402 static int mt9v032_get_format(struct v4l2_subdev *subdev,
403 struct v4l2_subdev_fh *fh,
404 struct v4l2_subdev_format *format)
406 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
408 format->format = *__mt9v032_get_pad_format(mt9v032, fh, format->pad,
413 static void mt9v032_configure_pixel_rate(struct mt9v032 *mt9v032)
415 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
418 ret = v4l2_ctrl_s_ctrl_int64(mt9v032->pixel_rate,
419 mt9v032->sysclk / mt9v032->hratio);
421 dev_warn(&client->dev, "failed to set pixel rate (%d)\n", ret);
424 static unsigned int mt9v032_calc_ratio(unsigned int input, unsigned int output)
426 /* Compute the power-of-two binning factor closest to the input size to
427 * output size ratio. Given that the output size is bounded by input/4
428 * and input, a generic implementation would be an ineffective luxury.
430 if (output * 3 > input * 2)
432 if (output * 3 > input)
437 static int mt9v032_set_format(struct v4l2_subdev *subdev,
438 struct v4l2_subdev_fh *fh,
439 struct v4l2_subdev_format *format)
441 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
442 struct v4l2_mbus_framefmt *__format;
443 struct v4l2_rect *__crop;
449 __crop = __mt9v032_get_pad_crop(mt9v032, fh, format->pad,
452 /* Clamp the width and height to avoid dividing by zero. */
453 width = clamp_t(unsigned int, ALIGN(format->format.width, 2),
454 max(__crop->width / 4, MT9V032_WINDOW_WIDTH_MIN),
456 height = clamp_t(unsigned int, ALIGN(format->format.height, 2),
457 max(__crop->height / 4, MT9V032_WINDOW_HEIGHT_MIN),
460 hratio = mt9v032_calc_ratio(__crop->width, width);
461 vratio = mt9v032_calc_ratio(__crop->height, height);
463 __format = __mt9v032_get_pad_format(mt9v032, fh, format->pad,
465 __format->width = __crop->width / hratio;
466 __format->height = __crop->height / vratio;
468 if (format->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
469 mt9v032->hratio = hratio;
470 mt9v032->vratio = vratio;
471 mt9v032_configure_pixel_rate(mt9v032);
474 format->format = *__format;
479 static int mt9v032_get_crop(struct v4l2_subdev *subdev,
480 struct v4l2_subdev_fh *fh,
481 struct v4l2_subdev_crop *crop)
483 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
485 crop->rect = *__mt9v032_get_pad_crop(mt9v032, fh, crop->pad,
490 static int mt9v032_set_crop(struct v4l2_subdev *subdev,
491 struct v4l2_subdev_fh *fh,
492 struct v4l2_subdev_crop *crop)
494 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
495 struct v4l2_mbus_framefmt *__format;
496 struct v4l2_rect *__crop;
497 struct v4l2_rect rect;
499 /* Clamp the crop rectangle boundaries and align them to a non multiple
500 * of 2 pixels to ensure a GRBG Bayer pattern.
502 rect.left = clamp(ALIGN(crop->rect.left + 1, 2) - 1,
503 MT9V032_COLUMN_START_MIN,
504 MT9V032_COLUMN_START_MAX);
505 rect.top = clamp(ALIGN(crop->rect.top + 1, 2) - 1,
506 MT9V032_ROW_START_MIN,
507 MT9V032_ROW_START_MAX);
508 rect.width = clamp(ALIGN(crop->rect.width, 2),
509 MT9V032_WINDOW_WIDTH_MIN,
510 MT9V032_WINDOW_WIDTH_MAX);
511 rect.height = clamp(ALIGN(crop->rect.height, 2),
512 MT9V032_WINDOW_HEIGHT_MIN,
513 MT9V032_WINDOW_HEIGHT_MAX);
515 rect.width = min(rect.width, MT9V032_PIXEL_ARRAY_WIDTH - rect.left);
516 rect.height = min(rect.height, MT9V032_PIXEL_ARRAY_HEIGHT - rect.top);
518 __crop = __mt9v032_get_pad_crop(mt9v032, fh, crop->pad, crop->which);
520 if (rect.width != __crop->width || rect.height != __crop->height) {
521 /* Reset the output image size if the crop rectangle size has
524 __format = __mt9v032_get_pad_format(mt9v032, fh, crop->pad,
526 __format->width = rect.width;
527 __format->height = rect.height;
528 if (crop->which == V4L2_SUBDEV_FORMAT_ACTIVE) {
531 mt9v032_configure_pixel_rate(mt9v032);
541 /* -----------------------------------------------------------------------------
542 * V4L2 subdev control operations
545 #define V4L2_CID_TEST_PATTERN_COLOR (V4L2_CID_USER_BASE | 0x1001)
547 static int mt9v032_s_ctrl(struct v4l2_ctrl *ctrl)
549 struct mt9v032 *mt9v032 =
550 container_of(ctrl->handler, struct mt9v032, ctrls);
551 struct i2c_client *client = v4l2_get_subdevdata(&mt9v032->subdev);
556 case V4L2_CID_AUTOGAIN:
557 return mt9v032_update_aec_agc(mt9v032, MT9V032_AGC_ENABLE,
561 return mt9v032_write(client, MT9V032_ANALOG_GAIN, ctrl->val);
563 case V4L2_CID_EXPOSURE_AUTO:
564 return mt9v032_update_aec_agc(mt9v032, MT9V032_AEC_ENABLE,
567 case V4L2_CID_EXPOSURE:
568 return mt9v032_write(client, MT9V032_TOTAL_SHUTTER_WIDTH,
571 case V4L2_CID_HBLANK:
572 mt9v032->hblank = ctrl->val;
573 return mt9v032_update_hblank(mt9v032);
575 case V4L2_CID_VBLANK:
576 return mt9v032_write(client, MT9V032_VERTICAL_BLANKING,
579 case V4L2_CID_PIXEL_RATE:
580 case V4L2_CID_LINK_FREQ:
581 if (mt9v032->link_freq == NULL)
584 freq = mt9v032->pdata->link_freqs[mt9v032->link_freq->val];
585 mt9v032->pixel_rate->val64 = freq;
586 mt9v032->sysclk = freq;
589 case V4L2_CID_TEST_PATTERN:
590 switch (mt9v032->test_pattern->val) {
595 data = MT9V032_TEST_PATTERN_GRAY_VERTICAL
596 | MT9V032_TEST_PATTERN_ENABLE;
599 data = MT9V032_TEST_PATTERN_GRAY_HORIZONTAL
600 | MT9V032_TEST_PATTERN_ENABLE;
603 data = MT9V032_TEST_PATTERN_GRAY_DIAGONAL
604 | MT9V032_TEST_PATTERN_ENABLE;
607 data = (mt9v032->test_pattern_color->val <<
608 MT9V032_TEST_PATTERN_DATA_SHIFT)
609 | MT9V032_TEST_PATTERN_USE_DATA
610 | MT9V032_TEST_PATTERN_ENABLE
611 | MT9V032_TEST_PATTERN_FLIP;
614 return mt9v032_write(client, MT9V032_TEST_PATTERN, data);
620 static struct v4l2_ctrl_ops mt9v032_ctrl_ops = {
621 .s_ctrl = mt9v032_s_ctrl,
624 static const char * const mt9v032_test_pattern_menu[] = {
626 "Gray Vertical Shade",
627 "Gray Horizontal Shade",
628 "Gray Diagonal Shade",
632 static const struct v4l2_ctrl_config mt9v032_test_pattern_color = {
633 .ops = &mt9v032_ctrl_ops,
634 .id = V4L2_CID_TEST_PATTERN_COLOR,
635 .type = V4L2_CTRL_TYPE_INTEGER,
636 .name = "Test Pattern Color",
644 /* -----------------------------------------------------------------------------
645 * V4L2 subdev core operations
648 static int mt9v032_set_power(struct v4l2_subdev *subdev, int on)
650 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
653 mutex_lock(&mt9v032->power_lock);
655 /* If the power count is modified from 0 to != 0 or from != 0 to 0,
656 * update the power state.
658 if (mt9v032->power_count == !on) {
659 ret = __mt9v032_set_power(mt9v032, !!on);
664 /* Update the power count. */
665 mt9v032->power_count += on ? 1 : -1;
666 WARN_ON(mt9v032->power_count < 0);
669 mutex_unlock(&mt9v032->power_lock);
673 /* -----------------------------------------------------------------------------
674 * V4L2 subdev internal operations
677 static int mt9v032_registered(struct v4l2_subdev *subdev)
679 struct i2c_client *client = v4l2_get_subdevdata(subdev);
680 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
684 dev_info(&client->dev, "Probing MT9V032 at address 0x%02x\n",
687 ret = mt9v032_power_on(mt9v032);
689 dev_err(&client->dev, "MT9V032 power up failed\n");
693 /* Read and check the sensor version */
694 data = mt9v032_read(client, MT9V032_CHIP_VERSION);
695 if (data != MT9V032_CHIP_ID_REV1 && data != MT9V032_CHIP_ID_REV3) {
696 dev_err(&client->dev, "MT9V032 not detected, wrong version "
701 mt9v032_power_off(mt9v032);
703 dev_info(&client->dev, "MT9V032 detected at address 0x%02x\n",
706 mt9v032_configure_pixel_rate(mt9v032);
711 static int mt9v032_open(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
713 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
714 struct v4l2_mbus_framefmt *format;
715 struct v4l2_rect *crop;
717 crop = v4l2_subdev_get_try_crop(fh, 0);
718 crop->left = MT9V032_COLUMN_START_DEF;
719 crop->top = MT9V032_ROW_START_DEF;
720 crop->width = MT9V032_WINDOW_WIDTH_DEF;
721 crop->height = MT9V032_WINDOW_HEIGHT_DEF;
723 format = v4l2_subdev_get_try_format(fh, 0);
725 if (mt9v032->model->color)
726 format->code = V4L2_MBUS_FMT_SGRBG10_1X10;
728 format->code = V4L2_MBUS_FMT_Y10_1X10;
730 format->width = MT9V032_WINDOW_WIDTH_DEF;
731 format->height = MT9V032_WINDOW_HEIGHT_DEF;
732 format->field = V4L2_FIELD_NONE;
733 format->colorspace = V4L2_COLORSPACE_SRGB;
735 return mt9v032_set_power(subdev, 1);
738 static int mt9v032_close(struct v4l2_subdev *subdev, struct v4l2_subdev_fh *fh)
740 return mt9v032_set_power(subdev, 0);
743 static struct v4l2_subdev_core_ops mt9v032_subdev_core_ops = {
744 .s_power = mt9v032_set_power,
747 static struct v4l2_subdev_video_ops mt9v032_subdev_video_ops = {
748 .s_stream = mt9v032_s_stream,
751 static struct v4l2_subdev_pad_ops mt9v032_subdev_pad_ops = {
752 .enum_mbus_code = mt9v032_enum_mbus_code,
753 .enum_frame_size = mt9v032_enum_frame_size,
754 .get_fmt = mt9v032_get_format,
755 .set_fmt = mt9v032_set_format,
756 .get_crop = mt9v032_get_crop,
757 .set_crop = mt9v032_set_crop,
760 static struct v4l2_subdev_ops mt9v032_subdev_ops = {
761 .core = &mt9v032_subdev_core_ops,
762 .video = &mt9v032_subdev_video_ops,
763 .pad = &mt9v032_subdev_pad_ops,
766 static const struct v4l2_subdev_internal_ops mt9v032_subdev_internal_ops = {
767 .registered = mt9v032_registered,
768 .open = mt9v032_open,
769 .close = mt9v032_close,
772 /* -----------------------------------------------------------------------------
773 * Driver initialization and probing
776 static int mt9v032_probe(struct i2c_client *client,
777 const struct i2c_device_id *did)
779 struct mt9v032_platform_data *pdata = client->dev.platform_data;
780 struct mt9v032 *mt9v032;
784 if (!i2c_check_functionality(client->adapter,
785 I2C_FUNC_SMBUS_WORD_DATA)) {
786 dev_warn(&client->adapter->dev,
787 "I2C-Adapter doesn't support I2C_FUNC_SMBUS_WORD\n");
791 mt9v032 = devm_kzalloc(&client->dev, sizeof(*mt9v032), GFP_KERNEL);
795 mt9v032->clk = devm_clk_get(&client->dev, NULL);
796 if (IS_ERR(mt9v032->clk))
797 return PTR_ERR(mt9v032->clk);
799 mutex_init(&mt9v032->power_lock);
800 mt9v032->pdata = pdata;
801 mt9v032->model = (const void *)did->driver_data;
803 v4l2_ctrl_handler_init(&mt9v032->ctrls, 10);
805 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
806 V4L2_CID_AUTOGAIN, 0, 1, 1, 1);
807 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
808 V4L2_CID_GAIN, MT9V032_ANALOG_GAIN_MIN,
809 MT9V032_ANALOG_GAIN_MAX, 1, MT9V032_ANALOG_GAIN_DEF);
810 v4l2_ctrl_new_std_menu(&mt9v032->ctrls, &mt9v032_ctrl_ops,
811 V4L2_CID_EXPOSURE_AUTO, V4L2_EXPOSURE_MANUAL, 0,
813 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
814 V4L2_CID_EXPOSURE, MT9V032_TOTAL_SHUTTER_WIDTH_MIN,
815 MT9V032_TOTAL_SHUTTER_WIDTH_MAX, 1,
816 MT9V032_TOTAL_SHUTTER_WIDTH_DEF);
817 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
818 V4L2_CID_HBLANK, MT9V032_HORIZONTAL_BLANKING_MIN,
819 MT9V032_HORIZONTAL_BLANKING_MAX, 1,
820 MT9V032_HORIZONTAL_BLANKING_DEF);
821 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
822 V4L2_CID_VBLANK, MT9V032_VERTICAL_BLANKING_MIN,
823 MT9V032_VERTICAL_BLANKING_MAX, 1,
824 MT9V032_VERTICAL_BLANKING_DEF);
825 mt9v032->test_pattern = v4l2_ctrl_new_std_menu_items(&mt9v032->ctrls,
826 &mt9v032_ctrl_ops, V4L2_CID_TEST_PATTERN,
827 ARRAY_SIZE(mt9v032_test_pattern_menu) - 1, 0, 0,
828 mt9v032_test_pattern_menu);
829 mt9v032->test_pattern_color = v4l2_ctrl_new_custom(&mt9v032->ctrls,
830 &mt9v032_test_pattern_color, NULL);
832 v4l2_ctrl_cluster(2, &mt9v032->test_pattern);
834 mt9v032->pixel_rate =
835 v4l2_ctrl_new_std(&mt9v032->ctrls, &mt9v032_ctrl_ops,
836 V4L2_CID_PIXEL_RATE, 0, 0, 1, 0);
838 if (pdata && pdata->link_freqs) {
839 unsigned int def = 0;
841 for (i = 0; pdata->link_freqs[i]; ++i) {
842 if (pdata->link_freqs[i] == pdata->link_def_freq)
847 v4l2_ctrl_new_int_menu(&mt9v032->ctrls,
849 V4L2_CID_LINK_FREQ, i - 1, def,
851 v4l2_ctrl_cluster(2, &mt9v032->link_freq);
855 mt9v032->subdev.ctrl_handler = &mt9v032->ctrls;
857 if (mt9v032->ctrls.error)
858 printk(KERN_INFO "%s: control initialization error %d\n",
859 __func__, mt9v032->ctrls.error);
861 mt9v032->crop.left = MT9V032_COLUMN_START_DEF;
862 mt9v032->crop.top = MT9V032_ROW_START_DEF;
863 mt9v032->crop.width = MT9V032_WINDOW_WIDTH_DEF;
864 mt9v032->crop.height = MT9V032_WINDOW_HEIGHT_DEF;
866 if (mt9v032->model->color)
867 mt9v032->format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
869 mt9v032->format.code = V4L2_MBUS_FMT_Y10_1X10;
871 mt9v032->format.width = MT9V032_WINDOW_WIDTH_DEF;
872 mt9v032->format.height = MT9V032_WINDOW_HEIGHT_DEF;
873 mt9v032->format.field = V4L2_FIELD_NONE;
874 mt9v032->format.colorspace = V4L2_COLORSPACE_SRGB;
879 mt9v032->aec_agc = MT9V032_AEC_ENABLE | MT9V032_AGC_ENABLE;
880 mt9v032->hblank = MT9V032_HORIZONTAL_BLANKING_DEF;
881 mt9v032->sysclk = MT9V032_SYSCLK_FREQ_DEF;
883 v4l2_i2c_subdev_init(&mt9v032->subdev, client, &mt9v032_subdev_ops);
884 mt9v032->subdev.internal_ops = &mt9v032_subdev_internal_ops;
885 mt9v032->subdev.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
887 mt9v032->pad.flags = MEDIA_PAD_FL_SOURCE;
888 ret = media_entity_init(&mt9v032->subdev.entity, 1, &mt9v032->pad, 0);
891 v4l2_ctrl_handler_free(&mt9v032->ctrls);
896 static int mt9v032_remove(struct i2c_client *client)
898 struct v4l2_subdev *subdev = i2c_get_clientdata(client);
899 struct mt9v032 *mt9v032 = to_mt9v032(subdev);
901 v4l2_ctrl_handler_free(&mt9v032->ctrls);
902 v4l2_device_unregister_subdev(subdev);
903 media_entity_cleanup(&subdev->entity);
908 static const struct i2c_device_id mt9v032_id[] = {
909 { "mt9v032", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_COLOR] },
910 { "mt9v032m", (kernel_ulong_t)&mt9v032_models[MT9V032_MODEL_MONO] },
913 MODULE_DEVICE_TABLE(i2c, mt9v032_id);
915 static struct i2c_driver mt9v032_driver = {
919 .probe = mt9v032_probe,
920 .remove = mt9v032_remove,
921 .id_table = mt9v032_id,
924 module_i2c_driver(mt9v032_driver);
926 MODULE_DESCRIPTION("Aptina MT9V032 Camera driver");
927 MODULE_AUTHOR("Laurent Pinchart <laurent.pinchart@ideasonboard.com>");
928 MODULE_LICENSE("GPL");