drivers/media/i2c/ov13858.c

   1 /*
   2  * Copyright (c) 2017 Intel Corporation.
   3  *
   4  * This program is free software; you can redistribute it and/or
   5  * modify it under the terms of the GNU General Public License version
   6  * 2 as published by the Free Software Foundation.
   7  *
   8  * This program is distributed in the hope that it will be useful,
   9  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  10  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
  11  * GNU General Public License for more details.
  12  *
  13  */
  14
  15 #include <linux/acpi.h>
  16 #include <linux/i2c.h>
  17 #include <linux/module.h>
  18 #include <linux/pm_runtime.h>
  19 #include <media/v4l2-ctrls.h>
  20 #include <media/v4l2-device.h>
  21
  22 #define OV13858_REG_VALUE_08BIT         1
  23 #define OV13858_REG_VALUE_16BIT         2
  24 #define OV13858_REG_VALUE_24BIT         3
  25
  26 #define OV13858_REG_MODE_SELECT         0x0100
  27 #define OV13858_MODE_STANDBY            0x00
  28 #define OV13858_MODE_STREAMING          0x01
  29
  30 #define OV13858_REG_SOFTWARE_RST        0x0103
  31 #define OV13858_SOFTWARE_RST            0x01
  32
  33 /* PLL1 generates PCLK and MIPI_PHY_CLK */
  34 #define OV13858_REG_PLL1_CTRL_0         0x0300
  35 #define OV13858_REG_PLL1_CTRL_1         0x0301
  36 #define OV13858_REG_PLL1_CTRL_2         0x0302
  37 #define OV13858_REG_PLL1_CTRL_3         0x0303
  38 #define OV13858_REG_PLL1_CTRL_4         0x0304
  39 #define OV13858_REG_PLL1_CTRL_5         0x0305
  40
  41 /* PLL2 generates DAC_CLK, SCLK and SRAM_CLK */
  42 #define OV13858_REG_PLL2_CTRL_B         0x030b
  43 #define OV13858_REG_PLL2_CTRL_C         0x030c
  44 #define OV13858_REG_PLL2_CTRL_D         0x030d
  45 #define OV13858_REG_PLL2_CTRL_E         0x030e
  46 #define OV13858_REG_PLL2_CTRL_F         0x030f
  47 #define OV13858_REG_PLL2_CTRL_12        0x0312
  48 #define OV13858_REG_MIPI_SC_CTRL0       0x3016
  49 #define OV13858_REG_MIPI_SC_CTRL1       0x3022
  50
  51 /* Chip ID */
  52 #define OV13858_REG_CHIP_ID             0x300a
  53 #define OV13858_CHIP_ID                 0x00d855
  54
  55 /* V_TIMING internal */
  56 #define OV13858_REG_VTS                 0x380e
  57 #define OV13858_VTS_30FPS               0x0c8e /* 30 fps */
  58 #define OV13858_VTS_60FPS               0x0648 /* 60 fps */
  59 #define OV13858_VTS_MAX                 0x7fff
  60 #define OV13858_VBLANK_MIN              56
  61
  62 /* HBLANK control - read only */
  63 #define OV13858_PPL_540MHZ              2244
  64 #define OV13858_PPL_1080MHZ             4488
  65
  66 /* Exposure control */
  67 #define OV13858_REG_EXPOSURE            0x3500
  68 #define OV13858_EXPOSURE_MIN            4
  69 #define OV13858_EXPOSURE_MAX            (OV13858_VTS_MAX - 8)
  70 #define OV13858_EXPOSURE_STEP           1
  71 #define OV13858_EXPOSURE_DEFAULT        0x640
  72
  73 /* Analog gain control */
  74 #define OV13858_REG_ANALOG_GAIN         0x3508
  75 #define OV13858_ANA_GAIN_MIN            0
  76 #define OV13858_ANA_GAIN_MAX            0x1fff
  77 #define OV13858_ANA_GAIN_STEP           1
  78 #define OV13858_ANA_GAIN_DEFAULT        0x80
  79
  80 /* Digital gain control */
  81 #define OV13858_REG_DIGITAL_GAIN        0x350a
  82 #define OV13858_DGTL_GAIN_MASK          0xf3
  83 #define OV13858_DGTL_GAIN_SHIFT         2
  84 #define OV13858_DGTL_GAIN_MIN           1
  85 #define OV13858_DGTL_GAIN_MAX           4
  86 #define OV13858_DGTL_GAIN_STEP          1
  87 #define OV13858_DGTL_GAIN_DEFAULT       1
  88
  89 /* Test Pattern Control */
  90 #define OV13858_REG_TEST_PATTERN        0x4503
  91 #define OV13858_TEST_PATTERN_ENABLE     BIT(7)
  92 #define OV13858_TEST_PATTERN_MASK       0xfc
  93
  94 /* Number of frames to skip */
  95 #define OV13858_NUM_OF_SKIP_FRAMES      2
  96
  97 struct ov13858_reg {
  98         u16 address;
  99         u8 val;
 100 };
 101
 102 struct ov13858_reg_list {
 103         u32 num_of_regs;
 104         const struct ov13858_reg *regs;
 105 };
 106
 107 /* Link frequency config */
 108 struct ov13858_link_freq_config {
 109         u32 pixel_rate;
 110         u32 pixels_per_line;
 111
 112         /* PLL registers for this link frequency */
 113         struct ov13858_reg_list reg_list;
 114 };
 115
 116 /* Mode : resolution and related config&values */
 117 struct ov13858_mode {
 118         /* Frame width */
 119         u32 width;
 120         /* Frame height */
 121         u32 height;
 122
 123         /* V-timing */
 124         u32 vts;
 125
 126         /* Index of Link frequency config to be used */
 127         u32 link_freq_index;
 128         /* Default register values */
 129         struct ov13858_reg_list reg_list;
 130 };
 131
 132 /* 4224x3136 needs 1080Mbps/lane, 4 lanes */
 133 static const struct ov13858_reg mipi_data_rate_1080mbps[] = {
 134         /* PLL1 registers */
 135         {OV13858_REG_PLL1_CTRL_0, 0x07},
 136         {OV13858_REG_PLL1_CTRL_1, 0x01},
 137         {OV13858_REG_PLL1_CTRL_2, 0xc2},
 138         {OV13858_REG_PLL1_CTRL_3, 0x00},
 139         {OV13858_REG_PLL1_CTRL_4, 0x00},
 140         {OV13858_REG_PLL1_CTRL_5, 0x01},
 141
 142         /* PLL2 registers */
 143         {OV13858_REG_PLL2_CTRL_B, 0x05},
 144         {OV13858_REG_PLL2_CTRL_C, 0x01},
 145         {OV13858_REG_PLL2_CTRL_D, 0x0e},
 146         {OV13858_REG_PLL2_CTRL_E, 0x05},
 147         {OV13858_REG_PLL2_CTRL_F, 0x01},
 148         {OV13858_REG_PLL2_CTRL_12, 0x01},
 149         {OV13858_REG_MIPI_SC_CTRL0, 0x72},
 150         {OV13858_REG_MIPI_SC_CTRL1, 0x01},
 151 };
 152
 153 /*
 154  * 2112x1568, 2112x1188, 1056x784 need 540Mbps/lane,
 155  * 4 lanes
 156  */
 157 static const struct ov13858_reg mipi_data_rate_540mbps[] = {
 158         /* PLL1 registers */
 159         {OV13858_REG_PLL1_CTRL_0, 0x07},
 160         {OV13858_REG_PLL1_CTRL_1, 0x01},
 161         {OV13858_REG_PLL1_CTRL_2, 0xc2},
 162         {OV13858_REG_PLL1_CTRL_3, 0x01},
 163         {OV13858_REG_PLL1_CTRL_4, 0x00},
 164         {OV13858_REG_PLL1_CTRL_5, 0x01},
 165
 166         /* PLL2 registers */
 167         {OV13858_REG_PLL2_CTRL_B, 0x05},
 168         {OV13858_REG_PLL2_CTRL_C, 0x01},
 169         {OV13858_REG_PLL2_CTRL_D, 0x0e},
 170         {OV13858_REG_PLL2_CTRL_E, 0x05},
 171         {OV13858_REG_PLL2_CTRL_F, 0x01},
 172         {OV13858_REG_PLL2_CTRL_12, 0x01},
 173         {OV13858_REG_MIPI_SC_CTRL0, 0x72},
 174         {OV13858_REG_MIPI_SC_CTRL1, 0x01},
 175 };
 176
 177 static const struct ov13858_reg mode_4224x3136_regs[] = {
 178         {0x3013, 0x32},
 179         {0x301b, 0xf0},
 180         {0x301f, 0xd0},
 181         {0x3106, 0x15},
 182         {0x3107, 0x23},
 183         {0x350a, 0x00},
 184         {0x350e, 0x00},
 185         {0x3510, 0x00},
 186         {0x3511, 0x02},
 187         {0x3512, 0x00},
 188         {0x3600, 0x2b},
 189         {0x3601, 0x52},
 190         {0x3602, 0x60},
 191         {0x3612, 0x05},
 192         {0x3613, 0xa4},
 193         {0x3620, 0x80},
 194         {0x3621, 0x10},
 195         {0x3622, 0x30},
 196         {0x3624, 0x1c},
 197         {0x3640, 0x10},
 198         {0x3641, 0x70},
 199         {0x3661, 0x80},
 200         {0x3662, 0x12},
 201         {0x3664, 0x73},
 202         {0x3665, 0xa7},
 203         {0x366e, 0xff},
 204         {0x366f, 0xf4},
 205         {0x3674, 0x00},
 206         {0x3679, 0x0c},
 207         {0x367f, 0x01},
 208         {0x3680, 0x0c},
 209         {0x3681, 0x50},
 210         {0x3682, 0x50},
 211         {0x3683, 0xa9},
 212         {0x3684, 0xa9},
 213         {0x3709, 0x5f},
 214         {0x3714, 0x24},
 215         {0x371a, 0x3e},
 216         {0x3737, 0x04},
 217         {0x3738, 0xcc},
 218         {0x3739, 0x12},
 219         {0x373d, 0x26},
 220         {0x3764, 0x20},
 221         {0x3765, 0x20},
 222         {0x37a1, 0x36},
 223         {0x37a8, 0x3b},
 224         {0x37ab, 0x31},
 225         {0x37c2, 0x04},
 226         {0x37c3, 0xf1},
 227         {0x37c5, 0x00},
 228         {0x37d8, 0x03},
 229         {0x37d9, 0x0c},
 230         {0x37da, 0xc2},
 231         {0x37dc, 0x02},
 232         {0x37e0, 0x00},
 233         {0x37e1, 0x0a},
 234         {0x37e2, 0x14},
 235         {0x37e3, 0x04},
 236         {0x37e4, 0x2a},
 237         {0x37e5, 0x03},
 238         {0x37e6, 0x04},
 239         {0x3800, 0x00},
 240         {0x3801, 0x00},
 241         {0x3802, 0x00},
 242         {0x3803, 0x00},
 243         {0x3804, 0x10},
 244         {0x3805, 0x9f},
 245         {0x3806, 0x0c},
 246         {0x3807, 0x5f},
 247         {0x3808, 0x10},
 248         {0x3809, 0x80},
 249         {0x380a, 0x0c},
 250         {0x380b, 0x40},
 251         {0x380c, 0x04},
 252         {0x380d, 0x62},
 253         {0x380e, 0x0c},
 254         {0x380f, 0x8e},
 255         {0x3811, 0x04},
 256         {0x3813, 0x05},
 257         {0x3814, 0x01},
 258         {0x3815, 0x01},
 259         {0x3816, 0x01},
 260         {0x3817, 0x01},
 261         {0x3820, 0xa8},
 262         {0x3821, 0x00},
 263         {0x3822, 0xc2},
 264         {0x3823, 0x18},
 265         {0x3826, 0x11},
 266         {0x3827, 0x1c},
 267         {0x3829, 0x03},
 268         {0x3832, 0x00},
 269         {0x3c80, 0x00},
 270         {0x3c87, 0x01},
 271         {0x3c8c, 0x19},
 272         {0x3c8d, 0x1c},
 273         {0x3c90, 0x00},
 274         {0x3c91, 0x00},
 275         {0x3c92, 0x00},
 276         {0x3c93, 0x00},
 277         {0x3c94, 0x40},
 278         {0x3c95, 0x54},
 279         {0x3c96, 0x34},
 280         {0x3c97, 0x04},
 281         {0x3c98, 0x00},
 282         {0x3d8c, 0x73},
 283         {0x3d8d, 0xc0},
 284         {0x3f00, 0x0b},
 285         {0x3f03, 0x00},
 286         {0x4001, 0xe0},
 287         {0x4008, 0x00},
 288         {0x4009, 0x0f},
 289         {0x4011, 0xf0},
 290         {0x4017, 0x08},
 291         {0x4050, 0x04},
 292         {0x4051, 0x0b},
 293         {0x4052, 0x00},
 294         {0x4053, 0x80},
 295         {0x4054, 0x00},
 296         {0x4055, 0x80},
 297         {0x4056, 0x00},
 298         {0x4057, 0x80},
 299         {0x4058, 0x00},
 300         {0x4059, 0x80},
 301         {0x405e, 0x20},
 302         {0x4500, 0x07},
 303         {0x4503, 0x00},
 304         {0x450a, 0x04},
 305         {0x4809, 0x04},
 306         {0x480c, 0x12},
 307         {0x481f, 0x30},
 308         {0x4833, 0x10},
 309         {0x4837, 0x0e},
 310         {0x4902, 0x01},
 311         {0x4d00, 0x03},
 312         {0x4d01, 0xc9},
 313         {0x4d02, 0xbc},
 314         {0x4d03, 0xd7},
 315         {0x4d04, 0xf0},
 316         {0x4d05, 0xa2},
 317         {0x5000, 0xfd},
 318         {0x5001, 0x01},
 319         {0x5040, 0x39},
 320         {0x5041, 0x10},
 321         {0x5042, 0x10},
 322         {0x5043, 0x84},
 323         {0x5044, 0x62},
 324         {0x5180, 0x00},
 325         {0x5181, 0x10},
 326         {0x5182, 0x02},
 327         {0x5183, 0x0f},
 328         {0x5200, 0x1b},
 329         {0x520b, 0x07},
 330         {0x520c, 0x0f},
 331         {0x5300, 0x04},
 332         {0x5301, 0x0c},
 333         {0x5302, 0x0c},
 334         {0x5303, 0x0f},
 335         {0x5304, 0x00},
 336         {0x5305, 0x70},
 337         {0x5306, 0x00},
 338         {0x5307, 0x80},
 339         {0x5308, 0x00},
 340         {0x5309, 0xa5},
 341         {0x530a, 0x00},
 342         {0x530b, 0xd3},
 343         {0x530c, 0x00},
 344         {0x530d, 0xf0},
 345         {0x530e, 0x01},
 346         {0x530f, 0x10},
 347         {0x5310, 0x01},
 348         {0x5311, 0x20},
 349         {0x5312, 0x01},
 350         {0x5313, 0x20},
 351         {0x5314, 0x01},
 352         {0x5315, 0x20},
 353         {0x5316, 0x08},
 354         {0x5317, 0x08},
 355         {0x5318, 0x10},
 356         {0x5319, 0x88},
 357         {0x531a, 0x88},
 358         {0x531b, 0xa9},
 359         {0x531c, 0xaa},
 360         {0x531d, 0x0a},
 361         {0x5405, 0x02},
 362         {0x5406, 0x67},
 363         {0x5407, 0x01},
 364         {0x5408, 0x4a},
 365 };
 366
 367 static const struct ov13858_reg mode_2112x1568_regs[] = {
 368         {0x3013, 0x32},
 369         {0x301b, 0xf0},
 370         {0x301f, 0xd0},
 371         {0x3106, 0x15},
 372         {0x3107, 0x23},
 373         {0x350a, 0x00},
 374         {0x350e, 0x00},
 375         {0x3510, 0x00},
 376         {0x3511, 0x02},
 377         {0x3512, 0x00},
 378         {0x3600, 0x2b},
 379         {0x3601, 0x52},
 380         {0x3602, 0x60},
 381         {0x3612, 0x05},
 382         {0x3613, 0xa4},
 383         {0x3620, 0x80},
 384         {0x3621, 0x10},
 385         {0x3622, 0x30},
 386         {0x3624, 0x1c},
 387         {0x3640, 0x10},
 388         {0x3641, 0x70},
 389         {0x3661, 0x80},
 390         {0x3662, 0x10},
 391         {0x3664, 0x73},
 392         {0x3665, 0xa7},
 393         {0x366e, 0xff},
 394         {0x366f, 0xf4},
 395         {0x3674, 0x00},
 396         {0x3679, 0x0c},
 397         {0x367f, 0x01},
 398         {0x3680, 0x0c},
 399         {0x3681, 0x50},
 400         {0x3682, 0x50},
 401         {0x3683, 0xa9},
 402         {0x3684, 0xa9},
 403         {0x3709, 0x5f},
 404         {0x3714, 0x28},
 405         {0x371a, 0x3e},
 406         {0x3737, 0x08},
 407         {0x3738, 0xcc},
 408         {0x3739, 0x20},
 409         {0x373d, 0x26},
 410         {0x3764, 0x20},
 411         {0x3765, 0x20},
 412         {0x37a1, 0x36},
 413         {0x37a8, 0x3b},
 414         {0x37ab, 0x31},
 415         {0x37c2, 0x14},
 416         {0x37c3, 0xf1},
 417         {0x37c5, 0x00},
 418         {0x37d8, 0x03},
 419         {0x37d9, 0x0c},
 420         {0x37da, 0xc2},
 421         {0x37dc, 0x02},
 422         {0x37e0, 0x00},
 423         {0x37e1, 0x0a},
 424         {0x37e2, 0x14},
 425         {0x37e3, 0x08},
 426         {0x37e4, 0x38},
 427         {0x37e5, 0x03},
 428         {0x37e6, 0x08},
 429         {0x3800, 0x00},
 430         {0x3801, 0x00},
 431         {0x3802, 0x00},
 432         {0x3803, 0x00},
 433         {0x3804, 0x10},
 434         {0x3805, 0x9f},
 435         {0x3806, 0x0c},
 436         {0x3807, 0x5f},
 437         {0x3808, 0x08},
 438         {0x3809, 0x40},
 439         {0x380a, 0x06},
 440         {0x380b, 0x20},
 441         {0x380c, 0x04},
 442         {0x380d, 0x62},
 443         {0x380e, 0x0c},
 444         {0x380f, 0x8e},
 445         {0x3811, 0x04},
 446         {0x3813, 0x05},
 447         {0x3814, 0x03},
 448         {0x3815, 0x01},
 449         {0x3816, 0x03},
 450         {0x3817, 0x01},
 451         {0x3820, 0xab},
 452         {0x3821, 0x00},
 453         {0x3822, 0xc2},
 454         {0x3823, 0x18},
 455         {0x3826, 0x04},
 456         {0x3827, 0x90},
 457         {0x3829, 0x07},
 458         {0x3832, 0x00},
 459         {0x3c80, 0x00},
 460         {0x3c87, 0x01},
 461         {0x3c8c, 0x19},
 462         {0x3c8d, 0x1c},
 463         {0x3c90, 0x00},
 464         {0x3c91, 0x00},
 465         {0x3c92, 0x00},
 466         {0x3c93, 0x00},
 467         {0x3c94, 0x40},
 468         {0x3c95, 0x54},
 469         {0x3c96, 0x34},
 470         {0x3c97, 0x04},
 471         {0x3c98, 0x00},
 472         {0x3d8c, 0x73},
 473         {0x3d8d, 0xc0},
 474         {0x3f00, 0x0b},
 475         {0x3f03, 0x00},
 476         {0x4001, 0xe0},
 477         {0x4008, 0x00},
 478         {0x4009, 0x0d},
 479         {0x4011, 0xf0},
 480         {0x4017, 0x08},
 481         {0x4050, 0x04},
 482         {0x4051, 0x0b},
 483         {0x4052, 0x00},
 484         {0x4053, 0x80},
 485         {0x4054, 0x00},
 486         {0x4055, 0x80},
 487         {0x4056, 0x00},
 488         {0x4057, 0x80},
 489         {0x4058, 0x00},
 490         {0x4059, 0x80},
 491         {0x405e, 0x20},
 492         {0x4500, 0x07},
 493         {0x4503, 0x00},
 494         {0x450a, 0x04},
 495         {0x4809, 0x04},
 496         {0x480c, 0x12},
 497         {0x481f, 0x30},
 498         {0x4833, 0x10},
 499         {0x4837, 0x1c},
 500         {0x4902, 0x01},
 501         {0x4d00, 0x03},
 502         {0x4d01, 0xc9},
 503         {0x4d02, 0xbc},
 504         {0x4d03, 0xd7},
 505         {0x4d04, 0xf0},
 506         {0x4d05, 0xa2},
 507         {0x5000, 0xfd},
 508         {0x5001, 0x01},
 509         {0x5040, 0x39},
 510         {0x5041, 0x10},
 511         {0x5042, 0x10},
 512         {0x5043, 0x84},
 513         {0x5044, 0x62},
 514         {0x5180, 0x00},
 515         {0x5181, 0x10},
 516         {0x5182, 0x02},
 517         {0x5183, 0x0f},
 518         {0x5200, 0x1b},
 519         {0x520b, 0x07},
 520         {0x520c, 0x0f},
 521         {0x5300, 0x04},
 522         {0x5301, 0x0c},
 523         {0x5302, 0x0c},
 524         {0x5303, 0x0f},
 525         {0x5304, 0x00},
 526         {0x5305, 0x70},
 527         {0x5306, 0x00},
 528         {0x5307, 0x80},
 529         {0x5308, 0x00},
 530         {0x5309, 0xa5},
 531         {0x530a, 0x00},
 532         {0x530b, 0xd3},
 533         {0x530c, 0x00},
 534         {0x530d, 0xf0},
 535         {0x530e, 0x01},
 536         {0x530f, 0x10},
 537         {0x5310, 0x01},
 538         {0x5311, 0x20},
 539         {0x5312, 0x01},
 540         {0x5313, 0x20},
 541         {0x5314, 0x01},
 542         {0x5315, 0x20},
 543         {0x5316, 0x08},
 544         {0x5317, 0x08},
 545         {0x5318, 0x10},
 546         {0x5319, 0x88},
 547         {0x531a, 0x88},
 548         {0x531b, 0xa9},
 549         {0x531c, 0xaa},
 550         {0x531d, 0x0a},
 551         {0x5405, 0x02},
 552         {0x5406, 0x67},
 553         {0x5407, 0x01},
 554         {0x5408, 0x4a},
 555 };
 556
 557 static const struct ov13858_reg mode_2112x1188_regs[] = {
 558         {0x3013, 0x32},
 559         {0x301b, 0xf0},
 560         {0x301f, 0xd0},
 561         {0x3106, 0x15},
 562         {0x3107, 0x23},
 563         {0x350a, 0x00},
 564         {0x350e, 0x00},
 565         {0x3510, 0x00},
 566         {0x3511, 0x02},
 567         {0x3512, 0x00},
 568         {0x3600, 0x2b},
 569         {0x3601, 0x52},
 570         {0x3602, 0x60},
 571         {0x3612, 0x05},
 572         {0x3613, 0xa4},
 573         {0x3620, 0x80},
 574         {0x3621, 0x10},
 575         {0x3622, 0x30},
 576         {0x3624, 0x1c},
 577         {0x3640, 0x10},
 578         {0x3641, 0x70},
 579         {0x3661, 0x80},
 580         {0x3662, 0x10},
 581         {0x3664, 0x73},
 582         {0x3665, 0xa7},
 583         {0x366e, 0xff},
 584         {0x366f, 0xf4},
 585         {0x3674, 0x00},
 586         {0x3679, 0x0c},
 587         {0x367f, 0x01},
 588         {0x3680, 0x0c},
 589         {0x3681, 0x50},
 590         {0x3682, 0x50},
 591         {0x3683, 0xa9},
 592         {0x3684, 0xa9},
 593         {0x3709, 0x5f},
 594         {0x3714, 0x28},
 595         {0x371a, 0x3e},
 596         {0x3737, 0x08},
 597         {0x3738, 0xcc},
 598         {0x3739, 0x20},
 599         {0x373d, 0x26},
 600         {0x3764, 0x20},
 601         {0x3765, 0x20},
 602         {0x37a1, 0x36},
 603         {0x37a8, 0x3b},
 604         {0x37ab, 0x31},
 605         {0x37c2, 0x14},
 606         {0x37c3, 0xf1},
 607         {0x37c5, 0x00},
 608         {0x37d8, 0x03},
 609         {0x37d9, 0x0c},
 610         {0x37da, 0xc2},
 611         {0x37dc, 0x02},
 612         {0x37e0, 0x00},
 613         {0x37e1, 0x0a},
 614         {0x37e2, 0x14},
 615         {0x37e3, 0x08},
 616         {0x37e4, 0x38},
 617         {0x37e5, 0x03},
 618         {0x37e6, 0x08},
 619         {0x3800, 0x00},
 620         {0x3801, 0x00},
 621         {0x3802, 0x01},
 622         {0x3803, 0x84},
 623         {0x3804, 0x10},
 624         {0x3805, 0x9f},
 625         {0x3806, 0x0a},
 626         {0x3807, 0xd3},
 627         {0x3808, 0x08},
 628         {0x3809, 0x40},
 629         {0x380a, 0x04},
 630         {0x380b, 0xa4},
 631         {0x380c, 0x04},
 632         {0x380d, 0x62},
 633         {0x380e, 0x0c},
 634         {0x380f, 0x8e},
 635         {0x3811, 0x08},
 636         {0x3813, 0x03},
 637         {0x3814, 0x03},
 638         {0x3815, 0x01},
 639         {0x3816, 0x03},
 640         {0x3817, 0x01},
 641         {0x3820, 0xab},
 642         {0x3821, 0x00},
 643         {0x3822, 0xc2},
 644         {0x3823, 0x18},
 645         {0x3826, 0x04},
 646         {0x3827, 0x90},
 647         {0x3829, 0x07},
 648         {0x3832, 0x00},
 649         {0x3c80, 0x00},
 650         {0x3c87, 0x01},
 651         {0x3c8c, 0x19},
 652         {0x3c8d, 0x1c},
 653         {0x3c90, 0x00},
 654         {0x3c91, 0x00},
 655         {0x3c92, 0x00},
 656         {0x3c93, 0x00},
 657         {0x3c94, 0x40},
 658         {0x3c95, 0x54},
 659         {0x3c96, 0x34},
 660         {0x3c97, 0x04},
 661         {0x3c98, 0x00},
 662         {0x3d8c, 0x73},
 663         {0x3d8d, 0xc0},
 664         {0x3f00, 0x0b},
 665         {0x3f03, 0x00},
 666         {0x4001, 0xe0},
 667         {0x4008, 0x00},
 668         {0x4009, 0x0d},
 669         {0x4011, 0xf0},
 670         {0x4017, 0x08},
 671         {0x4050, 0x04},
 672         {0x4051, 0x0b},
 673         {0x4052, 0x00},
 674         {0x4053, 0x80},
 675         {0x4054, 0x00},
 676         {0x4055, 0x80},
 677         {0x4056, 0x00},
 678         {0x4057, 0x80},
 679         {0x4058, 0x00},
 680         {0x4059, 0x80},
 681         {0x405e, 0x20},
 682         {0x4500, 0x07},
 683         {0x4503, 0x00},
 684         {0x450a, 0x04},
 685         {0x4809, 0x04},
 686         {0x480c, 0x12},
 687         {0x481f, 0x30},
 688         {0x4833, 0x10},
 689         {0x4837, 0x1c},
 690         {0x4902, 0x01},
 691         {0x4d00, 0x03},
 692         {0x4d01, 0xc9},
 693         {0x4d02, 0xbc},
 694         {0x4d03, 0xd7},
 695         {0x4d04, 0xf0},
 696         {0x4d05, 0xa2},
 697         {0x5000, 0xfd},
 698         {0x5001, 0x01},
 699         {0x5040, 0x39},
 700         {0x5041, 0x10},
 701         {0x5042, 0x10},
 702         {0x5043, 0x84},
 703         {0x5044, 0x62},
 704         {0x5180, 0x00},
 705         {0x5181, 0x10},
 706         {0x5182, 0x02},
 707         {0x5183, 0x0f},
 708         {0x5200, 0x1b},
 709         {0x520b, 0x07},
 710         {0x520c, 0x0f},
 711         {0x5300, 0x04},
 712         {0x5301, 0x0c},
 713         {0x5302, 0x0c},
 714         {0x5303, 0x0f},
 715         {0x5304, 0x00},
 716         {0x5305, 0x70},
 717         {0x5306, 0x00},
 718         {0x5307, 0x80},
 719         {0x5308, 0x00},
 720         {0x5309, 0xa5},
 721         {0x530a, 0x00},
 722         {0x530b, 0xd3},
 723         {0x530c, 0x00},
 724         {0x530d, 0xf0},
 725         {0x530e, 0x01},
 726         {0x530f, 0x10},
 727         {0x5310, 0x01},
 728         {0x5311, 0x20},
 729         {0x5312, 0x01},
 730         {0x5313, 0x20},
 731         {0x5314, 0x01},
 732         {0x5315, 0x20},
 733         {0x5316, 0x08},
 734         {0x5317, 0x08},
 735         {0x5318, 0x10},
 736         {0x5319, 0x88},
 737         {0x531a, 0x88},
 738         {0x531b, 0xa9},
 739         {0x531c, 0xaa},
 740         {0x531d, 0x0a},
 741         {0x5405, 0x02},
 742         {0x5406, 0x67},
 743         {0x5407, 0x01},
 744         {0x5408, 0x4a},
 745 };
 746
 747 static const struct ov13858_reg mode_1056x784_regs[] = {
 748         {0x3013, 0x32},
 749         {0x301b, 0xf0},
 750         {0x301f, 0xd0},
 751         {0x3106, 0x15},
 752         {0x3107, 0x23},
 753         {0x350a, 0x00},
 754         {0x350e, 0x00},
 755         {0x3510, 0x00},
 756         {0x3511, 0x02},
 757         {0x3512, 0x00},
 758         {0x3600, 0x2b},
 759         {0x3601, 0x52},
 760         {0x3602, 0x60},
 761         {0x3612, 0x05},
 762         {0x3613, 0xa4},
 763         {0x3620, 0x80},
 764         {0x3621, 0x10},
 765         {0x3622, 0x30},
 766         {0x3624, 0x1c},
 767         {0x3640, 0x10},
 768         {0x3641, 0x70},
 769         {0x3661, 0x80},
 770         {0x3662, 0x08},
 771         {0x3664, 0x73},
 772         {0x3665, 0xa7},
 773         {0x366e, 0xff},
 774         {0x366f, 0xf4},
 775         {0x3674, 0x00},
 776         {0x3679, 0x0c},
 777         {0x367f, 0x01},
 778         {0x3680, 0x0c},
 779         {0x3681, 0x50},
 780         {0x3682, 0x50},
 781         {0x3683, 0xa9},
 782         {0x3684, 0xa9},
 783         {0x3709, 0x5f},
 784         {0x3714, 0x30},
 785         {0x371a, 0x3e},
 786         {0x3737, 0x08},
 787         {0x3738, 0xcc},
 788         {0x3739, 0x20},
 789         {0x373d, 0x26},
 790         {0x3764, 0x20},
 791         {0x3765, 0x20},
 792         {0x37a1, 0x36},
 793         {0x37a8, 0x3b},
 794         {0x37ab, 0x31},
 795         {0x37c2, 0x2c},
 796         {0x37c3, 0xf1},
 797         {0x37c5, 0x00},
 798         {0x37d8, 0x03},
 799         {0x37d9, 0x06},
 800         {0x37da, 0xc2},
 801         {0x37dc, 0x02},
 802         {0x37e0, 0x00},
 803         {0x37e1, 0x0a},
 804         {0x37e2, 0x14},
 805         {0x37e3, 0x08},
 806         {0x37e4, 0x36},
 807         {0x37e5, 0x03},
 808         {0x37e6, 0x08},
 809         {0x3800, 0x00},
 810         {0x3801, 0x00},
 811         {0x3802, 0x00},
 812         {0x3803, 0x00},
 813         {0x3804, 0x10},
 814         {0x3805, 0x9f},
 815         {0x3806, 0x0c},
 816         {0x3807, 0x5f},
 817         {0x3808, 0x04},
 818         {0x3809, 0x20},
 819         {0x380a, 0x03},
 820         {0x380b, 0x10},
 821         {0x380c, 0x04},
 822         {0x380d, 0x62},
 823         {0x380e, 0x0c},
 824         {0x380f, 0x8e},
 825         {0x3811, 0x04},
 826         {0x3813, 0x05},
 827         {0x3814, 0x07},
 828         {0x3815, 0x01},
 829         {0x3816, 0x07},
 830         {0x3817, 0x01},
 831         {0x3820, 0xac},
 832         {0x3821, 0x00},
 833         {0x3822, 0xc2},
 834         {0x3823, 0x18},
 835         {0x3826, 0x04},
 836         {0x3827, 0x48},
 837         {0x3829, 0x03},
 838         {0x3832, 0x00},
 839         {0x3c80, 0x00},
 840         {0x3c87, 0x01},
 841         {0x3c8c, 0x19},
 842         {0x3c8d, 0x1c},
 843         {0x3c90, 0x00},
 844         {0x3c91, 0x00},
 845         {0x3c92, 0x00},
 846         {0x3c93, 0x00},
 847         {0x3c94, 0x40},
 848         {0x3c95, 0x54},
 849         {0x3c96, 0x34},
 850         {0x3c97, 0x04},
 851         {0x3c98, 0x00},
 852         {0x3d8c, 0x73},
 853         {0x3d8d, 0xc0},
 854         {0x3f00, 0x0b},
 855         {0x3f03, 0x00},
 856         {0x4001, 0xe0},
 857         {0x4008, 0x00},
 858         {0x4009, 0x05},
 859         {0x4011, 0xf0},
 860         {0x4017, 0x08},
 861         {0x4050, 0x02},
 862         {0x4051, 0x05},
 863         {0x4052, 0x00},
 864         {0x4053, 0x80},
 865         {0x4054, 0x00},
 866         {0x4055, 0x80},
 867         {0x4056, 0x00},
 868         {0x4057, 0x80},
 869         {0x4058, 0x00},
 870         {0x4059, 0x80},
 871         {0x405e, 0x20},
 872         {0x4500, 0x07},
 873         {0x4503, 0x00},
 874         {0x450a, 0x04},
 875         {0x4809, 0x04},
 876         {0x480c, 0x12},
 877         {0x481f, 0x30},
 878         {0x4833, 0x10},
 879         {0x4837, 0x1e},
 880         {0x4902, 0x02},
 881         {0x4d00, 0x03},
 882         {0x4d01, 0xc9},
 883         {0x4d02, 0xbc},
 884         {0x4d03, 0xd7},
 885         {0x4d04, 0xf0},
 886         {0x4d05, 0xa2},
 887         {0x5000, 0xfd},
 888         {0x5001, 0x01},
 889         {0x5040, 0x39},
 890         {0x5041, 0x10},
 891         {0x5042, 0x10},
 892         {0x5043, 0x84},
 893         {0x5044, 0x62},
 894         {0x5180, 0x00},
 895         {0x5181, 0x10},
 896         {0x5182, 0x02},
 897         {0x5183, 0x0f},
 898         {0x5200, 0x1b},
 899         {0x520b, 0x07},
 900         {0x520c, 0x0f},
 901         {0x5300, 0x04},
 902         {0x5301, 0x0c},
 903         {0x5302, 0x0c},
 904         {0x5303, 0x0f},
 905         {0x5304, 0x00},
 906         {0x5305, 0x70},
 907         {0x5306, 0x00},
 908         {0x5307, 0x80},
 909         {0x5308, 0x00},
 910         {0x5309, 0xa5},
 911         {0x530a, 0x00},
 912         {0x530b, 0xd3},
 913         {0x530c, 0x00},
 914         {0x530d, 0xf0},
 915         {0x530e, 0x01},
 916         {0x530f, 0x10},
 917         {0x5310, 0x01},
 918         {0x5311, 0x20},
 919         {0x5312, 0x01},
 920         {0x5313, 0x20},
 921         {0x5314, 0x01},
 922         {0x5315, 0x20},
 923         {0x5316, 0x08},
 924         {0x5317, 0x08},
 925         {0x5318, 0x10},
 926         {0x5319, 0x88},
 927         {0x531a, 0x88},
 928         {0x531b, 0xa9},
 929         {0x531c, 0xaa},
 930         {0x531d, 0x0a},
 931         {0x5405, 0x02},
 932         {0x5406, 0x67},
 933         {0x5407, 0x01},
 934         {0x5408, 0x4a},
 935 };
 936
 937 static const char * const ov13858_test_pattern_menu[] = {
 938         "Disabled",
 939         "Vertical Color Bar Type 1",
 940         "Vertical Color Bar Type 2",
 941         "Vertical Color Bar Type 3",
 942         "Vertical Color Bar Type 4"
 943 };
 944
 945 /* Configurations for supported link frequencies */
 946 #define OV13858_NUM_OF_LINK_FREQS       2
 947 #define OV13858_LINK_FREQ_1080MBPS      1080000000
 948 #define OV13858_LINK_FREQ_540MBPS       540000000
 949 #define OV13858_LINK_FREQ_INDEX_0       0
 950 #define OV13858_LINK_FREQ_INDEX_1       1
 951
 952 /* Menu items for LINK_FREQ V4L2 control */
 953 static const const s64 link_freq_menu_items[OV13858_NUM_OF_LINK_FREQS] = {
 954         OV13858_LINK_FREQ_1080MBPS,
 955         OV13858_LINK_FREQ_540MBPS
 956 };
 957
 958 /* Link frequency configs */
 959 static const struct ov13858_link_freq_config
 960                         link_freq_configs[OV13858_NUM_OF_LINK_FREQS] = {
 961         {
 962                 .pixel_rate = 864000000,
 963                 .pixels_per_line = OV13858_PPL_1080MHZ,
 964                 .reg_list = {
 965                         .num_of_regs = ARRAY_SIZE(mipi_data_rate_1080mbps),
 966                         .regs = mipi_data_rate_1080mbps,
 967                 }
 968         },
 969         {
 970                 .pixel_rate = 432000000,
 971                 .pixels_per_line = OV13858_PPL_540MHZ,
 972                 .reg_list = {
 973                         .num_of_regs = ARRAY_SIZE(mipi_data_rate_540mbps),
 974                         .regs = mipi_data_rate_540mbps,
 975                 }
 976         }
 977 };
 978
 979 /* Mode configs */
 980 static const struct ov13858_mode supported_modes[] = {
 981         {
 982                 .width = 4224,
 983                 .height = 3136,
 984                 .vts = OV13858_VTS_30FPS,
 985                 .reg_list = {
 986                         .num_of_regs = ARRAY_SIZE(mode_4224x3136_regs),
 987                         .regs = mode_4224x3136_regs,
 988                 },
 989                 .link_freq_index = OV13858_LINK_FREQ_INDEX_0,
 990         },
 991         {
 992                 .width = 2112,
 993                 .height = 1568,
 994                 .vts = OV13858_VTS_30FPS,
 995                 .reg_list = {
 996                         .num_of_regs = ARRAY_SIZE(mode_2112x1568_regs),
 997                         .regs = mode_2112x1568_regs,
 998                 },
 999                 .link_freq_index = OV13858_LINK_FREQ_INDEX_1,
1000         },
1001         {
1002                 .width = 2112,
1003                 .height = 1188,
1004                 .vts = OV13858_VTS_30FPS,
1005                 .reg_list = {
1006                         .num_of_regs = ARRAY_SIZE(mode_2112x1188_regs),
1007                         .regs = mode_2112x1188_regs,
1008                 },
1009                 .link_freq_index = OV13858_LINK_FREQ_INDEX_1,
1010         },
1011         {
1012                 .width = 1056,
1013                 .height = 784,
1014                 .vts = OV13858_VTS_30FPS,
1015                 .reg_list = {
1016                         .num_of_regs = ARRAY_SIZE(mode_1056x784_regs),
1017                         .regs = mode_1056x784_regs,
1018                 },
1019                 .link_freq_index = OV13858_LINK_FREQ_INDEX_1,
1020         }
1021 };
1022
1023 struct ov13858 {
1024         struct v4l2_subdev sd;
1025         struct media_pad pad;
1026
1027         struct v4l2_ctrl_handler ctrl_handler;
1028         /* V4L2 Controls */
1029         struct v4l2_ctrl *link_freq;
1030         struct v4l2_ctrl *pixel_rate;
1031         struct v4l2_ctrl *vblank;
1032         struct v4l2_ctrl *hblank;
1033         struct v4l2_ctrl *exposure;
1034
1035         /* Current mode */
1036         const struct ov13858_mode *cur_mode;
1037
1038         /* Mutex for serialized access */
1039         struct mutex mutex;
1040
1041         /* Streaming on/off */
1042         bool streaming;
1043 };
1044
1045 #define to_ov13858(_sd) container_of(_sd, struct ov13858, sd)
1046
1047 /* Read registers up to 4 at a time */
1048 static int ov13858_read_reg(struct ov13858 *ov13858, u16 reg, u32 len, u32 *val)
1049 {
1050         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1051         struct i2c_msg msgs[2];
1052         u8 *data_be_p;
1053         int ret;
1054         u32 data_be = 0;
1055         u16 reg_addr_be = cpu_to_be16(reg);
1056
1057         if (len > 4)
1058                 return -EINVAL;
1059
1060         data_be_p = (u8 *)&data_be;
1061         /* Write register address */
1062         msgs[0].addr = client->addr;
1063         msgs[0].flags = 0;
1064         msgs[0].len = 2;
1065         msgs[0].buf = (u8 *)&reg_addr_be;
1066
1067         /* Read data from register */
1068         msgs[1].addr = client->addr;
1069         msgs[1].flags = I2C_M_RD;
1070         msgs[1].len = len;
1071         msgs[1].buf = &data_be_p[4 - len];
1072
1073         ret = i2c_transfer(client->adapter, msgs, ARRAY_SIZE(msgs));
1074         if (ret != ARRAY_SIZE(msgs))
1075                 return -EIO;
1076
1077         *val = be32_to_cpu(data_be);
1078
1079         return 0;
1080 }
1081
1082 /* Write registers up to 4 at a time */
1083 static int ov13858_write_reg(struct ov13858 *ov13858, u16 reg, u32 len, u32 val)
1084 {
1085         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1086         int buf_i, val_i;
1087         u8 buf[6], *val_p;
1088
1089         if (len > 4)
1090                 return -EINVAL;
1091
1092         buf[0] = reg >> 8;
1093         buf[1] = reg & 0xff;
1094
1095         val = cpu_to_be32(val);
1096         val_p = (u8 *)&val;
1097         buf_i = 2;
1098         val_i = 4 - len;
1099
1100         while (val_i < 4)
1101                 buf[buf_i++] = val_p[val_i++];
1102
1103         if (i2c_master_send(client, buf, len + 2) != len + 2)
1104                 return -EIO;
1105
1106         return 0;
1107 }
1108
1109 /* Write a list of registers */
1110 static int ov13858_write_regs(struct ov13858 *ov13858,
1111                               const struct ov13858_reg *regs, u32 len)
1112 {
1113         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1114         int ret;
1115         u32 i;
1116
1117         for (i = 0; i < len; i++) {
1118                 ret = ov13858_write_reg(ov13858, regs[i].address, 1,
1119                                         regs[i].val);
1120                 if (ret) {
1121                         dev_err_ratelimited(
1122                                 &client->dev,
1123                                 "Failed to write reg 0x%4.4x. error = %d\n",
1124                                 regs[i].address, ret);
1125
1126                         return ret;
1127                 }
1128         }
1129
1130         return 0;
1131 }
1132
1133 static int ov13858_write_reg_list(struct ov13858 *ov13858,
1134                                   const struct ov13858_reg_list *r_list)
1135 {
1136         return ov13858_write_regs(ov13858, r_list->regs, r_list->num_of_regs);
1137 }
1138
1139 /* Open sub-device */
1140 static int ov13858_open(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh)
1141 {
1142         struct ov13858 *ov13858 = to_ov13858(sd);
1143         struct v4l2_mbus_framefmt *try_fmt = v4l2_subdev_get_try_format(sd,
1144                                                                         fh->pad,
1145                                                                         0);
1146
1147         mutex_lock(&ov13858->mutex);
1148
1149         /* Initialize try_fmt */
1150         try_fmt->width = ov13858->cur_mode->width;
1151         try_fmt->height = ov13858->cur_mode->height;
1152         try_fmt->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1153         try_fmt->field = V4L2_FIELD_NONE;
1154
1155         /* No crop or compose */
1156         mutex_unlock(&ov13858->mutex);
1157
1158         return 0;
1159 }
1160
1161 static int ov13858_update_digital_gain(struct ov13858 *ov13858, u32 d_gain)
1162 {
1163         int ret;
1164         u32 val;
1165
1166         if (d_gain == 3)
1167                 return -EINVAL;
1168
1169         ret = ov13858_read_reg(ov13858, OV13858_REG_DIGITAL_GAIN,
1170                                OV13858_REG_VALUE_08BIT, &val);
1171         if (ret)
1172                 return ret;
1173
1174         val &= OV13858_DGTL_GAIN_MASK;
1175         val |= (d_gain - 1) << OV13858_DGTL_GAIN_SHIFT;
1176
1177         return ov13858_write_reg(ov13858, OV13858_REG_DIGITAL_GAIN,
1178                                  OV13858_REG_VALUE_08BIT, val);
1179 }
1180
1181 static int ov13858_enable_test_pattern(struct ov13858 *ov13858, u32 pattern)
1182 {
1183         int ret;
1184         u32 val;
1185
1186         ret = ov13858_read_reg(ov13858, OV13858_REG_TEST_PATTERN,
1187                                OV13858_REG_VALUE_08BIT, &val);
1188         if (ret)
1189                 return ret;
1190
1191         if (pattern) {
1192                 val &= OV13858_TEST_PATTERN_MASK;
1193                 val |= (pattern - 1) | OV13858_TEST_PATTERN_ENABLE;
1194         } else {
1195                 val &= ~OV13858_TEST_PATTERN_ENABLE;
1196         }
1197
1198         return ov13858_write_reg(ov13858, OV13858_REG_TEST_PATTERN,
1199                                  OV13858_REG_VALUE_08BIT, val);
1200 }
1201
1202 static int ov13858_set_ctrl(struct v4l2_ctrl *ctrl)
1203 {
1204         struct ov13858 *ov13858 = container_of(ctrl->handler,
1205                                                struct ov13858, ctrl_handler);
1206         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1207         s64 max;
1208         int ret;
1209
1210         /* Propagate change of current control to all related controls */
1211         switch (ctrl->id) {
1212         case V4L2_CID_VBLANK:
1213                 /* Update max exposure while meeting expected vblanking */
1214                 max = ov13858->cur_mode->height + ctrl->val - 8;
1215                 __v4l2_ctrl_modify_range(ov13858->exposure,
1216                                          ov13858->exposure->minimum,
1217                                          max, ov13858->exposure->step, max);
1218                 break;
1219         };
1220
1221         /*
1222          * Applying V4L2 control value only happens
1223          * when power is up for streaming
1224          */
1225         if (pm_runtime_get_if_in_use(&client->dev) <= 0)
1226                 return 0;
1227
1228         ret = 0;
1229         switch (ctrl->id) {
1230         case V4L2_CID_ANALOGUE_GAIN:
1231                 ret = ov13858_write_reg(ov13858, OV13858_REG_ANALOG_GAIN,
1232                                         OV13858_REG_VALUE_16BIT, ctrl->val);
1233                 break;
1234         case V4L2_CID_DIGITAL_GAIN:
1235                 ret = ov13858_update_digital_gain(ov13858, ctrl->val);
1236                 break;
1237         case V4L2_CID_EXPOSURE:
1238                 ret = ov13858_write_reg(ov13858, OV13858_REG_EXPOSURE,
1239                                         OV13858_REG_VALUE_24BIT,
1240                                         ctrl->val << 4);
1241                 break;
1242         case V4L2_CID_VBLANK:
1243                 /* Update VTS that meets expected vertical blanking */
1244                 ret = ov13858_write_reg(ov13858, OV13858_REG_VTS,
1245                                         OV13858_REG_VALUE_16BIT,
1246                                         ov13858->cur_mode->height
1247                                           + ctrl->val);
1248                 break;
1249         case V4L2_CID_TEST_PATTERN:
1250                 ret = ov13858_enable_test_pattern(ov13858, ctrl->val);
1251                 break;
1252         default:
1253                 dev_info(&client->dev,
1254                          "ctrl(id:0x%x,val:0x%x) is not handled\n",
1255                          ctrl->id, ctrl->val);
1256                 break;
1257         };
1258
1259         pm_runtime_put(&client->dev);
1260
1261         return ret;
1262 }
1263
1264 static const struct v4l2_ctrl_ops ov13858_ctrl_ops = {
1265         .s_ctrl = ov13858_set_ctrl,
1266 };
1267
1268 static int ov13858_enum_mbus_code(struct v4l2_subdev *sd,
1269                                   struct v4l2_subdev_pad_config *cfg,
1270                                   struct v4l2_subdev_mbus_code_enum *code)
1271 {
1272         /* Only one bayer order(GRBG) is supported */
1273         if (code->index > 0)
1274                 return -EINVAL;
1275
1276         code->code = MEDIA_BUS_FMT_SGRBG10_1X10;
1277
1278         return 0;
1279 }
1280
1281 static int ov13858_enum_frame_size(struct v4l2_subdev *sd,
1282                                    struct v4l2_subdev_pad_config *cfg,
1283                                    struct v4l2_subdev_frame_size_enum *fse)
1284 {
1285         if (fse->index >= ARRAY_SIZE(supported_modes))
1286                 return -EINVAL;
1287
1288         if (fse->code != MEDIA_BUS_FMT_SGRBG10_1X10)
1289                 return -EINVAL;
1290
1291         fse->min_width = supported_modes[fse->index].width;
1292         fse->max_width = fse->min_width;
1293         fse->min_height = supported_modes[fse->index].height;
1294         fse->max_height = fse->min_height;
1295
1296         return 0;
1297 }
1298
1299 static void ov13858_update_pad_format(const struct ov13858_mode *mode,
1300                                       struct v4l2_subdev_format *fmt)
1301 {
1302         fmt->format.width = mode->width;
1303         fmt->format.height = mode->height;
1304         fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
1305         fmt->format.field = V4L2_FIELD_NONE;
1306 }
1307
1308 static int ov13858_do_get_pad_format(struct ov13858 *ov13858,
1309                                      struct v4l2_subdev_pad_config *cfg,
1310                                      struct v4l2_subdev_format *fmt)
1311 {
1312         struct v4l2_mbus_framefmt *framefmt;
1313         struct v4l2_subdev *sd = &ov13858->sd;
1314
1315         if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1316                 framefmt = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1317                 fmt->format = *framefmt;
1318         } else {
1319                 ov13858_update_pad_format(ov13858->cur_mode, fmt);
1320         }
1321
1322         return 0;
1323 }
1324
1325 static int ov13858_get_pad_format(struct v4l2_subdev *sd,
1326                                   struct v4l2_subdev_pad_config *cfg,
1327                                   struct v4l2_subdev_format *fmt)
1328 {
1329         struct ov13858 *ov13858 = to_ov13858(sd);
1330         int ret;
1331
1332         mutex_lock(&ov13858->mutex);
1333         ret = ov13858_do_get_pad_format(ov13858, cfg, fmt);
1334         mutex_unlock(&ov13858->mutex);
1335
1336         return ret;
1337 }
1338
1339 /*
1340  * Calculate resolution distance
1341  */
1342 static int
1343 ov13858_get_resolution_dist(const struct ov13858_mode *mode,
1344                             struct v4l2_mbus_framefmt *framefmt)
1345 {
1346         return abs(mode->width - framefmt->width) +
1347                abs(mode->height - framefmt->height);
1348 }
1349
1350 /*
1351  * Find the closest supported resolution to the requested resolution
1352  */
1353 static const struct ov13858_mode *
1354 ov13858_find_best_fit(struct ov13858 *ov13858,
1355                       struct v4l2_subdev_format *fmt)
1356 {
1357         int i, dist, cur_best_fit = 0, cur_best_fit_dist = -1;
1358         struct v4l2_mbus_framefmt *framefmt = &fmt->format;
1359
1360         for (i = 0; i < ARRAY_SIZE(supported_modes); i++) {
1361                 dist = ov13858_get_resolution_dist(&supported_modes[i],
1362                                                    framefmt);
1363                 if (cur_best_fit_dist == -1 || dist < cur_best_fit_dist) {
1364                         cur_best_fit_dist = dist;
1365                         cur_best_fit = i;
1366                 }
1367         }
1368
1369         return &supported_modes[cur_best_fit];
1370 }
1371
1372 static int
1373 ov13858_set_pad_format(struct v4l2_subdev *sd,
1374                        struct v4l2_subdev_pad_config *cfg,
1375                        struct v4l2_subdev_format *fmt)
1376 {
1377         struct ov13858 *ov13858 = to_ov13858(sd);
1378         const struct ov13858_mode *mode;
1379         struct v4l2_mbus_framefmt *framefmt;
1380         s64 h_blank;
1381
1382         mutex_lock(&ov13858->mutex);
1383
1384         /* Only one raw bayer(GRBG) order is supported */
1385         if (fmt->format.code != MEDIA_BUS_FMT_SGRBG10_1X10)
1386                 fmt->format.code = MEDIA_BUS_FMT_SGRBG10_1X10;
1387
1388         mode = ov13858_find_best_fit(ov13858, fmt);
1389         ov13858_update_pad_format(mode, fmt);
1390         if (fmt->which == V4L2_SUBDEV_FORMAT_TRY) {
1391                 framefmt = v4l2_subdev_get_try_format(sd, cfg, fmt->pad);
1392                 *framefmt = fmt->format;
1393         } else {
1394                 ov13858->cur_mode = mode;
1395                 __v4l2_ctrl_s_ctrl(ov13858->link_freq, mode->link_freq_index);
1396                 __v4l2_ctrl_s_ctrl_int64(
1397                         ov13858->pixel_rate,
1398                         link_freq_configs[mode->link_freq_index].pixel_rate);
1399                 /* Update limits and set FPS to default */
1400                 __v4l2_ctrl_modify_range(
1401                         ov13858->vblank, OV13858_VBLANK_MIN,
1402                         OV13858_VTS_MAX - ov13858->cur_mode->height, 1,
1403                         ov13858->cur_mode->vts - ov13858->cur_mode->height);
1404                 h_blank =
1405                         link_freq_configs[mode->link_freq_index].pixels_per_line
1406                          - ov13858->cur_mode->width;
1407                 __v4l2_ctrl_modify_range(ov13858->hblank, h_blank,
1408                                          h_blank, 1, h_blank);
1409         }
1410
1411         mutex_unlock(&ov13858->mutex);
1412
1413         return 0;
1414 }
1415
1416 static int ov13858_get_skip_frames(struct v4l2_subdev *sd, u32 *frames)
1417 {
1418         *frames = OV13858_NUM_OF_SKIP_FRAMES;
1419
1420         return 0;
1421 }
1422
1423 /* Start streaming */
1424 static int ov13858_start_streaming(struct ov13858 *ov13858)
1425 {
1426         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1427         const struct ov13858_reg_list *reg_list;
1428         int ret, link_freq_index;
1429
1430         /* Get out of from software reset */
1431         ret = ov13858_write_reg(ov13858, OV13858_REG_SOFTWARE_RST,
1432                                 OV13858_REG_VALUE_08BIT, OV13858_SOFTWARE_RST);
1433         if (ret) {
1434                 dev_err(&client->dev, "%s failed to set powerup registers\n",
1435                         __func__);
1436                 return ret;
1437         }
1438
1439         /* Setup PLL */
1440         link_freq_index = ov13858->cur_mode->link_freq_index;
1441         reg_list = &link_freq_configs[link_freq_index].reg_list;
1442         ret = ov13858_write_reg_list(ov13858, reg_list);
1443         if (ret) {
1444                 dev_err(&client->dev, "%s failed to set plls\n", __func__);
1445                 return ret;
1446         }
1447
1448         /* Apply default values of current mode */
1449         reg_list = &ov13858->cur_mode->reg_list;
1450         ret = ov13858_write_reg_list(ov13858, reg_list);
1451         if (ret) {
1452                 dev_err(&client->dev, "%s failed to set mode\n", __func__);
1453                 return ret;
1454         }
1455
1456         /* Apply customized values from user */
1457         ret =  __v4l2_ctrl_handler_setup(ov13858->sd.ctrl_handler);
1458         if (ret)
1459                 return ret;
1460
1461         return ov13858_write_reg(ov13858, OV13858_REG_MODE_SELECT,
1462                                  OV13858_REG_VALUE_08BIT,
1463                                  OV13858_MODE_STREAMING);
1464 }
1465
1466 /* Stop streaming */
1467 static int ov13858_stop_streaming(struct ov13858 *ov13858)
1468 {
1469         return ov13858_write_reg(ov13858, OV13858_REG_MODE_SELECT,
1470                                  OV13858_REG_VALUE_08BIT, OV13858_MODE_STANDBY);
1471 }
1472
1473 static int ov13858_set_stream(struct v4l2_subdev *sd, int enable)
1474 {
1475         struct ov13858 *ov13858 = to_ov13858(sd);
1476         struct i2c_client *client = v4l2_get_subdevdata(sd);
1477         int ret = 0;
1478
1479         mutex_lock(&ov13858->mutex);
1480         if (ov13858->streaming == enable) {
1481                 mutex_unlock(&ov13858->mutex);
1482                 return 0;
1483         }
1484
1485         if (enable) {
1486                 ret = pm_runtime_get_sync(&client->dev);
1487                 if (ret < 0) {
1488                         pm_runtime_put_noidle(&client->dev);
1489                         goto err_unlock;
1490                 }
1491
1492                 /*
1493                  * Apply default & customized values
1494                  * and then start streaming.
1495                  */
1496                 ret = ov13858_start_streaming(ov13858);
1497                 if (ret)
1498                         goto err_rpm_put;
1499         } else {
1500                 ov13858_stop_streaming(ov13858);
1501                 pm_runtime_put(&client->dev);
1502         }
1503
1504         ov13858->streaming = enable;
1505         mutex_unlock(&ov13858->mutex);
1506
1507         return ret;
1508
1509 err_rpm_put:
1510         pm_runtime_put(&client->dev);
1511 err_unlock:
1512         mutex_unlock(&ov13858->mutex);
1513
1514         return ret;
1515 }
1516
1517 static int __maybe_unused ov13858_suspend(struct device *dev)
1518 {
1519         struct i2c_client *client = to_i2c_client(dev);
1520         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1521         struct ov13858 *ov13858 = to_ov13858(sd);
1522
1523         if (ov13858->streaming)
1524                 ov13858_stop_streaming(ov13858);
1525
1526         return 0;
1527 }
1528
1529 static int __maybe_unused ov13858_resume(struct device *dev)
1530 {
1531         struct i2c_client *client = to_i2c_client(dev);
1532         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1533         struct ov13858 *ov13858 = to_ov13858(sd);
1534         int ret;
1535
1536         if (ov13858->streaming) {
1537                 ret = ov13858_start_streaming(ov13858);
1538                 if (ret)
1539                         goto error;
1540         }
1541
1542         return 0;
1543
1544 error:
1545         ov13858_stop_streaming(ov13858);
1546         ov13858->streaming = 0;
1547         return ret;
1548 }
1549
1550 /* Verify chip ID */
1551 static int ov13858_identify_module(struct ov13858 *ov13858)
1552 {
1553         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1554         int ret;
1555         u32 val;
1556
1557         ret = ov13858_read_reg(ov13858, OV13858_REG_CHIP_ID,
1558                                OV13858_REG_VALUE_24BIT, &val);
1559         if (ret)
1560                 return ret;
1561
1562         if (val != OV13858_CHIP_ID) {
1563                 dev_err(&client->dev, "chip id mismatch: %x!=%x\n",
1564                         OV13858_CHIP_ID, val);
1565                 return -EIO;
1566         }
1567
1568         return 0;
1569 }
1570
1571 static const struct v4l2_subdev_video_ops ov13858_video_ops = {
1572         .s_stream = ov13858_set_stream,
1573 };
1574
1575 static const struct v4l2_subdev_pad_ops ov13858_pad_ops = {
1576         .enum_mbus_code = ov13858_enum_mbus_code,
1577         .get_fmt = ov13858_get_pad_format,
1578         .set_fmt = ov13858_set_pad_format,
1579         .enum_frame_size = ov13858_enum_frame_size,
1580 };
1581
1582 static const struct v4l2_subdev_sensor_ops ov13858_sensor_ops = {
1583         .g_skip_frames = ov13858_get_skip_frames,
1584 };
1585
1586 static const struct v4l2_subdev_ops ov13858_subdev_ops = {
1587         .video = &ov13858_video_ops,
1588         .pad = &ov13858_pad_ops,
1589         .sensor = &ov13858_sensor_ops,
1590 };
1591
1592 static const struct media_entity_operations ov13858_subdev_entity_ops = {
1593         .link_validate = v4l2_subdev_link_validate,
1594 };
1595
1596 static const struct v4l2_subdev_internal_ops ov13858_internal_ops = {
1597         .open = ov13858_open,
1598 };
1599
1600 /* Initialize control handlers */
1601 static int ov13858_init_controls(struct ov13858 *ov13858)
1602 {
1603         struct i2c_client *client = v4l2_get_subdevdata(&ov13858->sd);
1604         struct v4l2_ctrl_handler *ctrl_hdlr;
1605         int ret;
1606
1607         ctrl_hdlr = &ov13858->ctrl_handler;
1608         ret = v4l2_ctrl_handler_init(ctrl_hdlr, 8);
1609         if (ret)
1610                 return ret;
1611
1612         mutex_init(&ov13858->mutex);
1613         ctrl_hdlr->lock = &ov13858->mutex;
1614         ov13858->link_freq = v4l2_ctrl_new_int_menu(ctrl_hdlr,
1615                                 &ov13858_ctrl_ops,
1616                                 V4L2_CID_LINK_FREQ,
1617                                 OV13858_NUM_OF_LINK_FREQS - 1,
1618                                 0,
1619                                 link_freq_menu_items);
1620         ov13858->link_freq->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1621
1622         /* By default, PIXEL_RATE is read only */
1623         ov13858->pixel_rate = v4l2_ctrl_new_std(ctrl_hdlr, &ov13858_ctrl_ops,
1624                                         V4L2_CID_PIXEL_RATE, 0,
1625                                         link_freq_configs[0].pixel_rate, 1,
1626                                         link_freq_configs[0].pixel_rate);
1627
1628         ov13858->vblank = v4l2_ctrl_new_std(
1629                                 ctrl_hdlr, &ov13858_ctrl_ops, V4L2_CID_VBLANK,
1630                                 OV13858_VBLANK_MIN,
1631                                 OV13858_VTS_MAX - ov13858->cur_mode->height, 1,
1632                                 ov13858->cur_mode->vts
1633                                   - ov13858->cur_mode->height);
1634
1635         ov13858->hblank = v4l2_ctrl_new_std(
1636                                 ctrl_hdlr, &ov13858_ctrl_ops, V4L2_CID_HBLANK,
1637                                 OV13858_PPL_1080MHZ - ov13858->cur_mode->width,
1638                                 OV13858_PPL_1080MHZ - ov13858->cur_mode->width,
1639                                 1,
1640                                 OV13858_PPL_1080MHZ - ov13858->cur_mode->width);
1641         ov13858->hblank->flags |= V4L2_CTRL_FLAG_READ_ONLY;
1642
1643         ov13858->exposure = v4l2_ctrl_new_std(
1644                                 ctrl_hdlr, &ov13858_ctrl_ops,
1645                                 V4L2_CID_EXPOSURE, OV13858_EXPOSURE_MIN,
1646                                 OV13858_EXPOSURE_MAX, OV13858_EXPOSURE_STEP,
1647                                 OV13858_EXPOSURE_DEFAULT);
1648
1649         v4l2_ctrl_new_std(ctrl_hdlr, &ov13858_ctrl_ops, V4L2_CID_ANALOGUE_GAIN,
1650                           OV13858_ANA_GAIN_MIN, OV13858_ANA_GAIN_MAX,
1651                           OV13858_ANA_GAIN_STEP, OV13858_ANA_GAIN_DEFAULT);
1652
1653         /* Digital gain */
1654         v4l2_ctrl_new_std(ctrl_hdlr, &ov13858_ctrl_ops, V4L2_CID_DIGITAL_GAIN,
1655                           OV13858_DGTL_GAIN_MIN, OV13858_DGTL_GAIN_MAX,
1656                           OV13858_DGTL_GAIN_STEP, OV13858_DGTL_GAIN_DEFAULT);
1657
1658         v4l2_ctrl_new_std_menu_items(ctrl_hdlr, &ov13858_ctrl_ops,
1659                                      V4L2_CID_TEST_PATTERN,
1660                                      ARRAY_SIZE(ov13858_test_pattern_menu) - 1,
1661                                      0, 0, ov13858_test_pattern_menu);
1662         if (ctrl_hdlr->error) {
1663                 ret = ctrl_hdlr->error;
1664                 dev_err(&client->dev, "%s control init failed (%d)\n",
1665                         __func__, ret);
1666                 goto error;
1667         }
1668
1669         ov13858->sd.ctrl_handler = ctrl_hdlr;
1670
1671         return 0;
1672
1673 error:
1674         v4l2_ctrl_handler_free(ctrl_hdlr);
1675         mutex_destroy(&ov13858->mutex);
1676
1677         return ret;
1678 }
1679
1680 static void ov13858_free_controls(struct ov13858 *ov13858)
1681 {
1682         v4l2_ctrl_handler_free(ov13858->sd.ctrl_handler);
1683         mutex_destroy(&ov13858->mutex);
1684 }
1685
1686 static int ov13858_probe(struct i2c_client *client,
1687                          const struct i2c_device_id *devid)
1688 {
1689         struct ov13858 *ov13858;
1690         int ret;
1691         u32 val = 0;
1692
1693         device_property_read_u32(&client->dev, "clock-frequency", &val);
1694         if (val != 19200000)
1695                 return -EINVAL;
1696
1697         ov13858 = devm_kzalloc(&client->dev, sizeof(*ov13858), GFP_KERNEL);
1698         if (!ov13858)
1699                 return -ENOMEM;
1700
1701         /* Initialize subdev */
1702         v4l2_i2c_subdev_init(&ov13858->sd, client, &ov13858_subdev_ops);
1703
1704         /* Check module identity */
1705         ret = ov13858_identify_module(ov13858);
1706         if (ret) {
1707                 dev_err(&client->dev, "failed to find sensor: %d\n", ret);
1708                 return ret;
1709         }
1710
1711         /* Set default mode to max resolution */
1712         ov13858->cur_mode = &supported_modes[0];
1713
1714         ret = ov13858_init_controls(ov13858);
1715         if (ret)
1716                 return ret;
1717
1718         /* Initialize subdev */
1719         ov13858->sd.internal_ops = &ov13858_internal_ops;
1720         ov13858->sd.flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
1721         ov13858->sd.entity.ops = &ov13858_subdev_entity_ops;
1722         ov13858->sd.entity.function = MEDIA_ENT_F_CAM_SENSOR;
1723
1724         /* Initialize source pad */
1725         ov13858->pad.flags = MEDIA_PAD_FL_SOURCE;
1726         ret = media_entity_pads_init(&ov13858->sd.entity, 1, &ov13858->pad);
1727         if (ret) {
1728                 dev_err(&client->dev, "%s failed:%d\n", __func__, ret);
1729                 goto error_handler_free;
1730         }
1731
1732         ret = v4l2_async_register_subdev(&ov13858->sd);
1733         if (ret < 0)
1734                 goto error_media_entity;
1735
1736         /*
1737          * Device is already turned on by i2c-core with ACPI domain PM.
1738          * Enable runtime PM and turn off the device.
1739          */
1740         pm_runtime_get_noresume(&client->dev);
1741         pm_runtime_set_active(&client->dev);
1742         pm_runtime_enable(&client->dev);
1743         pm_runtime_put(&client->dev);
1744
1745         return 0;
1746
1747 error_media_entity:
1748         media_entity_cleanup(&ov13858->sd.entity);
1749
1750 error_handler_free:
1751         ov13858_free_controls(ov13858);
1752         dev_err(&client->dev, "%s failed:%d\n", __func__, ret);
1753
1754         return ret;
1755 }
1756
1757 static int ov13858_remove(struct i2c_client *client)
1758 {
1759         struct v4l2_subdev *sd = i2c_get_clientdata(client);
1760         struct ov13858 *ov13858 = to_ov13858(sd);
1761
1762         v4l2_async_unregister_subdev(sd);
1763         media_entity_cleanup(&sd->entity);
1764         ov13858_free_controls(ov13858);
1765
1766         /*
1767          * Disable runtime PM but keep the device turned on.
1768          * i2c-core with ACPI domain PM will turn off the device.
1769          */
1770         pm_runtime_get_sync(&client->dev);
1771         pm_runtime_disable(&client->dev);
1772         pm_runtime_set_suspended(&client->dev);
1773         pm_runtime_put_noidle(&client->dev);
1774
1775         return 0;
1776 }
1777
1778 static const struct i2c_device_id ov13858_id_table[] = {
1779         {"ov13858", 0},
1780         {},
1781 };
1782
1783 MODULE_DEVICE_TABLE(i2c, ov13858_id_table);
1784
1785 static const struct dev_pm_ops ov13858_pm_ops = {
1786         SET_SYSTEM_SLEEP_PM_OPS(ov13858_suspend, ov13858_resume)
1787 };
1788
1789 #ifdef CONFIG_ACPI
1790 static const struct acpi_device_id ov13858_acpi_ids[] = {
1791         {"OVTID858"},
1792         { /* sentinel */ }
1793 };
1794
1795 MODULE_DEVICE_TABLE(acpi, ov13858_acpi_ids);
1796 #endif
1797
1798 static struct i2c_driver ov13858_i2c_driver = {
1799         .driver = {
1800                 .name = "ov13858",
1801                 .owner = THIS_MODULE,
1802                 .pm = &ov13858_pm_ops,
1803                 .acpi_match_table = ACPI_PTR(ov13858_acpi_ids),
1804         },
1805         .probe = ov13858_probe,
1806         .remove = ov13858_remove,
1807         .id_table = ov13858_id_table,
1808 };
1809
1810 module_i2c_driver(ov13858_i2c_driver);
1811
1812 MODULE_AUTHOR("Kan, Chris <chris.kan@intel.com>");
1813 MODULE_AUTHOR("Rapolu, Chiranjeevi <chiranjeevi.rapolu@intel.com>");
1814 MODULE_AUTHOR("Yang, Hyungwoo <hyungwoo.yang@intel.com>");
1815 MODULE_DESCRIPTION("Omnivision ov13858 sensor driver");
1816 MODULE_LICENSE("GPL v2");