4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
7 * Based on ov772x driver,
9 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
10 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
11 * Copyright (C) 2008 Magnus Damm
12 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/i2c.h>
22 #include <linux/slab.h>
23 #include <linux/kernel.h>
24 #include <linux/delay.h>
25 #include <linux/v4l2-mediabus.h>
26 #include <linux/videodev2.h>
28 #include <media/soc_camera.h>
29 #include <media/tw9910.h>
30 #include <media/v4l2-subdev.h>
32 #define GET_ID(val) ((val & 0xF8) >> 3)
33 #define GET_REV(val) (val & 0x07)
38 #define ID 0x00 /* Product ID Code Register */
39 #define STATUS1 0x01 /* Chip Status Register I */
40 #define INFORM 0x02 /* Input Format */
41 #define OPFORM 0x03 /* Output Format Control Register */
42 #define DLYCTR 0x04 /* Hysteresis and HSYNC Delay Control */
43 #define OUTCTR1 0x05 /* Output Control I */
44 #define ACNTL1 0x06 /* Analog Control Register 1 */
45 #define CROP_HI 0x07 /* Cropping Register, High */
46 #define VDELAY_LO 0x08 /* Vertical Delay Register, Low */
47 #define VACTIVE_LO 0x09 /* Vertical Active Register, Low */
48 #define HDELAY_LO 0x0A /* Horizontal Delay Register, Low */
49 #define HACTIVE_LO 0x0B /* Horizontal Active Register, Low */
50 #define CNTRL1 0x0C /* Control Register I */
51 #define VSCALE_LO 0x0D /* Vertical Scaling Register, Low */
52 #define SCALE_HI 0x0E /* Scaling Register, High */
53 #define HSCALE_LO 0x0F /* Horizontal Scaling Register, Low */
54 #define BRIGHT 0x10 /* BRIGHTNESS Control Register */
55 #define CONTRAST 0x11 /* CONTRAST Control Register */
56 #define SHARPNESS 0x12 /* SHARPNESS Control Register I */
57 #define SAT_U 0x13 /* Chroma (U) Gain Register */
58 #define SAT_V 0x14 /* Chroma (V) Gain Register */
59 #define HUE 0x15 /* Hue Control Register */
61 #define CORING2 0x18 /* Coring and IF compensation */
62 #define VBICNTL 0x19 /* VBI Control Register */
63 #define ACNTL2 0x1A /* Analog Control 2 */
64 #define OUTCTR2 0x1B /* Output Control 2 */
65 #define SDT 0x1C /* Standard Selection */
66 #define SDTR 0x1D /* Standard Recognition */
67 #define TEST 0x1F /* Test Control Register */
68 #define CLMPG 0x20 /* Clamping Gain */
69 #define IAGC 0x21 /* Individual AGC Gain */
70 #define AGCGAIN 0x22 /* AGC Gain */
71 #define PEAKWT 0x23 /* White Peak Threshold */
72 #define CLMPL 0x24 /* Clamp level */
73 #define SYNCT 0x25 /* Sync Amplitude */
74 #define MISSCNT 0x26 /* Sync Miss Count Register */
75 #define PCLAMP 0x27 /* Clamp Position Register */
76 #define VCNTL1 0x28 /* Vertical Control I */
77 #define VCNTL2 0x29 /* Vertical Control II */
78 #define CKILL 0x2A /* Color Killer Level Control */
79 #define COMB 0x2B /* Comb Filter Control */
80 #define LDLY 0x2C /* Luma Delay and H Filter Control */
81 #define MISC1 0x2D /* Miscellaneous Control I */
82 #define LOOP 0x2E /* LOOP Control Register */
83 #define MISC2 0x2F /* Miscellaneous Control II */
84 #define MVSN 0x30 /* Macrovision Detection */
85 #define STATUS2 0x31 /* Chip STATUS II */
86 #define HFREF 0x32 /* H monitor */
87 #define CLMD 0x33 /* CLAMP MODE */
88 #define IDCNTL 0x34 /* ID Detection Control */
89 #define CLCNTL1 0x35 /* Clamp Control I */
90 #define ANAPLLCTL 0x4C
125 #define VBIDELAY 0x6F
132 #define FC27_ON 0x40 /* 1 : Input crystal clock frequency is 27MHz */
133 #define FC27_FF 0x00 /* 0 : Square pixel mode. */
134 /* Must use 24.54MHz for 60Hz field rate */
135 /* source or 29.5MHz for 50Hz field rate */
136 #define IFSEL_S 0x10 /* 01 : S-video decoding */
137 #define IFSEL_C 0x00 /* 00 : Composite video decoding */
138 /* Y input video selection */
139 #define YSEL_M0 0x00 /* 00 : Mux0 selected */
140 #define YSEL_M1 0x04 /* 01 : Mux1 selected */
141 #define YSEL_M2 0x08 /* 10 : Mux2 selected */
142 #define YSEL_M3 0x10 /* 11 : Mux3 selected */
145 #define MODE 0x80 /* 0 : CCIR601 compatible YCrCb 4:2:2 format */
146 /* 1 : ITU-R-656 compatible data sequence format */
147 #define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */
148 /* 1 : 16-bit YCrCb 4:2:2 output format.*/
149 #define LLCMODE 0x20 /* 1 : LLC output mode. */
150 /* 0 : free-run output mode */
151 #define AINC 0x10 /* Serial interface auto-indexing control */
152 /* 0 : auto-increment */
154 #define VSCTL 0x08 /* 1 : Vertical out ctrl by DVALID */
155 /* 0 : Vertical out ctrl by HACTIVE and DVALID */
156 #define OEN_TRI_SEL_MASK 0x07
157 #define OEN_TRI_SEL_ALL_ON 0x00 /* Enable output for Rev0/Rev1 */
158 #define OEN_TRI_SEL_ALL_OFF_r0 0x06 /* All tri-stated for Rev0 */
159 #define OEN_TRI_SEL_ALL_OFF_r1 0x07 /* All tri-stated for Rev1 */
162 #define VSP_LO 0x00 /* 0 : VS pin output polarity is active low */
163 #define VSP_HI 0x80 /* 1 : VS pin output polarity is active high. */
164 /* VS pin output control */
165 #define VSSL_VSYNC 0x00 /* 0 : VSYNC */
166 #define VSSL_VACT 0x10 /* 1 : VACT */
167 #define VSSL_FIELD 0x20 /* 2 : FIELD */
168 #define VSSL_VVALID 0x30 /* 3 : VVALID */
169 #define VSSL_ZERO 0x70 /* 7 : 0 */
170 #define HSP_LOW 0x00 /* 0 : HS pin output polarity is active low */
171 #define HSP_HI 0x08 /* 1 : HS pin output polarity is active high.*/
172 /* HS pin output control */
173 #define HSSL_HACT 0x00 /* 0 : HACT */
174 #define HSSL_HSYNC 0x01 /* 1 : HSYNC */
175 #define HSSL_DVALID 0x02 /* 2 : DVALID */
176 #define HSSL_HLOCK 0x03 /* 3 : HLOCK */
177 #define HSSL_ASYNCW 0x04 /* 4 : ASYNCW */
178 #define HSSL_ZERO 0x07 /* 7 : 0 */
181 #define SRESET 0x80 /* resets the device to its default state
182 * but all register content remain unchanged.
183 * This bit is self-resetting.
185 #define ACNTL1_PDN_MASK 0x0e
186 #define CLK_PDN 0x08 /* system clock power down */
187 #define Y_PDN 0x04 /* Luma ADC power down */
188 #define C_PDN 0x02 /* Chroma ADC power down */
191 #define ACNTL2_PDN_MASK 0x40
192 #define PLL_PDN 0x40 /* PLL power down */
196 /* RTSEL : control the real time signal output from the MPOUT pin */
197 #define RTSEL_MASK 0x07
198 #define RTSEL_VLOSS 0x00 /* 0000 = Video loss */
199 #define RTSEL_HLOCK 0x01 /* 0001 = H-lock */
200 #define RTSEL_SLOCK 0x02 /* 0010 = S-lock */
201 #define RTSEL_VLOCK 0x03 /* 0011 = V-lock */
202 #define RTSEL_MONO 0x04 /* 0100 = MONO */
203 #define RTSEL_DET50 0x05 /* 0101 = DET50 */
204 #define RTSEL_FIELD 0x06 /* 0110 = FIELD */
205 #define RTSEL_RTCO 0x07 /* 0111 = RTCO ( Real Time Control ) */
207 /* HSYNC start and end are constant for now */
208 #define HSYNC_START 0x0260
209 #define HSYNC_END 0x0300
216 unsigned char reg_num;
220 struct tw9910_scale_ctrl {
222 unsigned short width;
223 unsigned short height;
229 struct v4l2_subdev subdev;
230 struct tw9910_video_info *info;
231 const struct tw9910_scale_ctrl *scale;
236 static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = {
245 .name = "NTSC CCIR601",
252 .name = "NTSC SQ (CIF)",
259 .name = "NTSC CCIR601 (CIF)",
266 .name = "NTSC SQ (QCIF)",
273 .name = "NTSC CCIR601 (QCIF)",
281 static const struct tw9910_scale_ctrl tw9910_pal_scales[] = {
290 .name = "PAL CCIR601",
297 .name = "PAL SQ (CIF)",
304 .name = "PAL CCIR601 (CIF)",
311 .name = "PAL SQ (QCIF)",
318 .name = "PAL CCIR601 (QCIF)",
329 static struct tw9910_priv *to_tw9910(const struct i2c_client *client)
331 return container_of(i2c_get_clientdata(client), struct tw9910_priv,
335 static int tw9910_mask_set(struct i2c_client *client, u8 command,
338 s32 val = i2c_smbus_read_byte_data(client, command);
345 return i2c_smbus_write_byte_data(client, command, val);
348 static int tw9910_set_scale(struct i2c_client *client,
349 const struct tw9910_scale_ctrl *scale)
353 ret = i2c_smbus_write_byte_data(client, SCALE_HI,
354 (scale->vscale & 0x0F00) >> 4 |
355 (scale->hscale & 0x0F00) >> 8);
359 ret = i2c_smbus_write_byte_data(client, HSCALE_LO,
360 scale->hscale & 0x00FF);
364 ret = i2c_smbus_write_byte_data(client, VSCALE_LO,
365 scale->vscale & 0x00FF);
370 static int tw9910_set_hsync(struct i2c_client *client)
372 struct tw9910_priv *priv = to_tw9910(client);
376 ret = i2c_smbus_write_byte_data(client, HSBEGIN,
377 (HSYNC_START & 0x07F8) >> 3);
382 ret = i2c_smbus_write_byte_data(client, HSEND,
383 (HSYNC_END & 0x07F8) >> 3);
387 /* So far only revisions 0 and 1 have been seen */
389 if (1 == priv->revision)
390 ret = tw9910_mask_set(client, HSLOWCTL, 0x77,
391 (HSYNC_START & 0x0007) << 4 |
392 (HSYNC_END & 0x0007));
397 static void tw9910_reset(struct i2c_client *client)
399 tw9910_mask_set(client, ACNTL1, SRESET, SRESET);
403 static int tw9910_power(struct i2c_client *client, int enable)
413 acntl1 = CLK_PDN | Y_PDN | C_PDN;
417 ret = tw9910_mask_set(client, ACNTL1, ACNTL1_PDN_MASK, acntl1);
421 return tw9910_mask_set(client, ACNTL2, ACNTL2_PDN_MASK, acntl2);
424 static const struct tw9910_scale_ctrl *tw9910_select_norm(v4l2_std_id norm,
425 u32 width, u32 height)
427 const struct tw9910_scale_ctrl *scale;
428 const struct tw9910_scale_ctrl *ret = NULL;
429 __u32 diff = 0xffffffff, tmp;
432 if (norm & V4L2_STD_NTSC) {
433 scale = tw9910_ntsc_scales;
434 size = ARRAY_SIZE(tw9910_ntsc_scales);
435 } else if (norm & V4L2_STD_PAL) {
436 scale = tw9910_pal_scales;
437 size = ARRAY_SIZE(tw9910_pal_scales);
442 for (i = 0; i < size; i++) {
443 tmp = abs(width - scale[i].width) +
444 abs(height - scale[i].height);
455 * subdevice operations
457 static int tw9910_s_stream(struct v4l2_subdev *sd, int enable)
459 struct i2c_client *client = v4l2_get_subdevdata(sd);
460 struct tw9910_priv *priv = to_tw9910(client);
465 switch (priv->revision) {
467 val = OEN_TRI_SEL_ALL_OFF_r0;
470 val = OEN_TRI_SEL_ALL_OFF_r1;
473 dev_err(&client->dev, "un-supported revision\n");
477 val = OEN_TRI_SEL_ALL_ON;
480 dev_err(&client->dev, "norm select error\n");
484 dev_dbg(&client->dev, "%s %dx%d\n",
487 priv->scale->height);
490 ret = tw9910_mask_set(client, OPFORM, OEN_TRI_SEL_MASK, val);
494 return tw9910_power(client, enable);
497 static int tw9910_g_std(struct v4l2_subdev *sd, v4l2_std_id *norm)
499 struct i2c_client *client = v4l2_get_subdevdata(sd);
500 struct tw9910_priv *priv = to_tw9910(client);
507 static int tw9910_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
509 struct i2c_client *client = v4l2_get_subdevdata(sd);
510 struct tw9910_priv *priv = to_tw9910(client);
512 if (!(norm & (V4L2_STD_NTSC | V4L2_STD_PAL)))
520 #ifdef CONFIG_VIDEO_ADV_DEBUG
521 static int tw9910_g_register(struct v4l2_subdev *sd,
522 struct v4l2_dbg_register *reg)
524 struct i2c_client *client = v4l2_get_subdevdata(sd);
530 ret = i2c_smbus_read_byte_data(client, reg->reg);
538 reg->val = (__u64)ret;
543 static int tw9910_s_register(struct v4l2_subdev *sd,
544 const struct v4l2_dbg_register *reg)
546 struct i2c_client *client = v4l2_get_subdevdata(sd);
548 if (reg->reg > 0xff ||
552 return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
556 static int tw9910_s_power(struct v4l2_subdev *sd, int on)
558 struct i2c_client *client = v4l2_get_subdevdata(sd);
559 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
561 return soc_camera_set_power(&client->dev, ssdd, on);
564 static int tw9910_set_frame(struct v4l2_subdev *sd, u32 *width, u32 *height)
566 struct i2c_client *client = v4l2_get_subdevdata(sd);
567 struct tw9910_priv *priv = to_tw9910(client);
572 * select suitable norm
574 priv->scale = tw9910_select_norm(priv->norm, *width, *height);
576 goto tw9910_set_fmt_error;
581 tw9910_reset(client);
587 if (SOCAM_DATAWIDTH_16 == priv->info->buswidth)
590 ret = tw9910_mask_set(client, OPFORM, LEN, val);
592 goto tw9910_set_fmt_error;
595 * select MPOUT behavior
597 switch (priv->info->mpout) {
598 case TW9910_MPO_VLOSS:
599 val = RTSEL_VLOSS; break;
600 case TW9910_MPO_HLOCK:
601 val = RTSEL_HLOCK; break;
602 case TW9910_MPO_SLOCK:
603 val = RTSEL_SLOCK; break;
604 case TW9910_MPO_VLOCK:
605 val = RTSEL_VLOCK; break;
606 case TW9910_MPO_MONO:
607 val = RTSEL_MONO; break;
608 case TW9910_MPO_DET50:
609 val = RTSEL_DET50; break;
610 case TW9910_MPO_FIELD:
611 val = RTSEL_FIELD; break;
612 case TW9910_MPO_RTCO:
613 val = RTSEL_RTCO; break;
618 ret = tw9910_mask_set(client, VBICNTL, RTSEL_MASK, val);
620 goto tw9910_set_fmt_error;
625 ret = tw9910_set_scale(client, priv->scale);
627 goto tw9910_set_fmt_error;
632 ret = tw9910_set_hsync(client);
634 goto tw9910_set_fmt_error;
636 *width = priv->scale->width;
637 *height = priv->scale->height;
641 tw9910_set_fmt_error:
643 tw9910_reset(client);
649 static int tw9910_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
651 struct i2c_client *client = v4l2_get_subdevdata(sd);
652 struct tw9910_priv *priv = to_tw9910(client);
656 if (priv->norm & V4L2_STD_NTSC) {
663 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
668 static int tw9910_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
670 struct i2c_client *client = v4l2_get_subdevdata(sd);
671 struct tw9910_priv *priv = to_tw9910(client);
675 if (priv->norm & V4L2_STD_NTSC) {
676 a->bounds.width = 640;
677 a->bounds.height = 480;
679 a->bounds.width = 768;
680 a->bounds.height = 576;
682 a->defrect = a->bounds;
683 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
684 a->pixelaspect.numerator = 1;
685 a->pixelaspect.denominator = 1;
690 static int tw9910_g_fmt(struct v4l2_subdev *sd,
691 struct v4l2_mbus_framefmt *mf)
693 struct i2c_client *client = v4l2_get_subdevdata(sd);
694 struct tw9910_priv *priv = to_tw9910(client);
697 priv->scale = tw9910_select_norm(priv->norm, 640, 480);
702 mf->width = priv->scale->width;
703 mf->height = priv->scale->height;
704 mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
705 mf->colorspace = V4L2_COLORSPACE_JPEG;
706 mf->field = V4L2_FIELD_INTERLACED_BT;
711 static int tw9910_s_fmt(struct v4l2_subdev *sd,
712 struct v4l2_mbus_framefmt *mf)
714 u32 width = mf->width, height = mf->height;
717 WARN_ON(mf->field != V4L2_FIELD_ANY &&
718 mf->field != V4L2_FIELD_INTERLACED_BT);
723 if (mf->code != V4L2_MBUS_FMT_UYVY8_2X8)
726 mf->colorspace = V4L2_COLORSPACE_JPEG;
728 ret = tw9910_set_frame(sd, &width, &height);
736 static int tw9910_try_fmt(struct v4l2_subdev *sd,
737 struct v4l2_mbus_framefmt *mf)
739 struct i2c_client *client = v4l2_get_subdevdata(sd);
740 struct tw9910_priv *priv = to_tw9910(client);
741 const struct tw9910_scale_ctrl *scale;
743 if (V4L2_FIELD_ANY == mf->field) {
744 mf->field = V4L2_FIELD_INTERLACED_BT;
745 } else if (V4L2_FIELD_INTERLACED_BT != mf->field) {
746 dev_err(&client->dev, "Field type %d invalid.\n", mf->field);
750 mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
751 mf->colorspace = V4L2_COLORSPACE_JPEG;
754 * select suitable norm
756 scale = tw9910_select_norm(priv->norm, mf->width, mf->height);
760 mf->width = scale->width;
761 mf->height = scale->height;
766 static int tw9910_video_probe(struct i2c_client *client)
768 struct tw9910_priv *priv = to_tw9910(client);
773 * tw9910 only use 8 or 16 bit bus width
775 if (SOCAM_DATAWIDTH_16 != priv->info->buswidth &&
776 SOCAM_DATAWIDTH_8 != priv->info->buswidth) {
777 dev_err(&client->dev, "bus width error\n");
781 ret = tw9910_s_power(&priv->subdev, 1);
786 * check and show Product ID
787 * So far only revisions 0 and 1 have been seen
789 id = i2c_smbus_read_byte_data(client, ID);
790 priv->revision = GET_REV(id);
794 0x01 < priv->revision) {
795 dev_err(&client->dev,
796 "Product ID error %x:%x\n",
802 dev_info(&client->dev,
803 "tw9910 Product ID %0x:%0x\n", id, priv->revision);
805 priv->norm = V4L2_STD_NTSC;
808 tw9910_s_power(&priv->subdev, 0);
812 static struct v4l2_subdev_core_ops tw9910_subdev_core_ops = {
813 .s_std = tw9910_s_std,
814 .g_std = tw9910_g_std,
815 #ifdef CONFIG_VIDEO_ADV_DEBUG
816 .g_register = tw9910_g_register,
817 .s_register = tw9910_s_register,
819 .s_power = tw9910_s_power,
822 static int tw9910_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
823 enum v4l2_mbus_pixelcode *code)
828 *code = V4L2_MBUS_FMT_UYVY8_2X8;
832 static int tw9910_g_mbus_config(struct v4l2_subdev *sd,
833 struct v4l2_mbus_config *cfg)
835 struct i2c_client *client = v4l2_get_subdevdata(sd);
836 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
838 cfg->flags = V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_MASTER |
839 V4L2_MBUS_VSYNC_ACTIVE_HIGH | V4L2_MBUS_VSYNC_ACTIVE_LOW |
840 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_HSYNC_ACTIVE_LOW |
841 V4L2_MBUS_DATA_ACTIVE_HIGH;
842 cfg->type = V4L2_MBUS_PARALLEL;
843 cfg->flags = soc_camera_apply_board_flags(ssdd, cfg);
848 static int tw9910_s_mbus_config(struct v4l2_subdev *sd,
849 const struct v4l2_mbus_config *cfg)
851 struct i2c_client *client = v4l2_get_subdevdata(sd);
852 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
853 u8 val = VSSL_VVALID | HSSL_DVALID;
854 unsigned long flags = soc_camera_apply_board_flags(ssdd, cfg);
859 * We use VVALID and DVALID signals to control VSYNC and HSYNC
860 * outputs, in this mode their polarity is inverted.
862 if (flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
865 if (flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
868 return i2c_smbus_write_byte_data(client, OUTCTR1, val);
871 static struct v4l2_subdev_video_ops tw9910_subdev_video_ops = {
872 .s_stream = tw9910_s_stream,
873 .g_mbus_fmt = tw9910_g_fmt,
874 .s_mbus_fmt = tw9910_s_fmt,
875 .try_mbus_fmt = tw9910_try_fmt,
876 .cropcap = tw9910_cropcap,
877 .g_crop = tw9910_g_crop,
878 .enum_mbus_fmt = tw9910_enum_fmt,
879 .g_mbus_config = tw9910_g_mbus_config,
880 .s_mbus_config = tw9910_s_mbus_config,
883 static struct v4l2_subdev_ops tw9910_subdev_ops = {
884 .core = &tw9910_subdev_core_ops,
885 .video = &tw9910_subdev_video_ops,
889 * i2c_driver function
892 static int tw9910_probe(struct i2c_client *client,
893 const struct i2c_device_id *did)
896 struct tw9910_priv *priv;
897 struct tw9910_video_info *info;
898 struct i2c_adapter *adapter =
899 to_i2c_adapter(client->dev.parent);
900 struct soc_camera_subdev_desc *ssdd = soc_camera_i2c_to_desc(client);
902 if (!ssdd || !ssdd->drv_priv) {
903 dev_err(&client->dev, "TW9910: missing platform data!\n");
907 info = ssdd->drv_priv;
909 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
910 dev_err(&client->dev,
911 "I2C-Adapter doesn't support "
912 "I2C_FUNC_SMBUS_BYTE_DATA\n");
916 priv = devm_kzalloc(&client->dev, sizeof(*priv), GFP_KERNEL);
922 v4l2_i2c_subdev_init(&priv->subdev, client, &tw9910_subdev_ops);
924 return tw9910_video_probe(client);
927 static int tw9910_remove(struct i2c_client *client)
932 static const struct i2c_device_id tw9910_id[] = {
936 MODULE_DEVICE_TABLE(i2c, tw9910_id);
938 static struct i2c_driver tw9910_i2c_driver = {
942 .probe = tw9910_probe,
943 .remove = tw9910_remove,
944 .id_table = tw9910_id,
947 module_i2c_driver(tw9910_i2c_driver);
949 MODULE_DESCRIPTION("SoC Camera driver for tw9910");
950 MODULE_AUTHOR("Kuninori Morimoto");
951 MODULE_LICENSE("GPL v2");