4 * CIMax2(R) SP2 driver in conjunction with NetUp Dual DVB-S2 CI card
6 * Copyright (C) 2009 NetUP Inc.
7 * Copyright (C) 2009 Igor M. Liplianin <liplianin@netup.ru>
8 * Copyright (C) 2009 Abylay Ospan <aospan@netup.ru>
10 * This program is free software; you can redistribute it and/or modify
11 * it under the terms of the GNU General Public License as published by
12 * the Free Software Foundation; either version 2 of the License, or
13 * (at your option) any later version.
15 * This program is distributed in the hope that it will be useful,
16 * but WITHOUT ANY WARRANTY; without even the implied warranty of
17 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
19 * GNU General Public License for more details.
21 * You should have received a copy of the GNU General Public License
22 * along with this program; if not, write to the Free Software
23 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
28 #include "dvb_ca_en50221.h"
29 /**** Bit definitions for MC417_RWD and MC417_OEN registers ***
34 bit 15 bit 14 bit 13 bit 12 bit 11 bit 10 bit 9 bit 8
35 +-------+-------+-------+-------+-------+-------+-------+-------+
36 | WR# | RD# | | ACK# | ADHI | ADLO | CS1# | CS0# |
37 +-------+-------+-------+-------+-------+-------+-------+-------+
38 bit 7 bit 6 bit 5 bit 4 bit 3 bit 2 bit 1 bit 0
39 +-------+-------+-------+-------+-------+-------+-------+-------+
40 | DATA7| DATA6| DATA5| DATA4| DATA3| DATA2| DATA1| DATA0|
41 +-------+-------+-------+-------+-------+-------+-------+-------+
44 #define NETUP_DATA 0x000000ff
45 #define NETUP_WR 0x00008000
46 #define NETUP_RD 0x00004000
47 #define NETUP_ACK 0x00001000
48 #define NETUP_ADHI 0x00000800
49 #define NETUP_ADLO 0x00000400
50 #define NETUP_CS1 0x00000200
51 #define NETUP_CS0 0x00000100
52 #define NETUP_EN_ALL 0x00001000
53 #define NETUP_CTRL_OFF (NETUP_CS1 | NETUP_CS0 | NETUP_WR | NETUP_RD)
54 #define NETUP_CI_CTL 0x04
57 #define NETUP_IRQ_DETAM 0x1
58 #define NETUP_IRQ_IRQAM 0x4
60 static unsigned int ci_dbg;
61 module_param(ci_dbg, int, 0644);
62 MODULE_PARM_DESC(ci_dbg, "Enable CI debugging");
64 static unsigned int ci_irq_enable;
65 module_param(ci_irq_enable, int, 0644);
66 MODULE_PARM_DESC(ci_irq_enable, "Enable IRQ from CAM");
68 #define ci_dbg_print(args...) \
71 printk(KERN_DEBUG args); \
74 #define ci_irq_flags() (ci_irq_enable ? NETUP_IRQ_IRQAM : 0)
76 /* stores all private variables for communication with CI */
77 struct netup_ci_state {
78 struct dvb_ca_en50221 ca;
79 struct mutex ca_mutex;
80 struct i2c_adapter *i2c_adap;
83 struct work_struct work;
87 unsigned long next_status_checked_time;
91 static int netup_read_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
95 struct i2c_msg msg[] = {
109 ret = i2c_transfer(i2c_adap, msg, 2);
112 ci_dbg_print("%s: i2c read error, Reg = 0x%02x, Status = %d\n",
118 ci_dbg_print("%s: i2c read Addr=0x%04x, Reg = 0x%02x, data = %02x\n",
119 __func__, addr, reg, buf[0]);
124 static int netup_write_i2c(struct i2c_adapter *i2c_adap, u8 addr, u8 reg,
130 struct i2c_msg msg = {
138 memcpy(&buffer[1], buf, len);
140 ret = i2c_transfer(i2c_adap, &msg, 1);
143 ci_dbg_print("%s: i2c write error, Reg=[0x%02x], Status=%d\n",
151 static int netup_ci_get_mem(struct cx23885_dev *dev)
154 unsigned long timeout = jiffies + msecs_to_jiffies(1);
157 mem = cx_read(MC417_RWD);
158 if ((mem & NETUP_ACK) == 0)
160 if (time_after(jiffies, timeout))
165 cx_set(MC417_RWD, NETUP_CTRL_OFF);
170 static int netup_ci_op_cam(struct dvb_ca_en50221 *en50221, int slot,
171 u8 flag, u8 read, int addr, u8 data)
173 struct netup_ci_state *state = en50221->data;
174 struct cx23885_tsport *port = state->priv;
175 struct cx23885_dev *dev = port->dev;
184 if (state->current_ci_flag != flag) {
185 ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
193 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
198 state->current_ci_flag = flag;
200 mutex_lock(&dev->gpio_lock);
203 cx_write(MC417_OEN, NETUP_EN_ALL);
204 cx_write(MC417_RWD, NETUP_CTRL_OFF |
205 NETUP_ADLO | (0xff & addr));
206 cx_clear(MC417_RWD, NETUP_ADLO);
207 cx_write(MC417_RWD, NETUP_CTRL_OFF |
208 NETUP_ADHI | (0xff & (addr >> 8)));
209 cx_clear(MC417_RWD, NETUP_ADHI);
211 if (read) { /* data in */
212 cx_write(MC417_OEN, NETUP_EN_ALL | NETUP_DATA);
213 } else /* data out */
214 cx_write(MC417_RWD, NETUP_CTRL_OFF | data);
218 (state->ci_i2c_addr == 0x40) ? NETUP_CS0 : NETUP_CS1);
220 cx_clear(MC417_RWD, (read) ? NETUP_RD : NETUP_WR);
221 mem = netup_ci_get_mem(dev);
223 mutex_unlock(&dev->gpio_lock);
229 ci_dbg_print("%s: %s: chipaddr=[0x%x] addr=[0x%02x], %s=%x\n", __func__,
230 (read) ? "read" : "write", state->ci_i2c_addr, addr,
231 (flag == NETUP_CI_CTL) ? "ctl" : "mem",
232 (read) ? mem : data);
240 int netup_ci_read_attribute_mem(struct dvb_ca_en50221 *en50221,
243 return netup_ci_op_cam(en50221, slot, 0, NETUP_CI_RD, addr, 0);
246 int netup_ci_write_attribute_mem(struct dvb_ca_en50221 *en50221,
247 int slot, int addr, u8 data)
249 return netup_ci_op_cam(en50221, slot, 0, 0, addr, data);
252 int netup_ci_read_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
255 return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL,
256 NETUP_CI_RD, addr, 0);
259 int netup_ci_write_cam_ctl(struct dvb_ca_en50221 *en50221, int slot,
262 return netup_ci_op_cam(en50221, slot, NETUP_CI_CTL, 0, addr, data);
265 int netup_ci_slot_reset(struct dvb_ca_en50221 *en50221, int slot)
267 struct netup_ci_state *state = en50221->data;
275 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
284 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
288 dvb_ca_en50221_camready_irq(&state->ca, 0);
294 int netup_ci_slot_shutdown(struct dvb_ca_en50221 *en50221, int slot)
296 /* not implemented */
300 static int netup_ci_set_irq(struct dvb_ca_en50221 *en50221, u8 irq_mode)
302 struct netup_ci_state *state = en50221->data;
305 if (irq_mode == state->current_irq_mode)
308 ci_dbg_print("%s: chipaddr=[0x%x] setting ci IRQ to [0x%x] \n",
309 __func__, state->ci_i2c_addr, irq_mode);
310 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
316 state->current_irq_mode = irq_mode;
321 int netup_ci_slot_ts_ctl(struct dvb_ca_en50221 *en50221, int slot)
323 struct netup_ci_state *state = en50221->data;
329 netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
333 return netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
338 static void netup_read_ci_status(struct work_struct *work)
340 struct netup_ci_state *state =
341 container_of(work, struct netup_ci_state, work);
345 /* CAM module IRQ processing. fast operation */
346 dvb_ca_en50221_frda_irq(&state->ca, 0);
348 /* CAM module INSERT/REMOVE processing. slow operation because of i2c
350 if (time_after(jiffies, state->next_status_checked_time)
352 ret = netup_read_i2c(state->i2c_adap, state->ci_i2c_addr,
355 state->next_status_checked_time = jiffies
356 + msecs_to_jiffies(1000);
361 ci_dbg_print("%s: Slot Status Addr=[0x%04x], "
362 "Reg=[0x%02x], data=%02x, "
363 "TS config = %02x\n", __func__,
364 state->ci_i2c_addr, 0, buf[0],
369 state->status = DVB_CA_EN50221_POLL_CAM_PRESENT |
370 DVB_CA_EN50221_POLL_CAM_READY;
377 int netup_ci_slot_status(struct cx23885_dev *dev, u32 pci_status)
379 struct cx23885_tsport *port = NULL;
380 struct netup_ci_state *state = NULL;
382 ci_dbg_print("%s:\n", __func__);
384 if (0 == (pci_status & (PCI_MSK_GPIO0 | PCI_MSK_GPIO1)))
387 if (pci_status & PCI_MSK_GPIO0) {
389 state = port->port_priv;
390 schedule_work(&state->work);
391 ci_dbg_print("%s: Wakeup CI0\n", __func__);
394 if (pci_status & PCI_MSK_GPIO1) {
396 state = port->port_priv;
397 schedule_work(&state->work);
398 ci_dbg_print("%s: Wakeup CI1\n", __func__);
404 int netup_poll_ci_slot_status(struct dvb_ca_en50221 *en50221,
407 struct netup_ci_state *state = en50221->data;
412 netup_ci_set_irq(en50221, open ? (NETUP_IRQ_DETAM | ci_irq_flags())
415 return state->status;
418 int netup_ci_init(struct cx23885_tsport *port)
420 struct netup_ci_state *state;
421 u8 cimax_init[34] = {
422 0x00, /* module A control*/
423 0x00, /* auto select mask high A */
424 0x00, /* auto select mask low A */
425 0x00, /* auto select pattern high A */
426 0x00, /* auto select pattern low A */
427 0x44, /* memory access time A */
428 0x00, /* invert input A */
431 0x00, /* module B control*/
432 0x00, /* auto select mask high B */
433 0x00, /* auto select mask low B */
434 0x00, /* auto select pattern high B */
435 0x00, /* auto select pattern low B */
436 0x44, /* memory access time B */
437 0x00, /* invert input B */
440 0x00, /* auto select mask high Ext */
441 0x00, /* auto select mask low Ext */
442 0x00, /* auto select pattern high Ext */
443 0x00, /* auto select pattern low Ext */
445 0x02, /* destination - module A */
446 0x01, /* power on (use it like store place) */
448 0x00, /* int status read only */
449 ci_irq_flags() | NETUP_IRQ_DETAM, /* DETAM, IRQAM unmasked */
450 0x05, /* EXTINT=active-high, INT=push-pull */
452 0x04, /* ack active low */
454 0x33, /* serial mode, rising in, rising out, MSB first*/
455 0x31, /* synchronization */
459 ci_dbg_print("%s\n", __func__);
460 state = kzalloc(sizeof(struct netup_ci_state), GFP_KERNEL);
462 ci_dbg_print("%s: Unable create CI structure!\n", __func__);
467 port->port_priv = state;
471 state->ci_i2c_addr = 0x40;
474 state->ci_i2c_addr = 0x41;
478 state->i2c_adap = &port->dev->i2c_bus[0].i2c_adap;
479 state->ca.owner = THIS_MODULE;
480 state->ca.read_attribute_mem = netup_ci_read_attribute_mem;
481 state->ca.write_attribute_mem = netup_ci_write_attribute_mem;
482 state->ca.read_cam_control = netup_ci_read_cam_ctl;
483 state->ca.write_cam_control = netup_ci_write_cam_ctl;
484 state->ca.slot_reset = netup_ci_slot_reset;
485 state->ca.slot_shutdown = netup_ci_slot_shutdown;
486 state->ca.slot_ts_enable = netup_ci_slot_ts_ctl;
487 state->ca.poll_slot_status = netup_poll_ci_slot_status;
488 state->ca.data = state;
490 state->current_irq_mode = ci_irq_flags() | NETUP_IRQ_DETAM;
492 ret = netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
493 0, &cimax_init[0], 34);
495 ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
496 0x1f, &cimax_init[0x18], 1);
498 ret |= netup_write_i2c(state->i2c_adap, state->ci_i2c_addr,
499 0x18, &cimax_init[0x18], 1);
504 ret = dvb_ca_en50221_init(&port->frontends.adapter,
511 INIT_WORK(&state->work, netup_read_ci_status);
512 schedule_work(&state->work);
514 ci_dbg_print("%s: CI initialized!\n", __func__);
518 ci_dbg_print("%s: Cannot initialize CI: Error %d.\n", __func__, ret);
523 void netup_ci_exit(struct cx23885_tsport *port)
525 struct netup_ci_state *state;
530 state = (struct netup_ci_state *)port->port_priv;
534 if (NULL == state->ca.data)
537 dvb_ca_en50221_release(&state->ca);