drivers/media/platform/coda.c

   1 /*
   2  * Coda multi-standard codec IP
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <javier.martin@vista-silicon.com>
   6  *    Xavier Duret
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/firmware.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/io.h>
  19 #include <linux/irq.h>
  20 #include <linux/module.h>
  21 #include <linux/of_device.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/slab.h>
  24 #include <linux/videodev2.h>
  25 #include <linux/of.h>
  26
  27 #include <mach/iram.h>
  28 #include <media/v4l2-ctrls.h>
  29 #include <media/v4l2-device.h>
  30 #include <media/v4l2-ioctl.h>
  31 #include <media/v4l2-mem2mem.h>
  32 #include <media/videobuf2-core.h>
  33 #include <media/videobuf2-dma-contig.h>
  34
  35 #include "coda.h"
  36
  37 #define CODA_NAME               "coda"
  38
  39 #define CODA_MAX_INSTANCES      4
  40
  41 #define CODA_FMO_BUF_SIZE       32
  42 #define CODADX6_WORK_BUF_SIZE   (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  43 #define CODA7_WORK_BUF_SIZE     (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  44 #define CODA_PARA_BUF_SIZE      (10 * 1024)
  45 #define CODA_ISRAM_SIZE (2048 * 2)
  46 #define CODA7_IRAM_SIZE         0x14000 /* 81920 bytes */
  47
  48 #define CODA_MAX_FRAMEBUFFERS   2
  49
  50 #define MAX_W           720
  51 #define MAX_H           576
  52 #define CODA_MAX_FRAME_SIZE     0x90000
  53 #define FMO_SLICE_SAVE_BUF_SIZE         (32)
  54 #define CODA_DEFAULT_GAMMA              4096
  55
  56 #define MIN_W 176
  57 #define MIN_H 144
  58 #define MAX_W 720
  59 #define MAX_H 576
  60
  61 #define S_ALIGN         1 /* multiple of 2 */
  62 #define W_ALIGN         1 /* multiple of 2 */
  63 #define H_ALIGN         1 /* multiple of 2 */
  64
  65 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  66
  67 static int coda_debug;
  68 module_param(coda_debug, int, 0);
  69 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  70
  71 enum {
  72         V4L2_M2M_SRC = 0,
  73         V4L2_M2M_DST = 1,
  74 };
  75
  76 enum coda_fmt_type {
  77         CODA_FMT_ENC,
  78         CODA_FMT_RAW,
  79 };
  80
  81 enum coda_inst_type {
  82         CODA_INST_ENCODER,
  83         CODA_INST_DECODER,
  84 };
  85
  86 enum coda_product {
  87         CODA_DX6 = 0xf001,
  88         CODA_7541 = 0xf012,
  89 };
  90
  91 struct coda_fmt {
  92         char *name;
  93         u32 fourcc;
  94         enum coda_fmt_type type;
  95 };
  96
  97 struct coda_devtype {
  98         char                    *firmware;
  99         enum coda_product       product;
 100         struct coda_fmt         *formats;
 101         unsigned int            num_formats;
 102         size_t                  workbuf_size;
 103 };
 104
 105 /* Per-queue, driver-specific private data */
 106 struct coda_q_data {
 107         unsigned int            width;
 108         unsigned int            height;
 109         unsigned int            sizeimage;
 110         struct coda_fmt *fmt;
 111 };
 112
 113 struct coda_aux_buf {
 114         void                    *vaddr;
 115         dma_addr_t              paddr;
 116         u32                     size;
 117 };
 118
 119 struct coda_dev {
 120         struct v4l2_device      v4l2_dev;
 121         struct video_device     vfd;
 122         struct platform_device  *plat_dev;
 123         const struct coda_devtype *devtype;
 124
 125         void __iomem            *regs_base;
 126         struct clk              *clk_per;
 127         struct clk              *clk_ahb;
 128
 129         struct coda_aux_buf     codebuf;
 130         struct coda_aux_buf     workbuf;
 131         long unsigned int       iram_paddr;
 132
 133         spinlock_t              irqlock;
 134         struct mutex            dev_mutex;
 135         struct v4l2_m2m_dev     *m2m_dev;
 136         struct vb2_alloc_ctx    *alloc_ctx;
 137         struct list_head        instances;
 138         unsigned long           instance_mask;
 139         struct delayed_work     timeout;
 140         struct completion       done;
 141 };
 142
 143 struct coda_params {
 144         u8                      rot_mode;
 145         u8                      h264_intra_qp;
 146         u8                      h264_inter_qp;
 147         u8                      mpeg4_intra_qp;
 148         u8                      mpeg4_inter_qp;
 149         u8                      gop_size;
 150         int                     codec_mode;
 151         enum v4l2_mpeg_video_multi_slice_mode slice_mode;
 152         u32                     framerate;
 153         u16                     bitrate;
 154         u32                     slice_max_bits;
 155         u32                     slice_max_mb;
 156 };
 157
 158 struct coda_ctx {
 159         struct coda_dev                 *dev;
 160         struct list_head                list;
 161         int                             aborting;
 162         int                             rawstreamon;
 163         int                             compstreamon;
 164         u32                             isequence;
 165         struct coda_q_data              q_data[2];
 166         enum coda_inst_type             inst_type;
 167         enum v4l2_colorspace            colorspace;
 168         struct coda_params              params;
 169         struct v4l2_m2m_ctx             *m2m_ctx;
 170         struct v4l2_ctrl_handler        ctrls;
 171         struct v4l2_fh                  fh;
 172         int                             gopcounter;
 173         char                            vpu_header[3][64];
 174         int                             vpu_header_size[3];
 175         struct coda_aux_buf             parabuf;
 176         struct coda_aux_buf             internal_frames[CODA_MAX_FRAMEBUFFERS];
 177         int                             num_internal_frames;
 178         int                             idx;
 179 };
 180
 181 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
 182 {
 183         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 184                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 185         writel(data, dev->regs_base + reg);
 186 }
 187
 188 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
 189 {
 190         u32 data;
 191         data = readl(dev->regs_base + reg);
 192         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 193                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 194         return data;
 195 }
 196
 197 static inline unsigned long coda_isbusy(struct coda_dev *dev)
 198 {
 199         return coda_read(dev, CODA_REG_BIT_BUSY);
 200 }
 201
 202 static inline int coda_is_initialized(struct coda_dev *dev)
 203 {
 204         return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
 205 }
 206
 207 static int coda_wait_timeout(struct coda_dev *dev)
 208 {
 209         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 210
 211         while (coda_isbusy(dev)) {
 212                 if (time_after(jiffies, timeout))
 213                         return -ETIMEDOUT;
 214         }
 215         return 0;
 216 }
 217
 218 static void coda_command_async(struct coda_ctx *ctx, int cmd)
 219 {
 220         struct coda_dev *dev = ctx->dev;
 221         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 222
 223         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
 224         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
 225         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
 226 }
 227
 228 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
 229 {
 230         struct coda_dev *dev = ctx->dev;
 231
 232         coda_command_async(ctx, cmd);
 233         return coda_wait_timeout(dev);
 234 }
 235
 236 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
 237                                          enum v4l2_buf_type type)
 238 {
 239         switch (type) {
 240         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 241                 return &(ctx->q_data[V4L2_M2M_SRC]);
 242         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 243                 return &(ctx->q_data[V4L2_M2M_DST]);
 244         default:
 245                 BUG();
 246         }
 247         return NULL;
 248 }
 249
 250 /*
 251  * Add one array of supported formats for each version of Coda:
 252  *  i.MX27 -> codadx6
 253  *  i.MX51 -> coda7
 254  *  i.MX6  -> coda960
 255  */
 256 static struct coda_fmt codadx6_formats[] = {
 257         {
 258                 .name = "YUV 4:2:0 Planar",
 259                 .fourcc = V4L2_PIX_FMT_YUV420,
 260                 .type = CODA_FMT_RAW,
 261         },
 262         {
 263                 .name = "H264 Encoded Stream",
 264                 .fourcc = V4L2_PIX_FMT_H264,
 265                 .type = CODA_FMT_ENC,
 266         },
 267         {
 268                 .name = "MPEG4 Encoded Stream",
 269                 .fourcc = V4L2_PIX_FMT_MPEG4,
 270                 .type = CODA_FMT_ENC,
 271         },
 272 };
 273
 274 static struct coda_fmt coda7_formats[] = {
 275         {
 276                 .name = "YUV 4:2:0 Planar",
 277                 .fourcc = V4L2_PIX_FMT_YUV420,
 278                 .type = CODA_FMT_RAW,
 279         },
 280         {
 281                 .name = "H264 Encoded Stream",
 282                 .fourcc = V4L2_PIX_FMT_H264,
 283                 .type = CODA_FMT_ENC,
 284         },
 285         {
 286                 .name = "MPEG4 Encoded Stream",
 287                 .fourcc = V4L2_PIX_FMT_MPEG4,
 288                 .type = CODA_FMT_ENC,
 289         },
 290 };
 291
 292 static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f)
 293 {
 294         struct coda_fmt *formats = dev->devtype->formats;
 295         int num_formats = dev->devtype->num_formats;
 296         unsigned int k;
 297
 298         for (k = 0; k < num_formats; k++) {
 299                 if (formats[k].fourcc == f->fmt.pix.pixelformat)
 300                         break;
 301         }
 302
 303         if (k == num_formats)
 304                 return NULL;
 305
 306         return &formats[k];
 307 }
 308
 309 /*
 310  * V4L2 ioctl() operations.
 311  */
 312 static int vidioc_querycap(struct file *file, void *priv,
 313                            struct v4l2_capability *cap)
 314 {
 315         strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
 316         strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
 317         strlcpy(cap->bus_info, CODA_NAME, sizeof(cap->bus_info));
 318         /*
 319          * This is only a mem-to-mem video device. The capture and output
 320          * device capability flags are left only for backward compatibility
 321          * and are scheduled for removal.
 322          */
 323         cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
 324                            V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
 325         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
 326
 327         return 0;
 328 }
 329
 330 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
 331                         enum coda_fmt_type type)
 332 {
 333         struct coda_ctx *ctx = fh_to_ctx(priv);
 334         struct coda_dev *dev = ctx->dev;
 335         struct coda_fmt *formats = dev->devtype->formats;
 336         struct coda_fmt *fmt;
 337         int num_formats = dev->devtype->num_formats;
 338         int i, num = 0;
 339
 340         for (i = 0; i < num_formats; i++) {
 341                 if (formats[i].type == type) {
 342                         if (num == f->index)
 343                                 break;
 344                         ++num;
 345                 }
 346         }
 347
 348         if (i < num_formats) {
 349                 fmt = &formats[i];
 350                 strlcpy(f->description, fmt->name, sizeof(f->description));
 351                 f->pixelformat = fmt->fourcc;
 352                 return 0;
 353         }
 354
 355         /* Format not found */
 356         return -EINVAL;
 357 }
 358
 359 static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
 360                                    struct v4l2_fmtdesc *f)
 361 {
 362         return enum_fmt(priv, f, CODA_FMT_ENC);
 363 }
 364
 365 static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
 366                                    struct v4l2_fmtdesc *f)
 367 {
 368         return enum_fmt(priv, f, CODA_FMT_RAW);
 369 }
 370
 371 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
 372 {
 373         struct vb2_queue *vq;
 374         struct coda_q_data *q_data;
 375         struct coda_ctx *ctx = fh_to_ctx(priv);
 376
 377         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 378         if (!vq)
 379                 return -EINVAL;
 380
 381         q_data = get_q_data(ctx, f->type);
 382
 383         f->fmt.pix.field        = V4L2_FIELD_NONE;
 384         f->fmt.pix.pixelformat  = q_data->fmt->fourcc;
 385         f->fmt.pix.width        = q_data->width;
 386         f->fmt.pix.height       = q_data->height;
 387         if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
 388                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
 389         else /* encoded formats h.264/mpeg4 */
 390                 f->fmt.pix.bytesperline = 0;
 391
 392         f->fmt.pix.sizeimage    = q_data->sizeimage;
 393         f->fmt.pix.colorspace   = ctx->colorspace;
 394
 395         return 0;
 396 }
 397
 398 static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f)
 399 {
 400         enum v4l2_field field;
 401
 402         field = f->fmt.pix.field;
 403         if (field == V4L2_FIELD_ANY)
 404                 field = V4L2_FIELD_NONE;
 405         else if (V4L2_FIELD_NONE != field)
 406                 return -EINVAL;
 407
 408         /* V4L2 specification suggests the driver corrects the format struct
 409          * if any of the dimensions is unsupported */
 410         f->fmt.pix.field = field;
 411
 412         if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
 413                 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
 414                                       W_ALIGN, &f->fmt.pix.height,
 415                                       MIN_H, MAX_H, H_ALIGN, S_ALIGN);
 416                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
 417                 f->fmt.pix.sizeimage = f->fmt.pix.width *
 418                                         f->fmt.pix.height * 3 / 2;
 419         } else { /*encoded formats h.264/mpeg4 */
 420                 f->fmt.pix.bytesperline = 0;
 421                 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
 422         }
 423
 424         return 0;
 425 }
 426
 427 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
 428                                   struct v4l2_format *f)
 429 {
 430         int ret;
 431         struct coda_fmt *fmt;
 432         struct coda_ctx *ctx = fh_to_ctx(priv);
 433
 434         fmt = find_format(ctx->dev, f);
 435         /*
 436          * Since decoding support is not implemented yet do not allow
 437          * CODA_FMT_RAW formats in the capture interface.
 438          */
 439         if (!fmt || !(fmt->type == CODA_FMT_ENC))
 440                 f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264;
 441
 442         f->fmt.pix.colorspace = ctx->colorspace;
 443
 444         ret = vidioc_try_fmt(ctx->dev, f);
 445         if (ret < 0)
 446                 return ret;
 447
 448         return 0;
 449 }
 450
 451 static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
 452                                   struct v4l2_format *f)
 453 {
 454         struct coda_ctx *ctx = fh_to_ctx(priv);
 455         struct coda_fmt *fmt;
 456         int ret;
 457
 458         fmt = find_format(ctx->dev, f);
 459         /*
 460          * Since decoding support is not implemented yet do not allow
 461          * CODA_FMT formats in the capture interface.
 462          */
 463         if (!fmt || !(fmt->type == CODA_FMT_RAW))
 464                 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
 465
 466         if (!f->fmt.pix.colorspace)
 467                 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
 468
 469         ret = vidioc_try_fmt(ctx->dev, f);
 470         if (ret < 0)
 471                 return ret;
 472
 473         return 0;
 474 }
 475
 476 static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
 477 {
 478         struct coda_q_data *q_data;
 479         struct vb2_queue *vq;
 480         int ret;
 481
 482         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 483         if (!vq)
 484                 return -EINVAL;
 485
 486         q_data = get_q_data(ctx, f->type);
 487         if (!q_data)
 488                 return -EINVAL;
 489
 490         if (vb2_is_busy(vq)) {
 491                 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
 492                 return -EBUSY;
 493         }
 494
 495         ret = vidioc_try_fmt(ctx->dev, f);
 496         if (ret)
 497                 return ret;
 498
 499         q_data->fmt = find_format(ctx->dev, f);
 500         q_data->width = f->fmt.pix.width;
 501         q_data->height = f->fmt.pix.height;
 502         q_data->sizeimage = f->fmt.pix.sizeimage;
 503
 504         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 505                 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
 506                 f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
 507
 508         return 0;
 509 }
 510
 511 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
 512                                 struct v4l2_format *f)
 513 {
 514         int ret;
 515
 516         ret = vidioc_try_fmt_vid_cap(file, priv, f);
 517         if (ret)
 518                 return ret;
 519
 520         return vidioc_s_fmt(fh_to_ctx(priv), f);
 521 }
 522
 523 static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
 524                                 struct v4l2_format *f)
 525 {
 526         struct coda_ctx *ctx = fh_to_ctx(priv);
 527         int ret;
 528
 529         ret = vidioc_try_fmt_vid_out(file, priv, f);
 530         if (ret)
 531                 return ret;
 532
 533         ret = vidioc_s_fmt(ctx, f);
 534         if (ret)
 535                 ctx->colorspace = f->fmt.pix.colorspace;
 536
 537         return ret;
 538 }
 539
 540 static int vidioc_reqbufs(struct file *file, void *priv,
 541                           struct v4l2_requestbuffers *reqbufs)
 542 {
 543         struct coda_ctx *ctx = fh_to_ctx(priv);
 544
 545         return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
 546 }
 547
 548 static int vidioc_querybuf(struct file *file, void *priv,
 549                            struct v4l2_buffer *buf)
 550 {
 551         struct coda_ctx *ctx = fh_to_ctx(priv);
 552
 553         return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
 554 }
 555
 556 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 557 {
 558         struct coda_ctx *ctx = fh_to_ctx(priv);
 559
 560         return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
 561 }
 562
 563 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 564 {
 565         struct coda_ctx *ctx = fh_to_ctx(priv);
 566
 567         return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
 568 }
 569
 570 static int vidioc_streamon(struct file *file, void *priv,
 571                            enum v4l2_buf_type type)
 572 {
 573         struct coda_ctx *ctx = fh_to_ctx(priv);
 574
 575         return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
 576 }
 577
 578 static int vidioc_streamoff(struct file *file, void *priv,
 579                             enum v4l2_buf_type type)
 580 {
 581         struct coda_ctx *ctx = fh_to_ctx(priv);
 582
 583         return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
 584 }
 585
 586 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
 587         .vidioc_querycap        = vidioc_querycap,
 588
 589         .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
 590         .vidioc_g_fmt_vid_cap   = vidioc_g_fmt,
 591         .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
 592         .vidioc_s_fmt_vid_cap   = vidioc_s_fmt_vid_cap,
 593
 594         .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
 595         .vidioc_g_fmt_vid_out   = vidioc_g_fmt,
 596         .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
 597         .vidioc_s_fmt_vid_out   = vidioc_s_fmt_vid_out,
 598
 599         .vidioc_reqbufs         = vidioc_reqbufs,
 600         .vidioc_querybuf        = vidioc_querybuf,
 601
 602         .vidioc_qbuf            = vidioc_qbuf,
 603         .vidioc_dqbuf           = vidioc_dqbuf,
 604
 605         .vidioc_streamon        = vidioc_streamon,
 606         .vidioc_streamoff       = vidioc_streamoff,
 607 };
 608
 609 /*
 610  * Mem-to-mem operations.
 611  */
 612 static void coda_device_run(void *m2m_priv)
 613 {
 614         struct coda_ctx *ctx = m2m_priv;
 615         struct coda_q_data *q_data_src, *q_data_dst;
 616         struct vb2_buffer *src_buf, *dst_buf;
 617         struct coda_dev *dev = ctx->dev;
 618         int force_ipicture;
 619         int quant_param = 0;
 620         u32 picture_y, picture_cb, picture_cr;
 621         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
 622         u32 dst_fourcc;
 623
 624         src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
 625         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
 626         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 627         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 628         dst_fourcc = q_data_dst->fmt->fourcc;
 629
 630         src_buf->v4l2_buf.sequence = ctx->isequence;
 631         dst_buf->v4l2_buf.sequence = ctx->isequence;
 632         ctx->isequence++;
 633
 634         /*
 635          * Workaround coda firmware BUG that only marks the first
 636          * frame as IDR. This is a problem for some decoders that can't
 637          * recover when a frame is lost.
 638          */
 639         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
 640                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
 641                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
 642         } else {
 643                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
 644                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
 645         }
 646
 647         /*
 648          * Copy headers at the beginning of the first frame for H.264 only.
 649          * In MPEG4 they are already copied by the coda.
 650          */
 651         if (src_buf->v4l2_buf.sequence == 0) {
 652                 pic_stream_buffer_addr =
 653                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
 654                         ctx->vpu_header_size[0] +
 655                         ctx->vpu_header_size[1] +
 656                         ctx->vpu_header_size[2];
 657                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
 658                         ctx->vpu_header_size[0] -
 659                         ctx->vpu_header_size[1] -
 660                         ctx->vpu_header_size[2];
 661                 memcpy(vb2_plane_vaddr(dst_buf, 0),
 662                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
 663                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
 664                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
 665                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
 666                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
 667                         ctx->vpu_header_size[2]);
 668         } else {
 669                 pic_stream_buffer_addr =
 670                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
 671                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
 672         }
 673
 674         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
 675                 force_ipicture = 1;
 676                 switch (dst_fourcc) {
 677                 case V4L2_PIX_FMT_H264:
 678                         quant_param = ctx->params.h264_intra_qp;
 679                         break;
 680                 case V4L2_PIX_FMT_MPEG4:
 681                         quant_param = ctx->params.mpeg4_intra_qp;
 682                         break;
 683                 default:
 684                         v4l2_warn(&ctx->dev->v4l2_dev,
 685                                 "cannot set intra qp, fmt not supported\n");
 686                         break;
 687                 }
 688         } else {
 689                 force_ipicture = 0;
 690                 switch (dst_fourcc) {
 691                 case V4L2_PIX_FMT_H264:
 692                         quant_param = ctx->params.h264_inter_qp;
 693                         break;
 694                 case V4L2_PIX_FMT_MPEG4:
 695                         quant_param = ctx->params.mpeg4_inter_qp;
 696                         break;
 697                 default:
 698                         v4l2_warn(&ctx->dev->v4l2_dev,
 699                                 "cannot set inter qp, fmt not supported\n");
 700                         break;
 701                 }
 702         }
 703
 704         /* submit */
 705         coda_write(dev, CODA_ROT_MIR_ENABLE | ctx->params.rot_mode, CODA_CMD_ENC_PIC_ROT_MODE);
 706         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
 707
 708
 709         picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
 710         picture_cb = picture_y + q_data_src->width * q_data_src->height;
 711         picture_cr = picture_cb + q_data_src->width / 2 *
 712                         q_data_src->height / 2;
 713
 714         coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
 715         coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
 716         coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
 717         coda_write(dev, force_ipicture << 1 & 0x2,
 718                    CODA_CMD_ENC_PIC_OPTION);
 719
 720         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
 721         coda_write(dev, pic_stream_buffer_size / 1024,
 722                    CODA_CMD_ENC_PIC_BB_SIZE);
 723
 724         if (dev->devtype->product == CODA_7541) {
 725                 coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
 726                                 CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
 727                                 CODA7_REG_BIT_AXI_SRAM_USE);
 728         }
 729
 730         /* 1 second timeout in case CODA locks up */
 731         schedule_delayed_work(&dev->timeout, HZ);
 732
 733         INIT_COMPLETION(dev->done);
 734         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
 735 }
 736
 737 static int coda_job_ready(void *m2m_priv)
 738 {
 739         struct coda_ctx *ctx = m2m_priv;
 740
 741         /*
 742          * For both 'P' and 'key' frame cases 1 picture
 743          * and 1 frame are needed.
 744          */
 745         if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
 746                 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
 747                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 748                          "not ready: not enough video buffers.\n");
 749                 return 0;
 750         }
 751
 752         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 753                         "job ready\n");
 754         return 1;
 755 }
 756
 757 static void coda_job_abort(void *priv)
 758 {
 759         struct coda_ctx *ctx = priv;
 760         struct coda_dev *dev = ctx->dev;
 761
 762         ctx->aborting = 1;
 763
 764         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 765                  "Aborting task\n");
 766
 767         v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
 768 }
 769
 770 static void coda_lock(void *m2m_priv)
 771 {
 772         struct coda_ctx *ctx = m2m_priv;
 773         struct coda_dev *pcdev = ctx->dev;
 774         mutex_lock(&pcdev->dev_mutex);
 775 }
 776
 777 static void coda_unlock(void *m2m_priv)
 778 {
 779         struct coda_ctx *ctx = m2m_priv;
 780         struct coda_dev *pcdev = ctx->dev;
 781         mutex_unlock(&pcdev->dev_mutex);
 782 }
 783
 784 static struct v4l2_m2m_ops coda_m2m_ops = {
 785         .device_run     = coda_device_run,
 786         .job_ready      = coda_job_ready,
 787         .job_abort      = coda_job_abort,
 788         .lock           = coda_lock,
 789         .unlock         = coda_unlock,
 790 };
 791
 792 static void set_default_params(struct coda_ctx *ctx)
 793 {
 794         struct coda_dev *dev = ctx->dev;
 795
 796         ctx->params.codec_mode = CODA_MODE_INVALID;
 797         ctx->colorspace = V4L2_COLORSPACE_REC709;
 798         ctx->params.framerate = 30;
 799         ctx->aborting = 0;
 800
 801         /* Default formats for output and input queues */
 802         ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0];
 803         ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1];
 804         ctx->q_data[V4L2_M2M_SRC].width = MAX_W;
 805         ctx->q_data[V4L2_M2M_SRC].height = MAX_H;
 806         ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2;
 807         ctx->q_data[V4L2_M2M_DST].width = MAX_W;
 808         ctx->q_data[V4L2_M2M_DST].height = MAX_H;
 809         ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
 810 }
 811
 812 /*
 813  * Queue operations
 814  */
 815 static int coda_queue_setup(struct vb2_queue *vq,
 816                                 const struct v4l2_format *fmt,
 817                                 unsigned int *nbuffers, unsigned int *nplanes,
 818                                 unsigned int sizes[], void *alloc_ctxs[])
 819 {
 820         struct coda_ctx *ctx = vb2_get_drv_priv(vq);
 821         unsigned int size;
 822
 823         if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
 824                 if (fmt)
 825                         size = fmt->fmt.pix.width *
 826                                 fmt->fmt.pix.height * 3 / 2;
 827                 else
 828                         size = MAX_W *
 829                                 MAX_H * 3 / 2;
 830         } else {
 831                 size = CODA_MAX_FRAME_SIZE;
 832         }
 833
 834         *nplanes = 1;
 835         sizes[0] = size;
 836
 837         alloc_ctxs[0] = ctx->dev->alloc_ctx;
 838
 839         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 840                  "get %d buffer(s) of size %d each.\n", *nbuffers, size);
 841
 842         return 0;
 843 }
 844
 845 static int coda_buf_prepare(struct vb2_buffer *vb)
 846 {
 847         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 848         struct coda_q_data *q_data;
 849
 850         q_data = get_q_data(ctx, vb->vb2_queue->type);
 851
 852         if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
 853                 v4l2_warn(&ctx->dev->v4l2_dev,
 854                           "%s data will not fit into plane (%lu < %lu)\n",
 855                           __func__, vb2_plane_size(vb, 0),
 856                           (long)q_data->sizeimage);
 857                 return -EINVAL;
 858         }
 859
 860         vb2_set_plane_payload(vb, 0, q_data->sizeimage);
 861
 862         return 0;
 863 }
 864
 865 static void coda_buf_queue(struct vb2_buffer *vb)
 866 {
 867         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 868         v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
 869 }
 870
 871 static void coda_wait_prepare(struct vb2_queue *q)
 872 {
 873         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 874         coda_unlock(ctx);
 875 }
 876
 877 static void coda_wait_finish(struct vb2_queue *q)
 878 {
 879         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 880         coda_lock(ctx);
 881 }
 882
 883 static void coda_free_framebuffers(struct coda_ctx *ctx)
 884 {
 885         int i;
 886
 887         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
 888                 if (ctx->internal_frames[i].vaddr) {
 889                         dma_free_coherent(&ctx->dev->plat_dev->dev,
 890                                 ctx->internal_frames[i].size,
 891                                 ctx->internal_frames[i].vaddr,
 892                                 ctx->internal_frames[i].paddr);
 893                         ctx->internal_frames[i].vaddr = NULL;
 894                 }
 895         }
 896 }
 897
 898 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
 899 {
 900         struct coda_dev *dev = ctx->dev;
 901
 902         int height = q_data->height;
 903         int width = q_data->width;
 904         u32 *p;
 905         int i;
 906
 907         /* Allocate frame buffers */
 908         ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS;
 909         for (i = 0; i < ctx->num_internal_frames; i++) {
 910                 ctx->internal_frames[i].size = q_data->sizeimage;
 911                 if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
 912                         ctx->internal_frames[i].size += width / 2 * height / 2;
 913                 ctx->internal_frames[i].vaddr = dma_alloc_coherent(
 914                                 &dev->plat_dev->dev, ctx->internal_frames[i].size,
 915                                 &ctx->internal_frames[i].paddr, GFP_KERNEL);
 916                 if (!ctx->internal_frames[i].vaddr) {
 917                         coda_free_framebuffers(ctx);
 918                         return -ENOMEM;
 919                 }
 920         }
 921
 922         /* Register frame buffers in the parameter buffer */
 923         p = ctx->parabuf.vaddr;
 924
 925         if (dev->devtype->product == CODA_DX6) {
 926                 for (i = 0; i < ctx->num_internal_frames; i++) {
 927                         p[i * 3] = ctx->internal_frames[i].paddr; /* Y */
 928                         p[i * 3 + 1] = p[i * 3] + width * height; /* Cb */
 929                         p[i * 3 + 2] = p[i * 3 + 1] + width / 2 * height / 2; /* Cr */
 930                 }
 931         } else {
 932                 for (i = 0; i < ctx->num_internal_frames; i += 2) {
 933                         p[i * 3 + 1] = ctx->internal_frames[i].paddr; /* Y */
 934                         p[i * 3] = p[i * 3 + 1] + width * height; /* Cb */
 935                         p[i * 3 + 3] = p[i * 3] + (width / 2) * (height / 2); /* Cr */
 936
 937                         if (fourcc == V4L2_PIX_FMT_H264)
 938                                 p[96 + i + 1] = p[i * 3 + 3] + (width / 2) * (height / 2);
 939
 940                         if (i + 1 < ctx->num_internal_frames) {
 941                                 p[i * 3 + 2] = ctx->internal_frames[i+1].paddr; /* Y */
 942                                 p[i * 3 + 5] = p[i * 3 + 2] + width * height ; /* Cb */
 943                                 p[i * 3 + 4] = p[i * 3 + 5] + (width / 2) * (height / 2); /* Cr */
 944
 945                                 if (fourcc == V4L2_PIX_FMT_H264)
 946                                         p[96 + i] = p[i * 3 + 4] + (width / 2) * (height / 2);
 947                         }
 948                 }
 949         }
 950
 951         return 0;
 952 }
 953
 954 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
 955 {
 956         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 957         struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
 958         u32 bitstream_buf, bitstream_size;
 959         struct coda_dev *dev = ctx->dev;
 960         struct coda_q_data *q_data_src, *q_data_dst;
 961         struct vb2_buffer *buf;
 962         u32 dst_fourcc;
 963         u32 value;
 964         int ret;
 965
 966         if (count < 1)
 967                 return -EINVAL;
 968
 969         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
 970                 ctx->rawstreamon = 1;
 971         else
 972                 ctx->compstreamon = 1;
 973
 974         /* Don't start the coda unless both queues are on */
 975         if (!(ctx->rawstreamon & ctx->compstreamon))
 976                 return 0;
 977
 978         if (coda_isbusy(dev))
 979                 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0)
 980                         return -EBUSY;
 981
 982         ctx->gopcounter = ctx->params.gop_size - 1;
 983
 984         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 985         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
 986         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
 987         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 988         bitstream_size = q_data_dst->sizeimage;
 989         dst_fourcc = q_data_dst->fmt->fourcc;
 990
 991         /* Find out whether coda must encode or decode */
 992         if (q_data_src->fmt->type == CODA_FMT_RAW &&
 993             q_data_dst->fmt->type == CODA_FMT_ENC) {
 994                 ctx->inst_type = CODA_INST_ENCODER;
 995         } else if (q_data_src->fmt->type == CODA_FMT_ENC &&
 996                    q_data_dst->fmt->type == CODA_FMT_RAW) {
 997                 ctx->inst_type = CODA_INST_DECODER;
 998                 v4l2_err(v4l2_dev, "decoding not supported.\n");
 999                 return -EINVAL;
1000         } else {
1001                 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
1002                 return -EINVAL;
1003         }
1004
1005         if (!coda_is_initialized(dev)) {
1006                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
1007                 return -EFAULT;
1008         }
1009         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1010         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
1011         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
1012         switch (dev->devtype->product) {
1013         case CODA_DX6:
1014                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1015                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1016                 break;
1017         default:
1018                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1019                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1020         }
1021
1022         if (dev->devtype->product == CODA_DX6) {
1023                 /* Configure the coda */
1024                 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1025         }
1026
1027         /* Could set rotation here if needed */
1028         switch (dev->devtype->product) {
1029         case CODA_DX6:
1030                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1031                 break;
1032         default:
1033                 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
1034         }
1035         value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1036         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
1037         coda_write(dev, ctx->params.framerate,
1038                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
1039
1040         switch (dst_fourcc) {
1041         case V4L2_PIX_FMT_MPEG4:
1042                 if (dev->devtype->product == CODA_DX6)
1043                         ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4;
1044                 else
1045                         ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4;
1046
1047                 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
1048                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
1049                 break;
1050         case V4L2_PIX_FMT_H264:
1051                 if (dev->devtype->product == CODA_DX6)
1052                         ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264;
1053                 else
1054                         ctx->params.codec_mode = CODA7_MODE_ENCODE_H264;
1055
1056                 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
1057                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
1058                 break;
1059         default:
1060                 v4l2_err(v4l2_dev,
1061                          "dst format (0x%08x) invalid.\n", dst_fourcc);
1062                 return -EINVAL;
1063         }
1064
1065         switch (ctx->params.slice_mode) {
1066         case V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE:
1067                 value = 0;
1068                 break;
1069         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB:
1070                 value  = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1071                 value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1072                 value |=  1 & CODA_SLICING_MODE_MASK;
1073                 break;
1074         case V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES:
1075                 value  = (ctx->params.slice_max_bits & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1076                 value |= (0 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1077                 value |=  1 & CODA_SLICING_MODE_MASK;
1078                 break;
1079         }
1080         coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1081         value = ctx->params.gop_size & CODA_GOP_SIZE_MASK;
1082         coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1083
1084         if (ctx->params.bitrate) {
1085                 /* Rate control enabled */
1086                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
1087                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
1088         } else {
1089                 value = 0;
1090         }
1091         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1092
1093         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1094         coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1095
1096         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1097         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1098
1099         /* set default gamma */
1100         value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
1101         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
1102
1103         value  = (CODA_DEFAULT_GAMMA > 0) << CODA_OPTION_GAMMA_OFFSET;
1104         value |= (0 & CODA_OPTION_SLICEREPORT_MASK) << CODA_OPTION_SLICEREPORT_OFFSET;
1105         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1106
1107         if (dst_fourcc == V4L2_PIX_FMT_H264) {
1108                 value  = (FMO_SLICE_SAVE_BUF_SIZE << 7);
1109                 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
1110                 value |=  0 & CODA_FMOPARAM_SLICENUM_MASK;
1111                 if (dev->devtype->product == CODA_DX6) {
1112                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1113                 } else {
1114                         coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1115                         coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1116                 }
1117         }
1118
1119         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1120                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1121                 return -ETIMEDOUT;
1122         }
1123
1124         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0)
1125                 return -EFAULT;
1126
1127         ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1128         if (ret < 0)
1129                 return ret;
1130
1131         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1132         coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
1133         if (dev->devtype->product != CODA_DX6) {
1134                 coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1135                 coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1136                 coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1137                 coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1138                 coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1139                 coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1140         }
1141         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1142                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1143                 return -ETIMEDOUT;
1144         }
1145
1146         /* Save stream headers */
1147         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1148         switch (dst_fourcc) {
1149         case V4L2_PIX_FMT_H264:
1150                 /*
1151                  * Get SPS in the first frame and copy it to an
1152                  * intermediate buffer.
1153                  */
1154                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1155                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1156                 coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE);
1157                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1158                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1159                         return -ETIMEDOUT;
1160                 }
1161                 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1162                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1163                 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1164                        ctx->vpu_header_size[0]);
1165
1166                 /*
1167                  * Get PPS in the first frame and copy it to an
1168                  * intermediate buffer.
1169                  */
1170                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1171                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1172                 coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE);
1173                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1174                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1175                         return -ETIMEDOUT;
1176                 }
1177                 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1178                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1179                 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1180                        ctx->vpu_header_size[1]);
1181                 ctx->vpu_header_size[2] = 0;
1182                 break;
1183         case V4L2_PIX_FMT_MPEG4:
1184                 /*
1185                  * Get VOS in the first frame and copy it to an
1186                  * intermediate buffer
1187                  */
1188                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1189                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1190                 coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE);
1191                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1192                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1193                         return -ETIMEDOUT;
1194                 }
1195                 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1196                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1197                 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1198                        ctx->vpu_header_size[0]);
1199
1200                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1201                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1202                 coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE);
1203                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1204                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1205                         return -ETIMEDOUT;
1206                 }
1207                 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1208                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1209                 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1210                        ctx->vpu_header_size[1]);
1211
1212                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1213                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1214                 coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE);
1215                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1216                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1217                         return -ETIMEDOUT;
1218                 }
1219                 ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1220                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1221                 memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0),
1222                        ctx->vpu_header_size[2]);
1223                 break;
1224         default:
1225                 /* No more formats need to save headers at the moment */
1226                 break;
1227         }
1228
1229         return 0;
1230 }
1231
1232 static int coda_stop_streaming(struct vb2_queue *q)
1233 {
1234         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1235         struct coda_dev *dev = ctx->dev;
1236
1237         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1238                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1239                          "%s: output\n", __func__);
1240                 ctx->rawstreamon = 0;
1241         } else {
1242                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1243                          "%s: capture\n", __func__);
1244                 ctx->compstreamon = 0;
1245         }
1246
1247         /* Don't stop the coda unless both queues are off */
1248         if (ctx->rawstreamon || ctx->compstreamon)
1249                 return 0;
1250
1251         if (coda_isbusy(dev)) {
1252                 if (wait_for_completion_interruptible_timeout(&dev->done, HZ) <= 0) {
1253                         v4l2_warn(&dev->v4l2_dev,
1254                                   "%s: timeout, sending SEQ_END anyway\n", __func__);
1255                 }
1256         }
1257
1258         cancel_delayed_work(&dev->timeout);
1259
1260         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1261                  "%s: sent command 'SEQ_END' to coda\n", __func__);
1262         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1263                 v4l2_err(&dev->v4l2_dev,
1264                          "CODA_COMMAND_SEQ_END failed\n");
1265                 return -ETIMEDOUT;
1266         }
1267
1268         coda_free_framebuffers(ctx);
1269
1270         return 0;
1271 }
1272
1273 static struct vb2_ops coda_qops = {
1274         .queue_setup            = coda_queue_setup,
1275         .buf_prepare            = coda_buf_prepare,
1276         .buf_queue              = coda_buf_queue,
1277         .wait_prepare           = coda_wait_prepare,
1278         .wait_finish            = coda_wait_finish,
1279         .start_streaming        = coda_start_streaming,
1280         .stop_streaming         = coda_stop_streaming,
1281 };
1282
1283 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
1284 {
1285         struct coda_ctx *ctx =
1286                         container_of(ctrl->handler, struct coda_ctx, ctrls);
1287
1288         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1289                  "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
1290
1291         switch (ctrl->id) {
1292         case V4L2_CID_HFLIP:
1293                 if (ctrl->val)
1294                         ctx->params.rot_mode |= CODA_MIR_HOR;
1295                 else
1296                         ctx->params.rot_mode &= ~CODA_MIR_HOR;
1297                 break;
1298         case V4L2_CID_VFLIP:
1299                 if (ctrl->val)
1300                         ctx->params.rot_mode |= CODA_MIR_VER;
1301                 else
1302                         ctx->params.rot_mode &= ~CODA_MIR_VER;
1303                 break;
1304         case V4L2_CID_MPEG_VIDEO_BITRATE:
1305                 ctx->params.bitrate = ctrl->val / 1000;
1306                 break;
1307         case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1308                 ctx->params.gop_size = ctrl->val;
1309                 break;
1310         case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1311                 ctx->params.h264_intra_qp = ctrl->val;
1312                 break;
1313         case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1314                 ctx->params.h264_inter_qp = ctrl->val;
1315                 break;
1316         case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1317                 ctx->params.mpeg4_intra_qp = ctrl->val;
1318                 break;
1319         case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1320                 ctx->params.mpeg4_inter_qp = ctrl->val;
1321                 break;
1322         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1323                 ctx->params.slice_mode = ctrl->val;
1324                 break;
1325         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1326                 ctx->params.slice_max_mb = ctrl->val;
1327                 break;
1328         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES:
1329                 ctx->params.slice_max_bits = ctrl->val * 8;
1330                 break;
1331         case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1332                 break;
1333         default:
1334                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1335                         "Invalid control, id=%d, val=%d\n",
1336                         ctrl->id, ctrl->val);
1337                 return -EINVAL;
1338         }
1339
1340         return 0;
1341 }
1342
1343 static struct v4l2_ctrl_ops coda_ctrl_ops = {
1344         .s_ctrl = coda_s_ctrl,
1345 };
1346
1347 static int coda_ctrls_setup(struct coda_ctx *ctx)
1348 {
1349         v4l2_ctrl_handler_init(&ctx->ctrls, 9);
1350
1351         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1352                 V4L2_CID_HFLIP, 0, 1, 1, 0);
1353         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1354                 V4L2_CID_VFLIP, 0, 1, 1, 0);
1355         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1356                 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
1357         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1358                 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
1359         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1360                 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
1361         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1362                 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
1363         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1364                 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
1365         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1366                 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
1367         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1368                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
1369                 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_BYTES, 0x0,
1370                 V4L2_MPEG_VIDEO_MULTI_SLICE_MODE_SINGLE);
1371         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1372                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
1373         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1374                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_BYTES, 1, 0x3fffffff, 1, 500);
1375         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1376                 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
1377                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
1378                 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
1379                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
1380
1381         if (ctx->ctrls.error) {
1382                 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
1383                         ctx->ctrls.error);
1384                 return -EINVAL;
1385         }
1386
1387         return v4l2_ctrl_handler_setup(&ctx->ctrls);
1388 }
1389
1390 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
1391                       struct vb2_queue *dst_vq)
1392 {
1393         struct coda_ctx *ctx = priv;
1394         int ret;
1395
1396         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1397         src_vq->io_modes = VB2_MMAP | VB2_USERPTR;
1398         src_vq->drv_priv = ctx;
1399         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1400         src_vq->ops = &coda_qops;
1401         src_vq->mem_ops = &vb2_dma_contig_memops;
1402
1403         ret = vb2_queue_init(src_vq);
1404         if (ret)
1405                 return ret;
1406
1407         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1408         dst_vq->io_modes = VB2_MMAP | VB2_USERPTR;
1409         dst_vq->drv_priv = ctx;
1410         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1411         dst_vq->ops = &coda_qops;
1412         dst_vq->mem_ops = &vb2_dma_contig_memops;
1413
1414         return vb2_queue_init(dst_vq);
1415 }
1416
1417 static int coda_next_free_instance(struct coda_dev *dev)
1418 {
1419         return ffz(dev->instance_mask);
1420 }
1421
1422 static int coda_open(struct file *file)
1423 {
1424         struct coda_dev *dev = video_drvdata(file);
1425         struct coda_ctx *ctx = NULL;
1426         int ret = 0;
1427         int idx;
1428
1429         idx = coda_next_free_instance(dev);
1430         if (idx >= CODA_MAX_INSTANCES)
1431                 return -EBUSY;
1432         set_bit(idx, &dev->instance_mask);
1433
1434         ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1435         if (!ctx)
1436                 return -ENOMEM;
1437
1438         v4l2_fh_init(&ctx->fh, video_devdata(file));
1439         file->private_data = &ctx->fh;
1440         v4l2_fh_add(&ctx->fh);
1441         ctx->dev = dev;
1442         ctx->idx = idx;
1443
1444         set_default_params(ctx);
1445         ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
1446                                          &coda_queue_init);
1447         if (IS_ERR(ctx->m2m_ctx)) {
1448                 int ret = PTR_ERR(ctx->m2m_ctx);
1449
1450                 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
1451                          __func__, ret);
1452                 goto err;
1453         }
1454         ret = coda_ctrls_setup(ctx);
1455         if (ret) {
1456                 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
1457                 goto err;
1458         }
1459
1460         ctx->fh.ctrl_handler = &ctx->ctrls;
1461
1462         ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
1463                         CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
1464         if (!ctx->parabuf.vaddr) {
1465                 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
1466                 ret = -ENOMEM;
1467                 goto err;
1468         }
1469
1470         coda_lock(ctx);
1471         list_add(&ctx->list, &dev->instances);
1472         coda_unlock(ctx);
1473
1474         clk_prepare_enable(dev->clk_per);
1475         clk_prepare_enable(dev->clk_ahb);
1476
1477         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
1478                  ctx->idx, ctx);
1479
1480         return 0;
1481
1482 err:
1483         v4l2_fh_del(&ctx->fh);
1484         v4l2_fh_exit(&ctx->fh);
1485         kfree(ctx);
1486         return ret;
1487 }
1488
1489 static int coda_release(struct file *file)
1490 {
1491         struct coda_dev *dev = video_drvdata(file);
1492         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1493
1494         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
1495                  ctx);
1496
1497         coda_lock(ctx);
1498         list_del(&ctx->list);
1499         coda_unlock(ctx);
1500
1501         dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
1502                 ctx->parabuf.vaddr, ctx->parabuf.paddr);
1503         v4l2_m2m_ctx_release(ctx->m2m_ctx);
1504         v4l2_ctrl_handler_free(&ctx->ctrls);
1505         clk_disable_unprepare(dev->clk_per);
1506         clk_disable_unprepare(dev->clk_ahb);
1507         v4l2_fh_del(&ctx->fh);
1508         v4l2_fh_exit(&ctx->fh);
1509         clear_bit(ctx->idx, &dev->instance_mask);
1510         kfree(ctx);
1511
1512         return 0;
1513 }
1514
1515 static unsigned int coda_poll(struct file *file,
1516                                  struct poll_table_struct *wait)
1517 {
1518         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1519         int ret;
1520
1521         coda_lock(ctx);
1522         ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1523         coda_unlock(ctx);
1524         return ret;
1525 }
1526
1527 static int coda_mmap(struct file *file, struct vm_area_struct *vma)
1528 {
1529         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1530
1531         return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1532 }
1533
1534 static const struct v4l2_file_operations coda_fops = {
1535         .owner          = THIS_MODULE,
1536         .open           = coda_open,
1537         .release        = coda_release,
1538         .poll           = coda_poll,
1539         .unlocked_ioctl = video_ioctl2,
1540         .mmap           = coda_mmap,
1541 };
1542
1543 static irqreturn_t coda_irq_handler(int irq, void *data)
1544 {
1545         struct vb2_buffer *src_buf, *dst_buf;
1546         struct coda_dev *dev = data;
1547         u32 wr_ptr, start_ptr;
1548         struct coda_ctx *ctx;
1549
1550         __cancel_delayed_work(&dev->timeout);
1551
1552         /* read status register to attend the IRQ */
1553         coda_read(dev, CODA_REG_BIT_INT_STATUS);
1554         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1555                       CODA_REG_BIT_INT_CLEAR);
1556
1557         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1558         if (ctx == NULL) {
1559                 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
1560                 return IRQ_HANDLED;
1561         }
1562
1563         if (ctx->aborting) {
1564                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1565                          "task has been aborted\n");
1566                 return IRQ_HANDLED;
1567         }
1568
1569         if (coda_isbusy(ctx->dev)) {
1570                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1571                          "coda is still busy!!!!\n");
1572                 return IRQ_NONE;
1573         }
1574
1575         complete(&dev->done);
1576
1577         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1578         dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
1579
1580         /* Get results from the coda */
1581         coda_read(dev, CODA_RET_ENC_PIC_TYPE);
1582         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1583         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
1584         /* Calculate bytesused field */
1585         if (dst_buf->v4l2_buf.sequence == 0) {
1586                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
1587                                                 ctx->vpu_header_size[0] +
1588                                                 ctx->vpu_header_size[1] +
1589                                                 ctx->vpu_header_size[2];
1590         } else {
1591                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
1592         }
1593
1594         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1595                  wr_ptr - start_ptr);
1596
1597         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1598         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1599
1600         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1601                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1602                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1603         } else {
1604                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1605                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1606         }
1607
1608         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1609         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1610
1611         ctx->gopcounter--;
1612         if (ctx->gopcounter < 0)
1613                 ctx->gopcounter = ctx->params.gop_size - 1;
1614
1615         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1616                 "job finished: encoding frame (%d) (%s)\n",
1617                 dst_buf->v4l2_buf.sequence,
1618                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1619                 "KEYFRAME" : "PFRAME");
1620
1621         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
1622
1623         return IRQ_HANDLED;
1624 }
1625
1626 static void coda_timeout(struct work_struct *work)
1627 {
1628         struct coda_ctx *ctx;
1629         struct coda_dev *dev = container_of(to_delayed_work(work),
1630                                             struct coda_dev, timeout);
1631
1632         if (completion_done(&dev->done))
1633                 return;
1634
1635         complete(&dev->done);
1636
1637         v4l2_err(&dev->v4l2_dev, "CODA PIC_RUN timeout, stopping all streams\n");
1638
1639         mutex_lock(&dev->dev_mutex);
1640         list_for_each_entry(ctx, &dev->instances, list) {
1641                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
1642                 v4l2_m2m_streamoff(NULL, ctx->m2m_ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
1643         }
1644         mutex_unlock(&dev->dev_mutex);
1645 }
1646
1647 static u32 coda_supported_firmwares[] = {
1648         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
1649         CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
1650 };
1651
1652 static bool coda_firmware_supported(u32 vernum)
1653 {
1654         int i;
1655
1656         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
1657                 if (vernum == coda_supported_firmwares[i])
1658                         return true;
1659         return false;
1660 }
1661
1662 static char *coda_product_name(int product)
1663 {
1664         static char buf[9];
1665
1666         switch (product) {
1667         case CODA_DX6:
1668                 return "CodaDx6";
1669         case CODA_7541:
1670                 return "CODA7541";
1671         default:
1672                 snprintf(buf, sizeof(buf), "(0x%04x)", product);
1673                 return buf;
1674         }
1675 }
1676
1677 static int coda_hw_init(struct coda_dev *dev)
1678 {
1679         u16 product, major, minor, release;
1680         u32 data;
1681         u16 *p;
1682         int i;
1683
1684         clk_prepare_enable(dev->clk_per);
1685         clk_prepare_enable(dev->clk_ahb);
1686
1687         /*
1688          * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
1689          * The 16-bit chars in the code buffer are in memory access
1690          * order, re-sort them to CODA order for register download.
1691          * Data in this SRAM survives a reboot.
1692          */
1693         p = (u16 *)dev->codebuf.vaddr;
1694         if (dev->devtype->product == CODA_DX6) {
1695                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++)  {
1696                         data = CODA_DOWN_ADDRESS_SET(i) |
1697                                 CODA_DOWN_DATA_SET(p[i ^ 1]);
1698                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1699                 }
1700         } else {
1701                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1702                         data = CODA_DOWN_ADDRESS_SET(i) |
1703                                 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
1704                                                         3 - (i % 4)]);
1705                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1706                 }
1707         }
1708
1709         /* Tell the BIT where to find everything it needs */
1710         coda_write(dev, dev->workbuf.paddr,
1711                       CODA_REG_BIT_WORK_BUF_ADDR);
1712         coda_write(dev, dev->codebuf.paddr,
1713                       CODA_REG_BIT_CODE_BUF_ADDR);
1714         coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
1715
1716         /* Set default values */
1717         switch (dev->devtype->product) {
1718         case CODA_DX6:
1719                 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1720                 break;
1721         default:
1722                 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1723         }
1724         coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
1725
1726         if (dev->devtype->product != CODA_DX6)
1727                 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
1728
1729         coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
1730                       CODA_REG_BIT_INT_ENABLE);
1731
1732         /* Reset VPU and start processor */
1733         data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
1734         data |= CODA_REG_RESET_ENABLE;
1735         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1736         udelay(10);
1737         data &= ~CODA_REG_RESET_ENABLE;
1738         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1739         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
1740
1741         /* Load firmware */
1742         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
1743         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
1744         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
1745         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
1746         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
1747         if (coda_wait_timeout(dev)) {
1748                 clk_disable_unprepare(dev->clk_per);
1749                 clk_disable_unprepare(dev->clk_ahb);
1750                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
1751                 return -EIO;
1752         }
1753
1754         /* Check we are compatible with the loaded firmware */
1755         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
1756         product = CODA_FIRMWARE_PRODUCT(data);
1757         major = CODA_FIRMWARE_MAJOR(data);
1758         minor = CODA_FIRMWARE_MINOR(data);
1759         release = CODA_FIRMWARE_RELEASE(data);
1760
1761         clk_disable_unprepare(dev->clk_per);
1762         clk_disable_unprepare(dev->clk_ahb);
1763
1764         if (product != dev->devtype->product) {
1765                 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
1766                          " Version: %u.%u.%u\n",
1767                          coda_product_name(dev->devtype->product),
1768                          coda_product_name(product), major, minor, release);
1769                 return -EINVAL;
1770         }
1771
1772         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
1773                   coda_product_name(product));
1774
1775         if (coda_firmware_supported(data)) {
1776                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
1777                           major, minor, release);
1778         } else {
1779                 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
1780                           "%u.%u.%u\n", major, minor, release);
1781         }
1782
1783         return 0;
1784 }
1785
1786 static void coda_fw_callback(const struct firmware *fw, void *context)
1787 {
1788         struct coda_dev *dev = context;
1789         struct platform_device *pdev = dev->plat_dev;
1790         int ret;
1791
1792         if (!fw) {
1793                 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
1794                 return;
1795         }
1796
1797         /* allocate auxiliary per-device code buffer for the BIT processor */
1798         dev->codebuf.size = fw->size;
1799         dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
1800                                                     &dev->codebuf.paddr,
1801                                                     GFP_KERNEL);
1802         if (!dev->codebuf.vaddr) {
1803                 dev_err(&pdev->dev, "failed to allocate code buffer\n");
1804                 return;
1805         }
1806
1807         /* Copy the whole firmware image to the code buffer */
1808         memcpy(dev->codebuf.vaddr, fw->data, fw->size);
1809         release_firmware(fw);
1810
1811         ret = coda_hw_init(dev);
1812         if (ret) {
1813                 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
1814                 return;
1815         }
1816
1817         dev->vfd.fops   = &coda_fops,
1818         dev->vfd.ioctl_ops      = &coda_ioctl_ops;
1819         dev->vfd.release        = video_device_release_empty,
1820         dev->vfd.lock   = &dev->dev_mutex;
1821         dev->vfd.v4l2_dev       = &dev->v4l2_dev;
1822         dev->vfd.vfl_dir        = VFL_DIR_M2M;
1823         snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
1824         video_set_drvdata(&dev->vfd, dev);
1825
1826         dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1827         if (IS_ERR(dev->alloc_ctx)) {
1828                 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
1829                 return;
1830         }
1831
1832         dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
1833         if (IS_ERR(dev->m2m_dev)) {
1834                 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
1835                 goto rel_ctx;
1836         }
1837
1838         ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
1839         if (ret) {
1840                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1841                 goto rel_m2m;
1842         }
1843         v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
1844                   dev->vfd.num);
1845
1846         return;
1847
1848 rel_m2m:
1849         v4l2_m2m_release(dev->m2m_dev);
1850 rel_ctx:
1851         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1852 }
1853
1854 static int coda_firmware_request(struct coda_dev *dev)
1855 {
1856         char *fw = dev->devtype->firmware;
1857
1858         dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
1859                 coda_product_name(dev->devtype->product));
1860
1861         return request_firmware_nowait(THIS_MODULE, true,
1862                 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
1863 }
1864
1865 enum coda_platform {
1866         CODA_IMX27,
1867         CODA_IMX53,
1868 };
1869
1870 static const struct coda_devtype coda_devdata[] = {
1871         [CODA_IMX27] = {
1872                 .firmware    = "v4l-codadx6-imx27.bin",
1873                 .product     = CODA_DX6,
1874                 .formats     = codadx6_formats,
1875                 .num_formats = ARRAY_SIZE(codadx6_formats),
1876         },
1877         [CODA_IMX53] = {
1878                 .firmware    = "v4l-coda7541-imx53.bin",
1879                 .product     = CODA_7541,
1880                 .formats     = coda7_formats,
1881                 .num_formats = ARRAY_SIZE(coda7_formats),
1882         },
1883 };
1884
1885 static struct platform_device_id coda_platform_ids[] = {
1886         { .name = "coda-imx27", .driver_data = CODA_IMX27 },
1887         { .name = "coda-imx53", .driver_data = CODA_7541 },
1888         { /* sentinel */ }
1889 };
1890 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
1891
1892 #ifdef CONFIG_OF
1893 static const struct of_device_id coda_dt_ids[] = {
1894         { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] },
1895         { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
1896         { /* sentinel */ }
1897 };
1898 MODULE_DEVICE_TABLE(of, coda_dt_ids);
1899 #endif
1900
1901 static int __devinit coda_probe(struct platform_device *pdev)
1902 {
1903         const struct of_device_id *of_id =
1904                         of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
1905         const struct platform_device_id *pdev_id;
1906         struct coda_dev *dev;
1907         struct resource *res;
1908         int ret, irq;
1909
1910         dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
1911         if (!dev) {
1912                 dev_err(&pdev->dev, "Not enough memory for %s\n",
1913                         CODA_NAME);
1914                 return -ENOMEM;
1915         }
1916
1917         spin_lock_init(&dev->irqlock);
1918         INIT_LIST_HEAD(&dev->instances);
1919         INIT_DELAYED_WORK(&dev->timeout, coda_timeout);
1920         init_completion(&dev->done);
1921         complete(&dev->done);
1922
1923         dev->plat_dev = pdev;
1924         dev->clk_per = devm_clk_get(&pdev->dev, "per");
1925         if (IS_ERR(dev->clk_per)) {
1926                 dev_err(&pdev->dev, "Could not get per clock\n");
1927                 return PTR_ERR(dev->clk_per);
1928         }
1929
1930         dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1931         if (IS_ERR(dev->clk_ahb)) {
1932                 dev_err(&pdev->dev, "Could not get ahb clock\n");
1933                 return PTR_ERR(dev->clk_ahb);
1934         }
1935
1936         /* Get  memory for physical registers */
1937         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1938         if (res == NULL) {
1939                 dev_err(&pdev->dev, "failed to get memory region resource\n");
1940                 return -ENOENT;
1941         }
1942
1943         if (devm_request_mem_region(&pdev->dev, res->start,
1944                         resource_size(res), CODA_NAME) == NULL) {
1945                 dev_err(&pdev->dev, "failed to request memory region\n");
1946                 return -ENOENT;
1947         }
1948         dev->regs_base = devm_ioremap(&pdev->dev, res->start,
1949                                       resource_size(res));
1950         if (!dev->regs_base) {
1951                 dev_err(&pdev->dev, "failed to ioremap address region\n");
1952                 return -ENOENT;
1953         }
1954
1955         /* IRQ */
1956         irq = platform_get_irq(pdev, 0);
1957         if (irq < 0) {
1958                 dev_err(&pdev->dev, "failed to get irq resource\n");
1959                 return -ENOENT;
1960         }
1961
1962         if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
1963                 0, CODA_NAME, dev) < 0) {
1964                 dev_err(&pdev->dev, "failed to request irq\n");
1965                 return -ENOENT;
1966         }
1967
1968         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
1969         if (ret)
1970                 return ret;
1971
1972         mutex_init(&dev->dev_mutex);
1973
1974         pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
1975
1976         if (of_id) {
1977                 dev->devtype = of_id->data;
1978         } else if (pdev_id) {
1979                 dev->devtype = &coda_devdata[pdev_id->driver_data];
1980         } else {
1981                 v4l2_device_unregister(&dev->v4l2_dev);
1982                 return -EINVAL;
1983         }
1984
1985         /* allocate auxiliary per-device buffers for the BIT processor */
1986         switch (dev->devtype->product) {
1987         case CODA_DX6:
1988                 dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
1989                 break;
1990         default:
1991                 dev->workbuf.size = CODA7_WORK_BUF_SIZE;
1992         }
1993         dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
1994                                                     &dev->workbuf.paddr,
1995                                                     GFP_KERNEL);
1996         if (!dev->workbuf.vaddr) {
1997                 dev_err(&pdev->dev, "failed to allocate work buffer\n");
1998                 v4l2_device_unregister(&dev->v4l2_dev);
1999                 return -ENOMEM;
2000         }
2001
2002         if (dev->devtype->product == CODA_DX6) {
2003                 dev->iram_paddr = 0xffff4c00;
2004         } else {
2005                 void __iomem *iram_vaddr;
2006
2007                 iram_vaddr = iram_alloc(CODA7_IRAM_SIZE,
2008                                         &dev->iram_paddr);
2009                 if (!iram_vaddr) {
2010                         dev_err(&pdev->dev, "unable to alloc iram\n");
2011                         return -ENOMEM;
2012                 }
2013         }
2014
2015         platform_set_drvdata(pdev, dev);
2016
2017         return coda_firmware_request(dev);
2018 }
2019
2020 static int coda_remove(struct platform_device *pdev)
2021 {
2022         struct coda_dev *dev = platform_get_drvdata(pdev);
2023
2024         video_unregister_device(&dev->vfd);
2025         if (dev->m2m_dev)
2026                 v4l2_m2m_release(dev->m2m_dev);
2027         if (dev->alloc_ctx)
2028                 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
2029         v4l2_device_unregister(&dev->v4l2_dev);
2030         if (dev->iram_paddr)
2031                 iram_free(dev->iram_paddr, CODA7_IRAM_SIZE);
2032         if (dev->codebuf.vaddr)
2033                 dma_free_coherent(&pdev->dev, dev->codebuf.size,
2034                                   &dev->codebuf.vaddr, dev->codebuf.paddr);
2035         if (dev->workbuf.vaddr)
2036                 dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
2037                           dev->workbuf.paddr);
2038         return 0;
2039 }
2040
2041 static struct platform_driver coda_driver = {
2042         .probe  = coda_probe,
2043         .remove = __devexit_p(coda_remove),
2044         .driver = {
2045                 .name   = CODA_NAME,
2046                 .owner  = THIS_MODULE,
2047                 .of_match_table = of_match_ptr(coda_dt_ids),
2048         },
2049         .id_table = coda_platform_ids,
2050 };
2051
2052 module_platform_driver(coda_driver);
2053
2054 MODULE_LICENSE("GPL");
2055 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
2056 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");