drivers/media/platform/coda.c

   1 /*
   2  * Coda multi-standard codec IP
   3  *
   4  * Copyright (C) 2012 Vista Silicon S.L.
   5  *    Javier Martin, <javier.martin@vista-silicon.com>
   6  *    Xavier Duret
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/clk.h>
  15 #include <linux/delay.h>
  16 #include <linux/firmware.h>
  17 #include <linux/interrupt.h>
  18 #include <linux/io.h>
  19 #include <linux/irq.h>
  20 #include <linux/module.h>
  21 #include <linux/of_device.h>
  22 #include <linux/platform_device.h>
  23 #include <linux/slab.h>
  24 #include <linux/videodev2.h>
  25 #include <linux/of.h>
  26
  27 #include <mach/iram.h>
  28 #include <media/v4l2-ctrls.h>
  29 #include <media/v4l2-device.h>
  30 #include <media/v4l2-ioctl.h>
  31 #include <media/v4l2-mem2mem.h>
  32 #include <media/videobuf2-core.h>
  33 #include <media/videobuf2-dma-contig.h>
  34
  35 #include "coda.h"
  36
  37 #define CODA_NAME               "coda"
  38
  39 #define CODA_MAX_INSTANCES      4
  40
  41 #define CODA_FMO_BUF_SIZE       32
  42 #define CODADX6_WORK_BUF_SIZE   (288 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  43 #define CODA7_WORK_BUF_SIZE     (512 * 1024 + CODA_FMO_BUF_SIZE * 8 * 1024)
  44 #define CODA_PARA_BUF_SIZE      (10 * 1024)
  45 #define CODA_ISRAM_SIZE (2048 * 2)
  46 #define CODA7_IRAM_SIZE         0x14000 /* 81920 bytes */
  47
  48 #define CODA_MAX_FRAMEBUFFERS   2
  49
  50 #define MAX_W           720
  51 #define MAX_H           576
  52 #define CODA_MAX_FRAME_SIZE     0x90000
  53 #define FMO_SLICE_SAVE_BUF_SIZE         (32)
  54 #define CODA_DEFAULT_GAMMA              4096
  55
  56 #define MIN_W 176
  57 #define MIN_H 144
  58 #define MAX_W 720
  59 #define MAX_H 576
  60
  61 #define S_ALIGN         1 /* multiple of 2 */
  62 #define W_ALIGN         1 /* multiple of 2 */
  63 #define H_ALIGN         1 /* multiple of 2 */
  64
  65 #define fh_to_ctx(__fh) container_of(__fh, struct coda_ctx, fh)
  66
  67 static int coda_debug;
  68 module_param(coda_debug, int, 0);
  69 MODULE_PARM_DESC(coda_debug, "Debug level (0-1)");
  70
  71 enum {
  72         V4L2_M2M_SRC = 0,
  73         V4L2_M2M_DST = 1,
  74 };
  75
  76 enum coda_fmt_type {
  77         CODA_FMT_ENC,
  78         CODA_FMT_RAW,
  79 };
  80
  81 enum coda_inst_type {
  82         CODA_INST_ENCODER,
  83         CODA_INST_DECODER,
  84 };
  85
  86 enum coda_product {
  87         CODA_DX6 = 0xf001,
  88         CODA_7541 = 0xf012,
  89 };
  90
  91 struct coda_fmt {
  92         char *name;
  93         u32 fourcc;
  94         enum coda_fmt_type type;
  95 };
  96
  97 struct coda_devtype {
  98         char                    *firmware;
  99         enum coda_product       product;
 100         struct coda_fmt         *formats;
 101         unsigned int            num_formats;
 102         size_t                  workbuf_size;
 103 };
 104
 105 /* Per-queue, driver-specific private data */
 106 struct coda_q_data {
 107         unsigned int            width;
 108         unsigned int            height;
 109         unsigned int            sizeimage;
 110         struct coda_fmt *fmt;
 111 };
 112
 113 struct coda_aux_buf {
 114         void                    *vaddr;
 115         dma_addr_t              paddr;
 116         u32                     size;
 117 };
 118
 119 struct coda_dev {
 120         struct v4l2_device      v4l2_dev;
 121         struct video_device     vfd;
 122         struct platform_device  *plat_dev;
 123         const struct coda_devtype *devtype;
 124
 125         void __iomem            *regs_base;
 126         struct clk              *clk_per;
 127         struct clk              *clk_ahb;
 128
 129         struct coda_aux_buf     codebuf;
 130         struct coda_aux_buf     workbuf;
 131         long unsigned int       iram_paddr;
 132
 133         spinlock_t              irqlock;
 134         struct mutex            dev_mutex;
 135         struct v4l2_m2m_dev     *m2m_dev;
 136         struct vb2_alloc_ctx    *alloc_ctx;
 137         int                     instances;
 138 };
 139
 140 struct coda_params {
 141         u8                      h264_intra_qp;
 142         u8                      h264_inter_qp;
 143         u8                      mpeg4_intra_qp;
 144         u8                      mpeg4_inter_qp;
 145         u8                      gop_size;
 146         int                     codec_mode;
 147         enum v4l2_mpeg_video_multi_slice_mode slice_mode;
 148         u32                     framerate;
 149         u16                     bitrate;
 150         u32                     slice_max_mb;
 151 };
 152
 153 struct coda_ctx {
 154         struct coda_dev                 *dev;
 155         int                             aborting;
 156         int                             rawstreamon;
 157         int                             compstreamon;
 158         u32                             isequence;
 159         struct coda_q_data              q_data[2];
 160         enum coda_inst_type             inst_type;
 161         enum v4l2_colorspace            colorspace;
 162         struct coda_params              params;
 163         struct v4l2_m2m_ctx             *m2m_ctx;
 164         struct v4l2_ctrl_handler        ctrls;
 165         struct v4l2_fh                  fh;
 166         int                             gopcounter;
 167         char                            vpu_header[3][64];
 168         int                             vpu_header_size[3];
 169         struct coda_aux_buf             parabuf;
 170         struct coda_aux_buf             internal_frames[CODA_MAX_FRAMEBUFFERS];
 171         int                             num_internal_frames;
 172         int                             idx;
 173 };
 174
 175 static inline void coda_write(struct coda_dev *dev, u32 data, u32 reg)
 176 {
 177         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 178                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 179         writel(data, dev->regs_base + reg);
 180 }
 181
 182 static inline unsigned int coda_read(struct coda_dev *dev, u32 reg)
 183 {
 184         u32 data;
 185         data = readl(dev->regs_base + reg);
 186         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
 187                  "%s: data=0x%x, reg=0x%x\n", __func__, data, reg);
 188         return data;
 189 }
 190
 191 static inline unsigned long coda_isbusy(struct coda_dev *dev)
 192 {
 193         return coda_read(dev, CODA_REG_BIT_BUSY);
 194 }
 195
 196 static inline int coda_is_initialized(struct coda_dev *dev)
 197 {
 198         return (coda_read(dev, CODA_REG_BIT_CUR_PC) != 0);
 199 }
 200
 201 static int coda_wait_timeout(struct coda_dev *dev)
 202 {
 203         unsigned long timeout = jiffies + msecs_to_jiffies(1000);
 204
 205         while (coda_isbusy(dev)) {
 206                 if (time_after(jiffies, timeout))
 207                         return -ETIMEDOUT;
 208         }
 209         return 0;
 210 }
 211
 212 static void coda_command_async(struct coda_ctx *ctx, int cmd)
 213 {
 214         struct coda_dev *dev = ctx->dev;
 215         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
 216
 217         coda_write(dev, ctx->idx, CODA_REG_BIT_RUN_INDEX);
 218         coda_write(dev, ctx->params.codec_mode, CODA_REG_BIT_RUN_COD_STD);
 219         coda_write(dev, cmd, CODA_REG_BIT_RUN_COMMAND);
 220 }
 221
 222 static int coda_command_sync(struct coda_ctx *ctx, int cmd)
 223 {
 224         struct coda_dev *dev = ctx->dev;
 225
 226         coda_command_async(ctx, cmd);
 227         return coda_wait_timeout(dev);
 228 }
 229
 230 static struct coda_q_data *get_q_data(struct coda_ctx *ctx,
 231                                          enum v4l2_buf_type type)
 232 {
 233         switch (type) {
 234         case V4L2_BUF_TYPE_VIDEO_OUTPUT:
 235                 return &(ctx->q_data[V4L2_M2M_SRC]);
 236         case V4L2_BUF_TYPE_VIDEO_CAPTURE:
 237                 return &(ctx->q_data[V4L2_M2M_DST]);
 238         default:
 239                 BUG();
 240         }
 241         return NULL;
 242 }
 243
 244 /*
 245  * Add one array of supported formats for each version of Coda:
 246  *  i.MX27 -> codadx6
 247  *  i.MX51 -> coda7
 248  *  i.MX6  -> coda960
 249  */
 250 static struct coda_fmt codadx6_formats[] = {
 251         {
 252                 .name = "YUV 4:2:0 Planar",
 253                 .fourcc = V4L2_PIX_FMT_YUV420,
 254                 .type = CODA_FMT_RAW,
 255         },
 256         {
 257                 .name = "H264 Encoded Stream",
 258                 .fourcc = V4L2_PIX_FMT_H264,
 259                 .type = CODA_FMT_ENC,
 260         },
 261         {
 262                 .name = "MPEG4 Encoded Stream",
 263                 .fourcc = V4L2_PIX_FMT_MPEG4,
 264                 .type = CODA_FMT_ENC,
 265         },
 266 };
 267
 268 static struct coda_fmt coda7_formats[] = {
 269         {
 270                 .name = "YUV 4:2:0 Planar",
 271                 .fourcc = V4L2_PIX_FMT_YUV420,
 272                 .type = CODA_FMT_RAW,
 273         },
 274         {
 275                 .name = "H264 Encoded Stream",
 276                 .fourcc = V4L2_PIX_FMT_H264,
 277                 .type = CODA_FMT_ENC,
 278         },
 279         {
 280                 .name = "MPEG4 Encoded Stream",
 281                 .fourcc = V4L2_PIX_FMT_MPEG4,
 282                 .type = CODA_FMT_ENC,
 283         },
 284 };
 285
 286 static struct coda_fmt *find_format(struct coda_dev *dev, struct v4l2_format *f)
 287 {
 288         struct coda_fmt *formats = dev->devtype->formats;
 289         int num_formats = dev->devtype->num_formats;
 290         unsigned int k;
 291
 292         for (k = 0; k < num_formats; k++) {
 293                 if (formats[k].fourcc == f->fmt.pix.pixelformat)
 294                         break;
 295         }
 296
 297         if (k == num_formats)
 298                 return NULL;
 299
 300         return &formats[k];
 301 }
 302
 303 /*
 304  * V4L2 ioctl() operations.
 305  */
 306 static int vidioc_querycap(struct file *file, void *priv,
 307                            struct v4l2_capability *cap)
 308 {
 309         strlcpy(cap->driver, CODA_NAME, sizeof(cap->driver));
 310         strlcpy(cap->card, CODA_NAME, sizeof(cap->card));
 311         strlcpy(cap->bus_info, CODA_NAME, sizeof(cap->bus_info));
 312         /*
 313          * This is only a mem-to-mem video device. The capture and output
 314          * device capability flags are left only for backward compatibility
 315          * and are scheduled for removal.
 316          */
 317         cap->device_caps = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT |
 318                            V4L2_CAP_VIDEO_M2M | V4L2_CAP_STREAMING;
 319         cap->capabilities = cap->device_caps | V4L2_CAP_DEVICE_CAPS;
 320
 321         return 0;
 322 }
 323
 324 static int enum_fmt(void *priv, struct v4l2_fmtdesc *f,
 325                         enum coda_fmt_type type)
 326 {
 327         struct coda_ctx *ctx = fh_to_ctx(priv);
 328         struct coda_dev *dev = ctx->dev;
 329         struct coda_fmt *formats = dev->devtype->formats;
 330         struct coda_fmt *fmt;
 331         int num_formats = dev->devtype->num_formats;
 332         int i, num = 0;
 333
 334         for (i = 0; i < num_formats; i++) {
 335                 if (formats[i].type == type) {
 336                         if (num == f->index)
 337                                 break;
 338                         ++num;
 339                 }
 340         }
 341
 342         if (i < num_formats) {
 343                 fmt = &formats[i];
 344                 strlcpy(f->description, fmt->name, sizeof(f->description));
 345                 f->pixelformat = fmt->fourcc;
 346                 return 0;
 347         }
 348
 349         /* Format not found */
 350         return -EINVAL;
 351 }
 352
 353 static int vidioc_enum_fmt_vid_cap(struct file *file, void *priv,
 354                                    struct v4l2_fmtdesc *f)
 355 {
 356         return enum_fmt(priv, f, CODA_FMT_ENC);
 357 }
 358
 359 static int vidioc_enum_fmt_vid_out(struct file *file, void *priv,
 360                                    struct v4l2_fmtdesc *f)
 361 {
 362         return enum_fmt(priv, f, CODA_FMT_RAW);
 363 }
 364
 365 static int vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
 366 {
 367         struct vb2_queue *vq;
 368         struct coda_q_data *q_data;
 369         struct coda_ctx *ctx = fh_to_ctx(priv);
 370
 371         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 372         if (!vq)
 373                 return -EINVAL;
 374
 375         q_data = get_q_data(ctx, f->type);
 376
 377         f->fmt.pix.field        = V4L2_FIELD_NONE;
 378         f->fmt.pix.pixelformat  = q_data->fmt->fourcc;
 379         f->fmt.pix.width        = q_data->width;
 380         f->fmt.pix.height       = q_data->height;
 381         if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420)
 382                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
 383         else /* encoded formats h.264/mpeg4 */
 384                 f->fmt.pix.bytesperline = 0;
 385
 386         f->fmt.pix.sizeimage    = q_data->sizeimage;
 387         f->fmt.pix.colorspace   = ctx->colorspace;
 388
 389         return 0;
 390 }
 391
 392 static int vidioc_try_fmt(struct coda_dev *dev, struct v4l2_format *f)
 393 {
 394         enum v4l2_field field;
 395
 396         field = f->fmt.pix.field;
 397         if (field == V4L2_FIELD_ANY)
 398                 field = V4L2_FIELD_NONE;
 399         else if (V4L2_FIELD_NONE != field)
 400                 return -EINVAL;
 401
 402         /* V4L2 specification suggests the driver corrects the format struct
 403          * if any of the dimensions is unsupported */
 404         f->fmt.pix.field = field;
 405
 406         if (f->fmt.pix.pixelformat == V4L2_PIX_FMT_YUV420) {
 407                 v4l_bound_align_image(&f->fmt.pix.width, MIN_W, MAX_W,
 408                                       W_ALIGN, &f->fmt.pix.height,
 409                                       MIN_H, MAX_H, H_ALIGN, S_ALIGN);
 410                 f->fmt.pix.bytesperline = round_up(f->fmt.pix.width, 2);
 411                 f->fmt.pix.sizeimage = f->fmt.pix.height *
 412                                         f->fmt.pix.bytesperline;
 413         } else { /*encoded formats h.264/mpeg4 */
 414                 f->fmt.pix.bytesperline = 0;
 415                 f->fmt.pix.sizeimage = CODA_MAX_FRAME_SIZE;
 416         }
 417
 418         return 0;
 419 }
 420
 421 static int vidioc_try_fmt_vid_cap(struct file *file, void *priv,
 422                                   struct v4l2_format *f)
 423 {
 424         int ret;
 425         struct coda_fmt *fmt;
 426         struct coda_ctx *ctx = fh_to_ctx(priv);
 427
 428         fmt = find_format(ctx->dev, f);
 429         /*
 430          * Since decoding support is not implemented yet do not allow
 431          * CODA_FMT_RAW formats in the capture interface.
 432          */
 433         if (!fmt || !(fmt->type == CODA_FMT_ENC))
 434                 f->fmt.pix.pixelformat = V4L2_PIX_FMT_H264;
 435
 436         f->fmt.pix.colorspace = ctx->colorspace;
 437
 438         ret = vidioc_try_fmt(ctx->dev, f);
 439         if (ret < 0)
 440                 return ret;
 441
 442         return 0;
 443 }
 444
 445 static int vidioc_try_fmt_vid_out(struct file *file, void *priv,
 446                                   struct v4l2_format *f)
 447 {
 448         struct coda_ctx *ctx = fh_to_ctx(priv);
 449         struct coda_fmt *fmt;
 450         int ret;
 451
 452         fmt = find_format(ctx->dev, f);
 453         /*
 454          * Since decoding support is not implemented yet do not allow
 455          * CODA_FMT formats in the capture interface.
 456          */
 457         if (!fmt || !(fmt->type == CODA_FMT_RAW))
 458                 f->fmt.pix.pixelformat = V4L2_PIX_FMT_YUV420;
 459
 460         if (!f->fmt.pix.colorspace)
 461                 f->fmt.pix.colorspace = V4L2_COLORSPACE_REC709;
 462
 463         ret = vidioc_try_fmt(ctx->dev, f);
 464         if (ret < 0)
 465                 return ret;
 466
 467         return 0;
 468 }
 469
 470 static int vidioc_s_fmt(struct coda_ctx *ctx, struct v4l2_format *f)
 471 {
 472         struct coda_q_data *q_data;
 473         struct vb2_queue *vq;
 474         int ret;
 475
 476         vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
 477         if (!vq)
 478                 return -EINVAL;
 479
 480         q_data = get_q_data(ctx, f->type);
 481         if (!q_data)
 482                 return -EINVAL;
 483
 484         if (vb2_is_busy(vq)) {
 485                 v4l2_err(&ctx->dev->v4l2_dev, "%s queue busy\n", __func__);
 486                 return -EBUSY;
 487         }
 488
 489         ret = vidioc_try_fmt(ctx->dev, f);
 490         if (ret)
 491                 return ret;
 492
 493         q_data->fmt = find_format(ctx->dev, f);
 494         q_data->width = f->fmt.pix.width;
 495         q_data->height = f->fmt.pix.height;
 496         if (q_data->fmt->fourcc == V4L2_PIX_FMT_YUV420) {
 497                 q_data->sizeimage = q_data->width * q_data->height * 3 / 2;
 498         } else { /* encoded format h.264/mpeg-4 */
 499                 q_data->sizeimage = CODA_MAX_FRAME_SIZE;
 500         }
 501
 502         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 503                 "Setting format for type %d, wxh: %dx%d, fmt: %d\n",
 504                 f->type, q_data->width, q_data->height, q_data->fmt->fourcc);
 505
 506         return 0;
 507 }
 508
 509 static int vidioc_s_fmt_vid_cap(struct file *file, void *priv,
 510                                 struct v4l2_format *f)
 511 {
 512         int ret;
 513
 514         ret = vidioc_try_fmt_vid_cap(file, priv, f);
 515         if (ret)
 516                 return ret;
 517
 518         return vidioc_s_fmt(fh_to_ctx(priv), f);
 519 }
 520
 521 static int vidioc_s_fmt_vid_out(struct file *file, void *priv,
 522                                 struct v4l2_format *f)
 523 {
 524         struct coda_ctx *ctx = fh_to_ctx(priv);
 525         int ret;
 526
 527         ret = vidioc_try_fmt_vid_out(file, priv, f);
 528         if (ret)
 529                 return ret;
 530
 531         ret = vidioc_s_fmt(ctx, f);
 532         if (ret)
 533                 ctx->colorspace = f->fmt.pix.colorspace;
 534
 535         return ret;
 536 }
 537
 538 static int vidioc_reqbufs(struct file *file, void *priv,
 539                           struct v4l2_requestbuffers *reqbufs)
 540 {
 541         struct coda_ctx *ctx = fh_to_ctx(priv);
 542
 543         return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
 544 }
 545
 546 static int vidioc_querybuf(struct file *file, void *priv,
 547                            struct v4l2_buffer *buf)
 548 {
 549         struct coda_ctx *ctx = fh_to_ctx(priv);
 550
 551         return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
 552 }
 553
 554 static int vidioc_qbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 555 {
 556         struct coda_ctx *ctx = fh_to_ctx(priv);
 557
 558         return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
 559 }
 560
 561 static int vidioc_dqbuf(struct file *file, void *priv, struct v4l2_buffer *buf)
 562 {
 563         struct coda_ctx *ctx = fh_to_ctx(priv);
 564
 565         return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
 566 }
 567
 568 static int vidioc_streamon(struct file *file, void *priv,
 569                            enum v4l2_buf_type type)
 570 {
 571         struct coda_ctx *ctx = fh_to_ctx(priv);
 572
 573         return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
 574 }
 575
 576 static int vidioc_streamoff(struct file *file, void *priv,
 577                             enum v4l2_buf_type type)
 578 {
 579         struct coda_ctx *ctx = fh_to_ctx(priv);
 580
 581         return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
 582 }
 583
 584 static const struct v4l2_ioctl_ops coda_ioctl_ops = {
 585         .vidioc_querycap        = vidioc_querycap,
 586
 587         .vidioc_enum_fmt_vid_cap = vidioc_enum_fmt_vid_cap,
 588         .vidioc_g_fmt_vid_cap   = vidioc_g_fmt,
 589         .vidioc_try_fmt_vid_cap = vidioc_try_fmt_vid_cap,
 590         .vidioc_s_fmt_vid_cap   = vidioc_s_fmt_vid_cap,
 591
 592         .vidioc_enum_fmt_vid_out = vidioc_enum_fmt_vid_out,
 593         .vidioc_g_fmt_vid_out   = vidioc_g_fmt,
 594         .vidioc_try_fmt_vid_out = vidioc_try_fmt_vid_out,
 595         .vidioc_s_fmt_vid_out   = vidioc_s_fmt_vid_out,
 596
 597         .vidioc_reqbufs         = vidioc_reqbufs,
 598         .vidioc_querybuf        = vidioc_querybuf,
 599
 600         .vidioc_qbuf            = vidioc_qbuf,
 601         .vidioc_dqbuf           = vidioc_dqbuf,
 602
 603         .vidioc_streamon        = vidioc_streamon,
 604         .vidioc_streamoff       = vidioc_streamoff,
 605 };
 606
 607 /*
 608  * Mem-to-mem operations.
 609  */
 610 static void coda_device_run(void *m2m_priv)
 611 {
 612         struct coda_ctx *ctx = m2m_priv;
 613         struct coda_q_data *q_data_src, *q_data_dst;
 614         struct vb2_buffer *src_buf, *dst_buf;
 615         struct coda_dev *dev = ctx->dev;
 616         int force_ipicture;
 617         int quant_param = 0;
 618         u32 picture_y, picture_cb, picture_cr;
 619         u32 pic_stream_buffer_addr, pic_stream_buffer_size;
 620         u32 dst_fourcc;
 621
 622         src_buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
 623         dst_buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
 624         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 625         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 626         dst_fourcc = q_data_dst->fmt->fourcc;
 627
 628         src_buf->v4l2_buf.sequence = ctx->isequence;
 629         dst_buf->v4l2_buf.sequence = ctx->isequence;
 630         ctx->isequence++;
 631
 632         /*
 633          * Workaround coda firmware BUG that only marks the first
 634          * frame as IDR. This is a problem for some decoders that can't
 635          * recover when a frame is lost.
 636          */
 637         if (src_buf->v4l2_buf.sequence % ctx->params.gop_size) {
 638                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
 639                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
 640         } else {
 641                 src_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
 642                 src_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
 643         }
 644
 645         /*
 646          * Copy headers at the beginning of the first frame for H.264 only.
 647          * In MPEG4 they are already copied by the coda.
 648          */
 649         if (src_buf->v4l2_buf.sequence == 0) {
 650                 pic_stream_buffer_addr =
 651                         vb2_dma_contig_plane_dma_addr(dst_buf, 0) +
 652                         ctx->vpu_header_size[0] +
 653                         ctx->vpu_header_size[1] +
 654                         ctx->vpu_header_size[2];
 655                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE -
 656                         ctx->vpu_header_size[0] -
 657                         ctx->vpu_header_size[1] -
 658                         ctx->vpu_header_size[2];
 659                 memcpy(vb2_plane_vaddr(dst_buf, 0),
 660                        &ctx->vpu_header[0][0], ctx->vpu_header_size[0]);
 661                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0],
 662                        &ctx->vpu_header[1][0], ctx->vpu_header_size[1]);
 663                 memcpy(vb2_plane_vaddr(dst_buf, 0) + ctx->vpu_header_size[0] +
 664                         ctx->vpu_header_size[1], &ctx->vpu_header[2][0],
 665                         ctx->vpu_header_size[2]);
 666         } else {
 667                 pic_stream_buffer_addr =
 668                         vb2_dma_contig_plane_dma_addr(dst_buf, 0);
 669                 pic_stream_buffer_size = CODA_MAX_FRAME_SIZE;
 670         }
 671
 672         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
 673                 force_ipicture = 1;
 674                 switch (dst_fourcc) {
 675                 case V4L2_PIX_FMT_H264:
 676                         quant_param = ctx->params.h264_intra_qp;
 677                         break;
 678                 case V4L2_PIX_FMT_MPEG4:
 679                         quant_param = ctx->params.mpeg4_intra_qp;
 680                         break;
 681                 default:
 682                         v4l2_warn(&ctx->dev->v4l2_dev,
 683                                 "cannot set intra qp, fmt not supported\n");
 684                         break;
 685                 }
 686         } else {
 687                 force_ipicture = 0;
 688                 switch (dst_fourcc) {
 689                 case V4L2_PIX_FMT_H264:
 690                         quant_param = ctx->params.h264_inter_qp;
 691                         break;
 692                 case V4L2_PIX_FMT_MPEG4:
 693                         quant_param = ctx->params.mpeg4_inter_qp;
 694                         break;
 695                 default:
 696                         v4l2_warn(&ctx->dev->v4l2_dev,
 697                                 "cannot set inter qp, fmt not supported\n");
 698                         break;
 699                 }
 700         }
 701
 702         /* submit */
 703         coda_write(dev, 0, CODA_CMD_ENC_PIC_ROT_MODE);
 704         coda_write(dev, quant_param, CODA_CMD_ENC_PIC_QS);
 705
 706
 707         picture_y = vb2_dma_contig_plane_dma_addr(src_buf, 0);
 708         picture_cb = picture_y + q_data_src->width * q_data_src->height;
 709         picture_cr = picture_cb + q_data_src->width / 2 *
 710                         q_data_src->height / 2;
 711
 712         coda_write(dev, picture_y, CODA_CMD_ENC_PIC_SRC_ADDR_Y);
 713         coda_write(dev, picture_cb, CODA_CMD_ENC_PIC_SRC_ADDR_CB);
 714         coda_write(dev, picture_cr, CODA_CMD_ENC_PIC_SRC_ADDR_CR);
 715         coda_write(dev, force_ipicture << 1 & 0x2,
 716                    CODA_CMD_ENC_PIC_OPTION);
 717
 718         coda_write(dev, pic_stream_buffer_addr, CODA_CMD_ENC_PIC_BB_START);
 719         coda_write(dev, pic_stream_buffer_size / 1024,
 720                    CODA_CMD_ENC_PIC_BB_SIZE);
 721
 722         if (dev->devtype->product == CODA_7541) {
 723                 coda_write(dev, CODA7_USE_BIT_ENABLE | CODA7_USE_HOST_BIT_ENABLE |
 724                                 CODA7_USE_ME_ENABLE | CODA7_USE_HOST_ME_ENABLE,
 725                                 CODA7_REG_BIT_AXI_SRAM_USE);
 726         }
 727
 728         coda_command_async(ctx, CODA_COMMAND_PIC_RUN);
 729 }
 730
 731 static int coda_job_ready(void *m2m_priv)
 732 {
 733         struct coda_ctx *ctx = m2m_priv;
 734
 735         /*
 736          * For both 'P' and 'key' frame cases 1 picture
 737          * and 1 frame are needed.
 738          */
 739         if (!v4l2_m2m_num_src_bufs_ready(ctx->m2m_ctx) ||
 740                 !v4l2_m2m_num_dst_bufs_ready(ctx->m2m_ctx)) {
 741                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 742                          "not ready: not enough video buffers.\n");
 743                 return 0;
 744         }
 745
 746         if (coda_isbusy(ctx->dev)) {
 747                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 748                          "not ready: coda is still busy.\n");
 749                 return 0;
 750         }
 751
 752         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 753                         "job ready\n");
 754         return 1;
 755 }
 756
 757 static void coda_job_abort(void *priv)
 758 {
 759         struct coda_ctx *ctx = priv;
 760         struct coda_dev *dev = ctx->dev;
 761
 762         ctx->aborting = 1;
 763
 764         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 765                  "Aborting task\n");
 766
 767         v4l2_m2m_job_finish(dev->m2m_dev, ctx->m2m_ctx);
 768 }
 769
 770 static void coda_lock(void *m2m_priv)
 771 {
 772         struct coda_ctx *ctx = m2m_priv;
 773         struct coda_dev *pcdev = ctx->dev;
 774         mutex_lock(&pcdev->dev_mutex);
 775 }
 776
 777 static void coda_unlock(void *m2m_priv)
 778 {
 779         struct coda_ctx *ctx = m2m_priv;
 780         struct coda_dev *pcdev = ctx->dev;
 781         mutex_unlock(&pcdev->dev_mutex);
 782 }
 783
 784 static struct v4l2_m2m_ops coda_m2m_ops = {
 785         .device_run     = coda_device_run,
 786         .job_ready      = coda_job_ready,
 787         .job_abort      = coda_job_abort,
 788         .lock           = coda_lock,
 789         .unlock         = coda_unlock,
 790 };
 791
 792 static void set_default_params(struct coda_ctx *ctx)
 793 {
 794         struct coda_dev *dev = ctx->dev;
 795
 796         ctx->params.codec_mode = CODA_MODE_INVALID;
 797         ctx->colorspace = V4L2_COLORSPACE_REC709;
 798         ctx->params.framerate = 30;
 799         ctx->aborting = 0;
 800
 801         /* Default formats for output and input queues */
 802         ctx->q_data[V4L2_M2M_SRC].fmt = &dev->devtype->formats[0];
 803         ctx->q_data[V4L2_M2M_DST].fmt = &dev->devtype->formats[1];
 804         ctx->q_data[V4L2_M2M_SRC].width = MAX_W;
 805         ctx->q_data[V4L2_M2M_SRC].height = MAX_H;
 806         ctx->q_data[V4L2_M2M_SRC].sizeimage = (MAX_W * MAX_H * 3) / 2;
 807         ctx->q_data[V4L2_M2M_DST].width = MAX_W;
 808         ctx->q_data[V4L2_M2M_DST].height = MAX_H;
 809         ctx->q_data[V4L2_M2M_DST].sizeimage = CODA_MAX_FRAME_SIZE;
 810 }
 811
 812 /*
 813  * Queue operations
 814  */
 815 static int coda_queue_setup(struct vb2_queue *vq,
 816                                 const struct v4l2_format *fmt,
 817                                 unsigned int *nbuffers, unsigned int *nplanes,
 818                                 unsigned int sizes[], void *alloc_ctxs[])
 819 {
 820         struct coda_ctx *ctx = vb2_get_drv_priv(vq);
 821         unsigned int size;
 822
 823         if (vq->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
 824                 if (fmt)
 825                         size = fmt->fmt.pix.width *
 826                                 fmt->fmt.pix.height * 3 / 2;
 827                 else
 828                         size = MAX_W *
 829                                 MAX_H * 3 / 2;
 830         } else {
 831                 size = CODA_MAX_FRAME_SIZE;
 832         }
 833
 834         *nplanes = 1;
 835         sizes[0] = size;
 836
 837         alloc_ctxs[0] = ctx->dev->alloc_ctx;
 838
 839         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
 840                  "get %d buffer(s) of size %d each.\n", *nbuffers, size);
 841
 842         return 0;
 843 }
 844
 845 static int coda_buf_prepare(struct vb2_buffer *vb)
 846 {
 847         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 848         struct coda_q_data *q_data;
 849
 850         q_data = get_q_data(ctx, vb->vb2_queue->type);
 851
 852         if (vb2_plane_size(vb, 0) < q_data->sizeimage) {
 853                 v4l2_warn(&ctx->dev->v4l2_dev,
 854                           "%s data will not fit into plane (%lu < %lu)\n",
 855                           __func__, vb2_plane_size(vb, 0),
 856                           (long)q_data->sizeimage);
 857                 return -EINVAL;
 858         }
 859
 860         vb2_set_plane_payload(vb, 0, q_data->sizeimage);
 861
 862         return 0;
 863 }
 864
 865 static void coda_buf_queue(struct vb2_buffer *vb)
 866 {
 867         struct coda_ctx *ctx = vb2_get_drv_priv(vb->vb2_queue);
 868         v4l2_m2m_buf_queue(ctx->m2m_ctx, vb);
 869 }
 870
 871 static void coda_wait_prepare(struct vb2_queue *q)
 872 {
 873         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 874         coda_unlock(ctx);
 875 }
 876
 877 static void coda_wait_finish(struct vb2_queue *q)
 878 {
 879         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 880         coda_lock(ctx);
 881 }
 882
 883 static void coda_free_framebuffers(struct coda_ctx *ctx)
 884 {
 885         int i;
 886
 887         for (i = 0; i < CODA_MAX_FRAMEBUFFERS; i++) {
 888                 if (ctx->internal_frames[i].vaddr) {
 889                         dma_free_coherent(&ctx->dev->plat_dev->dev,
 890                                 ctx->internal_frames[i].size,
 891                                 ctx->internal_frames[i].vaddr,
 892                                 ctx->internal_frames[i].paddr);
 893                         ctx->internal_frames[i].vaddr = NULL;
 894                 }
 895         }
 896 }
 897
 898 static int coda_alloc_framebuffers(struct coda_ctx *ctx, struct coda_q_data *q_data, u32 fourcc)
 899 {
 900         struct coda_dev *dev = ctx->dev;
 901
 902         int height = q_data->height;
 903         int width = q_data->width;
 904         u32 *p;
 905         int i;
 906
 907         /* Allocate frame buffers */
 908         ctx->num_internal_frames = CODA_MAX_FRAMEBUFFERS;
 909         for (i = 0; i < ctx->num_internal_frames; i++) {
 910                 ctx->internal_frames[i].size = q_data->sizeimage;
 911                 if (fourcc == V4L2_PIX_FMT_H264 && dev->devtype->product != CODA_DX6)
 912                         ctx->internal_frames[i].size += width / 2 * height / 2;
 913                 ctx->internal_frames[i].vaddr = dma_alloc_coherent(
 914                                 &dev->plat_dev->dev, ctx->internal_frames[i].size,
 915                                 &ctx->internal_frames[i].paddr, GFP_KERNEL);
 916                 if (!ctx->internal_frames[i].vaddr) {
 917                         coda_free_framebuffers(ctx);
 918                         return -ENOMEM;
 919                 }
 920         }
 921
 922         /* Register frame buffers in the parameter buffer */
 923         p = ctx->parabuf.vaddr;
 924
 925         if (dev->devtype->product == CODA_DX6) {
 926                 for (i = 0; i < ctx->num_internal_frames; i++) {
 927                         p[i * 3] = ctx->internal_frames[i].paddr; /* Y */
 928                         p[i * 3 + 1] = p[i * 3] + width * height; /* Cb */
 929                         p[i * 3 + 2] = p[i * 3 + 1] + width / 2 * height / 2; /* Cr */
 930                 }
 931         } else {
 932                 for (i = 0; i < ctx->num_internal_frames; i += 2) {
 933                         p[i * 3 + 1] = ctx->internal_frames[i].paddr; /* Y */
 934                         p[i * 3] = p[i * 3 + 1] + width * height; /* Cb */
 935                         p[i * 3 + 3] = p[i * 3] + (width / 2) * (height / 2); /* Cr */
 936
 937                         if (fourcc == V4L2_PIX_FMT_H264)
 938                                 p[96 + i + 1] = p[i * 3 + 3] + (width / 2) * (height / 2);
 939
 940                         if (i + 1 < ctx->num_internal_frames) {
 941                                 p[i * 3 + 2] = ctx->internal_frames[i+1].paddr; /* Y */
 942                                 p[i * 3 + 5] = p[i * 3 + 2] + width * height ; /* Cb */
 943                                 p[i * 3 + 4] = p[i * 3 + 5] + (width / 2) * (height / 2); /* Cr */
 944
 945                                 if (fourcc == V4L2_PIX_FMT_H264)
 946                                         p[96 + i] = p[i * 3 + 4] + (width / 2) * (height / 2);
 947                         }
 948                 }
 949         }
 950
 951         return 0;
 952 }
 953
 954 static int coda_start_streaming(struct vb2_queue *q, unsigned int count)
 955 {
 956         struct coda_ctx *ctx = vb2_get_drv_priv(q);
 957         struct v4l2_device *v4l2_dev = &ctx->dev->v4l2_dev;
 958         u32 bitstream_buf, bitstream_size;
 959         struct coda_dev *dev = ctx->dev;
 960         struct coda_q_data *q_data_src, *q_data_dst;
 961         struct vb2_buffer *buf;
 962         u32 dst_fourcc;
 963         u32 value;
 964         int ret;
 965
 966         if (count < 1)
 967                 return -EINVAL;
 968
 969         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
 970                 ctx->rawstreamon = 1;
 971         else
 972                 ctx->compstreamon = 1;
 973
 974         /* Don't start the coda unless both queues are on */
 975         if (!(ctx->rawstreamon & ctx->compstreamon))
 976                 return 0;
 977
 978         ctx->gopcounter = ctx->params.gop_size - 1;
 979
 980         q_data_src = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_OUTPUT);
 981         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
 982         bitstream_buf = vb2_dma_contig_plane_dma_addr(buf, 0);
 983         q_data_dst = get_q_data(ctx, V4L2_BUF_TYPE_VIDEO_CAPTURE);
 984         bitstream_size = q_data_dst->sizeimage;
 985         dst_fourcc = q_data_dst->fmt->fourcc;
 986
 987         /* Find out whether coda must encode or decode */
 988         if (q_data_src->fmt->type == CODA_FMT_RAW &&
 989             q_data_dst->fmt->type == CODA_FMT_ENC) {
 990                 ctx->inst_type = CODA_INST_ENCODER;
 991         } else if (q_data_src->fmt->type == CODA_FMT_ENC &&
 992                    q_data_dst->fmt->type == CODA_FMT_RAW) {
 993                 ctx->inst_type = CODA_INST_DECODER;
 994                 v4l2_err(v4l2_dev, "decoding not supported.\n");
 995                 return -EINVAL;
 996         } else {
 997                 v4l2_err(v4l2_dev, "couldn't tell instance type.\n");
 998                 return -EINVAL;
 999         }
1000
1001         if (!coda_is_initialized(dev)) {
1002                 v4l2_err(v4l2_dev, "coda is not initialized.\n");
1003                 return -EFAULT;
1004         }
1005         coda_write(dev, ctx->parabuf.paddr, CODA_REG_BIT_PARA_BUF_ADDR);
1006         coda_write(dev, bitstream_buf, CODA_REG_BIT_RD_PTR(ctx->idx));
1007         coda_write(dev, bitstream_buf, CODA_REG_BIT_WR_PTR(ctx->idx));
1008         switch (dev->devtype->product) {
1009         case CODA_DX6:
1010                 coda_write(dev, CODADX6_STREAM_BUF_DYNALLOC_EN |
1011                         CODADX6_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1012                 break;
1013         default:
1014                 coda_write(dev, CODA7_STREAM_BUF_DYNALLOC_EN |
1015                         CODA7_STREAM_BUF_PIC_RESET, CODA_REG_BIT_STREAM_CTRL);
1016         }
1017
1018         if (dev->devtype->product == CODA_DX6) {
1019                 /* Configure the coda */
1020                 coda_write(dev, dev->iram_paddr, CODADX6_REG_BIT_SEARCH_RAM_BASE_ADDR);
1021         }
1022
1023         /* Could set rotation here if needed */
1024         switch (dev->devtype->product) {
1025         case CODA_DX6:
1026                 value = (q_data_src->width & CODADX6_PICWIDTH_MASK) << CODADX6_PICWIDTH_OFFSET;
1027                 break;
1028         default:
1029                 value = (q_data_src->width & CODA7_PICWIDTH_MASK) << CODA7_PICWIDTH_OFFSET;
1030         }
1031         value |= (q_data_src->height & CODA_PICHEIGHT_MASK) << CODA_PICHEIGHT_OFFSET;
1032         coda_write(dev, value, CODA_CMD_ENC_SEQ_SRC_SIZE);
1033         coda_write(dev, ctx->params.framerate,
1034                    CODA_CMD_ENC_SEQ_SRC_F_RATE);
1035
1036         switch (dst_fourcc) {
1037         case V4L2_PIX_FMT_MPEG4:
1038                 if (dev->devtype->product == CODA_DX6)
1039                         ctx->params.codec_mode = CODADX6_MODE_ENCODE_MP4;
1040                 else
1041                         ctx->params.codec_mode = CODA7_MODE_ENCODE_MP4;
1042
1043                 coda_write(dev, CODA_STD_MPEG4, CODA_CMD_ENC_SEQ_COD_STD);
1044                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_MP4_PARA);
1045                 break;
1046         case V4L2_PIX_FMT_H264:
1047                 if (dev->devtype->product == CODA_DX6)
1048                         ctx->params.codec_mode = CODADX6_MODE_ENCODE_H264;
1049                 else
1050                         ctx->params.codec_mode = CODA7_MODE_ENCODE_H264;
1051
1052                 coda_write(dev, CODA_STD_H264, CODA_CMD_ENC_SEQ_COD_STD);
1053                 coda_write(dev, 0, CODA_CMD_ENC_SEQ_264_PARA);
1054                 break;
1055         default:
1056                 v4l2_err(v4l2_dev,
1057                          "dst format (0x%08x) invalid.\n", dst_fourcc);
1058                 return -EINVAL;
1059         }
1060
1061         value  = (ctx->params.slice_max_mb & CODA_SLICING_SIZE_MASK) << CODA_SLICING_SIZE_OFFSET;
1062         value |= (1 & CODA_SLICING_UNIT_MASK) << CODA_SLICING_UNIT_OFFSET;
1063         if (ctx->params.slice_mode == V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB)
1064                 value |=  1 & CODA_SLICING_MODE_MASK;
1065         coda_write(dev, value, CODA_CMD_ENC_SEQ_SLICE_MODE);
1066         value  =  ctx->params.gop_size & CODA_GOP_SIZE_MASK;
1067         coda_write(dev, value, CODA_CMD_ENC_SEQ_GOP_SIZE);
1068
1069         if (ctx->params.bitrate) {
1070                 /* Rate control enabled */
1071                 value = (ctx->params.bitrate & CODA_RATECONTROL_BITRATE_MASK) << CODA_RATECONTROL_BITRATE_OFFSET;
1072                 value |=  1 & CODA_RATECONTROL_ENABLE_MASK;
1073         } else {
1074                 value = 0;
1075         }
1076         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_PARA);
1077
1078         coda_write(dev, 0, CODA_CMD_ENC_SEQ_RC_BUF_SIZE);
1079         coda_write(dev, 0, CODA_CMD_ENC_SEQ_INTRA_REFRESH);
1080
1081         coda_write(dev, bitstream_buf, CODA_CMD_ENC_SEQ_BB_START);
1082         coda_write(dev, bitstream_size / 1024, CODA_CMD_ENC_SEQ_BB_SIZE);
1083
1084         /* set default gamma */
1085         value = (CODA_DEFAULT_GAMMA & CODA_GAMMA_MASK) << CODA_GAMMA_OFFSET;
1086         coda_write(dev, value, CODA_CMD_ENC_SEQ_RC_GAMMA);
1087
1088         value  = (CODA_DEFAULT_GAMMA > 0) << CODA_OPTION_GAMMA_OFFSET;
1089         value |= (0 & CODA_OPTION_SLICEREPORT_MASK) << CODA_OPTION_SLICEREPORT_OFFSET;
1090         coda_write(dev, value, CODA_CMD_ENC_SEQ_OPTION);
1091
1092         if (dst_fourcc == V4L2_PIX_FMT_H264) {
1093                 value  = (FMO_SLICE_SAVE_BUF_SIZE << 7);
1094                 value |= (0 & CODA_FMOPARAM_TYPE_MASK) << CODA_FMOPARAM_TYPE_OFFSET;
1095                 value |=  0 & CODA_FMOPARAM_SLICENUM_MASK;
1096                 if (dev->devtype->product == CODA_DX6) {
1097                         coda_write(dev, value, CODADX6_CMD_ENC_SEQ_FMO);
1098                 } else {
1099                         coda_write(dev, dev->iram_paddr, CODA7_CMD_ENC_SEQ_SEARCH_BASE);
1100                         coda_write(dev, 48 * 1024, CODA7_CMD_ENC_SEQ_SEARCH_SIZE);
1101                 }
1102         }
1103
1104         if (coda_command_sync(ctx, CODA_COMMAND_SEQ_INIT)) {
1105                 v4l2_err(v4l2_dev, "CODA_COMMAND_SEQ_INIT timeout\n");
1106                 return -ETIMEDOUT;
1107         }
1108
1109         if (coda_read(dev, CODA_RET_ENC_SEQ_SUCCESS) == 0)
1110                 return -EFAULT;
1111
1112         ret = coda_alloc_framebuffers(ctx, q_data_src, dst_fourcc);
1113         if (ret < 0)
1114                 return ret;
1115
1116         coda_write(dev, ctx->num_internal_frames, CODA_CMD_SET_FRAME_BUF_NUM);
1117         coda_write(dev, round_up(q_data_src->width, 8), CODA_CMD_SET_FRAME_BUF_STRIDE);
1118         if (dev->devtype->product != CODA_DX6) {
1119                 coda_write(dev, round_up(q_data_src->width, 8), CODA7_CMD_SET_FRAME_SOURCE_BUF_STRIDE);
1120                 coda_write(dev, dev->iram_paddr + 48 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKY_ADDR);
1121                 coda_write(dev, dev->iram_paddr + 53 * 1024, CODA7_CMD_SET_FRAME_AXI_DBKC_ADDR);
1122                 coda_write(dev, dev->iram_paddr + 58 * 1024, CODA7_CMD_SET_FRAME_AXI_BIT_ADDR);
1123                 coda_write(dev, dev->iram_paddr + 68 * 1024, CODA7_CMD_SET_FRAME_AXI_IPACDC_ADDR);
1124                 coda_write(dev, 0x0, CODA7_CMD_SET_FRAME_AXI_OVL_ADDR);
1125         }
1126         if (coda_command_sync(ctx, CODA_COMMAND_SET_FRAME_BUF)) {
1127                 v4l2_err(v4l2_dev, "CODA_COMMAND_SET_FRAME_BUF timeout\n");
1128                 return -ETIMEDOUT;
1129         }
1130
1131         /* Save stream headers */
1132         buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
1133         switch (dst_fourcc) {
1134         case V4L2_PIX_FMT_H264:
1135                 /*
1136                  * Get SPS in the first frame and copy it to an
1137                  * intermediate buffer.
1138                  */
1139                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1140                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1141                 coda_write(dev, CODA_HEADER_H264_SPS, CODA_CMD_ENC_HEADER_CODE);
1142                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1143                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1144                         return -ETIMEDOUT;
1145                 }
1146                 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1147                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1148                 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1149                        ctx->vpu_header_size[0]);
1150
1151                 /*
1152                  * Get PPS in the first frame and copy it to an
1153                  * intermediate buffer.
1154                  */
1155                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1156                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1157                 coda_write(dev, CODA_HEADER_H264_PPS, CODA_CMD_ENC_HEADER_CODE);
1158                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1159                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1160                         return -ETIMEDOUT;
1161                 }
1162                 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1163                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1164                 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1165                        ctx->vpu_header_size[1]);
1166                 ctx->vpu_header_size[2] = 0;
1167                 break;
1168         case V4L2_PIX_FMT_MPEG4:
1169                 /*
1170                  * Get VOS in the first frame and copy it to an
1171                  * intermediate buffer
1172                  */
1173                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1174                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1175                 coda_write(dev, CODA_HEADER_MP4V_VOS, CODA_CMD_ENC_HEADER_CODE);
1176                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1177                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER timeout\n");
1178                         return -ETIMEDOUT;
1179                 }
1180                 ctx->vpu_header_size[0] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1181                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1182                 memcpy(&ctx->vpu_header[0][0], vb2_plane_vaddr(buf, 0),
1183                        ctx->vpu_header_size[0]);
1184
1185                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1186                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1187                 coda_write(dev, CODA_HEADER_MP4V_VIS, CODA_CMD_ENC_HEADER_CODE);
1188                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1189                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1190                         return -ETIMEDOUT;
1191                 }
1192                 ctx->vpu_header_size[1] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1193                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1194                 memcpy(&ctx->vpu_header[1][0], vb2_plane_vaddr(buf, 0),
1195                        ctx->vpu_header_size[1]);
1196
1197                 coda_write(dev, vb2_dma_contig_plane_dma_addr(buf, 0), CODA_CMD_ENC_HEADER_BB_START);
1198                 coda_write(dev, bitstream_size, CODA_CMD_ENC_HEADER_BB_SIZE);
1199                 coda_write(dev, CODA_HEADER_MP4V_VOL, CODA_CMD_ENC_HEADER_CODE);
1200                 if (coda_command_sync(ctx, CODA_COMMAND_ENCODE_HEADER)) {
1201                         v4l2_err(v4l2_dev, "CODA_COMMAND_ENCODE_HEADER failed\n");
1202                         return -ETIMEDOUT;
1203                 }
1204                 ctx->vpu_header_size[2] = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx)) -
1205                                 coda_read(dev, CODA_CMD_ENC_HEADER_BB_START);
1206                 memcpy(&ctx->vpu_header[2][0], vb2_plane_vaddr(buf, 0),
1207                        ctx->vpu_header_size[2]);
1208                 break;
1209         default:
1210                 /* No more formats need to save headers at the moment */
1211                 break;
1212         }
1213
1214         return 0;
1215 }
1216
1217 static int coda_stop_streaming(struct vb2_queue *q)
1218 {
1219         struct coda_ctx *ctx = vb2_get_drv_priv(q);
1220
1221         if (q->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
1222                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1223                          "%s: output\n", __func__);
1224                 ctx->rawstreamon = 0;
1225         } else {
1226                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1227                          "%s: capture\n", __func__);
1228                 ctx->compstreamon = 0;
1229         }
1230
1231         if (!ctx->rawstreamon && !ctx->compstreamon) {
1232                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1233                          "%s: sent command 'SEQ_END' to coda\n", __func__);
1234                 if (coda_command_sync(ctx, CODA_COMMAND_SEQ_END)) {
1235                         v4l2_err(&ctx->dev->v4l2_dev,
1236                                  "CODA_COMMAND_SEQ_END failed\n");
1237                         return -ETIMEDOUT;
1238                 }
1239
1240                 coda_free_framebuffers(ctx);
1241         }
1242
1243         return 0;
1244 }
1245
1246 static struct vb2_ops coda_qops = {
1247         .queue_setup            = coda_queue_setup,
1248         .buf_prepare            = coda_buf_prepare,
1249         .buf_queue              = coda_buf_queue,
1250         .wait_prepare           = coda_wait_prepare,
1251         .wait_finish            = coda_wait_finish,
1252         .start_streaming        = coda_start_streaming,
1253         .stop_streaming         = coda_stop_streaming,
1254 };
1255
1256 static int coda_s_ctrl(struct v4l2_ctrl *ctrl)
1257 {
1258         struct coda_ctx *ctx =
1259                         container_of(ctrl->handler, struct coda_ctx, ctrls);
1260
1261         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1262                  "s_ctrl: id = %d, val = %d\n", ctrl->id, ctrl->val);
1263
1264         switch (ctrl->id) {
1265         case V4L2_CID_MPEG_VIDEO_BITRATE:
1266                 ctx->params.bitrate = ctrl->val / 1000;
1267                 break;
1268         case V4L2_CID_MPEG_VIDEO_GOP_SIZE:
1269                 ctx->params.gop_size = ctrl->val;
1270                 break;
1271         case V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP:
1272                 ctx->params.h264_intra_qp = ctrl->val;
1273                 break;
1274         case V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP:
1275                 ctx->params.h264_inter_qp = ctrl->val;
1276                 break;
1277         case V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP:
1278                 ctx->params.mpeg4_intra_qp = ctrl->val;
1279                 break;
1280         case V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP:
1281                 ctx->params.mpeg4_inter_qp = ctrl->val;
1282                 break;
1283         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE:
1284                 ctx->params.slice_mode = ctrl->val;
1285                 break;
1286         case V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB:
1287                 ctx->params.slice_max_mb = ctrl->val;
1288                 break;
1289         case V4L2_CID_MPEG_VIDEO_HEADER_MODE:
1290                 break;
1291         default:
1292                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1293                         "Invalid control, id=%d, val=%d\n",
1294                         ctrl->id, ctrl->val);
1295                 return -EINVAL;
1296         }
1297
1298         return 0;
1299 }
1300
1301 static struct v4l2_ctrl_ops coda_ctrl_ops = {
1302         .s_ctrl = coda_s_ctrl,
1303 };
1304
1305 static int coda_ctrls_setup(struct coda_ctx *ctx)
1306 {
1307         v4l2_ctrl_handler_init(&ctx->ctrls, 9);
1308
1309         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1310                 V4L2_CID_MPEG_VIDEO_BITRATE, 0, 32767000, 1, 0);
1311         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1312                 V4L2_CID_MPEG_VIDEO_GOP_SIZE, 1, 60, 1, 16);
1313         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1314                 V4L2_CID_MPEG_VIDEO_H264_I_FRAME_QP, 1, 51, 1, 25);
1315         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1316                 V4L2_CID_MPEG_VIDEO_H264_P_FRAME_QP, 1, 51, 1, 25);
1317         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1318                 V4L2_CID_MPEG_VIDEO_MPEG4_I_FRAME_QP, 1, 31, 1, 2);
1319         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1320                 V4L2_CID_MPEG_VIDEO_MPEG4_P_FRAME_QP, 1, 31, 1, 2);
1321         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1322                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MODE,
1323                 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB, 0,
1324                 V4L2_MPEG_VIDEO_MULTI_SICE_MODE_MAX_MB);
1325         v4l2_ctrl_new_std(&ctx->ctrls, &coda_ctrl_ops,
1326                 V4L2_CID_MPEG_VIDEO_MULTI_SLICE_MAX_MB, 1, 0x3fffffff, 1, 1);
1327         v4l2_ctrl_new_std_menu(&ctx->ctrls, &coda_ctrl_ops,
1328                 V4L2_CID_MPEG_VIDEO_HEADER_MODE,
1329                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME,
1330                 (1 << V4L2_MPEG_VIDEO_HEADER_MODE_SEPARATE),
1331                 V4L2_MPEG_VIDEO_HEADER_MODE_JOINED_WITH_1ST_FRAME);
1332
1333         if (ctx->ctrls.error) {
1334                 v4l2_err(&ctx->dev->v4l2_dev, "control initialization error (%d)",
1335                         ctx->ctrls.error);
1336                 return -EINVAL;
1337         }
1338
1339         return v4l2_ctrl_handler_setup(&ctx->ctrls);
1340 }
1341
1342 static int coda_queue_init(void *priv, struct vb2_queue *src_vq,
1343                       struct vb2_queue *dst_vq)
1344 {
1345         struct coda_ctx *ctx = priv;
1346         int ret;
1347
1348         src_vq->type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
1349         src_vq->io_modes = VB2_MMAP;
1350         src_vq->drv_priv = ctx;
1351         src_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1352         src_vq->ops = &coda_qops;
1353         src_vq->mem_ops = &vb2_dma_contig_memops;
1354
1355         ret = vb2_queue_init(src_vq);
1356         if (ret)
1357                 return ret;
1358
1359         dst_vq->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
1360         dst_vq->io_modes = VB2_MMAP;
1361         dst_vq->drv_priv = ctx;
1362         dst_vq->buf_struct_size = sizeof(struct v4l2_m2m_buffer);
1363         dst_vq->ops = &coda_qops;
1364         dst_vq->mem_ops = &vb2_dma_contig_memops;
1365
1366         return vb2_queue_init(dst_vq);
1367 }
1368
1369 static int coda_open(struct file *file)
1370 {
1371         struct coda_dev *dev = video_drvdata(file);
1372         struct coda_ctx *ctx = NULL;
1373         int ret = 0;
1374
1375         if (dev->instances >= CODA_MAX_INSTANCES)
1376                 return -EBUSY;
1377
1378         ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1379         if (!ctx)
1380                 return -ENOMEM;
1381
1382         v4l2_fh_init(&ctx->fh, video_devdata(file));
1383         file->private_data = &ctx->fh;
1384         v4l2_fh_add(&ctx->fh);
1385         ctx->dev = dev;
1386
1387         set_default_params(ctx);
1388         ctx->m2m_ctx = v4l2_m2m_ctx_init(dev->m2m_dev, ctx,
1389                                          &coda_queue_init);
1390         if (IS_ERR(ctx->m2m_ctx)) {
1391                 int ret = PTR_ERR(ctx->m2m_ctx);
1392
1393                 v4l2_err(&dev->v4l2_dev, "%s return error (%d)\n",
1394                          __func__, ret);
1395                 goto err;
1396         }
1397         ret = coda_ctrls_setup(ctx);
1398         if (ret) {
1399                 v4l2_err(&dev->v4l2_dev, "failed to setup coda controls\n");
1400                 goto err;
1401         }
1402
1403         ctx->fh.ctrl_handler = &ctx->ctrls;
1404
1405         ctx->parabuf.vaddr = dma_alloc_coherent(&dev->plat_dev->dev,
1406                         CODA_PARA_BUF_SIZE, &ctx->parabuf.paddr, GFP_KERNEL);
1407         if (!ctx->parabuf.vaddr) {
1408                 v4l2_err(&dev->v4l2_dev, "failed to allocate parabuf");
1409                 ret = -ENOMEM;
1410                 goto err;
1411         }
1412
1413         coda_lock(ctx);
1414         ctx->idx = dev->instances++;
1415         coda_unlock(ctx);
1416
1417         clk_prepare_enable(dev->clk_per);
1418         clk_prepare_enable(dev->clk_ahb);
1419
1420         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Created instance %d (%p)\n",
1421                  ctx->idx, ctx);
1422
1423         return 0;
1424
1425 err:
1426         v4l2_fh_del(&ctx->fh);
1427         v4l2_fh_exit(&ctx->fh);
1428         kfree(ctx);
1429         return ret;
1430 }
1431
1432 static int coda_release(struct file *file)
1433 {
1434         struct coda_dev *dev = video_drvdata(file);
1435         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1436
1437         v4l2_dbg(1, coda_debug, &dev->v4l2_dev, "Releasing instance %p\n",
1438                  ctx);
1439
1440         coda_lock(ctx);
1441         dev->instances--;
1442         coda_unlock(ctx);
1443
1444         dma_free_coherent(&dev->plat_dev->dev, CODA_PARA_BUF_SIZE,
1445                 ctx->parabuf.vaddr, ctx->parabuf.paddr);
1446         v4l2_m2m_ctx_release(ctx->m2m_ctx);
1447         v4l2_ctrl_handler_free(&ctx->ctrls);
1448         clk_disable_unprepare(dev->clk_per);
1449         clk_disable_unprepare(dev->clk_ahb);
1450         v4l2_fh_del(&ctx->fh);
1451         v4l2_fh_exit(&ctx->fh);
1452         kfree(ctx);
1453
1454         return 0;
1455 }
1456
1457 static unsigned int coda_poll(struct file *file,
1458                                  struct poll_table_struct *wait)
1459 {
1460         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1461         int ret;
1462
1463         coda_lock(ctx);
1464         ret = v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1465         coda_unlock(ctx);
1466         return ret;
1467 }
1468
1469 static int coda_mmap(struct file *file, struct vm_area_struct *vma)
1470 {
1471         struct coda_ctx *ctx = fh_to_ctx(file->private_data);
1472
1473         return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1474 }
1475
1476 static const struct v4l2_file_operations coda_fops = {
1477         .owner          = THIS_MODULE,
1478         .open           = coda_open,
1479         .release        = coda_release,
1480         .poll           = coda_poll,
1481         .unlocked_ioctl = video_ioctl2,
1482         .mmap           = coda_mmap,
1483 };
1484
1485 static irqreturn_t coda_irq_handler(int irq, void *data)
1486 {
1487         struct vb2_buffer *src_buf, *dst_buf;
1488         struct coda_dev *dev = data;
1489         u32 wr_ptr, start_ptr;
1490         struct coda_ctx *ctx;
1491
1492         /* read status register to attend the IRQ */
1493         coda_read(dev, CODA_REG_BIT_INT_STATUS);
1494         coda_write(dev, CODA_REG_BIT_INT_CLEAR_SET,
1495                       CODA_REG_BIT_INT_CLEAR);
1496
1497         ctx = v4l2_m2m_get_curr_priv(dev->m2m_dev);
1498         if (ctx == NULL) {
1499                 v4l2_err(&dev->v4l2_dev, "Instance released before the end of transaction\n");
1500                 return IRQ_HANDLED;
1501         }
1502
1503         if (ctx->aborting) {
1504                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1505                          "task has been aborted\n");
1506                 return IRQ_HANDLED;
1507         }
1508
1509         if (coda_isbusy(ctx->dev)) {
1510                 v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev,
1511                          "coda is still busy!!!!\n");
1512                 return IRQ_NONE;
1513         }
1514
1515         src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
1516         dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
1517
1518         /* Get results from the coda */
1519         coda_read(dev, CODA_RET_ENC_PIC_TYPE);
1520         start_ptr = coda_read(dev, CODA_CMD_ENC_PIC_BB_START);
1521         wr_ptr = coda_read(dev, CODA_REG_BIT_WR_PTR(ctx->idx));
1522         /* Calculate bytesused field */
1523         if (dst_buf->v4l2_buf.sequence == 0) {
1524                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr) +
1525                                                 ctx->vpu_header_size[0] +
1526                                                 ctx->vpu_header_size[1] +
1527                                                 ctx->vpu_header_size[2];
1528         } else {
1529                 dst_buf->v4l2_planes[0].bytesused = (wr_ptr - start_ptr);
1530         }
1531
1532         v4l2_dbg(1, coda_debug, &ctx->dev->v4l2_dev, "frame size = %u\n",
1533                  wr_ptr - start_ptr);
1534
1535         coda_read(dev, CODA_RET_ENC_PIC_SLICE_NUM);
1536         coda_read(dev, CODA_RET_ENC_PIC_FLAG);
1537
1538         if (src_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) {
1539                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_KEYFRAME;
1540                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_PFRAME;
1541         } else {
1542                 dst_buf->v4l2_buf.flags |= V4L2_BUF_FLAG_PFRAME;
1543                 dst_buf->v4l2_buf.flags &= ~V4L2_BUF_FLAG_KEYFRAME;
1544         }
1545
1546         v4l2_m2m_buf_done(src_buf, VB2_BUF_STATE_DONE);
1547         v4l2_m2m_buf_done(dst_buf, VB2_BUF_STATE_DONE);
1548
1549         ctx->gopcounter--;
1550         if (ctx->gopcounter < 0)
1551                 ctx->gopcounter = ctx->params.gop_size - 1;
1552
1553         v4l2_dbg(1, coda_debug, &dev->v4l2_dev,
1554                 "job finished: encoding frame (%d) (%s)\n",
1555                 dst_buf->v4l2_buf.sequence,
1556                 (dst_buf->v4l2_buf.flags & V4L2_BUF_FLAG_KEYFRAME) ?
1557                 "KEYFRAME" : "PFRAME");
1558
1559         v4l2_m2m_job_finish(ctx->dev->m2m_dev, ctx->m2m_ctx);
1560
1561         return IRQ_HANDLED;
1562 }
1563
1564 static u32 coda_supported_firmwares[] = {
1565         CODA_FIRMWARE_VERNUM(CODA_DX6, 2, 2, 5),
1566         CODA_FIRMWARE_VERNUM(CODA_7541, 13, 4, 29),
1567 };
1568
1569 static bool coda_firmware_supported(u32 vernum)
1570 {
1571         int i;
1572
1573         for (i = 0; i < ARRAY_SIZE(coda_supported_firmwares); i++)
1574                 if (vernum == coda_supported_firmwares[i])
1575                         return true;
1576         return false;
1577 }
1578
1579 static char *coda_product_name(int product)
1580 {
1581         static char buf[9];
1582
1583         switch (product) {
1584         case CODA_DX6:
1585                 return "CodaDx6";
1586         case CODA_7541:
1587                 return "CODA7541";
1588         default:
1589                 snprintf(buf, sizeof(buf), "(0x%04x)", product);
1590                 return buf;
1591         }
1592 }
1593
1594 static int coda_hw_init(struct coda_dev *dev)
1595 {
1596         u16 product, major, minor, release;
1597         u32 data;
1598         u16 *p;
1599         int i;
1600
1601         clk_prepare_enable(dev->clk_per);
1602         clk_prepare_enable(dev->clk_ahb);
1603
1604         /*
1605          * Copy the first CODA_ISRAM_SIZE in the internal SRAM.
1606          * The 16-bit chars in the code buffer are in memory access
1607          * order, re-sort them to CODA order for register download.
1608          * Data in this SRAM survives a reboot.
1609          */
1610         p = (u16 *)dev->codebuf.vaddr;
1611         if (dev->devtype->product == CODA_DX6) {
1612                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++)  {
1613                         data = CODA_DOWN_ADDRESS_SET(i) |
1614                                 CODA_DOWN_DATA_SET(p[i ^ 1]);
1615                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1616                 }
1617         } else {
1618                 for (i = 0; i < (CODA_ISRAM_SIZE / 2); i++) {
1619                         data = CODA_DOWN_ADDRESS_SET(i) |
1620                                 CODA_DOWN_DATA_SET(p[round_down(i, 4) +
1621                                                         3 - (i % 4)]);
1622                         coda_write(dev, data, CODA_REG_BIT_CODE_DOWN);
1623                 }
1624         }
1625
1626         /* Tell the BIT where to find everything it needs */
1627         coda_write(dev, dev->workbuf.paddr,
1628                       CODA_REG_BIT_WORK_BUF_ADDR);
1629         coda_write(dev, dev->codebuf.paddr,
1630                       CODA_REG_BIT_CODE_BUF_ADDR);
1631         coda_write(dev, 0, CODA_REG_BIT_CODE_RUN);
1632
1633         /* Set default values */
1634         switch (dev->devtype->product) {
1635         case CODA_DX6:
1636                 coda_write(dev, CODADX6_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1637                 break;
1638         default:
1639                 coda_write(dev, CODA7_STREAM_BUF_PIC_FLUSH, CODA_REG_BIT_STREAM_CTRL);
1640         }
1641         coda_write(dev, 0, CODA_REG_BIT_FRAME_MEM_CTRL);
1642
1643         if (dev->devtype->product != CODA_DX6)
1644                 coda_write(dev, 0, CODA7_REG_BIT_AXI_SRAM_USE);
1645
1646         coda_write(dev, CODA_INT_INTERRUPT_ENABLE,
1647                       CODA_REG_BIT_INT_ENABLE);
1648
1649         /* Reset VPU and start processor */
1650         data = coda_read(dev, CODA_REG_BIT_CODE_RESET);
1651         data |= CODA_REG_RESET_ENABLE;
1652         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1653         udelay(10);
1654         data &= ~CODA_REG_RESET_ENABLE;
1655         coda_write(dev, data, CODA_REG_BIT_CODE_RESET);
1656         coda_write(dev, CODA_REG_RUN_ENABLE, CODA_REG_BIT_CODE_RUN);
1657
1658         /* Load firmware */
1659         coda_write(dev, 0, CODA_CMD_FIRMWARE_VERNUM);
1660         coda_write(dev, CODA_REG_BIT_BUSY_FLAG, CODA_REG_BIT_BUSY);
1661         coda_write(dev, 0, CODA_REG_BIT_RUN_INDEX);
1662         coda_write(dev, 0, CODA_REG_BIT_RUN_COD_STD);
1663         coda_write(dev, CODA_COMMAND_FIRMWARE_GET, CODA_REG_BIT_RUN_COMMAND);
1664         if (coda_wait_timeout(dev)) {
1665                 clk_disable_unprepare(dev->clk_per);
1666                 clk_disable_unprepare(dev->clk_ahb);
1667                 v4l2_err(&dev->v4l2_dev, "firmware get command error\n");
1668                 return -EIO;
1669         }
1670
1671         /* Check we are compatible with the loaded firmware */
1672         data = coda_read(dev, CODA_CMD_FIRMWARE_VERNUM);
1673         product = CODA_FIRMWARE_PRODUCT(data);
1674         major = CODA_FIRMWARE_MAJOR(data);
1675         minor = CODA_FIRMWARE_MINOR(data);
1676         release = CODA_FIRMWARE_RELEASE(data);
1677
1678         clk_disable_unprepare(dev->clk_per);
1679         clk_disable_unprepare(dev->clk_ahb);
1680
1681         if (product != dev->devtype->product) {
1682                 v4l2_err(&dev->v4l2_dev, "Wrong firmware. Hw: %s, Fw: %s,"
1683                          " Version: %u.%u.%u\n",
1684                          coda_product_name(dev->devtype->product),
1685                          coda_product_name(product), major, minor, release);
1686                 return -EINVAL;
1687         }
1688
1689         v4l2_info(&dev->v4l2_dev, "Initialized %s.\n",
1690                   coda_product_name(product));
1691
1692         if (coda_firmware_supported(data)) {
1693                 v4l2_info(&dev->v4l2_dev, "Firmware version: %u.%u.%u\n",
1694                           major, minor, release);
1695         } else {
1696                 v4l2_warn(&dev->v4l2_dev, "Unsupported firmware version: "
1697                           "%u.%u.%u\n", major, minor, release);
1698         }
1699
1700         return 0;
1701 }
1702
1703 static void coda_fw_callback(const struct firmware *fw, void *context)
1704 {
1705         struct coda_dev *dev = context;
1706         struct platform_device *pdev = dev->plat_dev;
1707         int ret;
1708
1709         if (!fw) {
1710                 v4l2_err(&dev->v4l2_dev, "firmware request failed\n");
1711                 return;
1712         }
1713
1714         /* allocate auxiliary per-device code buffer for the BIT processor */
1715         dev->codebuf.size = fw->size;
1716         dev->codebuf.vaddr = dma_alloc_coherent(&pdev->dev, fw->size,
1717                                                     &dev->codebuf.paddr,
1718                                                     GFP_KERNEL);
1719         if (!dev->codebuf.vaddr) {
1720                 dev_err(&pdev->dev, "failed to allocate code buffer\n");
1721                 return;
1722         }
1723
1724         /* Copy the whole firmware image to the code buffer */
1725         memcpy(dev->codebuf.vaddr, fw->data, fw->size);
1726         release_firmware(fw);
1727
1728         ret = coda_hw_init(dev);
1729         if (ret) {
1730                 v4l2_err(&dev->v4l2_dev, "HW initialization failed\n");
1731                 return;
1732         }
1733
1734         dev->vfd.fops   = &coda_fops,
1735         dev->vfd.ioctl_ops      = &coda_ioctl_ops;
1736         dev->vfd.release        = video_device_release_empty,
1737         dev->vfd.lock   = &dev->dev_mutex;
1738         dev->vfd.v4l2_dev       = &dev->v4l2_dev;
1739         dev->vfd.vfl_dir        = VFL_DIR_M2M;
1740         snprintf(dev->vfd.name, sizeof(dev->vfd.name), "%s", CODA_NAME);
1741         video_set_drvdata(&dev->vfd, dev);
1742
1743         dev->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1744         if (IS_ERR(dev->alloc_ctx)) {
1745                 v4l2_err(&dev->v4l2_dev, "Failed to alloc vb2 context\n");
1746                 return;
1747         }
1748
1749         dev->m2m_dev = v4l2_m2m_init(&coda_m2m_ops);
1750         if (IS_ERR(dev->m2m_dev)) {
1751                 v4l2_err(&dev->v4l2_dev, "Failed to init mem2mem device\n");
1752                 goto rel_ctx;
1753         }
1754
1755         ret = video_register_device(&dev->vfd, VFL_TYPE_GRABBER, 0);
1756         if (ret) {
1757                 v4l2_err(&dev->v4l2_dev, "Failed to register video device\n");
1758                 goto rel_m2m;
1759         }
1760         v4l2_info(&dev->v4l2_dev, "codec registered as /dev/video%d\n",
1761                   dev->vfd.num);
1762
1763         return;
1764
1765 rel_m2m:
1766         v4l2_m2m_release(dev->m2m_dev);
1767 rel_ctx:
1768         vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1769 }
1770
1771 static int coda_firmware_request(struct coda_dev *dev)
1772 {
1773         char *fw = dev->devtype->firmware;
1774
1775         dev_dbg(&dev->plat_dev->dev, "requesting firmware '%s' for %s\n", fw,
1776                 coda_product_name(dev->devtype->product));
1777
1778         return request_firmware_nowait(THIS_MODULE, true,
1779                 fw, &dev->plat_dev->dev, GFP_KERNEL, dev, coda_fw_callback);
1780 }
1781
1782 enum coda_platform {
1783         CODA_IMX27,
1784         CODA_IMX53,
1785 };
1786
1787 static const struct coda_devtype coda_devdata[] = {
1788         [CODA_IMX27] = {
1789                 .firmware    = "v4l-codadx6-imx27.bin",
1790                 .product     = CODA_DX6,
1791                 .formats     = codadx6_formats,
1792                 .num_formats = ARRAY_SIZE(codadx6_formats),
1793         },
1794         [CODA_IMX53] = {
1795                 .firmware    = "v4l-coda7541-imx53.bin",
1796                 .product     = CODA_7541,
1797                 .formats     = coda7_formats,
1798                 .num_formats = ARRAY_SIZE(coda7_formats),
1799         },
1800 };
1801
1802 static struct platform_device_id coda_platform_ids[] = {
1803         { .name = "coda-imx27", .driver_data = CODA_IMX27 },
1804         { .name = "coda-imx53", .driver_data = CODA_7541 },
1805         { /* sentinel */ }
1806 };
1807 MODULE_DEVICE_TABLE(platform, coda_platform_ids);
1808
1809 #ifdef CONFIG_OF
1810 static const struct of_device_id coda_dt_ids[] = {
1811         { .compatible = "fsl,imx27-vpu", .data = &coda_platform_ids[CODA_IMX27] },
1812         { .compatible = "fsl,imx53-vpu", .data = &coda_devdata[CODA_IMX53] },
1813         { /* sentinel */ }
1814 };
1815 MODULE_DEVICE_TABLE(of, coda_dt_ids);
1816 #endif
1817
1818 static int __devinit coda_probe(struct platform_device *pdev)
1819 {
1820         const struct of_device_id *of_id =
1821                         of_match_device(of_match_ptr(coda_dt_ids), &pdev->dev);
1822         const struct platform_device_id *pdev_id;
1823         struct coda_dev *dev;
1824         struct resource *res;
1825         int ret, irq;
1826
1827         dev = devm_kzalloc(&pdev->dev, sizeof *dev, GFP_KERNEL);
1828         if (!dev) {
1829                 dev_err(&pdev->dev, "Not enough memory for %s\n",
1830                         CODA_NAME);
1831                 return -ENOMEM;
1832         }
1833
1834         spin_lock_init(&dev->irqlock);
1835
1836         dev->plat_dev = pdev;
1837         dev->clk_per = devm_clk_get(&pdev->dev, "per");
1838         if (IS_ERR(dev->clk_per)) {
1839                 dev_err(&pdev->dev, "Could not get per clock\n");
1840                 return PTR_ERR(dev->clk_per);
1841         }
1842
1843         dev->clk_ahb = devm_clk_get(&pdev->dev, "ahb");
1844         if (IS_ERR(dev->clk_ahb)) {
1845                 dev_err(&pdev->dev, "Could not get ahb clock\n");
1846                 return PTR_ERR(dev->clk_ahb);
1847         }
1848
1849         /* Get  memory for physical registers */
1850         res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1851         if (res == NULL) {
1852                 dev_err(&pdev->dev, "failed to get memory region resource\n");
1853                 return -ENOENT;
1854         }
1855
1856         if (devm_request_mem_region(&pdev->dev, res->start,
1857                         resource_size(res), CODA_NAME) == NULL) {
1858                 dev_err(&pdev->dev, "failed to request memory region\n");
1859                 return -ENOENT;
1860         }
1861         dev->regs_base = devm_ioremap(&pdev->dev, res->start,
1862                                       resource_size(res));
1863         if (!dev->regs_base) {
1864                 dev_err(&pdev->dev, "failed to ioremap address region\n");
1865                 return -ENOENT;
1866         }
1867
1868         /* IRQ */
1869         irq = platform_get_irq(pdev, 0);
1870         if (irq < 0) {
1871                 dev_err(&pdev->dev, "failed to get irq resource\n");
1872                 return -ENOENT;
1873         }
1874
1875         if (devm_request_irq(&pdev->dev, irq, coda_irq_handler,
1876                 0, CODA_NAME, dev) < 0) {
1877                 dev_err(&pdev->dev, "failed to request irq\n");
1878                 return -ENOENT;
1879         }
1880
1881         ret = v4l2_device_register(&pdev->dev, &dev->v4l2_dev);
1882         if (ret)
1883                 return ret;
1884
1885         mutex_init(&dev->dev_mutex);
1886
1887         pdev_id = of_id ? of_id->data : platform_get_device_id(pdev);
1888
1889         if (of_id) {
1890                 dev->devtype = of_id->data;
1891         } else if (pdev_id) {
1892                 dev->devtype = &coda_devdata[pdev_id->driver_data];
1893         } else {
1894                 v4l2_device_unregister(&dev->v4l2_dev);
1895                 return -EINVAL;
1896         }
1897
1898         /* allocate auxiliary per-device buffers for the BIT processor */
1899         switch (dev->devtype->product) {
1900         case CODA_DX6:
1901                 dev->workbuf.size = CODADX6_WORK_BUF_SIZE;
1902                 break;
1903         default:
1904                 dev->workbuf.size = CODA7_WORK_BUF_SIZE;
1905         }
1906         dev->workbuf.vaddr = dma_alloc_coherent(&pdev->dev, dev->workbuf.size,
1907                                                     &dev->workbuf.paddr,
1908                                                     GFP_KERNEL);
1909         if (!dev->workbuf.vaddr) {
1910                 dev_err(&pdev->dev, "failed to allocate work buffer\n");
1911                 v4l2_device_unregister(&dev->v4l2_dev);
1912                 return -ENOMEM;
1913         }
1914
1915         if (dev->devtype->product == CODA_DX6) {
1916                 dev->iram_paddr = 0xffff4c00;
1917         } else {
1918                 void __iomem *iram_vaddr;
1919
1920                 iram_vaddr = iram_alloc(CODA7_IRAM_SIZE,
1921                                         &dev->iram_paddr);
1922                 if (!iram_vaddr) {
1923                         dev_err(&pdev->dev, "unable to alloc iram\n");
1924                         return -ENOMEM;
1925                 }
1926         }
1927
1928         platform_set_drvdata(pdev, dev);
1929
1930         return coda_firmware_request(dev);
1931 }
1932
1933 static int coda_remove(struct platform_device *pdev)
1934 {
1935         struct coda_dev *dev = platform_get_drvdata(pdev);
1936
1937         video_unregister_device(&dev->vfd);
1938         if (dev->m2m_dev)
1939                 v4l2_m2m_release(dev->m2m_dev);
1940         if (dev->alloc_ctx)
1941                 vb2_dma_contig_cleanup_ctx(dev->alloc_ctx);
1942         v4l2_device_unregister(&dev->v4l2_dev);
1943         if (dev->iram_paddr)
1944                 iram_free(dev->iram_paddr, CODA7_IRAM_SIZE);
1945         if (dev->codebuf.vaddr)
1946                 dma_free_coherent(&pdev->dev, dev->codebuf.size,
1947                                   &dev->codebuf.vaddr, dev->codebuf.paddr);
1948         if (dev->workbuf.vaddr)
1949                 dma_free_coherent(&pdev->dev, dev->workbuf.size, &dev->workbuf.vaddr,
1950                           dev->workbuf.paddr);
1951         return 0;
1952 }
1953
1954 static struct platform_driver coda_driver = {
1955         .probe  = coda_probe,
1956         .remove = __devexit_p(coda_remove),
1957         .driver = {
1958                 .name   = CODA_NAME,
1959                 .owner  = THIS_MODULE,
1960                 .of_match_table = of_match_ptr(coda_dt_ids),
1961         },
1962         .id_table = coda_platform_ids,
1963 };
1964
1965 module_platform_driver(coda_driver);
1966
1967 MODULE_LICENSE("GPL");
1968 MODULE_AUTHOR("Javier Martin <javier.martin@vista-silicon.com>");
1969 MODULE_DESCRIPTION("Coda multi-standard codec V4L2 driver");