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Merge branch 'release' of git://git.kernel.org/pub/scm/linux/kernel/git/lenb/linux
[karo-tx-linux.git] / drivers / media / platform / omap3isp / isppreview.c
1 /*
2  * isppreview.c
3  *
4  * TI OMAP3 ISP driver - Preview module
5  *
6  * Copyright (C) 2010 Nokia Corporation
7  * Copyright (C) 2009 Texas Instruments, Inc.
8  *
9  * Contacts: Laurent Pinchart <laurent.pinchart@ideasonboard.com>
10  *           Sakari Ailus <sakari.ailus@iki.fi>
11  *
12  * This program is free software; you can redistribute it and/or modify
13  * it under the terms of the GNU General Public License version 2 as
14  * published by the Free Software Foundation.
15  *
16  * This program is distributed in the hope that it will be useful, but
17  * WITHOUT ANY WARRANTY; without even the implied warranty of
18  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
19  * General Public License for more details.
20  *
21  * You should have received a copy of the GNU General Public License
22  * along with this program; if not, write to the Free Software
23  * Foundation, Inc., 51 Franklin St, Fifth Floor, Boston, MA
24  * 02110-1301 USA
25  */
26
27 #include <linux/device.h>
28 #include <linux/mm.h>
29 #include <linux/module.h>
30 #include <linux/mutex.h>
31 #include <linux/uaccess.h>
32
33 #include "isp.h"
34 #include "ispreg.h"
35 #include "isppreview.h"
36
37 /* Default values in Office Fluorescent Light for RGBtoRGB Blending */
38 static struct omap3isp_prev_rgbtorgb flr_rgb2rgb = {
39         {       /* RGB-RGB Matrix */
40                 {0x01E2, 0x0F30, 0x0FEE},
41                 {0x0F9B, 0x01AC, 0x0FB9},
42                 {0x0FE0, 0x0EC0, 0x0260}
43         },      /* RGB Offset */
44         {0x0000, 0x0000, 0x0000}
45 };
46
47 /* Default values in Office Fluorescent Light for RGB to YUV Conversion*/
48 static struct omap3isp_prev_csc flr_prev_csc = {
49         {       /* CSC Coef Matrix */
50                 {66, 129, 25},
51                 {-38, -75, 112},
52                 {112, -94 , -18}
53         },      /* CSC Offset */
54         {0x0, 0x0, 0x0}
55 };
56
57 /* Default values in Office Fluorescent Light for CFA Gradient*/
58 #define FLR_CFA_GRADTHRS_HORZ   0x28
59 #define FLR_CFA_GRADTHRS_VERT   0x28
60
61 /* Default values in Office Fluorescent Light for Chroma Suppression*/
62 #define FLR_CSUP_GAIN           0x0D
63 #define FLR_CSUP_THRES          0xEB
64
65 /* Default values in Office Fluorescent Light for Noise Filter*/
66 #define FLR_NF_STRGTH           0x03
67
68 /* Default values for White Balance */
69 #define FLR_WBAL_DGAIN          0x100
70 #define FLR_WBAL_COEF           0x20
71
72 /* Default values in Office Fluorescent Light for Black Adjustment*/
73 #define FLR_BLKADJ_BLUE         0x0
74 #define FLR_BLKADJ_GREEN        0x0
75 #define FLR_BLKADJ_RED          0x0
76
77 #define DEF_DETECT_CORRECT_VAL  0xe
78
79 /*
80  * Margins and image size limits.
81  *
82  * The preview engine crops several rows and columns internally depending on
83  * which filters are enabled. To avoid format changes when the filters are
84  * enabled or disabled (which would prevent them from being turned on or off
85  * during streaming), the driver assumes all the filters are enabled when
86  * computing sink crop and source format limits.
87  *
88  * If a filter is disabled, additional cropping is automatically added at the
89  * preview engine input by the driver to avoid overflow at line and frame end.
90  * This is completely transparent for applications.
91  *
92  * Median filter                4 pixels
93  * Noise filter,
94  * Faulty pixels correction     4 pixels, 4 lines
95  * CFA filter                   4 pixels, 4 lines in Bayer mode
96  *                                        2 lines in other modes
97  * Color suppression            2 pixels
98  * or luma enhancement
99  * -------------------------------------------------------------
100  * Maximum total                14 pixels, 8 lines
101  *
102  * The color suppression and luma enhancement filters are applied after bayer to
103  * YUV conversion. They thus can crop one pixel on the left and one pixel on the
104  * right side of the image without changing the color pattern. When both those
105  * filters are disabled, the driver must crop the two pixels on the same side of
106  * the image to avoid changing the bayer pattern. The left margin is thus set to
107  * 8 pixels and the right margin to 6 pixels.
108  */
109
110 #define PREV_MARGIN_LEFT        8
111 #define PREV_MARGIN_RIGHT       6
112 #define PREV_MARGIN_TOP         4
113 #define PREV_MARGIN_BOTTOM      4
114
115 #define PREV_MIN_IN_WIDTH       64
116 #define PREV_MIN_IN_HEIGHT      8
117 #define PREV_MAX_IN_HEIGHT      16384
118
119 #define PREV_MIN_OUT_WIDTH              0
120 #define PREV_MIN_OUT_HEIGHT             0
121 #define PREV_MAX_OUT_WIDTH_REV_1        1280
122 #define PREV_MAX_OUT_WIDTH_REV_2        3300
123 #define PREV_MAX_OUT_WIDTH_REV_15       4096
124
125 /*
126  * Coeficient Tables for the submodules in Preview.
127  * Array is initialised with the values from.the tables text file.
128  */
129
130 /*
131  * CFA Filter Coefficient Table
132  *
133  */
134 static u32 cfa_coef_table[4][OMAP3ISP_PREV_CFA_BLK_SIZE] = {
135 #include "cfa_coef_table.h"
136 };
137
138 /*
139  * Default Gamma Correction Table - All components
140  */
141 static u32 gamma_table[] = {
142 #include "gamma_table.h"
143 };
144
145 /*
146  * Noise Filter Threshold table
147  */
148 static u32 noise_filter_table[] = {
149 #include "noise_filter_table.h"
150 };
151
152 /*
153  * Luminance Enhancement Table
154  */
155 static u32 luma_enhance_table[] = {
156 #include "luma_enhance_table.h"
157 };
158
159 /*
160  * preview_config_luma_enhancement - Configure the Luminance Enhancement table
161  */
162 static void
163 preview_config_luma_enhancement(struct isp_prev_device *prev,
164                                 const struct prev_params *params)
165 {
166         struct isp_device *isp = to_isp_device(prev);
167         const struct omap3isp_prev_luma *yt = &params->luma;
168         unsigned int i;
169
170         isp_reg_writel(isp, ISPPRV_YENH_TABLE_ADDR,
171                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
172         for (i = 0; i < OMAP3ISP_PREV_YENH_TBL_SIZE; i++) {
173                 isp_reg_writel(isp, yt->table[i],
174                                OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_DATA);
175         }
176 }
177
178 /*
179  * preview_enable_luma_enhancement - Enable/disable Luminance Enhancement
180  */
181 static void
182 preview_enable_luma_enhancement(struct isp_prev_device *prev, bool enable)
183 {
184         struct isp_device *isp = to_isp_device(prev);
185
186         if (enable)
187                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
188                             ISPPRV_PCR_YNENHEN);
189         else
190                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
191                             ISPPRV_PCR_YNENHEN);
192 }
193
194 /*
195  * preview_enable_invalaw - Enable/disable Inverse A-Law decompression
196  */
197 static void preview_enable_invalaw(struct isp_prev_device *prev, bool enable)
198 {
199         struct isp_device *isp = to_isp_device(prev);
200
201         if (enable)
202                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
203                             ISPPRV_PCR_WIDTH | ISPPRV_PCR_INVALAW);
204         else
205                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
206                             ISPPRV_PCR_WIDTH | ISPPRV_PCR_INVALAW);
207 }
208
209 /*
210  * preview_config_hmed - Configure the Horizontal Median Filter
211  */
212 static void preview_config_hmed(struct isp_prev_device *prev,
213                                 const struct prev_params *params)
214 {
215         struct isp_device *isp = to_isp_device(prev);
216         const struct omap3isp_prev_hmed *hmed = &params->hmed;
217
218         isp_reg_writel(isp, (hmed->odddist == 1 ? 0 : ISPPRV_HMED_ODDDIST) |
219                        (hmed->evendist == 1 ? 0 : ISPPRV_HMED_EVENDIST) |
220                        (hmed->thres << ISPPRV_HMED_THRESHOLD_SHIFT),
221                        OMAP3_ISP_IOMEM_PREV, ISPPRV_HMED);
222 }
223
224 /*
225  * preview_enable_hmed - Enable/disable the Horizontal Median Filter
226  */
227 static void preview_enable_hmed(struct isp_prev_device *prev, bool enable)
228 {
229         struct isp_device *isp = to_isp_device(prev);
230
231         if (enable)
232                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
233                             ISPPRV_PCR_HMEDEN);
234         else
235                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
236                             ISPPRV_PCR_HMEDEN);
237 }
238
239 /*
240  * preview_config_cfa - Configure CFA Interpolation for Bayer formats
241  *
242  * The CFA table is organised in four blocks, one per Bayer component. The
243  * hardware expects blocks to follow the Bayer order of the input data, while
244  * the driver stores the table in GRBG order in memory. The blocks need to be
245  * reordered to support non-GRBG Bayer patterns.
246  */
247 static void preview_config_cfa(struct isp_prev_device *prev,
248                                const struct prev_params *params)
249 {
250         static const unsigned int cfa_coef_order[4][4] = {
251                 { 0, 1, 2, 3 }, /* GRBG */
252                 { 1, 0, 3, 2 }, /* RGGB */
253                 { 2, 3, 0, 1 }, /* BGGR */
254                 { 3, 2, 1, 0 }, /* GBRG */
255         };
256         const unsigned int *order = cfa_coef_order[prev->params.cfa_order];
257         const struct omap3isp_prev_cfa *cfa = &params->cfa;
258         struct isp_device *isp = to_isp_device(prev);
259         unsigned int i;
260         unsigned int j;
261
262         isp_reg_writel(isp,
263                 (cfa->gradthrs_vert << ISPPRV_CFA_GRADTH_VER_SHIFT) |
264                 (cfa->gradthrs_horz << ISPPRV_CFA_GRADTH_HOR_SHIFT),
265                 OMAP3_ISP_IOMEM_PREV, ISPPRV_CFA);
266
267         isp_reg_writel(isp, ISPPRV_CFA_TABLE_ADDR,
268                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
269
270         for (i = 0; i < 4; ++i) {
271                 const __u32 *block = cfa->table[order[i]];
272
273                 for (j = 0; j < OMAP3ISP_PREV_CFA_BLK_SIZE; ++j)
274                         isp_reg_writel(isp, block[j], OMAP3_ISP_IOMEM_PREV,
275                                        ISPPRV_SET_TBL_DATA);
276         }
277 }
278
279 /*
280  * preview_config_chroma_suppression - Configure Chroma Suppression
281  */
282 static void
283 preview_config_chroma_suppression(struct isp_prev_device *prev,
284                                   const struct prev_params *params)
285 {
286         struct isp_device *isp = to_isp_device(prev);
287         const struct omap3isp_prev_csup *cs = &params->csup;
288
289         isp_reg_writel(isp,
290                        cs->gain | (cs->thres << ISPPRV_CSUP_THRES_SHIFT) |
291                        (cs->hypf_en << ISPPRV_CSUP_HPYF_SHIFT),
292                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CSUP);
293 }
294
295 /*
296  * preview_enable_chroma_suppression - Enable/disable Chrominance Suppression
297  */
298 static void
299 preview_enable_chroma_suppression(struct isp_prev_device *prev, bool enable)
300 {
301         struct isp_device *isp = to_isp_device(prev);
302
303         if (enable)
304                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
305                             ISPPRV_PCR_SUPEN);
306         else
307                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
308                             ISPPRV_PCR_SUPEN);
309 }
310
311 /*
312  * preview_config_whitebalance - Configure White Balance parameters
313  *
314  * Coefficient matrix always with default values.
315  */
316 static void
317 preview_config_whitebalance(struct isp_prev_device *prev,
318                             const struct prev_params *params)
319 {
320         struct isp_device *isp = to_isp_device(prev);
321         const struct omap3isp_prev_wbal *wbal = &params->wbal;
322         u32 val;
323
324         isp_reg_writel(isp, wbal->dgain, OMAP3_ISP_IOMEM_PREV, ISPPRV_WB_DGAIN);
325
326         val = wbal->coef0 << ISPPRV_WBGAIN_COEF0_SHIFT;
327         val |= wbal->coef1 << ISPPRV_WBGAIN_COEF1_SHIFT;
328         val |= wbal->coef2 << ISPPRV_WBGAIN_COEF2_SHIFT;
329         val |= wbal->coef3 << ISPPRV_WBGAIN_COEF3_SHIFT;
330         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_WBGAIN);
331
332         isp_reg_writel(isp,
333                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N0_0_SHIFT |
334                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N0_1_SHIFT |
335                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N0_2_SHIFT |
336                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N0_3_SHIFT |
337                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N1_0_SHIFT |
338                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N1_1_SHIFT |
339                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N1_2_SHIFT |
340                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N1_3_SHIFT |
341                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N2_0_SHIFT |
342                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N2_1_SHIFT |
343                        ISPPRV_WBSEL_COEF0 << ISPPRV_WBSEL_N2_2_SHIFT |
344                        ISPPRV_WBSEL_COEF1 << ISPPRV_WBSEL_N2_3_SHIFT |
345                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N3_0_SHIFT |
346                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N3_1_SHIFT |
347                        ISPPRV_WBSEL_COEF2 << ISPPRV_WBSEL_N3_2_SHIFT |
348                        ISPPRV_WBSEL_COEF3 << ISPPRV_WBSEL_N3_3_SHIFT,
349                        OMAP3_ISP_IOMEM_PREV, ISPPRV_WBSEL);
350 }
351
352 /*
353  * preview_config_blkadj - Configure Black Adjustment
354  */
355 static void
356 preview_config_blkadj(struct isp_prev_device *prev,
357                       const struct prev_params *params)
358 {
359         struct isp_device *isp = to_isp_device(prev);
360         const struct omap3isp_prev_blkadj *blkadj = &params->blkadj;
361
362         isp_reg_writel(isp, (blkadj->blue << ISPPRV_BLKADJOFF_B_SHIFT) |
363                        (blkadj->green << ISPPRV_BLKADJOFF_G_SHIFT) |
364                        (blkadj->red << ISPPRV_BLKADJOFF_R_SHIFT),
365                        OMAP3_ISP_IOMEM_PREV, ISPPRV_BLKADJOFF);
366 }
367
368 /*
369  * preview_config_rgb_blending - Configure RGB-RGB Blending
370  */
371 static void
372 preview_config_rgb_blending(struct isp_prev_device *prev,
373                             const struct prev_params *params)
374 {
375         struct isp_device *isp = to_isp_device(prev);
376         const struct omap3isp_prev_rgbtorgb *rgbrgb = &params->rgb2rgb;
377         u32 val;
378
379         val = (rgbrgb->matrix[0][0] & 0xfff) << ISPPRV_RGB_MAT1_MTX_RR_SHIFT;
380         val |= (rgbrgb->matrix[0][1] & 0xfff) << ISPPRV_RGB_MAT1_MTX_GR_SHIFT;
381         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT1);
382
383         val = (rgbrgb->matrix[0][2] & 0xfff) << ISPPRV_RGB_MAT2_MTX_BR_SHIFT;
384         val |= (rgbrgb->matrix[1][0] & 0xfff) << ISPPRV_RGB_MAT2_MTX_RG_SHIFT;
385         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT2);
386
387         val = (rgbrgb->matrix[1][1] & 0xfff) << ISPPRV_RGB_MAT3_MTX_GG_SHIFT;
388         val |= (rgbrgb->matrix[1][2] & 0xfff) << ISPPRV_RGB_MAT3_MTX_BG_SHIFT;
389         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT3);
390
391         val = (rgbrgb->matrix[2][0] & 0xfff) << ISPPRV_RGB_MAT4_MTX_RB_SHIFT;
392         val |= (rgbrgb->matrix[2][1] & 0xfff) << ISPPRV_RGB_MAT4_MTX_GB_SHIFT;
393         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT4);
394
395         val = (rgbrgb->matrix[2][2] & 0xfff) << ISPPRV_RGB_MAT5_MTX_BB_SHIFT;
396         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_MAT5);
397
398         val = (rgbrgb->offset[0] & 0x3ff) << ISPPRV_RGB_OFF1_MTX_OFFR_SHIFT;
399         val |= (rgbrgb->offset[1] & 0x3ff) << ISPPRV_RGB_OFF1_MTX_OFFG_SHIFT;
400         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_OFF1);
401
402         val = (rgbrgb->offset[2] & 0x3ff) << ISPPRV_RGB_OFF2_MTX_OFFB_SHIFT;
403         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_RGB_OFF2);
404 }
405
406 /*
407  * preview_config_csc - Configure Color Space Conversion (RGB to YCbYCr)
408  */
409 static void
410 preview_config_csc(struct isp_prev_device *prev,
411                    const struct prev_params *params)
412 {
413         struct isp_device *isp = to_isp_device(prev);
414         const struct omap3isp_prev_csc *csc = &params->csc;
415         u32 val;
416
417         val = (csc->matrix[0][0] & 0x3ff) << ISPPRV_CSC0_RY_SHIFT;
418         val |= (csc->matrix[0][1] & 0x3ff) << ISPPRV_CSC0_GY_SHIFT;
419         val |= (csc->matrix[0][2] & 0x3ff) << ISPPRV_CSC0_BY_SHIFT;
420         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC0);
421
422         val = (csc->matrix[1][0] & 0x3ff) << ISPPRV_CSC1_RCB_SHIFT;
423         val |= (csc->matrix[1][1] & 0x3ff) << ISPPRV_CSC1_GCB_SHIFT;
424         val |= (csc->matrix[1][2] & 0x3ff) << ISPPRV_CSC1_BCB_SHIFT;
425         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC1);
426
427         val = (csc->matrix[2][0] & 0x3ff) << ISPPRV_CSC2_RCR_SHIFT;
428         val |= (csc->matrix[2][1] & 0x3ff) << ISPPRV_CSC2_GCR_SHIFT;
429         val |= (csc->matrix[2][2] & 0x3ff) << ISPPRV_CSC2_BCR_SHIFT;
430         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC2);
431
432         val = (csc->offset[0] & 0xff) << ISPPRV_CSC_OFFSET_Y_SHIFT;
433         val |= (csc->offset[1] & 0xff) << ISPPRV_CSC_OFFSET_CB_SHIFT;
434         val |= (csc->offset[2] & 0xff) << ISPPRV_CSC_OFFSET_CR_SHIFT;
435         isp_reg_writel(isp, val, OMAP3_ISP_IOMEM_PREV, ISPPRV_CSC_OFFSET);
436 }
437
438 /*
439  * preview_config_yc_range - Configure the max and min Y and C values
440  */
441 static void
442 preview_config_yc_range(struct isp_prev_device *prev,
443                         const struct prev_params *params)
444 {
445         struct isp_device *isp = to_isp_device(prev);
446         const struct omap3isp_prev_yclimit *yc = &params->yclimit;
447
448         isp_reg_writel(isp,
449                        yc->maxC << ISPPRV_SETUP_YC_MAXC_SHIFT |
450                        yc->maxY << ISPPRV_SETUP_YC_MAXY_SHIFT |
451                        yc->minC << ISPPRV_SETUP_YC_MINC_SHIFT |
452                        yc->minY << ISPPRV_SETUP_YC_MINY_SHIFT,
453                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SETUP_YC);
454 }
455
456 /*
457  * preview_config_dcor - Configure Couplet Defect Correction
458  */
459 static void
460 preview_config_dcor(struct isp_prev_device *prev,
461                     const struct prev_params *params)
462 {
463         struct isp_device *isp = to_isp_device(prev);
464         const struct omap3isp_prev_dcor *dcor = &params->dcor;
465
466         isp_reg_writel(isp, dcor->detect_correct[0],
467                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR0);
468         isp_reg_writel(isp, dcor->detect_correct[1],
469                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR1);
470         isp_reg_writel(isp, dcor->detect_correct[2],
471                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR2);
472         isp_reg_writel(isp, dcor->detect_correct[3],
473                        OMAP3_ISP_IOMEM_PREV, ISPPRV_CDC_THR3);
474         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
475                         ISPPRV_PCR_DCCOUP,
476                         dcor->couplet_mode_en ? ISPPRV_PCR_DCCOUP : 0);
477 }
478
479 /*
480  * preview_enable_dcor - Enable/disable Couplet Defect Correction
481  */
482 static void preview_enable_dcor(struct isp_prev_device *prev, bool enable)
483 {
484         struct isp_device *isp = to_isp_device(prev);
485
486         if (enable)
487                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
488                             ISPPRV_PCR_DCOREN);
489         else
490                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
491                             ISPPRV_PCR_DCOREN);
492 }
493
494 /*
495  * preview_enable_drkframe_capture - Enable/disable Dark Frame Capture
496  */
497 static void
498 preview_enable_drkframe_capture(struct isp_prev_device *prev, bool enable)
499 {
500         struct isp_device *isp = to_isp_device(prev);
501
502         if (enable)
503                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
504                             ISPPRV_PCR_DRKFCAP);
505         else
506                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
507                             ISPPRV_PCR_DRKFCAP);
508 }
509
510 /*
511  * preview_enable_drkframe - Enable/disable Dark Frame Subtraction
512  */
513 static void preview_enable_drkframe(struct isp_prev_device *prev, bool enable)
514 {
515         struct isp_device *isp = to_isp_device(prev);
516
517         if (enable)
518                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
519                             ISPPRV_PCR_DRKFEN);
520         else
521                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
522                             ISPPRV_PCR_DRKFEN);
523 }
524
525 /*
526  * preview_config_noisefilter - Configure the Noise Filter
527  */
528 static void
529 preview_config_noisefilter(struct isp_prev_device *prev,
530                            const struct prev_params *params)
531 {
532         struct isp_device *isp = to_isp_device(prev);
533         const struct omap3isp_prev_nf *nf = &params->nf;
534         unsigned int i;
535
536         isp_reg_writel(isp, nf->spread, OMAP3_ISP_IOMEM_PREV, ISPPRV_NF);
537         isp_reg_writel(isp, ISPPRV_NF_TABLE_ADDR,
538                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
539         for (i = 0; i < OMAP3ISP_PREV_NF_TBL_SIZE; i++) {
540                 isp_reg_writel(isp, nf->table[i],
541                                OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_DATA);
542         }
543 }
544
545 /*
546  * preview_enable_noisefilter - Enable/disable the Noise Filter
547  */
548 static void
549 preview_enable_noisefilter(struct isp_prev_device *prev, bool enable)
550 {
551         struct isp_device *isp = to_isp_device(prev);
552
553         if (enable)
554                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
555                             ISPPRV_PCR_NFEN);
556         else
557                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
558                             ISPPRV_PCR_NFEN);
559 }
560
561 /*
562  * preview_config_gammacorrn - Configure the Gamma Correction tables
563  */
564 static void
565 preview_config_gammacorrn(struct isp_prev_device *prev,
566                           const struct prev_params *params)
567 {
568         struct isp_device *isp = to_isp_device(prev);
569         const struct omap3isp_prev_gtables *gt = &params->gamma;
570         unsigned int i;
571
572         isp_reg_writel(isp, ISPPRV_REDGAMMA_TABLE_ADDR,
573                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
574         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
575                 isp_reg_writel(isp, gt->red[i], OMAP3_ISP_IOMEM_PREV,
576                                ISPPRV_SET_TBL_DATA);
577
578         isp_reg_writel(isp, ISPPRV_GREENGAMMA_TABLE_ADDR,
579                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
580         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
581                 isp_reg_writel(isp, gt->green[i], OMAP3_ISP_IOMEM_PREV,
582                                ISPPRV_SET_TBL_DATA);
583
584         isp_reg_writel(isp, ISPPRV_BLUEGAMMA_TABLE_ADDR,
585                        OMAP3_ISP_IOMEM_PREV, ISPPRV_SET_TBL_ADDR);
586         for (i = 0; i < OMAP3ISP_PREV_GAMMA_TBL_SIZE; i++)
587                 isp_reg_writel(isp, gt->blue[i], OMAP3_ISP_IOMEM_PREV,
588                                ISPPRV_SET_TBL_DATA);
589 }
590
591 /*
592  * preview_enable_gammacorrn - Enable/disable Gamma Correction
593  *
594  * When gamma correction is disabled, the module is bypassed and its output is
595  * the 8 MSB of the 10-bit input .
596  */
597 static void
598 preview_enable_gammacorrn(struct isp_prev_device *prev, bool enable)
599 {
600         struct isp_device *isp = to_isp_device(prev);
601
602         if (enable)
603                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
604                             ISPPRV_PCR_GAMMA_BYPASS);
605         else
606                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
607                             ISPPRV_PCR_GAMMA_BYPASS);
608 }
609
610 /*
611  * preview_config_contrast - Configure the Contrast
612  *
613  * Value should be programmed before enabling the module.
614  */
615 static void
616 preview_config_contrast(struct isp_prev_device *prev,
617                         const struct prev_params *params)
618 {
619         struct isp_device *isp = to_isp_device(prev);
620
621         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_CNT_BRT,
622                         0xff << ISPPRV_CNT_BRT_CNT_SHIFT,
623                         params->contrast << ISPPRV_CNT_BRT_CNT_SHIFT);
624 }
625
626 /*
627  * preview_config_brightness - Configure the Brightness
628  */
629 static void
630 preview_config_brightness(struct isp_prev_device *prev,
631                           const struct prev_params *params)
632 {
633         struct isp_device *isp = to_isp_device(prev);
634
635         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_CNT_BRT,
636                         0xff << ISPPRV_CNT_BRT_BRT_SHIFT,
637                         params->brightness << ISPPRV_CNT_BRT_BRT_SHIFT);
638 }
639
640 /*
641  * preview_update_contrast - Updates the contrast.
642  * @contrast: Pointer to hold the current programmed contrast value.
643  *
644  * Value should be programmed before enabling the module.
645  */
646 static void
647 preview_update_contrast(struct isp_prev_device *prev, u8 contrast)
648 {
649         struct prev_params *params;
650         unsigned long flags;
651
652         spin_lock_irqsave(&prev->params.lock, flags);
653         params = (prev->params.active & OMAP3ISP_PREV_CONTRAST)
654                ? &prev->params.params[0] : &prev->params.params[1];
655
656         if (params->contrast != (contrast * ISPPRV_CONTRAST_UNITS)) {
657                 params->contrast = contrast * ISPPRV_CONTRAST_UNITS;
658                 params->update |= OMAP3ISP_PREV_CONTRAST;
659         }
660         spin_unlock_irqrestore(&prev->params.lock, flags);
661 }
662
663 /*
664  * preview_update_brightness - Updates the brightness in preview module.
665  * @brightness: Pointer to hold the current programmed brightness value.
666  *
667  */
668 static void
669 preview_update_brightness(struct isp_prev_device *prev, u8 brightness)
670 {
671         struct prev_params *params;
672         unsigned long flags;
673
674         spin_lock_irqsave(&prev->params.lock, flags);
675         params = (prev->params.active & OMAP3ISP_PREV_BRIGHTNESS)
676                ? &prev->params.params[0] : &prev->params.params[1];
677
678         if (params->brightness != (brightness * ISPPRV_BRIGHT_UNITS)) {
679                 params->brightness = brightness * ISPPRV_BRIGHT_UNITS;
680                 params->update |= OMAP3ISP_PREV_BRIGHTNESS;
681         }
682         spin_unlock_irqrestore(&prev->params.lock, flags);
683 }
684
685 static u32
686 preview_params_lock(struct isp_prev_device *prev, u32 update, bool shadow)
687 {
688         u32 active = prev->params.active;
689
690         if (shadow) {
691                 /* Mark all shadow parameters we are going to touch as busy. */
692                 prev->params.params[0].busy |= ~active & update;
693                 prev->params.params[1].busy |= active & update;
694         } else {
695                 /* Mark all active parameters we are going to touch as busy. */
696                 update = (prev->params.params[0].update & active)
697                        | (prev->params.params[1].update & ~active);
698
699                 prev->params.params[0].busy |= active & update;
700                 prev->params.params[1].busy |= ~active & update;
701         }
702
703         return update;
704 }
705
706 static void
707 preview_params_unlock(struct isp_prev_device *prev, u32 update, bool shadow)
708 {
709         u32 active = prev->params.active;
710
711         if (shadow) {
712                 /* Set the update flag for shadow parameters that have been
713                  * updated and clear the busy flag for all shadow parameters.
714                  */
715                 prev->params.params[0].update |= (~active & update);
716                 prev->params.params[1].update |= (active & update);
717                 prev->params.params[0].busy &= active;
718                 prev->params.params[1].busy &= ~active;
719         } else {
720                 /* Clear the update flag for active parameters that have been
721                  * applied and the busy flag for all active parameters.
722                  */
723                 prev->params.params[0].update &= ~(active & update);
724                 prev->params.params[1].update &= ~(~active & update);
725                 prev->params.params[0].busy &= ~active;
726                 prev->params.params[1].busy &= active;
727         }
728 }
729
730 static void preview_params_switch(struct isp_prev_device *prev)
731 {
732         u32 to_switch;
733
734         /* Switch active parameters with updated shadow parameters when the
735          * shadow parameter has been updated and neither the active not the
736          * shadow parameter is busy.
737          */
738         to_switch = (prev->params.params[0].update & ~prev->params.active)
739                   | (prev->params.params[1].update & prev->params.active);
740         to_switch &= ~(prev->params.params[0].busy |
741                        prev->params.params[1].busy);
742         if (to_switch == 0)
743                 return;
744
745         prev->params.active ^= to_switch;
746
747         /* Remove the update flag for the shadow copy of parameters we have
748          * switched.
749          */
750         prev->params.params[0].update &= ~(~prev->params.active & to_switch);
751         prev->params.params[1].update &= ~(prev->params.active & to_switch);
752 }
753
754 /* preview parameters update structure */
755 struct preview_update {
756         void (*config)(struct isp_prev_device *, const struct prev_params *);
757         void (*enable)(struct isp_prev_device *, bool);
758         unsigned int param_offset;
759         unsigned int param_size;
760         unsigned int config_offset;
761         bool skip;
762 };
763
764 /* Keep the array indexed by the OMAP3ISP_PREV_* bit number. */
765 static const struct preview_update update_attrs[] = {
766         /* OMAP3ISP_PREV_LUMAENH */ {
767                 preview_config_luma_enhancement,
768                 preview_enable_luma_enhancement,
769                 offsetof(struct prev_params, luma),
770                 FIELD_SIZEOF(struct prev_params, luma),
771                 offsetof(struct omap3isp_prev_update_config, luma),
772         }, /* OMAP3ISP_PREV_INVALAW */ {
773                 NULL,
774                 preview_enable_invalaw,
775         }, /* OMAP3ISP_PREV_HRZ_MED */ {
776                 preview_config_hmed,
777                 preview_enable_hmed,
778                 offsetof(struct prev_params, hmed),
779                 FIELD_SIZEOF(struct prev_params, hmed),
780                 offsetof(struct omap3isp_prev_update_config, hmed),
781         }, /* OMAP3ISP_PREV_CFA */ {
782                 preview_config_cfa,
783                 NULL,
784                 offsetof(struct prev_params, cfa),
785                 FIELD_SIZEOF(struct prev_params, cfa),
786                 offsetof(struct omap3isp_prev_update_config, cfa),
787         }, /* OMAP3ISP_PREV_CHROMA_SUPP */ {
788                 preview_config_chroma_suppression,
789                 preview_enable_chroma_suppression,
790                 offsetof(struct prev_params, csup),
791                 FIELD_SIZEOF(struct prev_params, csup),
792                 offsetof(struct omap3isp_prev_update_config, csup),
793         }, /* OMAP3ISP_PREV_WB */ {
794                 preview_config_whitebalance,
795                 NULL,
796                 offsetof(struct prev_params, wbal),
797                 FIELD_SIZEOF(struct prev_params, wbal),
798                 offsetof(struct omap3isp_prev_update_config, wbal),
799         }, /* OMAP3ISP_PREV_BLKADJ */ {
800                 preview_config_blkadj,
801                 NULL,
802                 offsetof(struct prev_params, blkadj),
803                 FIELD_SIZEOF(struct prev_params, blkadj),
804                 offsetof(struct omap3isp_prev_update_config, blkadj),
805         }, /* OMAP3ISP_PREV_RGB2RGB */ {
806                 preview_config_rgb_blending,
807                 NULL,
808                 offsetof(struct prev_params, rgb2rgb),
809                 FIELD_SIZEOF(struct prev_params, rgb2rgb),
810                 offsetof(struct omap3isp_prev_update_config, rgb2rgb),
811         }, /* OMAP3ISP_PREV_COLOR_CONV */ {
812                 preview_config_csc,
813                 NULL,
814                 offsetof(struct prev_params, csc),
815                 FIELD_SIZEOF(struct prev_params, csc),
816                 offsetof(struct omap3isp_prev_update_config, csc),
817         }, /* OMAP3ISP_PREV_YC_LIMIT */ {
818                 preview_config_yc_range,
819                 NULL,
820                 offsetof(struct prev_params, yclimit),
821                 FIELD_SIZEOF(struct prev_params, yclimit),
822                 offsetof(struct omap3isp_prev_update_config, yclimit),
823         }, /* OMAP3ISP_PREV_DEFECT_COR */ {
824                 preview_config_dcor,
825                 preview_enable_dcor,
826                 offsetof(struct prev_params, dcor),
827                 FIELD_SIZEOF(struct prev_params, dcor),
828                 offsetof(struct omap3isp_prev_update_config, dcor),
829         }, /* Previously OMAP3ISP_PREV_GAMMABYPASS, not used anymore */ {
830                 NULL,
831                 NULL,
832         }, /* OMAP3ISP_PREV_DRK_FRM_CAPTURE */ {
833                 NULL,
834                 preview_enable_drkframe_capture,
835         }, /* OMAP3ISP_PREV_DRK_FRM_SUBTRACT */ {
836                 NULL,
837                 preview_enable_drkframe,
838         }, /* OMAP3ISP_PREV_LENS_SHADING */ {
839                 NULL,
840                 preview_enable_drkframe,
841         }, /* OMAP3ISP_PREV_NF */ {
842                 preview_config_noisefilter,
843                 preview_enable_noisefilter,
844                 offsetof(struct prev_params, nf),
845                 FIELD_SIZEOF(struct prev_params, nf),
846                 offsetof(struct omap3isp_prev_update_config, nf),
847         }, /* OMAP3ISP_PREV_GAMMA */ {
848                 preview_config_gammacorrn,
849                 preview_enable_gammacorrn,
850                 offsetof(struct prev_params, gamma),
851                 FIELD_SIZEOF(struct prev_params, gamma),
852                 offsetof(struct omap3isp_prev_update_config, gamma),
853         }, /* OMAP3ISP_PREV_CONTRAST */ {
854                 preview_config_contrast,
855                 NULL,
856                 0, 0, 0, true,
857         }, /* OMAP3ISP_PREV_BRIGHTNESS */ {
858                 preview_config_brightness,
859                 NULL,
860                 0, 0, 0, true,
861         },
862 };
863
864 /*
865  * preview_config - Copy and update local structure with userspace preview
866  *                  configuration.
867  * @prev: ISP preview engine
868  * @cfg: Configuration
869  *
870  * Return zero if success or -EFAULT if the configuration can't be copied from
871  * userspace.
872  */
873 static int preview_config(struct isp_prev_device *prev,
874                           struct omap3isp_prev_update_config *cfg)
875 {
876         unsigned long flags;
877         unsigned int i;
878         int rval = 0;
879         u32 update;
880         u32 active;
881
882         if (cfg->update == 0)
883                 return 0;
884
885         /* Mark the shadow parameters we're going to update as busy. */
886         spin_lock_irqsave(&prev->params.lock, flags);
887         preview_params_lock(prev, cfg->update, true);
888         active = prev->params.active;
889         spin_unlock_irqrestore(&prev->params.lock, flags);
890
891         update = 0;
892
893         for (i = 0; i < ARRAY_SIZE(update_attrs); i++) {
894                 const struct preview_update *attr = &update_attrs[i];
895                 struct prev_params *params;
896                 unsigned int bit = 1 << i;
897
898                 if (attr->skip || !(cfg->update & bit))
899                         continue;
900
901                 params = &prev->params.params[!!(active & bit)];
902
903                 if (cfg->flag & bit) {
904                         void __user *from = *(void * __user *)
905                                 ((void *)cfg + attr->config_offset);
906                         void *to = (void *)params + attr->param_offset;
907                         size_t size = attr->param_size;
908
909                         if (to && from && size) {
910                                 if (copy_from_user(to, from, size)) {
911                                         rval = -EFAULT;
912                                         break;
913                                 }
914                         }
915                         params->features |= bit;
916                 } else {
917                         params->features &= ~bit;
918                 }
919
920                 update |= bit;
921         }
922
923         spin_lock_irqsave(&prev->params.lock, flags);
924         preview_params_unlock(prev, update, true);
925         preview_params_switch(prev);
926         spin_unlock_irqrestore(&prev->params.lock, flags);
927
928         return rval;
929 }
930
931 /*
932  * preview_setup_hw - Setup preview registers and/or internal memory
933  * @prev: pointer to preview private structure
934  * @update: Bitmask of parameters to setup
935  * @active: Bitmask of parameters active in set 0
936  * Note: can be called from interrupt context
937  * Return none
938  */
939 static void preview_setup_hw(struct isp_prev_device *prev, u32 update,
940                              u32 active)
941 {
942         unsigned int i;
943         u32 features;
944
945         if (update == 0)
946                 return;
947
948         features = (prev->params.params[0].features & active)
949                  | (prev->params.params[1].features & ~active);
950
951         for (i = 0; i < ARRAY_SIZE(update_attrs); i++) {
952                 const struct preview_update *attr = &update_attrs[i];
953                 struct prev_params *params;
954                 unsigned int bit = 1 << i;
955
956                 if (!(update & bit))
957                         continue;
958
959                 params = &prev->params.params[!(active & bit)];
960
961                 if (params->features & bit) {
962                         if (attr->config)
963                                 attr->config(prev, params);
964                         if (attr->enable)
965                                 attr->enable(prev, true);
966                 } else {
967                         if (attr->enable)
968                                 attr->enable(prev, false);
969                 }
970         }
971 }
972
973 /*
974  * preview_config_ycpos - Configure byte layout of YUV image.
975  * @mode: Indicates the required byte layout.
976  */
977 static void
978 preview_config_ycpos(struct isp_prev_device *prev,
979                      enum v4l2_mbus_pixelcode pixelcode)
980 {
981         struct isp_device *isp = to_isp_device(prev);
982         enum preview_ycpos_mode mode;
983
984         switch (pixelcode) {
985         case V4L2_MBUS_FMT_YUYV8_1X16:
986                 mode = YCPOS_CrYCbY;
987                 break;
988         case V4L2_MBUS_FMT_UYVY8_1X16:
989                 mode = YCPOS_YCrYCb;
990                 break;
991         default:
992                 return;
993         }
994
995         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
996                         ISPPRV_PCR_YCPOS_CrYCbY,
997                         mode << ISPPRV_PCR_YCPOS_SHIFT);
998 }
999
1000 /*
1001  * preview_config_averager - Enable / disable / configure averager
1002  * @average: Average value to be configured.
1003  */
1004 static void preview_config_averager(struct isp_prev_device *prev, u8 average)
1005 {
1006         struct isp_device *isp = to_isp_device(prev);
1007
1008         isp_reg_writel(isp, ISPPRV_AVE_EVENDIST_2 << ISPPRV_AVE_EVENDIST_SHIFT |
1009                        ISPPRV_AVE_ODDDIST_2 << ISPPRV_AVE_ODDDIST_SHIFT |
1010                        average, OMAP3_ISP_IOMEM_PREV, ISPPRV_AVE);
1011 }
1012
1013
1014 /*
1015  * preview_config_input_format - Configure the input format
1016  * @prev: The preview engine
1017  * @format: Format on the preview engine sink pad
1018  *
1019  * Enable and configure CFA interpolation for Bayer formats and disable it for
1020  * greyscale formats.
1021  *
1022  * The CFA table is organised in four blocks, one per Bayer component. The
1023  * hardware expects blocks to follow the Bayer order of the input data, while
1024  * the driver stores the table in GRBG order in memory. The blocks need to be
1025  * reordered to support non-GRBG Bayer patterns.
1026  */
1027 static void preview_config_input_format(struct isp_prev_device *prev,
1028                                         const struct v4l2_mbus_framefmt *format)
1029 {
1030         struct isp_device *isp = to_isp_device(prev);
1031         struct prev_params *params;
1032
1033         switch (format->code) {
1034         case V4L2_MBUS_FMT_SGRBG10_1X10:
1035                 prev->params.cfa_order = 0;
1036                 break;
1037         case V4L2_MBUS_FMT_SRGGB10_1X10:
1038                 prev->params.cfa_order = 1;
1039                 break;
1040         case V4L2_MBUS_FMT_SBGGR10_1X10:
1041                 prev->params.cfa_order = 2;
1042                 break;
1043         case V4L2_MBUS_FMT_SGBRG10_1X10:
1044                 prev->params.cfa_order = 3;
1045                 break;
1046         default:
1047                 /* Disable CFA for non-Bayer formats. */
1048                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1049                             ISPPRV_PCR_CFAEN);
1050                 return;
1051         }
1052
1053         isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR, ISPPRV_PCR_CFAEN);
1054         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1055                         ISPPRV_PCR_CFAFMT_MASK, ISPPRV_PCR_CFAFMT_BAYER);
1056
1057         params = (prev->params.active & OMAP3ISP_PREV_CFA)
1058                ? &prev->params.params[0] : &prev->params.params[1];
1059
1060         preview_config_cfa(prev, params);
1061 }
1062
1063 /*
1064  * preview_config_input_size - Configure the input frame size
1065  *
1066  * The preview engine crops several rows and columns internally depending on
1067  * which processing blocks are enabled. The driver assumes all those blocks are
1068  * enabled when reporting source pad formats to userspace. If this assumption is
1069  * not true, rows and columns must be manually cropped at the preview engine
1070  * input to avoid overflows at the end of lines and frames.
1071  *
1072  * See the explanation at the PREV_MARGIN_* definitions for more details.
1073  */
1074 static void preview_config_input_size(struct isp_prev_device *prev, u32 active)
1075 {
1076         const struct v4l2_mbus_framefmt *format = &prev->formats[PREV_PAD_SINK];
1077         struct isp_device *isp = to_isp_device(prev);
1078         unsigned int sph = prev->crop.left;
1079         unsigned int eph = prev->crop.left + prev->crop.width - 1;
1080         unsigned int slv = prev->crop.top;
1081         unsigned int elv = prev->crop.top + prev->crop.height - 1;
1082         u32 features;
1083
1084         if (format->code != V4L2_MBUS_FMT_Y10_1X10) {
1085                 sph -= 2;
1086                 eph += 2;
1087                 slv -= 2;
1088                 elv += 2;
1089         }
1090
1091         features = (prev->params.params[0].features & active)
1092                  | (prev->params.params[1].features & ~active);
1093
1094         if (features & (OMAP3ISP_PREV_DEFECT_COR | OMAP3ISP_PREV_NF)) {
1095                 sph -= 2;
1096                 eph += 2;
1097                 slv -= 2;
1098                 elv += 2;
1099         }
1100         if (features & OMAP3ISP_PREV_HRZ_MED) {
1101                 sph -= 2;
1102                 eph += 2;
1103         }
1104         if (features & (OMAP3ISP_PREV_CHROMA_SUPP | OMAP3ISP_PREV_LUMAENH))
1105                 sph -= 2;
1106
1107         isp_reg_writel(isp, (sph << ISPPRV_HORZ_INFO_SPH_SHIFT) | eph,
1108                        OMAP3_ISP_IOMEM_PREV, ISPPRV_HORZ_INFO);
1109         isp_reg_writel(isp, (slv << ISPPRV_VERT_INFO_SLV_SHIFT) | elv,
1110                        OMAP3_ISP_IOMEM_PREV, ISPPRV_VERT_INFO);
1111 }
1112
1113 /*
1114  * preview_config_inlineoffset - Configures the Read address line offset.
1115  * @prev: Preview module
1116  * @offset: Line offset
1117  *
1118  * According to the TRM, the line offset must be aligned on a 32 bytes boundary.
1119  * However, a hardware bug requires the memory start address to be aligned on a
1120  * 64 bytes boundary, so the offset probably should be aligned on 64 bytes as
1121  * well.
1122  */
1123 static void
1124 preview_config_inlineoffset(struct isp_prev_device *prev, u32 offset)
1125 {
1126         struct isp_device *isp = to_isp_device(prev);
1127
1128         isp_reg_writel(isp, offset & 0xffff, OMAP3_ISP_IOMEM_PREV,
1129                        ISPPRV_RADR_OFFSET);
1130 }
1131
1132 /*
1133  * preview_set_inaddr - Sets memory address of input frame.
1134  * @addr: 32bit memory address aligned on 32byte boundary.
1135  *
1136  * Configures the memory address from which the input frame is to be read.
1137  */
1138 static void preview_set_inaddr(struct isp_prev_device *prev, u32 addr)
1139 {
1140         struct isp_device *isp = to_isp_device(prev);
1141
1142         isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_PREV, ISPPRV_RSDR_ADDR);
1143 }
1144
1145 /*
1146  * preview_config_outlineoffset - Configures the Write address line offset.
1147  * @offset: Line Offset for the preview output.
1148  *
1149  * The offset must be a multiple of 32 bytes.
1150  */
1151 static void preview_config_outlineoffset(struct isp_prev_device *prev,
1152                                     u32 offset)
1153 {
1154         struct isp_device *isp = to_isp_device(prev);
1155
1156         isp_reg_writel(isp, offset & 0xffff, OMAP3_ISP_IOMEM_PREV,
1157                        ISPPRV_WADD_OFFSET);
1158 }
1159
1160 /*
1161  * preview_set_outaddr - Sets the memory address to store output frame
1162  * @addr: 32bit memory address aligned on 32byte boundary.
1163  *
1164  * Configures the memory address to which the output frame is written.
1165  */
1166 static void preview_set_outaddr(struct isp_prev_device *prev, u32 addr)
1167 {
1168         struct isp_device *isp = to_isp_device(prev);
1169
1170         isp_reg_writel(isp, addr, OMAP3_ISP_IOMEM_PREV, ISPPRV_WSDR_ADDR);
1171 }
1172
1173 static void preview_adjust_bandwidth(struct isp_prev_device *prev)
1174 {
1175         struct isp_pipeline *pipe = to_isp_pipeline(&prev->subdev.entity);
1176         struct isp_device *isp = to_isp_device(prev);
1177         const struct v4l2_mbus_framefmt *ifmt = &prev->formats[PREV_PAD_SINK];
1178         unsigned long l3_ick = pipe->l3_ick;
1179         struct v4l2_fract *timeperframe;
1180         unsigned int cycles_per_frame;
1181         unsigned int requests_per_frame;
1182         unsigned int cycles_per_request;
1183         unsigned int minimum;
1184         unsigned int maximum;
1185         unsigned int value;
1186
1187         if (prev->input != PREVIEW_INPUT_MEMORY) {
1188                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
1189                             ISPSBL_SDR_REQ_PRV_EXP_MASK);
1190                 return;
1191         }
1192
1193         /* Compute the minimum number of cycles per request, based on the
1194          * pipeline maximum data rate. This is an absolute lower bound if we
1195          * don't want SBL overflows, so round the value up.
1196          */
1197         cycles_per_request = div_u64((u64)l3_ick / 2 * 256 + pipe->max_rate - 1,
1198                                      pipe->max_rate);
1199         minimum = DIV_ROUND_UP(cycles_per_request, 32);
1200
1201         /* Compute the maximum number of cycles per request, based on the
1202          * requested frame rate. This is a soft upper bound to achieve a frame
1203          * rate equal or higher than the requested value, so round the value
1204          * down.
1205          */
1206         timeperframe = &pipe->max_timeperframe;
1207
1208         requests_per_frame = DIV_ROUND_UP(ifmt->width * 2, 256) * ifmt->height;
1209         cycles_per_frame = div_u64((u64)l3_ick * timeperframe->numerator,
1210                                    timeperframe->denominator);
1211         cycles_per_request = cycles_per_frame / requests_per_frame;
1212
1213         maximum = cycles_per_request / 32;
1214
1215         value = max(minimum, maximum);
1216
1217         dev_dbg(isp->dev, "%s: cycles per request = %u\n", __func__, value);
1218         isp_reg_clr_set(isp, OMAP3_ISP_IOMEM_SBL, ISPSBL_SDR_REQ_EXP,
1219                         ISPSBL_SDR_REQ_PRV_EXP_MASK,
1220                         value << ISPSBL_SDR_REQ_PRV_EXP_SHIFT);
1221 }
1222
1223 /*
1224  * omap3isp_preview_busy - Gets busy state of preview module.
1225  */
1226 int omap3isp_preview_busy(struct isp_prev_device *prev)
1227 {
1228         struct isp_device *isp = to_isp_device(prev);
1229
1230         return isp_reg_readl(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR)
1231                 & ISPPRV_PCR_BUSY;
1232 }
1233
1234 /*
1235  * omap3isp_preview_restore_context - Restores the values of preview registers
1236  */
1237 void omap3isp_preview_restore_context(struct isp_device *isp)
1238 {
1239         struct isp_prev_device *prev = &isp->isp_prev;
1240         const u32 update = OMAP3ISP_PREV_FEATURES_END - 1;
1241
1242         prev->params.params[0].update = prev->params.active & update;
1243         prev->params.params[1].update = ~prev->params.active & update;
1244
1245         preview_setup_hw(prev, update, prev->params.active);
1246
1247         prev->params.params[0].update = 0;
1248         prev->params.params[1].update = 0;
1249 }
1250
1251 /*
1252  * preview_print_status - Dump preview module registers to the kernel log
1253  */
1254 #define PREV_PRINT_REGISTER(isp, name)\
1255         dev_dbg(isp->dev, "###PRV " #name "=0x%08x\n", \
1256                 isp_reg_readl(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_##name))
1257
1258 static void preview_print_status(struct isp_prev_device *prev)
1259 {
1260         struct isp_device *isp = to_isp_device(prev);
1261
1262         dev_dbg(isp->dev, "-------------Preview Register dump----------\n");
1263
1264         PREV_PRINT_REGISTER(isp, PCR);
1265         PREV_PRINT_REGISTER(isp, HORZ_INFO);
1266         PREV_PRINT_REGISTER(isp, VERT_INFO);
1267         PREV_PRINT_REGISTER(isp, RSDR_ADDR);
1268         PREV_PRINT_REGISTER(isp, RADR_OFFSET);
1269         PREV_PRINT_REGISTER(isp, DSDR_ADDR);
1270         PREV_PRINT_REGISTER(isp, DRKF_OFFSET);
1271         PREV_PRINT_REGISTER(isp, WSDR_ADDR);
1272         PREV_PRINT_REGISTER(isp, WADD_OFFSET);
1273         PREV_PRINT_REGISTER(isp, AVE);
1274         PREV_PRINT_REGISTER(isp, HMED);
1275         PREV_PRINT_REGISTER(isp, NF);
1276         PREV_PRINT_REGISTER(isp, WB_DGAIN);
1277         PREV_PRINT_REGISTER(isp, WBGAIN);
1278         PREV_PRINT_REGISTER(isp, WBSEL);
1279         PREV_PRINT_REGISTER(isp, CFA);
1280         PREV_PRINT_REGISTER(isp, BLKADJOFF);
1281         PREV_PRINT_REGISTER(isp, RGB_MAT1);
1282         PREV_PRINT_REGISTER(isp, RGB_MAT2);
1283         PREV_PRINT_REGISTER(isp, RGB_MAT3);
1284         PREV_PRINT_REGISTER(isp, RGB_MAT4);
1285         PREV_PRINT_REGISTER(isp, RGB_MAT5);
1286         PREV_PRINT_REGISTER(isp, RGB_OFF1);
1287         PREV_PRINT_REGISTER(isp, RGB_OFF2);
1288         PREV_PRINT_REGISTER(isp, CSC0);
1289         PREV_PRINT_REGISTER(isp, CSC1);
1290         PREV_PRINT_REGISTER(isp, CSC2);
1291         PREV_PRINT_REGISTER(isp, CSC_OFFSET);
1292         PREV_PRINT_REGISTER(isp, CNT_BRT);
1293         PREV_PRINT_REGISTER(isp, CSUP);
1294         PREV_PRINT_REGISTER(isp, SETUP_YC);
1295         PREV_PRINT_REGISTER(isp, SET_TBL_ADDR);
1296         PREV_PRINT_REGISTER(isp, CDC_THR0);
1297         PREV_PRINT_REGISTER(isp, CDC_THR1);
1298         PREV_PRINT_REGISTER(isp, CDC_THR2);
1299         PREV_PRINT_REGISTER(isp, CDC_THR3);
1300
1301         dev_dbg(isp->dev, "--------------------------------------------\n");
1302 }
1303
1304 /*
1305  * preview_init_params - init image processing parameters.
1306  * @prev: pointer to previewer private structure
1307  */
1308 static void preview_init_params(struct isp_prev_device *prev)
1309 {
1310         struct prev_params *params;
1311         unsigned int i;
1312
1313         spin_lock_init(&prev->params.lock);
1314
1315         prev->params.active = ~0;
1316         prev->params.params[0].busy = 0;
1317         prev->params.params[0].update = OMAP3ISP_PREV_FEATURES_END - 1;
1318         prev->params.params[1].busy = 0;
1319         prev->params.params[1].update = 0;
1320
1321         params = &prev->params.params[0];
1322
1323         /* Init values */
1324         params->contrast = ISPPRV_CONTRAST_DEF * ISPPRV_CONTRAST_UNITS;
1325         params->brightness = ISPPRV_BRIGHT_DEF * ISPPRV_BRIGHT_UNITS;
1326         params->cfa.format = OMAP3ISP_CFAFMT_BAYER;
1327         memcpy(params->cfa.table, cfa_coef_table,
1328                sizeof(params->cfa.table));
1329         params->cfa.gradthrs_horz = FLR_CFA_GRADTHRS_HORZ;
1330         params->cfa.gradthrs_vert = FLR_CFA_GRADTHRS_VERT;
1331         params->csup.gain = FLR_CSUP_GAIN;
1332         params->csup.thres = FLR_CSUP_THRES;
1333         params->csup.hypf_en = 0;
1334         memcpy(params->luma.table, luma_enhance_table,
1335                sizeof(params->luma.table));
1336         params->nf.spread = FLR_NF_STRGTH;
1337         memcpy(params->nf.table, noise_filter_table, sizeof(params->nf.table));
1338         params->dcor.couplet_mode_en = 1;
1339         for (i = 0; i < OMAP3ISP_PREV_DETECT_CORRECT_CHANNELS; i++)
1340                 params->dcor.detect_correct[i] = DEF_DETECT_CORRECT_VAL;
1341         memcpy(params->gamma.blue, gamma_table, sizeof(params->gamma.blue));
1342         memcpy(params->gamma.green, gamma_table, sizeof(params->gamma.green));
1343         memcpy(params->gamma.red, gamma_table, sizeof(params->gamma.red));
1344         params->wbal.dgain = FLR_WBAL_DGAIN;
1345         params->wbal.coef0 = FLR_WBAL_COEF;
1346         params->wbal.coef1 = FLR_WBAL_COEF;
1347         params->wbal.coef2 = FLR_WBAL_COEF;
1348         params->wbal.coef3 = FLR_WBAL_COEF;
1349         params->blkadj.red = FLR_BLKADJ_RED;
1350         params->blkadj.green = FLR_BLKADJ_GREEN;
1351         params->blkadj.blue = FLR_BLKADJ_BLUE;
1352         params->rgb2rgb = flr_rgb2rgb;
1353         params->csc = flr_prev_csc;
1354         params->yclimit.minC = ISPPRV_YC_MIN;
1355         params->yclimit.maxC = ISPPRV_YC_MAX;
1356         params->yclimit.minY = ISPPRV_YC_MIN;
1357         params->yclimit.maxY = ISPPRV_YC_MAX;
1358
1359         params->features = OMAP3ISP_PREV_CFA | OMAP3ISP_PREV_DEFECT_COR
1360                          | OMAP3ISP_PREV_NF | OMAP3ISP_PREV_GAMMA
1361                          | OMAP3ISP_PREV_BLKADJ | OMAP3ISP_PREV_YC_LIMIT
1362                          | OMAP3ISP_PREV_RGB2RGB | OMAP3ISP_PREV_COLOR_CONV
1363                          | OMAP3ISP_PREV_WB | OMAP3ISP_PREV_BRIGHTNESS
1364                          | OMAP3ISP_PREV_CONTRAST;
1365 }
1366
1367 /*
1368  * preview_max_out_width - Handle previewer hardware ouput limitations
1369  * @isp_revision : ISP revision
1370  * returns maximum width output for current isp revision
1371  */
1372 static unsigned int preview_max_out_width(struct isp_prev_device *prev)
1373 {
1374         struct isp_device *isp = to_isp_device(prev);
1375
1376         switch (isp->revision) {
1377         case ISP_REVISION_1_0:
1378                 return PREV_MAX_OUT_WIDTH_REV_1;
1379
1380         case ISP_REVISION_2_0:
1381         default:
1382                 return PREV_MAX_OUT_WIDTH_REV_2;
1383
1384         case ISP_REVISION_15_0:
1385                 return PREV_MAX_OUT_WIDTH_REV_15;
1386         }
1387 }
1388
1389 static void preview_configure(struct isp_prev_device *prev)
1390 {
1391         struct isp_device *isp = to_isp_device(prev);
1392         struct v4l2_mbus_framefmt *format;
1393         unsigned long flags;
1394         u32 update;
1395         u32 active;
1396
1397         spin_lock_irqsave(&prev->params.lock, flags);
1398         /* Mark all active parameters we are going to touch as busy. */
1399         update = preview_params_lock(prev, 0, false);
1400         active = prev->params.active;
1401         spin_unlock_irqrestore(&prev->params.lock, flags);
1402
1403         /* PREV_PAD_SINK */
1404         format = &prev->formats[PREV_PAD_SINK];
1405
1406         preview_adjust_bandwidth(prev);
1407
1408         preview_config_input_format(prev, format);
1409         preview_config_input_size(prev, active);
1410
1411         if (prev->input == PREVIEW_INPUT_CCDC)
1412                 preview_config_inlineoffset(prev, 0);
1413         else
1414                 preview_config_inlineoffset(prev,
1415                                 ALIGN(format->width, 0x20) * 2);
1416
1417         preview_setup_hw(prev, update, active);
1418
1419         /* PREV_PAD_SOURCE */
1420         format = &prev->formats[PREV_PAD_SOURCE];
1421
1422         if (prev->output & PREVIEW_OUTPUT_MEMORY)
1423                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1424                             ISPPRV_PCR_SDRPORT);
1425         else
1426                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1427                             ISPPRV_PCR_SDRPORT);
1428
1429         if (prev->output & PREVIEW_OUTPUT_RESIZER)
1430                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1431                             ISPPRV_PCR_RSZPORT);
1432         else
1433                 isp_reg_clr(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1434                             ISPPRV_PCR_RSZPORT);
1435
1436         if (prev->output & PREVIEW_OUTPUT_MEMORY)
1437                 preview_config_outlineoffset(prev,
1438                                 ALIGN(format->width, 0x10) * 2);
1439
1440         preview_config_averager(prev, 0);
1441         preview_config_ycpos(prev, format->code);
1442
1443         spin_lock_irqsave(&prev->params.lock, flags);
1444         preview_params_unlock(prev, update, false);
1445         spin_unlock_irqrestore(&prev->params.lock, flags);
1446 }
1447
1448 /* -----------------------------------------------------------------------------
1449  * Interrupt handling
1450  */
1451
1452 static void preview_enable_oneshot(struct isp_prev_device *prev)
1453 {
1454         struct isp_device *isp = to_isp_device(prev);
1455
1456         /* The PCR.SOURCE bit is automatically reset to 0 when the PCR.ENABLE
1457          * bit is set. As the preview engine is used in single-shot mode, we
1458          * need to set PCR.SOURCE before enabling the preview engine.
1459          */
1460         if (prev->input == PREVIEW_INPUT_MEMORY)
1461                 isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1462                             ISPPRV_PCR_SOURCE);
1463
1464         isp_reg_set(isp, OMAP3_ISP_IOMEM_PREV, ISPPRV_PCR,
1465                     ISPPRV_PCR_EN | ISPPRV_PCR_ONESHOT);
1466 }
1467
1468 void omap3isp_preview_isr_frame_sync(struct isp_prev_device *prev)
1469 {
1470         /*
1471          * If ISP_VIDEO_DMAQUEUE_QUEUED is set, DMA queue had an underrun
1472          * condition, the module was paused and now we have a buffer queued
1473          * on the output again. Restart the pipeline if running in continuous
1474          * mode.
1475          */
1476         if (prev->state == ISP_PIPELINE_STREAM_CONTINUOUS &&
1477             prev->video_out.dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED) {
1478                 preview_enable_oneshot(prev);
1479                 isp_video_dmaqueue_flags_clr(&prev->video_out);
1480         }
1481 }
1482
1483 static void preview_isr_buffer(struct isp_prev_device *prev)
1484 {
1485         struct isp_pipeline *pipe = to_isp_pipeline(&prev->subdev.entity);
1486         struct isp_buffer *buffer;
1487         int restart = 0;
1488
1489         if (prev->input == PREVIEW_INPUT_MEMORY) {
1490                 buffer = omap3isp_video_buffer_next(&prev->video_in);
1491                 if (buffer != NULL)
1492                         preview_set_inaddr(prev, buffer->isp_addr);
1493                 pipe->state |= ISP_PIPELINE_IDLE_INPUT;
1494         }
1495
1496         if (prev->output & PREVIEW_OUTPUT_MEMORY) {
1497                 buffer = omap3isp_video_buffer_next(&prev->video_out);
1498                 if (buffer != NULL) {
1499                         preview_set_outaddr(prev, buffer->isp_addr);
1500                         restart = 1;
1501                 }
1502                 pipe->state |= ISP_PIPELINE_IDLE_OUTPUT;
1503         }
1504
1505         switch (prev->state) {
1506         case ISP_PIPELINE_STREAM_SINGLESHOT:
1507                 if (isp_pipeline_ready(pipe))
1508                         omap3isp_pipeline_set_stream(pipe,
1509                                                 ISP_PIPELINE_STREAM_SINGLESHOT);
1510                 break;
1511
1512         case ISP_PIPELINE_STREAM_CONTINUOUS:
1513                 /* If an underrun occurs, the video queue operation handler will
1514                  * restart the preview engine. Otherwise restart it immediately.
1515                  */
1516                 if (restart)
1517                         preview_enable_oneshot(prev);
1518                 break;
1519
1520         case ISP_PIPELINE_STREAM_STOPPED:
1521         default:
1522                 return;
1523         }
1524 }
1525
1526 /*
1527  * omap3isp_preview_isr - ISP preview engine interrupt handler
1528  *
1529  * Manage the preview engine video buffers and configure shadowed registers.
1530  */
1531 void omap3isp_preview_isr(struct isp_prev_device *prev)
1532 {
1533         unsigned long flags;
1534         u32 update;
1535         u32 active;
1536
1537         if (omap3isp_module_sync_is_stopping(&prev->wait, &prev->stopping))
1538                 return;
1539
1540         spin_lock_irqsave(&prev->params.lock, flags);
1541         preview_params_switch(prev);
1542         update = preview_params_lock(prev, 0, false);
1543         active = prev->params.active;
1544         spin_unlock_irqrestore(&prev->params.lock, flags);
1545
1546         preview_setup_hw(prev, update, active);
1547         preview_config_input_size(prev, active);
1548
1549         if (prev->input == PREVIEW_INPUT_MEMORY ||
1550             prev->output & PREVIEW_OUTPUT_MEMORY)
1551                 preview_isr_buffer(prev);
1552         else if (prev->state == ISP_PIPELINE_STREAM_CONTINUOUS)
1553                 preview_enable_oneshot(prev);
1554
1555         spin_lock_irqsave(&prev->params.lock, flags);
1556         preview_params_unlock(prev, update, false);
1557         spin_unlock_irqrestore(&prev->params.lock, flags);
1558 }
1559
1560 /* -----------------------------------------------------------------------------
1561  * ISP video operations
1562  */
1563
1564 static int preview_video_queue(struct isp_video *video,
1565                                struct isp_buffer *buffer)
1566 {
1567         struct isp_prev_device *prev = &video->isp->isp_prev;
1568
1569         if (video->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
1570                 preview_set_inaddr(prev, buffer->isp_addr);
1571
1572         if (video->type == V4L2_BUF_TYPE_VIDEO_CAPTURE)
1573                 preview_set_outaddr(prev, buffer->isp_addr);
1574
1575         return 0;
1576 }
1577
1578 static const struct isp_video_operations preview_video_ops = {
1579         .queue = preview_video_queue,
1580 };
1581
1582 /* -----------------------------------------------------------------------------
1583  * V4L2 subdev operations
1584  */
1585
1586 /*
1587  * preview_s_ctrl - Handle set control subdev method
1588  * @ctrl: pointer to v4l2 control structure
1589  */
1590 static int preview_s_ctrl(struct v4l2_ctrl *ctrl)
1591 {
1592         struct isp_prev_device *prev =
1593                 container_of(ctrl->handler, struct isp_prev_device, ctrls);
1594
1595         switch (ctrl->id) {
1596         case V4L2_CID_BRIGHTNESS:
1597                 preview_update_brightness(prev, ctrl->val);
1598                 break;
1599         case V4L2_CID_CONTRAST:
1600                 preview_update_contrast(prev, ctrl->val);
1601                 break;
1602         }
1603
1604         return 0;
1605 }
1606
1607 static const struct v4l2_ctrl_ops preview_ctrl_ops = {
1608         .s_ctrl = preview_s_ctrl,
1609 };
1610
1611 /*
1612  * preview_ioctl - Handle preview module private ioctl's
1613  * @prev: pointer to preview context structure
1614  * @cmd: configuration command
1615  * @arg: configuration argument
1616  * return -EINVAL or zero on success
1617  */
1618 static long preview_ioctl(struct v4l2_subdev *sd, unsigned int cmd, void *arg)
1619 {
1620         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1621
1622         switch (cmd) {
1623         case VIDIOC_OMAP3ISP_PRV_CFG:
1624                 return preview_config(prev, arg);
1625
1626         default:
1627                 return -ENOIOCTLCMD;
1628         }
1629 }
1630
1631 /*
1632  * preview_set_stream - Enable/Disable streaming on preview subdev
1633  * @sd    : pointer to v4l2 subdev structure
1634  * @enable: 1 == Enable, 0 == Disable
1635  * return -EINVAL or zero on success
1636  */
1637 static int preview_set_stream(struct v4l2_subdev *sd, int enable)
1638 {
1639         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1640         struct isp_video *video_out = &prev->video_out;
1641         struct isp_device *isp = to_isp_device(prev);
1642         struct device *dev = to_device(prev);
1643
1644         if (prev->state == ISP_PIPELINE_STREAM_STOPPED) {
1645                 if (enable == ISP_PIPELINE_STREAM_STOPPED)
1646                         return 0;
1647
1648                 omap3isp_subclk_enable(isp, OMAP3_ISP_SUBCLK_PREVIEW);
1649                 preview_configure(prev);
1650                 atomic_set(&prev->stopping, 0);
1651                 preview_print_status(prev);
1652         }
1653
1654         switch (enable) {
1655         case ISP_PIPELINE_STREAM_CONTINUOUS:
1656                 if (prev->output & PREVIEW_OUTPUT_MEMORY)
1657                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1658
1659                 if (video_out->dmaqueue_flags & ISP_VIDEO_DMAQUEUE_QUEUED ||
1660                     !(prev->output & PREVIEW_OUTPUT_MEMORY))
1661                         preview_enable_oneshot(prev);
1662
1663                 isp_video_dmaqueue_flags_clr(video_out);
1664                 break;
1665
1666         case ISP_PIPELINE_STREAM_SINGLESHOT:
1667                 if (prev->input == PREVIEW_INPUT_MEMORY)
1668                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_READ);
1669                 if (prev->output & PREVIEW_OUTPUT_MEMORY)
1670                         omap3isp_sbl_enable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1671
1672                 preview_enable_oneshot(prev);
1673                 break;
1674
1675         case ISP_PIPELINE_STREAM_STOPPED:
1676                 if (omap3isp_module_sync_idle(&sd->entity, &prev->wait,
1677                                               &prev->stopping))
1678                         dev_dbg(dev, "%s: stop timeout.\n", sd->name);
1679                 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_PREVIEW_READ);
1680                 omap3isp_sbl_disable(isp, OMAP3_ISP_SBL_PREVIEW_WRITE);
1681                 omap3isp_subclk_disable(isp, OMAP3_ISP_SUBCLK_PREVIEW);
1682                 isp_video_dmaqueue_flags_clr(video_out);
1683                 break;
1684         }
1685
1686         prev->state = enable;
1687         return 0;
1688 }
1689
1690 static struct v4l2_mbus_framefmt *
1691 __preview_get_format(struct isp_prev_device *prev, struct v4l2_subdev_fh *fh,
1692                      unsigned int pad, enum v4l2_subdev_format_whence which)
1693 {
1694         if (which == V4L2_SUBDEV_FORMAT_TRY)
1695                 return v4l2_subdev_get_try_format(fh, pad);
1696         else
1697                 return &prev->formats[pad];
1698 }
1699
1700 static struct v4l2_rect *
1701 __preview_get_crop(struct isp_prev_device *prev, struct v4l2_subdev_fh *fh,
1702                    enum v4l2_subdev_format_whence which)
1703 {
1704         if (which == V4L2_SUBDEV_FORMAT_TRY)
1705                 return v4l2_subdev_get_try_crop(fh, PREV_PAD_SINK);
1706         else
1707                 return &prev->crop;
1708 }
1709
1710 /* previewer format descriptions */
1711 static const unsigned int preview_input_fmts[] = {
1712         V4L2_MBUS_FMT_Y10_1X10,
1713         V4L2_MBUS_FMT_SGRBG10_1X10,
1714         V4L2_MBUS_FMT_SRGGB10_1X10,
1715         V4L2_MBUS_FMT_SBGGR10_1X10,
1716         V4L2_MBUS_FMT_SGBRG10_1X10,
1717 };
1718
1719 static const unsigned int preview_output_fmts[] = {
1720         V4L2_MBUS_FMT_UYVY8_1X16,
1721         V4L2_MBUS_FMT_YUYV8_1X16,
1722 };
1723
1724 /*
1725  * preview_try_format - Validate a format
1726  * @prev: ISP preview engine
1727  * @fh: V4L2 subdev file handle
1728  * @pad: pad number
1729  * @fmt: format to be validated
1730  * @which: try/active format selector
1731  *
1732  * Validate and adjust the given format for the given pad based on the preview
1733  * engine limits and the format and crop rectangles on other pads.
1734  */
1735 static void preview_try_format(struct isp_prev_device *prev,
1736                                struct v4l2_subdev_fh *fh, unsigned int pad,
1737                                struct v4l2_mbus_framefmt *fmt,
1738                                enum v4l2_subdev_format_whence which)
1739 {
1740         enum v4l2_mbus_pixelcode pixelcode;
1741         struct v4l2_rect *crop;
1742         unsigned int i;
1743
1744         switch (pad) {
1745         case PREV_PAD_SINK:
1746                 /* When reading data from the CCDC, the input size has already
1747                  * been mangled by the CCDC output pad so it can be accepted
1748                  * as-is.
1749                  *
1750                  * When reading data from memory, clamp the requested width and
1751                  * height. The TRM doesn't specify a minimum input height, make
1752                  * sure we got enough lines to enable the noise filter and color
1753                  * filter array interpolation.
1754                  */
1755                 if (prev->input == PREVIEW_INPUT_MEMORY) {
1756                         fmt->width = clamp_t(u32, fmt->width, PREV_MIN_IN_WIDTH,
1757                                              preview_max_out_width(prev));
1758                         fmt->height = clamp_t(u32, fmt->height,
1759                                               PREV_MIN_IN_HEIGHT,
1760                                               PREV_MAX_IN_HEIGHT);
1761                 }
1762
1763                 fmt->colorspace = V4L2_COLORSPACE_SRGB;
1764
1765                 for (i = 0; i < ARRAY_SIZE(preview_input_fmts); i++) {
1766                         if (fmt->code == preview_input_fmts[i])
1767                                 break;
1768                 }
1769
1770                 /* If not found, use SGRBG10 as default */
1771                 if (i >= ARRAY_SIZE(preview_input_fmts))
1772                         fmt->code = V4L2_MBUS_FMT_SGRBG10_1X10;
1773                 break;
1774
1775         case PREV_PAD_SOURCE:
1776                 pixelcode = fmt->code;
1777                 *fmt = *__preview_get_format(prev, fh, PREV_PAD_SINK, which);
1778
1779                 switch (pixelcode) {
1780                 case V4L2_MBUS_FMT_YUYV8_1X16:
1781                 case V4L2_MBUS_FMT_UYVY8_1X16:
1782                         fmt->code = pixelcode;
1783                         break;
1784
1785                 default:
1786                         fmt->code = V4L2_MBUS_FMT_YUYV8_1X16;
1787                         break;
1788                 }
1789
1790                 /* The preview module output size is configurable through the
1791                  * averager (horizontal scaling by 1/1, 1/2, 1/4 or 1/8). This
1792                  * is not supported yet, hardcode the output size to the crop
1793                  * rectangle size.
1794                  */
1795                 crop = __preview_get_crop(prev, fh, which);
1796                 fmt->width = crop->width;
1797                 fmt->height = crop->height;
1798
1799                 fmt->colorspace = V4L2_COLORSPACE_JPEG;
1800                 break;
1801         }
1802
1803         fmt->field = V4L2_FIELD_NONE;
1804 }
1805
1806 /*
1807  * preview_try_crop - Validate a crop rectangle
1808  * @prev: ISP preview engine
1809  * @sink: format on the sink pad
1810  * @crop: crop rectangle to be validated
1811  *
1812  * The preview engine crops lines and columns for its internal operation,
1813  * depending on which filters are enabled. Enforce minimum crop margins to
1814  * handle that transparently for userspace.
1815  *
1816  * See the explanation at the PREV_MARGIN_* definitions for more details.
1817  */
1818 static void preview_try_crop(struct isp_prev_device *prev,
1819                              const struct v4l2_mbus_framefmt *sink,
1820                              struct v4l2_rect *crop)
1821 {
1822         unsigned int left = PREV_MARGIN_LEFT;
1823         unsigned int right = sink->width - PREV_MARGIN_RIGHT;
1824         unsigned int top = PREV_MARGIN_TOP;
1825         unsigned int bottom = sink->height - PREV_MARGIN_BOTTOM;
1826
1827         /* When processing data on-the-fly from the CCDC, at least 2 pixels must
1828          * be cropped from the left and right sides of the image. As we don't
1829          * know which filters will be enabled, increase the left and right
1830          * margins by two.
1831          */
1832         if (prev->input == PREVIEW_INPUT_CCDC) {
1833                 left += 2;
1834                 right -= 2;
1835         }
1836
1837         /* Restrict left/top to even values to keep the Bayer pattern. */
1838         crop->left &= ~1;
1839         crop->top &= ~1;
1840
1841         crop->left = clamp_t(u32, crop->left, left, right - PREV_MIN_OUT_WIDTH);
1842         crop->top = clamp_t(u32, crop->top, top, bottom - PREV_MIN_OUT_HEIGHT);
1843         crop->width = clamp_t(u32, crop->width, PREV_MIN_OUT_WIDTH,
1844                               right - crop->left);
1845         crop->height = clamp_t(u32, crop->height, PREV_MIN_OUT_HEIGHT,
1846                                bottom - crop->top);
1847 }
1848
1849 /*
1850  * preview_enum_mbus_code - Handle pixel format enumeration
1851  * @sd     : pointer to v4l2 subdev structure
1852  * @fh     : V4L2 subdev file handle
1853  * @code   : pointer to v4l2_subdev_mbus_code_enum structure
1854  * return -EINVAL or zero on success
1855  */
1856 static int preview_enum_mbus_code(struct v4l2_subdev *sd,
1857                                   struct v4l2_subdev_fh *fh,
1858                                   struct v4l2_subdev_mbus_code_enum *code)
1859 {
1860         switch (code->pad) {
1861         case PREV_PAD_SINK:
1862                 if (code->index >= ARRAY_SIZE(preview_input_fmts))
1863                         return -EINVAL;
1864
1865                 code->code = preview_input_fmts[code->index];
1866                 break;
1867         case PREV_PAD_SOURCE:
1868                 if (code->index >= ARRAY_SIZE(preview_output_fmts))
1869                         return -EINVAL;
1870
1871                 code->code = preview_output_fmts[code->index];
1872                 break;
1873         default:
1874                 return -EINVAL;
1875         }
1876
1877         return 0;
1878 }
1879
1880 static int preview_enum_frame_size(struct v4l2_subdev *sd,
1881                                    struct v4l2_subdev_fh *fh,
1882                                    struct v4l2_subdev_frame_size_enum *fse)
1883 {
1884         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1885         struct v4l2_mbus_framefmt format;
1886
1887         if (fse->index != 0)
1888                 return -EINVAL;
1889
1890         format.code = fse->code;
1891         format.width = 1;
1892         format.height = 1;
1893         preview_try_format(prev, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1894         fse->min_width = format.width;
1895         fse->min_height = format.height;
1896
1897         if (format.code != fse->code)
1898                 return -EINVAL;
1899
1900         format.code = fse->code;
1901         format.width = -1;
1902         format.height = -1;
1903         preview_try_format(prev, fh, fse->pad, &format, V4L2_SUBDEV_FORMAT_TRY);
1904         fse->max_width = format.width;
1905         fse->max_height = format.height;
1906
1907         return 0;
1908 }
1909
1910 /*
1911  * preview_get_selection - Retrieve a selection rectangle on a pad
1912  * @sd: ISP preview V4L2 subdevice
1913  * @fh: V4L2 subdev file handle
1914  * @sel: Selection rectangle
1915  *
1916  * The only supported rectangles are the crop rectangles on the sink pad.
1917  *
1918  * Return 0 on success or a negative error code otherwise.
1919  */
1920 static int preview_get_selection(struct v4l2_subdev *sd,
1921                                  struct v4l2_subdev_fh *fh,
1922                                  struct v4l2_subdev_selection *sel)
1923 {
1924         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1925         struct v4l2_mbus_framefmt *format;
1926
1927         if (sel->pad != PREV_PAD_SINK)
1928                 return -EINVAL;
1929
1930         switch (sel->target) {
1931         case V4L2_SEL_TGT_CROP_BOUNDS:
1932                 sel->r.left = 0;
1933                 sel->r.top = 0;
1934                 sel->r.width = INT_MAX;
1935                 sel->r.height = INT_MAX;
1936
1937                 format = __preview_get_format(prev, fh, PREV_PAD_SINK,
1938                                               sel->which);
1939                 preview_try_crop(prev, format, &sel->r);
1940                 break;
1941
1942         case V4L2_SEL_TGT_CROP:
1943                 sel->r = *__preview_get_crop(prev, fh, sel->which);
1944                 break;
1945
1946         default:
1947                 return -EINVAL;
1948         }
1949
1950         return 0;
1951 }
1952
1953 /*
1954  * preview_set_selection - Set a selection rectangle on a pad
1955  * @sd: ISP preview V4L2 subdevice
1956  * @fh: V4L2 subdev file handle
1957  * @sel: Selection rectangle
1958  *
1959  * The only supported rectangle is the actual crop rectangle on the sink pad.
1960  *
1961  * Return 0 on success or a negative error code otherwise.
1962  */
1963 static int preview_set_selection(struct v4l2_subdev *sd,
1964                                  struct v4l2_subdev_fh *fh,
1965                                  struct v4l2_subdev_selection *sel)
1966 {
1967         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
1968         struct v4l2_mbus_framefmt *format;
1969
1970         if (sel->target != V4L2_SEL_TGT_CROP ||
1971             sel->pad != PREV_PAD_SINK)
1972                 return -EINVAL;
1973
1974         /* The crop rectangle can't be changed while streaming. */
1975         if (prev->state != ISP_PIPELINE_STREAM_STOPPED)
1976                 return -EBUSY;
1977
1978         /* Modifying the crop rectangle always changes the format on the source
1979          * pad. If the KEEP_CONFIG flag is set, just return the current crop
1980          * rectangle.
1981          */
1982         if (sel->flags & V4L2_SEL_FLAG_KEEP_CONFIG) {
1983                 sel->r = *__preview_get_crop(prev, fh, sel->which);
1984                 return 0;
1985         }
1986
1987         format = __preview_get_format(prev, fh, PREV_PAD_SINK, sel->which);
1988         preview_try_crop(prev, format, &sel->r);
1989         *__preview_get_crop(prev, fh, sel->which) = sel->r;
1990
1991         /* Update the source format. */
1992         format = __preview_get_format(prev, fh, PREV_PAD_SOURCE, sel->which);
1993         preview_try_format(prev, fh, PREV_PAD_SOURCE, format, sel->which);
1994
1995         return 0;
1996 }
1997
1998 /*
1999  * preview_get_format - Handle get format by pads subdev method
2000  * @sd : pointer to v4l2 subdev structure
2001  * @fh : V4L2 subdev file handle
2002  * @fmt: pointer to v4l2 subdev format structure
2003  * return -EINVAL or zero on success
2004  */
2005 static int preview_get_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2006                               struct v4l2_subdev_format *fmt)
2007 {
2008         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
2009         struct v4l2_mbus_framefmt *format;
2010
2011         format = __preview_get_format(prev, fh, fmt->pad, fmt->which);
2012         if (format == NULL)
2013                 return -EINVAL;
2014
2015         fmt->format = *format;
2016         return 0;
2017 }
2018
2019 /*
2020  * preview_set_format - Handle set format by pads subdev method
2021  * @sd : pointer to v4l2 subdev structure
2022  * @fh : V4L2 subdev file handle
2023  * @fmt: pointer to v4l2 subdev format structure
2024  * return -EINVAL or zero on success
2025  */
2026 static int preview_set_format(struct v4l2_subdev *sd, struct v4l2_subdev_fh *fh,
2027                               struct v4l2_subdev_format *fmt)
2028 {
2029         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
2030         struct v4l2_mbus_framefmt *format;
2031         struct v4l2_rect *crop;
2032
2033         format = __preview_get_format(prev, fh, fmt->pad, fmt->which);
2034         if (format == NULL)
2035                 return -EINVAL;
2036
2037         preview_try_format(prev, fh, fmt->pad, &fmt->format, fmt->which);
2038         *format = fmt->format;
2039
2040         /* Propagate the format from sink to source */
2041         if (fmt->pad == PREV_PAD_SINK) {
2042                 /* Reset the crop rectangle. */
2043                 crop = __preview_get_crop(prev, fh, fmt->which);
2044                 crop->left = 0;
2045                 crop->top = 0;
2046                 crop->width = fmt->format.width;
2047                 crop->height = fmt->format.height;
2048
2049                 preview_try_crop(prev, &fmt->format, crop);
2050
2051                 /* Update the source format. */
2052                 format = __preview_get_format(prev, fh, PREV_PAD_SOURCE,
2053                                               fmt->which);
2054                 preview_try_format(prev, fh, PREV_PAD_SOURCE, format,
2055                                    fmt->which);
2056         }
2057
2058         return 0;
2059 }
2060
2061 /*
2062  * preview_init_formats - Initialize formats on all pads
2063  * @sd: ISP preview V4L2 subdevice
2064  * @fh: V4L2 subdev file handle
2065  *
2066  * Initialize all pad formats with default values. If fh is not NULL, try
2067  * formats are initialized on the file handle. Otherwise active formats are
2068  * initialized on the device.
2069  */
2070 static int preview_init_formats(struct v4l2_subdev *sd,
2071                                 struct v4l2_subdev_fh *fh)
2072 {
2073         struct v4l2_subdev_format format;
2074
2075         memset(&format, 0, sizeof(format));
2076         format.pad = PREV_PAD_SINK;
2077         format.which = fh ? V4L2_SUBDEV_FORMAT_TRY : V4L2_SUBDEV_FORMAT_ACTIVE;
2078         format.format.code = V4L2_MBUS_FMT_SGRBG10_1X10;
2079         format.format.width = 4096;
2080         format.format.height = 4096;
2081         preview_set_format(sd, fh, &format);
2082
2083         return 0;
2084 }
2085
2086 /* subdev core operations */
2087 static const struct v4l2_subdev_core_ops preview_v4l2_core_ops = {
2088         .ioctl = preview_ioctl,
2089 };
2090
2091 /* subdev video operations */
2092 static const struct v4l2_subdev_video_ops preview_v4l2_video_ops = {
2093         .s_stream = preview_set_stream,
2094 };
2095
2096 /* subdev pad operations */
2097 static const struct v4l2_subdev_pad_ops preview_v4l2_pad_ops = {
2098         .enum_mbus_code = preview_enum_mbus_code,
2099         .enum_frame_size = preview_enum_frame_size,
2100         .get_fmt = preview_get_format,
2101         .set_fmt = preview_set_format,
2102         .get_selection = preview_get_selection,
2103         .set_selection = preview_set_selection,
2104 };
2105
2106 /* subdev operations */
2107 static const struct v4l2_subdev_ops preview_v4l2_ops = {
2108         .core = &preview_v4l2_core_ops,
2109         .video = &preview_v4l2_video_ops,
2110         .pad = &preview_v4l2_pad_ops,
2111 };
2112
2113 /* subdev internal operations */
2114 static const struct v4l2_subdev_internal_ops preview_v4l2_internal_ops = {
2115         .open = preview_init_formats,
2116 };
2117
2118 /* -----------------------------------------------------------------------------
2119  * Media entity operations
2120  */
2121
2122 /*
2123  * preview_link_setup - Setup previewer connections.
2124  * @entity : Pointer to media entity structure
2125  * @local  : Pointer to local pad array
2126  * @remote : Pointer to remote pad array
2127  * @flags  : Link flags
2128  * return -EINVAL or zero on success
2129  */
2130 static int preview_link_setup(struct media_entity *entity,
2131                               const struct media_pad *local,
2132                               const struct media_pad *remote, u32 flags)
2133 {
2134         struct v4l2_subdev *sd = media_entity_to_v4l2_subdev(entity);
2135         struct isp_prev_device *prev = v4l2_get_subdevdata(sd);
2136
2137         switch (local->index | media_entity_type(remote->entity)) {
2138         case PREV_PAD_SINK | MEDIA_ENT_T_DEVNODE:
2139                 /* read from memory */
2140                 if (flags & MEDIA_LNK_FL_ENABLED) {
2141                         if (prev->input == PREVIEW_INPUT_CCDC)
2142                                 return -EBUSY;
2143                         prev->input = PREVIEW_INPUT_MEMORY;
2144                 } else {
2145                         if (prev->input == PREVIEW_INPUT_MEMORY)
2146                                 prev->input = PREVIEW_INPUT_NONE;
2147                 }
2148                 break;
2149
2150         case PREV_PAD_SINK | MEDIA_ENT_T_V4L2_SUBDEV:
2151                 /* read from ccdc */
2152                 if (flags & MEDIA_LNK_FL_ENABLED) {
2153                         if (prev->input == PREVIEW_INPUT_MEMORY)
2154                                 return -EBUSY;
2155                         prev->input = PREVIEW_INPUT_CCDC;
2156                 } else {
2157                         if (prev->input == PREVIEW_INPUT_CCDC)
2158                                 prev->input = PREVIEW_INPUT_NONE;
2159                 }
2160                 break;
2161
2162         /*
2163          * The ISP core doesn't support pipelines with multiple video outputs.
2164          * Revisit this when it will be implemented, and return -EBUSY for now.
2165          */
2166
2167         case PREV_PAD_SOURCE | MEDIA_ENT_T_DEVNODE:
2168                 /* write to memory */
2169                 if (flags & MEDIA_LNK_FL_ENABLED) {
2170                         if (prev->output & ~PREVIEW_OUTPUT_MEMORY)
2171                                 return -EBUSY;
2172                         prev->output |= PREVIEW_OUTPUT_MEMORY;
2173                 } else {
2174                         prev->output &= ~PREVIEW_OUTPUT_MEMORY;
2175                 }
2176                 break;
2177
2178         case PREV_PAD_SOURCE | MEDIA_ENT_T_V4L2_SUBDEV:
2179                 /* write to resizer */
2180                 if (flags & MEDIA_LNK_FL_ENABLED) {
2181                         if (prev->output & ~PREVIEW_OUTPUT_RESIZER)
2182                                 return -EBUSY;
2183                         prev->output |= PREVIEW_OUTPUT_RESIZER;
2184                 } else {
2185                         prev->output &= ~PREVIEW_OUTPUT_RESIZER;
2186                 }
2187                 break;
2188
2189         default:
2190                 return -EINVAL;
2191         }
2192
2193         return 0;
2194 }
2195
2196 /* media operations */
2197 static const struct media_entity_operations preview_media_ops = {
2198         .link_setup = preview_link_setup,
2199         .link_validate = v4l2_subdev_link_validate,
2200 };
2201
2202 void omap3isp_preview_unregister_entities(struct isp_prev_device *prev)
2203 {
2204         v4l2_device_unregister_subdev(&prev->subdev);
2205         omap3isp_video_unregister(&prev->video_in);
2206         omap3isp_video_unregister(&prev->video_out);
2207 }
2208
2209 int omap3isp_preview_register_entities(struct isp_prev_device *prev,
2210         struct v4l2_device *vdev)
2211 {
2212         int ret;
2213
2214         /* Register the subdev and video nodes. */
2215         ret = v4l2_device_register_subdev(vdev, &prev->subdev);
2216         if (ret < 0)
2217                 goto error;
2218
2219         ret = omap3isp_video_register(&prev->video_in, vdev);
2220         if (ret < 0)
2221                 goto error;
2222
2223         ret = omap3isp_video_register(&prev->video_out, vdev);
2224         if (ret < 0)
2225                 goto error;
2226
2227         return 0;
2228
2229 error:
2230         omap3isp_preview_unregister_entities(prev);
2231         return ret;
2232 }
2233
2234 /* -----------------------------------------------------------------------------
2235  * ISP previewer initialisation and cleanup
2236  */
2237
2238 /*
2239  * preview_init_entities - Initialize subdev and media entity.
2240  * @prev : Pointer to preview structure
2241  * return -ENOMEM or zero on success
2242  */
2243 static int preview_init_entities(struct isp_prev_device *prev)
2244 {
2245         struct v4l2_subdev *sd = &prev->subdev;
2246         struct media_pad *pads = prev->pads;
2247         struct media_entity *me = &sd->entity;
2248         int ret;
2249
2250         prev->input = PREVIEW_INPUT_NONE;
2251
2252         v4l2_subdev_init(sd, &preview_v4l2_ops);
2253         sd->internal_ops = &preview_v4l2_internal_ops;
2254         strlcpy(sd->name, "OMAP3 ISP preview", sizeof(sd->name));
2255         sd->grp_id = 1 << 16;   /* group ID for isp subdevs */
2256         v4l2_set_subdevdata(sd, prev);
2257         sd->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
2258
2259         v4l2_ctrl_handler_init(&prev->ctrls, 2);
2260         v4l2_ctrl_new_std(&prev->ctrls, &preview_ctrl_ops, V4L2_CID_BRIGHTNESS,
2261                           ISPPRV_BRIGHT_LOW, ISPPRV_BRIGHT_HIGH,
2262                           ISPPRV_BRIGHT_STEP, ISPPRV_BRIGHT_DEF);
2263         v4l2_ctrl_new_std(&prev->ctrls, &preview_ctrl_ops, V4L2_CID_CONTRAST,
2264                           ISPPRV_CONTRAST_LOW, ISPPRV_CONTRAST_HIGH,
2265                           ISPPRV_CONTRAST_STEP, ISPPRV_CONTRAST_DEF);
2266         v4l2_ctrl_handler_setup(&prev->ctrls);
2267         sd->ctrl_handler = &prev->ctrls;
2268
2269         pads[PREV_PAD_SINK].flags = MEDIA_PAD_FL_SINK;
2270         pads[PREV_PAD_SOURCE].flags = MEDIA_PAD_FL_SOURCE;
2271
2272         me->ops = &preview_media_ops;
2273         ret = media_entity_init(me, PREV_PADS_NUM, pads, 0);
2274         if (ret < 0)
2275                 return ret;
2276
2277         preview_init_formats(sd, NULL);
2278
2279         /* According to the OMAP34xx TRM, video buffers need to be aligned on a
2280          * 32 bytes boundary. However, an undocumented hardware bug requires a
2281          * 64 bytes boundary at the preview engine input.
2282          */
2283         prev->video_in.type = V4L2_BUF_TYPE_VIDEO_OUTPUT;
2284         prev->video_in.ops = &preview_video_ops;
2285         prev->video_in.isp = to_isp_device(prev);
2286         prev->video_in.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
2287         prev->video_in.bpl_alignment = 64;
2288         prev->video_out.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2289         prev->video_out.ops = &preview_video_ops;
2290         prev->video_out.isp = to_isp_device(prev);
2291         prev->video_out.capture_mem = PAGE_ALIGN(4096 * 4096) * 2 * 3;
2292         prev->video_out.bpl_alignment = 32;
2293
2294         ret = omap3isp_video_init(&prev->video_in, "preview");
2295         if (ret < 0)
2296                 goto error_video_in;
2297
2298         ret = omap3isp_video_init(&prev->video_out, "preview");
2299         if (ret < 0)
2300                 goto error_video_out;
2301
2302         /* Connect the video nodes to the previewer subdev. */
2303         ret = media_entity_create_link(&prev->video_in.video.entity, 0,
2304                         &prev->subdev.entity, PREV_PAD_SINK, 0);
2305         if (ret < 0)
2306                 goto error_link;
2307
2308         ret = media_entity_create_link(&prev->subdev.entity, PREV_PAD_SOURCE,
2309                         &prev->video_out.video.entity, 0, 0);
2310         if (ret < 0)
2311                 goto error_link;
2312
2313         return 0;
2314
2315 error_link:
2316         omap3isp_video_cleanup(&prev->video_out);
2317 error_video_out:
2318         omap3isp_video_cleanup(&prev->video_in);
2319 error_video_in:
2320         media_entity_cleanup(&prev->subdev.entity);
2321         return ret;
2322 }
2323
2324 /*
2325  * omap3isp_preview_init - Previewer initialization.
2326  * @dev : Pointer to ISP device
2327  * return -ENOMEM or zero on success
2328  */
2329 int omap3isp_preview_init(struct isp_device *isp)
2330 {
2331         struct isp_prev_device *prev = &isp->isp_prev;
2332
2333         init_waitqueue_head(&prev->wait);
2334
2335         preview_init_params(prev);
2336
2337         return preview_init_entities(prev);
2338 }
2339
2340 void omap3isp_preview_cleanup(struct isp_device *isp)
2341 {
2342         struct isp_prev_device *prev = &isp->isp_prev;
2343
2344         v4l2_ctrl_handler_free(&prev->ctrls);
2345         omap3isp_video_cleanup(&prev->video_in);
2346         omap3isp_video_cleanup(&prev->video_out);
2347         media_entity_cleanup(&prev->subdev.entity);
2348 }