2 * V4L2 Driver for i.MX3x camera host
5 * Guennadi Liakhovetski, DENX Software Engineering, <lg@denx.de>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/init.h>
13 #include <linux/module.h>
14 #include <linux/videodev2.h>
15 #include <linux/platform_device.h>
16 #include <linux/clk.h>
17 #include <linux/vmalloc.h>
18 #include <linux/interrupt.h>
19 #include <linux/sched.h>
20 #include <linux/dma/ipu-dma.h>
22 #include <media/v4l2-common.h>
23 #include <media/v4l2-dev.h>
24 #include <media/videobuf2-dma-contig.h>
25 #include <media/soc_camera.h>
26 #include <media/soc_mediabus.h>
28 #include <linux/platform_data/camera-mx3.h>
29 #include <linux/platform_data/dma-imx.h>
31 #define MX3_CAM_DRV_NAME "mx3-camera"
33 /* CMOS Sensor Interface Registers */
34 #define CSI_REG_START 0x60
36 #define CSI_SENS_CONF (0x60 - CSI_REG_START)
37 #define CSI_SENS_FRM_SIZE (0x64 - CSI_REG_START)
38 #define CSI_ACT_FRM_SIZE (0x68 - CSI_REG_START)
39 #define CSI_OUT_FRM_CTRL (0x6C - CSI_REG_START)
40 #define CSI_TST_CTRL (0x70 - CSI_REG_START)
41 #define CSI_CCIR_CODE_1 (0x74 - CSI_REG_START)
42 #define CSI_CCIR_CODE_2 (0x78 - CSI_REG_START)
43 #define CSI_CCIR_CODE_3 (0x7C - CSI_REG_START)
44 #define CSI_FLASH_STROBE_1 (0x80 - CSI_REG_START)
45 #define CSI_FLASH_STROBE_2 (0x84 - CSI_REG_START)
47 #define CSI_SENS_CONF_VSYNC_POL_SHIFT 0
48 #define CSI_SENS_CONF_HSYNC_POL_SHIFT 1
49 #define CSI_SENS_CONF_DATA_POL_SHIFT 2
50 #define CSI_SENS_CONF_PIX_CLK_POL_SHIFT 3
51 #define CSI_SENS_CONF_SENS_PRTCL_SHIFT 4
52 #define CSI_SENS_CONF_SENS_CLKSRC_SHIFT 7
53 #define CSI_SENS_CONF_DATA_FMT_SHIFT 8
54 #define CSI_SENS_CONF_DATA_WIDTH_SHIFT 10
55 #define CSI_SENS_CONF_EXT_VSYNC_SHIFT 15
56 #define CSI_SENS_CONF_DIVRATIO_SHIFT 16
58 #define CSI_SENS_CONF_DATA_FMT_RGB_YUV444 (0UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
59 #define CSI_SENS_CONF_DATA_FMT_YUV422 (2UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
60 #define CSI_SENS_CONF_DATA_FMT_BAYER (3UL << CSI_SENS_CONF_DATA_FMT_SHIFT)
62 #define MAX_VIDEO_MEM 16
64 struct mx3_camera_buffer {
65 /* common v4l buffer stuff -- must be first */
67 struct list_head queue;
69 /* One descriptot per scatterlist (per frame) */
70 struct dma_async_tx_descriptor *txd;
72 /* We have to "build" a scatterlist ourselves - one element per frame */
73 struct scatterlist sg;
77 * struct mx3_camera_dev - i.MX3x camera (CSI) object
78 * @dev: camera device, to which the coherent buffer is attached
79 * @icd: currently attached camera sensor
80 * @clk: pointer to clock
81 * @base: remapped register base address
82 * @pdata: platform data
83 * @platform_flags: platform flags
84 * @mclk: master clock frequency in Hz
85 * @capture: list of capture videobuffers
86 * @lock: protects video buffer lists
87 * @active: active video buffer
88 * @idmac_channel: array of pointers to IPU DMAC DMA channels
89 * @soc_host: embedded soc_host object
91 struct mx3_camera_dev {
93 * i.MX3x is only supposed to handle one camera on its Camera Sensor
94 * Interface. If anyone ever builds hardware to enable more than one
95 * camera _simultaneously_, they will have to modify this driver too
101 struct mx3_camera_pdata *pdata;
103 unsigned long platform_flags;
105 u16 width_flags; /* max 15 bits */
107 struct list_head capture;
108 spinlock_t lock; /* Protects video buffer lists */
109 struct mx3_camera_buffer *active;
111 struct vb2_alloc_ctx *alloc_ctx;
112 enum v4l2_field field;
115 /* IDMAC / dmaengine interface */
116 struct idmac_channel *idmac_channel[1]; /* We need one channel */
118 struct soc_camera_host soc_host;
121 struct dma_chan_request {
122 struct mx3_camera_dev *mx3_cam;
126 static u32 csi_reg_read(struct mx3_camera_dev *mx3, off_t reg)
128 return __raw_readl(mx3->base + reg);
131 static void csi_reg_write(struct mx3_camera_dev *mx3, u32 value, off_t reg)
133 __raw_writel(value, mx3->base + reg);
136 static struct mx3_camera_buffer *to_mx3_vb(struct vb2_buffer *vb)
138 return container_of(vb, struct mx3_camera_buffer, vb);
141 /* Called from the IPU IDMAC ISR */
142 static void mx3_cam_dma_done(void *arg)
144 struct idmac_tx_desc *desc = to_tx_desc(arg);
145 struct dma_chan *chan = desc->txd.chan;
146 struct idmac_channel *ichannel = to_idmac_chan(chan);
147 struct mx3_camera_dev *mx3_cam = ichannel->client;
149 dev_dbg(chan->device->dev, "callback cookie %d, active DMA 0x%08x\n",
150 desc->txd.cookie, mx3_cam->active ? sg_dma_address(&mx3_cam->active->sg) : 0);
152 spin_lock(&mx3_cam->lock);
153 if (mx3_cam->active) {
154 struct vb2_buffer *vb = &mx3_cam->active->vb;
155 struct mx3_camera_buffer *buf = to_mx3_vb(vb);
157 list_del_init(&buf->queue);
158 v4l2_get_timestamp(&vb->v4l2_buf.timestamp);
159 vb->v4l2_buf.field = mx3_cam->field;
160 vb->v4l2_buf.sequence = mx3_cam->sequence++;
161 vb2_buffer_done(vb, VB2_BUF_STATE_DONE);
164 if (list_empty(&mx3_cam->capture)) {
165 mx3_cam->active = NULL;
166 spin_unlock(&mx3_cam->lock);
169 * stop capture - without further buffers IPU_CHA_BUF0_RDY will
175 mx3_cam->active = list_entry(mx3_cam->capture.next,
176 struct mx3_camera_buffer, queue);
177 spin_unlock(&mx3_cam->lock);
181 * Videobuf operations
185 * Calculate the __buffer__ (not data) size and number of buffers.
187 static int mx3_videobuf_setup(struct vb2_queue *vq,
188 const struct v4l2_format *fmt,
189 unsigned int *count, unsigned int *num_planes,
190 unsigned int sizes[], void *alloc_ctxs[])
192 struct soc_camera_device *icd = soc_camera_from_vb2q(vq);
193 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
194 struct mx3_camera_dev *mx3_cam = ici->priv;
196 if (!mx3_cam->idmac_channel[0])
200 const struct soc_camera_format_xlate *xlate = soc_camera_xlate_by_fourcc(icd,
201 fmt->fmt.pix.pixelformat);
202 unsigned int bytes_per_line;
208 ret = soc_mbus_bytes_per_line(fmt->fmt.pix.width,
213 bytes_per_line = max_t(u32, fmt->fmt.pix.bytesperline, ret);
215 ret = soc_mbus_image_size(xlate->host_fmt, bytes_per_line,
216 fmt->fmt.pix.height);
220 sizes[0] = max_t(u32, fmt->fmt.pix.sizeimage, ret);
222 /* Called from VIDIOC_REQBUFS or in compatibility mode */
223 sizes[0] = icd->sizeimage;
226 alloc_ctxs[0] = mx3_cam->alloc_ctx;
228 if (!vq->num_buffers)
229 mx3_cam->sequence = 0;
234 /* If *num_planes != 0, we have already verified *count. */
236 sizes[0] * *count + mx3_cam->buf_total > MAX_VIDEO_MEM * 1024 * 1024)
237 *count = (MAX_VIDEO_MEM * 1024 * 1024 - mx3_cam->buf_total) /
245 static enum pixel_fmt fourcc_to_ipu_pix(__u32 fourcc)
247 /* Add more formats as need arises and test possibilities appear... */
249 case V4L2_PIX_FMT_RGB24:
250 return IPU_PIX_FMT_RGB24;
251 case V4L2_PIX_FMT_UYVY:
252 case V4L2_PIX_FMT_RGB565:
254 return IPU_PIX_FMT_GENERIC;
258 static void mx3_videobuf_queue(struct vb2_buffer *vb)
260 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
261 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
262 struct mx3_camera_dev *mx3_cam = ici->priv;
263 struct mx3_camera_buffer *buf = to_mx3_vb(vb);
264 struct scatterlist *sg = &buf->sg;
265 struct dma_async_tx_descriptor *txd;
266 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
267 struct idmac_video_param *video = &ichan->params.video;
268 const struct soc_mbus_pixelfmt *host_fmt = icd->current_fmt->host_fmt;
273 new_size = icd->sizeimage;
275 if (vb2_plane_size(vb, 0) < new_size) {
276 dev_err(icd->parent, "Buffer #%d too small (%lu < %zu)\n",
277 vb->v4l2_buf.index, vb2_plane_size(vb, 0), new_size);
282 sg_dma_address(sg) = vb2_dma_contig_plane_dma_addr(vb, 0);
283 sg_dma_len(sg) = new_size;
285 txd = dmaengine_prep_slave_sg(
286 &ichan->dma_chan, sg, 1, DMA_DEV_TO_MEM,
291 txd->callback_param = txd;
292 txd->callback = mx3_cam_dma_done;
299 vb2_set_plane_payload(vb, 0, new_size);
301 /* This is the configuration of one sg-element */
302 video->out_pixel_fmt = fourcc_to_ipu_pix(host_fmt->fourcc);
304 if (video->out_pixel_fmt == IPU_PIX_FMT_GENERIC) {
306 * If the IPU DMA channel is configured to transfer generic
307 * 8-bit data, we have to set up the geometry parameters
308 * correctly, according to the current pixel format. The DMA
309 * horizontal parameters in this case are expressed in bytes,
312 video->out_width = icd->bytesperline;
313 video->out_height = icd->user_height;
314 video->out_stride = icd->bytesperline;
317 * For IPU known formats the pixel unit will be managed
318 * successfully by the IPU code
320 video->out_width = icd->user_width;
321 video->out_height = icd->user_height;
322 video->out_stride = icd->user_width;
326 /* helps to see what DMA actually has written */
327 if (vb2_plane_vaddr(vb, 0))
328 memset(vb2_plane_vaddr(vb, 0), 0xaa, vb2_get_plane_payload(vb, 0));
331 spin_lock_irqsave(&mx3_cam->lock, flags);
332 list_add_tail(&buf->queue, &mx3_cam->capture);
334 if (!mx3_cam->active)
335 mx3_cam->active = buf;
337 spin_unlock_irq(&mx3_cam->lock);
339 cookie = txd->tx_submit(txd);
340 dev_dbg(icd->parent, "Submitted cookie %d DMA 0x%08x\n",
341 cookie, sg_dma_address(&buf->sg));
346 spin_lock_irq(&mx3_cam->lock);
349 list_del_init(&buf->queue);
351 if (mx3_cam->active == buf)
352 mx3_cam->active = NULL;
354 spin_unlock_irqrestore(&mx3_cam->lock, flags);
356 vb2_buffer_done(vb, VB2_BUF_STATE_ERROR);
359 static void mx3_videobuf_release(struct vb2_buffer *vb)
361 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
362 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
363 struct mx3_camera_dev *mx3_cam = ici->priv;
364 struct mx3_camera_buffer *buf = to_mx3_vb(vb);
365 struct dma_async_tx_descriptor *txd = buf->txd;
369 "Release%s DMA 0x%08x, queue %sempty\n",
370 mx3_cam->active == buf ? " active" : "", sg_dma_address(&buf->sg),
371 list_empty(&buf->queue) ? "" : "not ");
373 spin_lock_irqsave(&mx3_cam->lock, flags);
375 if (mx3_cam->active == buf)
376 mx3_cam->active = NULL;
378 /* Doesn't hurt also if the list is empty */
379 list_del_init(&buf->queue);
383 if (mx3_cam->idmac_channel[0])
387 spin_unlock_irqrestore(&mx3_cam->lock, flags);
389 mx3_cam->buf_total -= vb2_plane_size(vb, 0);
392 static int mx3_videobuf_init(struct vb2_buffer *vb)
394 struct soc_camera_device *icd = soc_camera_from_vb2q(vb->vb2_queue);
395 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
396 struct mx3_camera_dev *mx3_cam = ici->priv;
397 struct mx3_camera_buffer *buf = to_mx3_vb(vb);
400 /* This is for locking debugging only */
401 INIT_LIST_HEAD(&buf->queue);
402 sg_init_table(&buf->sg, 1);
404 mx3_cam->buf_total += vb2_plane_size(vb, 0);
410 static int mx3_stop_streaming(struct vb2_queue *q)
412 struct soc_camera_device *icd = soc_camera_from_vb2q(q);
413 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
414 struct mx3_camera_dev *mx3_cam = ici->priv;
415 struct idmac_channel *ichan = mx3_cam->idmac_channel[0];
416 struct mx3_camera_buffer *buf, *tmp;
420 struct dma_chan *chan = &ichan->dma_chan;
421 chan->device->device_control(chan, DMA_PAUSE, 0);
424 spin_lock_irqsave(&mx3_cam->lock, flags);
426 mx3_cam->active = NULL;
428 list_for_each_entry_safe(buf, tmp, &mx3_cam->capture, queue) {
429 list_del_init(&buf->queue);
430 vb2_buffer_done(&buf->vb, VB2_BUF_STATE_ERROR);
433 spin_unlock_irqrestore(&mx3_cam->lock, flags);
438 static struct vb2_ops mx3_videobuf_ops = {
439 .queue_setup = mx3_videobuf_setup,
440 .buf_queue = mx3_videobuf_queue,
441 .buf_cleanup = mx3_videobuf_release,
442 .buf_init = mx3_videobuf_init,
443 .wait_prepare = soc_camera_unlock,
444 .wait_finish = soc_camera_lock,
445 .stop_streaming = mx3_stop_streaming,
448 static int mx3_camera_init_videobuf(struct vb2_queue *q,
449 struct soc_camera_device *icd)
451 q->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
452 q->io_modes = VB2_MMAP | VB2_USERPTR;
454 q->ops = &mx3_videobuf_ops;
455 q->mem_ops = &vb2_dma_contig_memops;
456 q->buf_struct_size = sizeof(struct mx3_camera_buffer);
457 q->timestamp_type = V4L2_BUF_FLAG_TIMESTAMP_MONOTONIC;
459 return vb2_queue_init(q);
462 /* First part of ipu_csi_init_interface() */
463 static void mx3_camera_activate(struct mx3_camera_dev *mx3_cam)
468 /* Set default size: ipu_csi_set_window_size() */
469 csi_reg_write(mx3_cam, (640 - 1) | ((480 - 1) << 16), CSI_ACT_FRM_SIZE);
470 /* ...and position to 0:0: ipu_csi_set_window_pos() */
471 conf = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
472 csi_reg_write(mx3_cam, conf, CSI_OUT_FRM_CTRL);
474 /* We use only gated clock synchronisation mode so far */
475 conf = 0 << CSI_SENS_CONF_SENS_PRTCL_SHIFT;
477 /* Set generic data, platform-biggest bus-width */
478 conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
480 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
481 conf |= 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
482 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
483 conf |= 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
484 else if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
485 conf |= 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
486 else/* if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)*/
487 conf |= 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
489 if (mx3_cam->platform_flags & MX3_CAMERA_CLK_SRC)
490 conf |= 1 << CSI_SENS_CONF_SENS_CLKSRC_SHIFT;
491 if (mx3_cam->platform_flags & MX3_CAMERA_EXT_VSYNC)
492 conf |= 1 << CSI_SENS_CONF_EXT_VSYNC_SHIFT;
493 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
494 conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
495 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
496 conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
497 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
498 conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
499 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
500 conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
502 /* ipu_csi_init_interface() */
503 csi_reg_write(mx3_cam, conf, CSI_SENS_CONF);
505 clk_prepare_enable(mx3_cam->clk);
506 rate = clk_round_rate(mx3_cam->clk, mx3_cam->mclk);
507 dev_dbg(mx3_cam->soc_host.v4l2_dev.dev, "Set SENS_CONF to %x, rate %ld\n", conf, rate);
509 clk_set_rate(mx3_cam->clk, rate);
512 static int mx3_camera_add_device(struct soc_camera_device *icd)
514 dev_info(icd->parent, "MX3 Camera driver attached to camera %d\n",
520 static void mx3_camera_remove_device(struct soc_camera_device *icd)
522 dev_info(icd->parent, "MX3 Camera driver detached from camera %d\n",
526 /* Called with .host_lock held */
527 static int mx3_camera_clock_start(struct soc_camera_host *ici)
529 struct mx3_camera_dev *mx3_cam = ici->priv;
531 mx3_camera_activate(mx3_cam);
533 mx3_cam->buf_total = 0;
538 /* Called with .host_lock held */
539 static void mx3_camera_clock_stop(struct soc_camera_host *ici)
541 struct mx3_camera_dev *mx3_cam = ici->priv;
542 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
545 dma_release_channel(&(*ichan)->dma_chan);
549 clk_disable_unprepare(mx3_cam->clk);
552 static int test_platform_param(struct mx3_camera_dev *mx3_cam,
553 unsigned char buswidth, unsigned long *flags)
556 * If requested data width is supported by the platform, use it or any
557 * possible lower value - i.MX31 is smart enough to shift bits
559 if (buswidth > fls(mx3_cam->width_flags))
563 * Platform specified synchronization and pixel clock polarities are
564 * only a recommendation and are only used during probing. MX3x
565 * camera interface only works in master mode, i.e., uses HSYNC and
566 * VSYNC signals from the sensor
568 *flags = V4L2_MBUS_MASTER |
569 V4L2_MBUS_HSYNC_ACTIVE_HIGH |
570 V4L2_MBUS_HSYNC_ACTIVE_LOW |
571 V4L2_MBUS_VSYNC_ACTIVE_HIGH |
572 V4L2_MBUS_VSYNC_ACTIVE_LOW |
573 V4L2_MBUS_PCLK_SAMPLE_RISING |
574 V4L2_MBUS_PCLK_SAMPLE_FALLING |
575 V4L2_MBUS_DATA_ACTIVE_HIGH |
576 V4L2_MBUS_DATA_ACTIVE_LOW;
581 static int mx3_camera_try_bus_param(struct soc_camera_device *icd,
582 const unsigned int depth)
584 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
585 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
586 struct mx3_camera_dev *mx3_cam = ici->priv;
587 struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
588 unsigned long bus_flags, common_flags;
589 int ret = test_platform_param(mx3_cam, depth, &bus_flags);
591 dev_dbg(icd->parent, "request bus width %d bit: %d\n", depth, ret);
596 ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
598 common_flags = soc_mbus_config_compatible(&cfg,
601 dev_warn(icd->parent,
602 "Flags incompatible: camera 0x%x, host 0x%lx\n",
603 cfg.flags, bus_flags);
606 } else if (ret != -ENOIOCTLCMD) {
613 static bool chan_filter(struct dma_chan *chan, void *arg)
615 struct dma_chan_request *rq = arg;
616 struct mx3_camera_pdata *pdata;
618 if (!imx_dma_is_ipu(chan))
624 pdata = rq->mx3_cam->soc_host.v4l2_dev.dev->platform_data;
626 return rq->id == chan->chan_id &&
627 pdata->dma_dev == chan->device->dev;
630 static const struct soc_mbus_pixelfmt mx3_camera_formats[] = {
632 .fourcc = V4L2_PIX_FMT_SBGGR8,
633 .name = "Bayer BGGR (sRGB) 8 bit",
634 .bits_per_sample = 8,
635 .packing = SOC_MBUS_PACKING_NONE,
636 .order = SOC_MBUS_ORDER_LE,
637 .layout = SOC_MBUS_LAYOUT_PACKED,
639 .fourcc = V4L2_PIX_FMT_GREY,
640 .name = "Monochrome 8 bit",
641 .bits_per_sample = 8,
642 .packing = SOC_MBUS_PACKING_NONE,
643 .order = SOC_MBUS_ORDER_LE,
644 .layout = SOC_MBUS_LAYOUT_PACKED,
648 /* This will be corrected as we get more formats */
649 static bool mx3_camera_packing_supported(const struct soc_mbus_pixelfmt *fmt)
651 return fmt->packing == SOC_MBUS_PACKING_NONE ||
652 (fmt->bits_per_sample == 8 &&
653 fmt->packing == SOC_MBUS_PACKING_2X8_PADHI) ||
654 (fmt->bits_per_sample > 8 &&
655 fmt->packing == SOC_MBUS_PACKING_EXTEND16);
658 static int mx3_camera_get_formats(struct soc_camera_device *icd, unsigned int idx,
659 struct soc_camera_format_xlate *xlate)
661 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
662 struct device *dev = icd->parent;
663 int formats = 0, ret;
664 enum v4l2_mbus_pixelcode code;
665 const struct soc_mbus_pixelfmt *fmt;
667 ret = v4l2_subdev_call(sd, video, enum_mbus_fmt, idx, &code);
669 /* No more formats */
672 fmt = soc_mbus_get_fmtdesc(code);
674 dev_warn(icd->parent,
675 "Unsupported format code #%u: %d\n", idx, code);
679 /* This also checks support for the requested bits-per-sample */
680 ret = mx3_camera_try_bus_param(icd, fmt->bits_per_sample);
685 case V4L2_MBUS_FMT_SBGGR10_1X10:
688 xlate->host_fmt = &mx3_camera_formats[0];
691 dev_dbg(dev, "Providing format %s using code %d\n",
692 mx3_camera_formats[0].name, code);
695 case V4L2_MBUS_FMT_Y10_1X10:
698 xlate->host_fmt = &mx3_camera_formats[1];
701 dev_dbg(dev, "Providing format %s using code %d\n",
702 mx3_camera_formats[1].name, code);
706 if (!mx3_camera_packing_supported(fmt))
710 /* Generic pass-through */
713 xlate->host_fmt = fmt;
715 dev_dbg(dev, "Providing format %c%c%c%c in pass-through mode\n",
716 (fmt->fourcc >> (0*8)) & 0xFF,
717 (fmt->fourcc >> (1*8)) & 0xFF,
718 (fmt->fourcc >> (2*8)) & 0xFF,
719 (fmt->fourcc >> (3*8)) & 0xFF);
726 static void configure_geometry(struct mx3_camera_dev *mx3_cam,
727 unsigned int width, unsigned int height,
728 const struct soc_mbus_pixelfmt *fmt)
730 u32 ctrl, width_field, height_field;
732 if (fourcc_to_ipu_pix(fmt->fourcc) == IPU_PIX_FMT_GENERIC) {
734 * As the CSI will be configured to output BAYER, here
735 * the width parameter count the number of samples to
736 * capture to complete the whole image width.
738 unsigned int num, den;
739 int ret = soc_mbus_samples_per_pixel(fmt, &num, &den);
741 width = width * num / den;
744 /* Setup frame size - this cannot be changed on-the-fly... */
745 width_field = width - 1;
746 height_field = height - 1;
747 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_SENS_FRM_SIZE);
749 csi_reg_write(mx3_cam, width_field << 16, CSI_FLASH_STROBE_1);
750 csi_reg_write(mx3_cam, (height_field << 16) | 0x22, CSI_FLASH_STROBE_2);
752 csi_reg_write(mx3_cam, width_field | (height_field << 16), CSI_ACT_FRM_SIZE);
754 /* ...and position */
755 ctrl = csi_reg_read(mx3_cam, CSI_OUT_FRM_CTRL) & 0xffff0000;
756 /* Sensor does the cropping */
757 csi_reg_write(mx3_cam, ctrl | 0 | (0 << 8), CSI_OUT_FRM_CTRL);
760 static int acquire_dma_channel(struct mx3_camera_dev *mx3_cam)
763 struct dma_chan *chan;
764 struct idmac_channel **ichan = &mx3_cam->idmac_channel[0];
765 /* We have to use IDMAC_IC_7 for Bayer / generic data */
766 struct dma_chan_request rq = {.mx3_cam = mx3_cam,
770 dma_cap_set(DMA_SLAVE, mask);
771 dma_cap_set(DMA_PRIVATE, mask);
772 chan = dma_request_channel(mask, chan_filter, &rq);
776 *ichan = to_idmac_chan(chan);
777 (*ichan)->client = mx3_cam;
783 * FIXME: learn to use stride != width, then we can keep stride properly aligned
784 * and support arbitrary (even) widths.
786 static inline void stride_align(__u32 *width)
788 if (ALIGN(*width, 8) < 4096)
789 *width = ALIGN(*width, 8);
791 *width = *width & ~7;
795 * As long as we don't implement host-side cropping and scaling, we can use
796 * default g_crop and cropcap from soc_camera.c
798 static int mx3_camera_set_crop(struct soc_camera_device *icd,
799 const struct v4l2_crop *a)
801 struct v4l2_crop a_writable = *a;
802 struct v4l2_rect *rect = &a_writable.c;
803 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
804 struct mx3_camera_dev *mx3_cam = ici->priv;
805 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
806 struct v4l2_mbus_framefmt mf;
809 soc_camera_limit_side(&rect->left, &rect->width, 0, 2, 4096);
810 soc_camera_limit_side(&rect->top, &rect->height, 0, 2, 4096);
812 ret = v4l2_subdev_call(sd, video, s_crop, a);
816 /* The capture device might have changed its output sizes */
817 ret = v4l2_subdev_call(sd, video, g_mbus_fmt, &mf);
821 if (mf.code != icd->current_fmt->code)
825 /* Ouch! We can only handle 8-byte aligned width... */
826 stride_align(&mf.width);
827 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
832 if (mf.width != icd->user_width || mf.height != icd->user_height)
833 configure_geometry(mx3_cam, mf.width, mf.height,
834 icd->current_fmt->host_fmt);
836 dev_dbg(icd->parent, "Sensor cropped %dx%d\n",
837 mf.width, mf.height);
839 icd->user_width = mf.width;
840 icd->user_height = mf.height;
845 static int mx3_camera_set_fmt(struct soc_camera_device *icd,
846 struct v4l2_format *f)
848 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
849 struct mx3_camera_dev *mx3_cam = ici->priv;
850 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
851 const struct soc_camera_format_xlate *xlate;
852 struct v4l2_pix_format *pix = &f->fmt.pix;
853 struct v4l2_mbus_framefmt mf;
856 xlate = soc_camera_xlate_by_fourcc(icd, pix->pixelformat);
858 dev_warn(icd->parent, "Format %x not found\n",
863 stride_align(&pix->width);
864 dev_dbg(icd->parent, "Set format %dx%d\n", pix->width, pix->height);
867 * Might have to perform a complete interface initialisation like in
868 * ipu_csi_init_interface() in mxc_v4l2_s_param(). Also consider
872 configure_geometry(mx3_cam, pix->width, pix->height, xlate->host_fmt);
874 mf.width = pix->width;
875 mf.height = pix->height;
876 mf.field = pix->field;
877 mf.colorspace = pix->colorspace;
878 mf.code = xlate->code;
880 ret = v4l2_subdev_call(sd, video, s_mbus_fmt, &mf);
884 if (mf.code != xlate->code)
887 if (!mx3_cam->idmac_channel[0]) {
888 ret = acquire_dma_channel(mx3_cam);
893 pix->width = mf.width;
894 pix->height = mf.height;
895 pix->field = mf.field;
896 mx3_cam->field = mf.field;
897 pix->colorspace = mf.colorspace;
898 icd->current_fmt = xlate;
900 dev_dbg(icd->parent, "Sensor set %dx%d\n", pix->width, pix->height);
905 static int mx3_camera_try_fmt(struct soc_camera_device *icd,
906 struct v4l2_format *f)
908 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
909 const struct soc_camera_format_xlate *xlate;
910 struct v4l2_pix_format *pix = &f->fmt.pix;
911 struct v4l2_mbus_framefmt mf;
912 __u32 pixfmt = pix->pixelformat;
915 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
916 if (pixfmt && !xlate) {
917 dev_warn(icd->parent, "Format %x not found\n", pixfmt);
921 /* limit to MX3 hardware capabilities */
922 if (pix->height > 4096)
924 if (pix->width > 4096)
927 /* limit to sensor capabilities */
928 mf.width = pix->width;
929 mf.height = pix->height;
930 mf.field = pix->field;
931 mf.colorspace = pix->colorspace;
932 mf.code = xlate->code;
934 ret = v4l2_subdev_call(sd, video, try_mbus_fmt, &mf);
938 pix->width = mf.width;
939 pix->height = mf.height;
940 pix->colorspace = mf.colorspace;
944 pix->field = V4L2_FIELD_NONE;
946 case V4L2_FIELD_NONE:
949 dev_err(icd->parent, "Field type %d unsupported.\n",
957 static int mx3_camera_reqbufs(struct soc_camera_device *icd,
958 struct v4l2_requestbuffers *p)
963 static unsigned int mx3_camera_poll(struct file *file, poll_table *pt)
965 struct soc_camera_device *icd = file->private_data;
967 return vb2_poll(&icd->vb2_vidq, file, pt);
970 static int mx3_camera_querycap(struct soc_camera_host *ici,
971 struct v4l2_capability *cap)
973 /* cap->name is set by the firendly caller:-> */
974 strlcpy(cap->card, "i.MX3x Camera", sizeof(cap->card));
975 cap->capabilities = V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_STREAMING;
980 static int mx3_camera_set_bus_param(struct soc_camera_device *icd)
982 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
983 struct soc_camera_host *ici = to_soc_camera_host(icd->parent);
984 struct mx3_camera_dev *mx3_cam = ici->priv;
985 struct v4l2_mbus_config cfg = {.type = V4L2_MBUS_PARALLEL,};
986 u32 pixfmt = icd->current_fmt->host_fmt->fourcc;
987 unsigned long bus_flags, common_flags;
989 const struct soc_mbus_pixelfmt *fmt;
992 const struct soc_camera_format_xlate *xlate;
993 struct device *dev = icd->parent;
995 fmt = soc_mbus_get_fmtdesc(icd->current_fmt->code);
999 xlate = soc_camera_xlate_by_fourcc(icd, pixfmt);
1001 dev_warn(dev, "Format %x not found\n", pixfmt);
1005 buswidth = fmt->bits_per_sample;
1006 ret = test_platform_param(mx3_cam, buswidth, &bus_flags);
1008 dev_dbg(dev, "requested bus width %d bit: %d\n", buswidth, ret);
1013 ret = v4l2_subdev_call(sd, video, g_mbus_config, &cfg);
1015 common_flags = soc_mbus_config_compatible(&cfg,
1017 if (!common_flags) {
1018 dev_warn(icd->parent,
1019 "Flags incompatible: camera 0x%x, host 0x%lx\n",
1020 cfg.flags, bus_flags);
1023 } else if (ret != -ENOIOCTLCMD) {
1026 common_flags = bus_flags;
1029 dev_dbg(dev, "Flags cam: 0x%x host: 0x%lx common: 0x%lx\n",
1030 cfg.flags, bus_flags, common_flags);
1032 /* Make choices, based on platform preferences */
1033 if ((common_flags & V4L2_MBUS_HSYNC_ACTIVE_HIGH) &&
1034 (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)) {
1035 if (mx3_cam->platform_flags & MX3_CAMERA_HSP)
1036 common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_HIGH;
1038 common_flags &= ~V4L2_MBUS_HSYNC_ACTIVE_LOW;
1041 if ((common_flags & V4L2_MBUS_VSYNC_ACTIVE_HIGH) &&
1042 (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)) {
1043 if (mx3_cam->platform_flags & MX3_CAMERA_VSP)
1044 common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_HIGH;
1046 common_flags &= ~V4L2_MBUS_VSYNC_ACTIVE_LOW;
1049 if ((common_flags & V4L2_MBUS_DATA_ACTIVE_HIGH) &&
1050 (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)) {
1051 if (mx3_cam->platform_flags & MX3_CAMERA_DP)
1052 common_flags &= ~V4L2_MBUS_DATA_ACTIVE_HIGH;
1054 common_flags &= ~V4L2_MBUS_DATA_ACTIVE_LOW;
1057 if ((common_flags & V4L2_MBUS_PCLK_SAMPLE_RISING) &&
1058 (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)) {
1059 if (mx3_cam->platform_flags & MX3_CAMERA_PCP)
1060 common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_RISING;
1062 common_flags &= ~V4L2_MBUS_PCLK_SAMPLE_FALLING;
1065 cfg.flags = common_flags;
1066 ret = v4l2_subdev_call(sd, video, s_mbus_config, &cfg);
1067 if (ret < 0 && ret != -ENOIOCTLCMD) {
1068 dev_dbg(dev, "camera s_mbus_config(0x%lx) returned %d\n",
1074 * So far only gated clock mode is supported. Add a line
1075 * (3 << CSI_SENS_CONF_SENS_PRTCL_SHIFT) |
1076 * below and select the required mode when supporting other
1077 * synchronisation protocols.
1079 sens_conf = csi_reg_read(mx3_cam, CSI_SENS_CONF) &
1080 ~((1 << CSI_SENS_CONF_VSYNC_POL_SHIFT) |
1081 (1 << CSI_SENS_CONF_HSYNC_POL_SHIFT) |
1082 (1 << CSI_SENS_CONF_DATA_POL_SHIFT) |
1083 (1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT) |
1084 (3 << CSI_SENS_CONF_DATA_FMT_SHIFT) |
1085 (3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT));
1087 /* TODO: Support RGB and YUV formats */
1089 /* This has been set in mx3_camera_activate(), but we clear it above */
1090 sens_conf |= CSI_SENS_CONF_DATA_FMT_BAYER;
1092 if (common_flags & V4L2_MBUS_PCLK_SAMPLE_FALLING)
1093 sens_conf |= 1 << CSI_SENS_CONF_PIX_CLK_POL_SHIFT;
1094 if (common_flags & V4L2_MBUS_HSYNC_ACTIVE_LOW)
1095 sens_conf |= 1 << CSI_SENS_CONF_HSYNC_POL_SHIFT;
1096 if (common_flags & V4L2_MBUS_VSYNC_ACTIVE_LOW)
1097 sens_conf |= 1 << CSI_SENS_CONF_VSYNC_POL_SHIFT;
1098 if (common_flags & V4L2_MBUS_DATA_ACTIVE_LOW)
1099 sens_conf |= 1 << CSI_SENS_CONF_DATA_POL_SHIFT;
1101 /* Just do what we're asked to do */
1102 switch (xlate->host_fmt->bits_per_sample) {
1104 dw = 0 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1107 dw = 1 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1110 dw = 2 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1114 * Actually it can only be 15 now, default is just to silence
1118 dw = 3 << CSI_SENS_CONF_DATA_WIDTH_SHIFT;
1121 csi_reg_write(mx3_cam, sens_conf | dw, CSI_SENS_CONF);
1123 dev_dbg(dev, "Set SENS_CONF to %x\n", sens_conf | dw);
1128 static struct soc_camera_host_ops mx3_soc_camera_host_ops = {
1129 .owner = THIS_MODULE,
1130 .add = mx3_camera_add_device,
1131 .remove = mx3_camera_remove_device,
1132 .clock_start = mx3_camera_clock_start,
1133 .clock_stop = mx3_camera_clock_stop,
1134 .set_crop = mx3_camera_set_crop,
1135 .set_fmt = mx3_camera_set_fmt,
1136 .try_fmt = mx3_camera_try_fmt,
1137 .get_formats = mx3_camera_get_formats,
1138 .init_videobuf2 = mx3_camera_init_videobuf,
1139 .reqbufs = mx3_camera_reqbufs,
1140 .poll = mx3_camera_poll,
1141 .querycap = mx3_camera_querycap,
1142 .set_bus_param = mx3_camera_set_bus_param,
1145 static int mx3_camera_probe(struct platform_device *pdev)
1147 struct mx3_camera_dev *mx3_cam;
1148 struct resource *res;
1151 struct soc_camera_host *soc_host;
1153 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1154 base = devm_ioremap_resource(&pdev->dev, res);
1156 return PTR_ERR(base);
1158 mx3_cam = devm_kzalloc(&pdev->dev, sizeof(*mx3_cam), GFP_KERNEL);
1160 dev_err(&pdev->dev, "Could not allocate mx3 camera object\n");
1164 mx3_cam->clk = devm_clk_get(&pdev->dev, NULL);
1165 if (IS_ERR(mx3_cam->clk))
1166 return PTR_ERR(mx3_cam->clk);
1168 mx3_cam->pdata = pdev->dev.platform_data;
1169 mx3_cam->platform_flags = mx3_cam->pdata->flags;
1170 if (!(mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_MASK)) {
1172 * Platform hasn't set available data widths. This is bad.
1173 * Warn and use a default.
1175 dev_warn(&pdev->dev, "WARNING! Platform hasn't set available "
1176 "data widths, using default 8 bit\n");
1177 mx3_cam->platform_flags |= MX3_CAMERA_DATAWIDTH_8;
1179 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_4)
1180 mx3_cam->width_flags = 1 << 3;
1181 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_8)
1182 mx3_cam->width_flags |= 1 << 7;
1183 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_10)
1184 mx3_cam->width_flags |= 1 << 9;
1185 if (mx3_cam->platform_flags & MX3_CAMERA_DATAWIDTH_15)
1186 mx3_cam->width_flags |= 1 << 14;
1188 mx3_cam->mclk = mx3_cam->pdata->mclk_10khz * 10000;
1189 if (!mx3_cam->mclk) {
1190 dev_warn(&pdev->dev,
1191 "mclk_10khz == 0! Please, fix your platform data. "
1192 "Using default 20MHz\n");
1193 mx3_cam->mclk = 20000000;
1196 /* list of video-buffers */
1197 INIT_LIST_HEAD(&mx3_cam->capture);
1198 spin_lock_init(&mx3_cam->lock);
1200 mx3_cam->base = base;
1202 soc_host = &mx3_cam->soc_host;
1203 soc_host->drv_name = MX3_CAM_DRV_NAME;
1204 soc_host->ops = &mx3_soc_camera_host_ops;
1205 soc_host->priv = mx3_cam;
1206 soc_host->v4l2_dev.dev = &pdev->dev;
1207 soc_host->nr = pdev->id;
1209 mx3_cam->alloc_ctx = vb2_dma_contig_init_ctx(&pdev->dev);
1210 if (IS_ERR(mx3_cam->alloc_ctx))
1211 return PTR_ERR(mx3_cam->alloc_ctx);
1213 err = soc_camera_host_register(soc_host);
1217 /* IDMAC interface */
1223 vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx);
1227 static int mx3_camera_remove(struct platform_device *pdev)
1229 struct soc_camera_host *soc_host = to_soc_camera_host(&pdev->dev);
1230 struct mx3_camera_dev *mx3_cam = container_of(soc_host,
1231 struct mx3_camera_dev, soc_host);
1233 soc_camera_host_unregister(soc_host);
1236 * The channel has either not been allocated,
1237 * or should have been released
1239 if (WARN_ON(mx3_cam->idmac_channel[0]))
1240 dma_release_channel(&mx3_cam->idmac_channel[0]->dma_chan);
1242 vb2_dma_contig_cleanup_ctx(mx3_cam->alloc_ctx);
1249 static struct platform_driver mx3_camera_driver = {
1251 .name = MX3_CAM_DRV_NAME,
1253 .probe = mx3_camera_probe,
1254 .remove = mx3_camera_remove,
1257 module_platform_driver(mx3_camera_driver);
1259 MODULE_DESCRIPTION("i.MX3x SoC Camera Host driver");
1260 MODULE_AUTHOR("Guennadi Liakhovetski <lg@denx.de>");
1261 MODULE_LICENSE("GPL v2");
1262 MODULE_VERSION("0.2.3");
1263 MODULE_ALIAS("platform:" MX3_CAM_DRV_NAME);