drivers/media/platform/vsp1/vsp1_bru.c

   1 /*
   2  * vsp1_bru.c  --  R-Car VSP1 Blend ROP Unit
   3  *
   4  * Copyright (C) 2013 Renesas Corporation
   5  *
   6  * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
   7  *
   8  * This program is free software; you can redistribute it and/or modify
   9  * it under the terms of the GNU General Public License as published by
  10  * the Free Software Foundation; either version 2 of the License, or
  11  * (at your option) any later version.
  12  */
  13
  14 #include <linux/device.h>
  15 #include <linux/gfp.h>
  16
  17 #include <media/v4l2-subdev.h>
  18
  19 #include "vsp1.h"
  20 #include "vsp1_bru.h"
  21 #include "vsp1_rwpf.h"
  22 #include "vsp1_video.h"
  23
  24 #define BRU_MIN_SIZE                            1U
  25 #define BRU_MAX_SIZE                            8190U
  26
  27 /* -----------------------------------------------------------------------------
  28  * Device Access
  29  */
  30
  31 static inline void vsp1_bru_write(struct vsp1_bru *bru, u32 reg, u32 data)
  32 {
  33         vsp1_mod_write(&bru->entity, reg, data);
  34 }
  35
  36 /* -----------------------------------------------------------------------------
  37  * Controls
  38  */
  39
  40 static int bru_s_ctrl(struct v4l2_ctrl *ctrl)
  41 {
  42         struct vsp1_bru *bru =
  43                 container_of(ctrl->handler, struct vsp1_bru, ctrls);
  44
  45         switch (ctrl->id) {
  46         case V4L2_CID_BG_COLOR:
  47                 bru->bgcolor = ctrl->val;
  48                 break;
  49         }
  50
  51         return 0;
  52 }
  53
  54 static const struct v4l2_ctrl_ops bru_ctrl_ops = {
  55         .s_ctrl = bru_s_ctrl,
  56 };
  57
  58 /* -----------------------------------------------------------------------------
  59  * V4L2 Subdevice Core Operations
  60  */
  61
  62 static int bru_s_stream(struct v4l2_subdev *subdev, int enable)
  63 {
  64         struct vsp1_pipeline *pipe = to_vsp1_pipeline(&subdev->entity);
  65         struct vsp1_bru *bru = to_bru(subdev);
  66         struct v4l2_mbus_framefmt *format;
  67         unsigned int flags;
  68         unsigned int i;
  69
  70         if (!enable)
  71                 return 0;
  72
  73         format = &bru->entity.formats[bru->entity.source_pad];
  74
  75         /* The hardware is extremely flexible but we have no userspace API to
  76          * expose all the parameters, nor is it clear whether we would have use
  77          * cases for all the supported modes. Let's just harcode the parameters
  78          * to sane default values for now.
  79          */
  80
  81         /* Disable dithering and enable color data normalization unless the
  82          * format at the pipeline output is premultiplied.
  83          */
  84         flags = pipe->output ? pipe->output->format.flags : 0;
  85         vsp1_bru_write(bru, VI6_BRU_INCTRL,
  86                        flags & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA ?
  87                        0 : VI6_BRU_INCTRL_NRM);
  88
  89         /* Set the background position to cover the whole output image and
  90          * configure its color.
  91          */
  92         vsp1_bru_write(bru, VI6_BRU_VIRRPF_SIZE,
  93                        (format->width << VI6_BRU_VIRRPF_SIZE_HSIZE_SHIFT) |
  94                        (format->height << VI6_BRU_VIRRPF_SIZE_VSIZE_SHIFT));
  95         vsp1_bru_write(bru, VI6_BRU_VIRRPF_LOC, 0);
  96
  97         vsp1_bru_write(bru, VI6_BRU_VIRRPF_COL, bru->bgcolor |
  98                        (0xff << VI6_BRU_VIRRPF_COL_A_SHIFT));
  99
 100         /* Route BRU input 1 as SRC input to the ROP unit and configure the ROP
 101          * unit with a NOP operation to make BRU input 1 available as the
 102          * Blend/ROP unit B SRC input.
 103          */
 104         vsp1_bru_write(bru, VI6_BRU_ROP, VI6_BRU_ROP_DSTSEL_BRUIN(1) |
 105                        VI6_BRU_ROP_CROP(VI6_ROP_NOP) |
 106                        VI6_BRU_ROP_AROP(VI6_ROP_NOP));
 107
 108         for (i = 0; i < bru->entity.source_pad; ++i) {
 109                 bool premultiplied = false;
 110                 u32 ctrl = 0;
 111
 112                 /* Configure all Blend/ROP units corresponding to an enabled BRU
 113                  * input for alpha blending. Blend/ROP units corresponding to
 114                  * disabled BRU inputs are used in ROP NOP mode to ignore the
 115                  * SRC input.
 116                  */
 117                 if (bru->inputs[i].rpf) {
 118                         ctrl |= VI6_BRU_CTRL_RBC;
 119
 120                         premultiplied = bru->inputs[i].rpf->format.flags
 121                                       & V4L2_PIX_FMT_FLAG_PREMUL_ALPHA;
 122                 } else {
 123                         ctrl |= VI6_BRU_CTRL_CROP(VI6_ROP_NOP)
 124                              |  VI6_BRU_CTRL_AROP(VI6_ROP_NOP);
 125                 }
 126
 127                 /* Select the virtual RPF as the Blend/ROP unit A DST input to
 128                  * serve as a background color.
 129                  */
 130                 if (i == 0)
 131                         ctrl |= VI6_BRU_CTRL_DSTSEL_VRPF;
 132
 133                 /* Route BRU inputs 0 to 3 as SRC inputs to Blend/ROP units A to
 134                  * D in that order. The Blend/ROP unit B SRC is hardwired to the
 135                  * ROP unit output, the corresponding register bits must be set
 136                  * to 0.
 137                  */
 138                 if (i != 1)
 139                         ctrl |= VI6_BRU_CTRL_SRCSEL_BRUIN(i);
 140
 141                 vsp1_bru_write(bru, VI6_BRU_CTRL(i), ctrl);
 142
 143                 /* Harcode the blending formula to
 144                  *
 145                  *      DSTc = DSTc * (1 - SRCa) + SRCc * SRCa
 146                  *      DSTa = DSTa * (1 - SRCa) + SRCa
 147                  *
 148                  * when the SRC input isn't premultiplied, and to
 149                  *
 150                  *      DSTc = DSTc * (1 - SRCa) + SRCc
 151                  *      DSTa = DSTa * (1 - SRCa) + SRCa
 152                  *
 153                  * otherwise.
 154                  */
 155                 vsp1_bru_write(bru, VI6_BRU_BLD(i),
 156                                VI6_BRU_BLD_CCMDX_255_SRC_A |
 157                                (premultiplied ? VI6_BRU_BLD_CCMDY_COEFY :
 158                                                 VI6_BRU_BLD_CCMDY_SRC_A) |
 159                                VI6_BRU_BLD_ACMDX_255_SRC_A |
 160                                VI6_BRU_BLD_ACMDY_COEFY |
 161                                (0xff << VI6_BRU_BLD_COEFY_SHIFT));
 162         }
 163
 164         return 0;
 165 }
 166
 167 /* -----------------------------------------------------------------------------
 168  * V4L2 Subdevice Pad Operations
 169  */
 170
 171 /*
 172  * The BRU can't perform format conversion, all sink and source formats must be
 173  * identical. We pick the format on the first sink pad (pad 0) and propagate it
 174  * to all other pads.
 175  */
 176
 177 static int bru_enum_mbus_code(struct v4l2_subdev *subdev,
 178                               struct v4l2_subdev_pad_config *cfg,
 179                               struct v4l2_subdev_mbus_code_enum *code)
 180 {
 181         static const unsigned int codes[] = {
 182                 MEDIA_BUS_FMT_ARGB8888_1X32,
 183                 MEDIA_BUS_FMT_AYUV8_1X32,
 184         };
 185         struct vsp1_bru *bru = to_bru(subdev);
 186         struct v4l2_mbus_framefmt *format;
 187
 188         if (code->pad == BRU_PAD_SINK(0)) {
 189                 if (code->index >= ARRAY_SIZE(codes))
 190                         return -EINVAL;
 191
 192                 code->code = codes[code->index];
 193         } else {
 194                 if (code->index)
 195                         return -EINVAL;
 196
 197                 format = vsp1_entity_get_pad_format(&bru->entity, cfg,
 198                                                     BRU_PAD_SINK(0), code->which);
 199                 code->code = format->code;
 200         }
 201
 202         return 0;
 203 }
 204
 205 static int bru_enum_frame_size(struct v4l2_subdev *subdev,
 206                                struct v4l2_subdev_pad_config *cfg,
 207                                struct v4l2_subdev_frame_size_enum *fse)
 208 {
 209         if (fse->index)
 210                 return -EINVAL;
 211
 212         if (fse->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
 213             fse->code != MEDIA_BUS_FMT_AYUV8_1X32)
 214                 return -EINVAL;
 215
 216         fse->min_width = BRU_MIN_SIZE;
 217         fse->max_width = BRU_MAX_SIZE;
 218         fse->min_height = BRU_MIN_SIZE;
 219         fse->max_height = BRU_MAX_SIZE;
 220
 221         return 0;
 222 }
 223
 224 static struct v4l2_rect *bru_get_compose(struct vsp1_bru *bru,
 225                                          struct v4l2_subdev_pad_config *cfg,
 226                                          unsigned int pad, u32 which)
 227 {
 228         switch (which) {
 229         case V4L2_SUBDEV_FORMAT_TRY:
 230                 return v4l2_subdev_get_try_crop(&bru->entity.subdev, cfg, pad);
 231         case V4L2_SUBDEV_FORMAT_ACTIVE:
 232                 return &bru->inputs[pad].compose;
 233         default:
 234                 return NULL;
 235         }
 236 }
 237
 238 static int bru_get_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg,
 239                           struct v4l2_subdev_format *fmt)
 240 {
 241         struct vsp1_bru *bru = to_bru(subdev);
 242
 243         fmt->format = *vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad,
 244                                                   fmt->which);
 245
 246         return 0;
 247 }
 248
 249 static void bru_try_format(struct vsp1_bru *bru, struct v4l2_subdev_pad_config *cfg,
 250                            unsigned int pad, struct v4l2_mbus_framefmt *fmt,
 251                            enum v4l2_subdev_format_whence which)
 252 {
 253         struct v4l2_mbus_framefmt *format;
 254
 255         switch (pad) {
 256         case BRU_PAD_SINK(0):
 257                 /* Default to YUV if the requested format is not supported. */
 258                 if (fmt->code != MEDIA_BUS_FMT_ARGB8888_1X32 &&
 259                     fmt->code != MEDIA_BUS_FMT_AYUV8_1X32)
 260                         fmt->code = MEDIA_BUS_FMT_AYUV8_1X32;
 261                 break;
 262
 263         default:
 264                 /* The BRU can't perform format conversion. */
 265                 format = vsp1_entity_get_pad_format(&bru->entity, cfg,
 266                                                     BRU_PAD_SINK(0), which);
 267                 fmt->code = format->code;
 268                 break;
 269         }
 270
 271         fmt->width = clamp(fmt->width, BRU_MIN_SIZE, BRU_MAX_SIZE);
 272         fmt->height = clamp(fmt->height, BRU_MIN_SIZE, BRU_MAX_SIZE);
 273         fmt->field = V4L2_FIELD_NONE;
 274         fmt->colorspace = V4L2_COLORSPACE_SRGB;
 275 }
 276
 277 static int bru_set_format(struct v4l2_subdev *subdev, struct v4l2_subdev_pad_config *cfg,
 278                           struct v4l2_subdev_format *fmt)
 279 {
 280         struct vsp1_bru *bru = to_bru(subdev);
 281         struct v4l2_mbus_framefmt *format;
 282
 283         bru_try_format(bru, cfg, fmt->pad, &fmt->format, fmt->which);
 284
 285         format = vsp1_entity_get_pad_format(&bru->entity, cfg, fmt->pad,
 286                                             fmt->which);
 287         *format = fmt->format;
 288
 289         /* Reset the compose rectangle */
 290         if (fmt->pad != bru->entity.source_pad) {
 291                 struct v4l2_rect *compose;
 292
 293                 compose = bru_get_compose(bru, cfg, fmt->pad, fmt->which);
 294                 compose->left = 0;
 295                 compose->top = 0;
 296                 compose->width = format->width;
 297                 compose->height = format->height;
 298         }
 299
 300         /* Propagate the format code to all pads */
 301         if (fmt->pad == BRU_PAD_SINK(0)) {
 302                 unsigned int i;
 303
 304                 for (i = 0; i <= bru->entity.source_pad; ++i) {
 305                         format = vsp1_entity_get_pad_format(&bru->entity, cfg,
 306                                                             i, fmt->which);
 307                         format->code = fmt->format.code;
 308                 }
 309         }
 310
 311         return 0;
 312 }
 313
 314 static int bru_get_selection(struct v4l2_subdev *subdev,
 315                              struct v4l2_subdev_pad_config *cfg,
 316                              struct v4l2_subdev_selection *sel)
 317 {
 318         struct vsp1_bru *bru = to_bru(subdev);
 319
 320         if (sel->pad == bru->entity.source_pad)
 321                 return -EINVAL;
 322
 323         switch (sel->target) {
 324         case V4L2_SEL_TGT_COMPOSE_BOUNDS:
 325                 sel->r.left = 0;
 326                 sel->r.top = 0;
 327                 sel->r.width = BRU_MAX_SIZE;
 328                 sel->r.height = BRU_MAX_SIZE;
 329                 return 0;
 330
 331         case V4L2_SEL_TGT_COMPOSE:
 332                 sel->r = *bru_get_compose(bru, cfg, sel->pad, sel->which);
 333                 return 0;
 334
 335         default:
 336                 return -EINVAL;
 337         }
 338 }
 339
 340 static int bru_set_selection(struct v4l2_subdev *subdev,
 341                              struct v4l2_subdev_pad_config *cfg,
 342                              struct v4l2_subdev_selection *sel)
 343 {
 344         struct vsp1_bru *bru = to_bru(subdev);
 345         struct v4l2_mbus_framefmt *format;
 346         struct v4l2_rect *compose;
 347
 348         if (sel->pad == bru->entity.source_pad)
 349                 return -EINVAL;
 350
 351         if (sel->target != V4L2_SEL_TGT_COMPOSE)
 352                 return -EINVAL;
 353
 354         /* The compose rectangle top left corner must be inside the output
 355          * frame.
 356          */
 357         format = vsp1_entity_get_pad_format(&bru->entity, cfg,
 358                                             bru->entity.source_pad, sel->which);
 359         sel->r.left = clamp_t(unsigned int, sel->r.left, 0, format->width - 1);
 360         sel->r.top = clamp_t(unsigned int, sel->r.top, 0, format->height - 1);
 361
 362         /* Scaling isn't supported, the compose rectangle size must be identical
 363          * to the sink format size.
 364          */
 365         format = vsp1_entity_get_pad_format(&bru->entity, cfg, sel->pad,
 366                                             sel->which);
 367         sel->r.width = format->width;
 368         sel->r.height = format->height;
 369
 370         compose = bru_get_compose(bru, cfg, sel->pad, sel->which);
 371         *compose = sel->r;
 372
 373         return 0;
 374 }
 375
 376 /* -----------------------------------------------------------------------------
 377  * V4L2 Subdevice Operations
 378  */
 379
 380 static struct v4l2_subdev_video_ops bru_video_ops = {
 381         .s_stream = bru_s_stream,
 382 };
 383
 384 static struct v4l2_subdev_pad_ops bru_pad_ops = {
 385         .enum_mbus_code = bru_enum_mbus_code,
 386         .enum_frame_size = bru_enum_frame_size,
 387         .get_fmt = bru_get_format,
 388         .set_fmt = bru_set_format,
 389         .get_selection = bru_get_selection,
 390         .set_selection = bru_set_selection,
 391 };
 392
 393 static struct v4l2_subdev_ops bru_ops = {
 394         .video  = &bru_video_ops,
 395         .pad    = &bru_pad_ops,
 396 };
 397
 398 /* -----------------------------------------------------------------------------
 399  * Initialization and Cleanup
 400  */
 401
 402 struct vsp1_bru *vsp1_bru_create(struct vsp1_device *vsp1)
 403 {
 404         struct v4l2_subdev *subdev;
 405         struct vsp1_bru *bru;
 406         int ret;
 407
 408         bru = devm_kzalloc(vsp1->dev, sizeof(*bru), GFP_KERNEL);
 409         if (bru == NULL)
 410                 return ERR_PTR(-ENOMEM);
 411
 412         bru->entity.type = VSP1_ENTITY_BRU;
 413
 414         ret = vsp1_entity_init(vsp1, &bru->entity,
 415                                vsp1->info->num_bru_inputs + 1);
 416         if (ret < 0)
 417                 return ERR_PTR(ret);
 418
 419         /* Initialize the V4L2 subdev. */
 420         subdev = &bru->entity.subdev;
 421         v4l2_subdev_init(subdev, &bru_ops);
 422
 423         subdev->entity.ops = &vsp1->media_ops;
 424         subdev->internal_ops = &vsp1_subdev_internal_ops;
 425         snprintf(subdev->name, sizeof(subdev->name), "%s bru",
 426                  dev_name(vsp1->dev));
 427         v4l2_set_subdevdata(subdev, bru);
 428         subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
 429
 430         vsp1_entity_init_formats(subdev, NULL);
 431
 432         /* Initialize the control handler. */
 433         v4l2_ctrl_handler_init(&bru->ctrls, 1);
 434         v4l2_ctrl_new_std(&bru->ctrls, &bru_ctrl_ops, V4L2_CID_BG_COLOR,
 435                           0, 0xffffff, 1, 0);
 436
 437         bru->bgcolor = 0;
 438
 439         bru->entity.subdev.ctrl_handler = &bru->ctrls;
 440
 441         if (bru->ctrls.error) {
 442                 dev_err(vsp1->dev, "bru: failed to initialize controls\n");
 443                 ret = bru->ctrls.error;
 444                 vsp1_entity_destroy(&bru->entity);
 445                 return ERR_PTR(ret);
 446         }
 447
 448         return bru;
 449 }