2 * vsp1_dl.h -- R-Car VSP1 Display List
4 * Copyright (C) 2015 Renesas Corporation
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/device.h>
15 #include <linux/dma-mapping.h>
16 #include <linux/gfp.h>
17 #include <linux/slab.h>
25 * - Display-related interrupts (can be used for vblank evasion ?)
26 * - Display-list enable
27 * - Header-less for WPF0
31 #define VSP1_DL_BODY_SIZE (2 * 4 * 256)
32 #define VSP1_DL_NUM_LISTS 3
34 struct vsp1_dl_entry {
37 } __attribute__((__packed__));
45 struct vsp1_dl_entry *body;
50 * struct vsp1_dl - Display List manager
51 * @vsp1: the VSP1 device
52 * @lock: protects the active, queued and pending lists
53 * @lists.all: array of all allocate display lists
54 * @lists.active: list currently being processed (loaded) by hardware
55 * @lists.queued: list queued to the hardware (written to the DL registers)
56 * @lists.pending: list waiting to be queued to the hardware
57 * @lists.write: list being written to by software
60 struct vsp1_device *vsp1;
69 struct vsp1_dl_list all[VSP1_DL_NUM_LISTS];
71 struct vsp1_dl_list *active;
72 struct vsp1_dl_list *queued;
73 struct vsp1_dl_list *pending;
74 struct vsp1_dl_list *write;
78 /* -----------------------------------------------------------------------------
79 * Display List Transaction Management
82 static void vsp1_dl_free_list(struct vsp1_dl_list *list)
90 void vsp1_dl_reset(struct vsp1_dl *dl)
94 dl->lists.active = NULL;
95 dl->lists.queued = NULL;
96 dl->lists.pending = NULL;
97 dl->lists.write = NULL;
99 for (i = 0; i < ARRAY_SIZE(dl->lists.all); ++i)
100 dl->lists.all[i].in_use = false;
103 void vsp1_dl_begin(struct vsp1_dl *dl)
105 struct vsp1_dl_list *list = NULL;
109 spin_lock_irqsave(&dl->lock, flags);
111 for (i = 0; i < ARRAY_SIZE(dl->lists.all); ++i) {
112 if (!dl->lists.all[i].in_use) {
113 list = &dl->lists.all[i];
119 list = dl->lists.pending;
120 dl->lists.pending = NULL;
123 spin_unlock_irqrestore(&dl->lock, flags);
125 dl->lists.write = list;
131 void vsp1_dl_add(struct vsp1_dl *dl, u32 reg, u32 data)
133 struct vsp1_dl_list *list = dl->lists.write;
135 list->body[list->reg_count].addr = reg;
136 list->body[list->reg_count].data = data;
140 void vsp1_dl_commit(struct vsp1_dl *dl)
142 struct vsp1_device *vsp1 = dl->vsp1;
143 struct vsp1_dl_list *list;
147 list = dl->lists.write;
148 dl->lists.write = NULL;
150 spin_lock_irqsave(&dl->lock, flags);
152 /* Once the UPD bit has been set the hardware can start processing the
153 * display list at any time and we can't touch the address and size
154 * registers. In that case mark the update as pending, it will be
155 * queued up to the hardware by the frame end interrupt handler.
157 update = !!(vsp1_read(vsp1, VI6_DL_BODY_SIZE) & VI6_DL_BODY_SIZE_UPD);
159 vsp1_dl_free_list(dl->lists.pending);
160 dl->lists.pending = list;
164 /* Program the hardware with the display list body address and size.
165 * The UPD bit will be cleared by the device when the display list is
168 vsp1_write(vsp1, VI6_DL_HDR_ADDR(0), list->dma);
169 vsp1_write(vsp1, VI6_DL_BODY_SIZE, VI6_DL_BODY_SIZE_UPD |
170 (list->reg_count * 8));
172 vsp1_dl_free_list(dl->lists.queued);
173 dl->lists.queued = list;
176 spin_unlock_irqrestore(&dl->lock, flags);
179 /* -----------------------------------------------------------------------------
183 void vsp1_dl_irq_display_start(struct vsp1_dl *dl)
185 spin_lock(&dl->lock);
187 /* The display start interrupt signals the end of the display list
188 * processing by the device. The active display list, if any, won't be
189 * accessed anymore and can be reused.
191 if (dl->lists.active) {
192 vsp1_dl_free_list(dl->lists.active);
193 dl->lists.active = NULL;
196 spin_unlock(&dl->lock);
199 void vsp1_dl_irq_frame_end(struct vsp1_dl *dl)
201 struct vsp1_device *vsp1 = dl->vsp1;
203 spin_lock(&dl->lock);
205 /* The UPD bit set indicates that the commit operation raced with the
206 * interrupt and occurred after the frame end event and UPD clear but
207 * before interrupt processing. The hardware hasn't taken the update
208 * into account yet, we'll thus skip one frame and retry.
210 if (vsp1_read(vsp1, VI6_DL_BODY_SIZE) & VI6_DL_BODY_SIZE_UPD)
213 /* The device starts processing the queued display list right after the
214 * frame end interrupt. The display list thus becomes active.
216 if (dl->lists.queued) {
217 WARN_ON(dl->lists.active);
218 dl->lists.active = dl->lists.queued;
219 dl->lists.queued = NULL;
222 /* Now that the UPD bit has been cleared we can queue the next display
223 * list to the hardware if one has been prepared.
225 if (dl->lists.pending) {
226 struct vsp1_dl_list *list = dl->lists.pending;
228 vsp1_write(vsp1, VI6_DL_HDR_ADDR(0), list->dma);
229 vsp1_write(vsp1, VI6_DL_BODY_SIZE, VI6_DL_BODY_SIZE_UPD |
230 (list->reg_count * 8));
232 dl->lists.queued = list;
233 dl->lists.pending = NULL;
237 spin_unlock(&dl->lock);
240 /* -----------------------------------------------------------------------------
244 void vsp1_dl_setup(struct vsp1_device *vsp1)
246 u32 ctrl = (256 << VI6_DL_CTRL_AR_WAIT_SHIFT)
247 | VI6_DL_CTRL_DC2 | VI6_DL_CTRL_DC1 | VI6_DL_CTRL_DC0
250 /* The DRM pipeline operates with header-less display lists in
251 * Continuous Frame Mode.
254 ctrl |= VI6_DL_CTRL_CFM0 | VI6_DL_CTRL_NH0;
256 vsp1_write(vsp1, VI6_DL_CTRL, ctrl);
257 vsp1_write(vsp1, VI6_DL_SWAP, VI6_DL_SWAP_LWS);
260 /* -----------------------------------------------------------------------------
261 * Initialization and Cleanup
264 struct vsp1_dl *vsp1_dl_create(struct vsp1_device *vsp1)
269 dl = kzalloc(sizeof(*dl), GFP_KERNEL);
273 spin_lock_init(&dl->lock);
276 dl->size = VSP1_DL_BODY_SIZE * ARRAY_SIZE(dl->lists.all);
278 dl->mem = dma_alloc_wc(vsp1->dev, dl->size, &dl->dma,
285 for (i = 0; i < ARRAY_SIZE(dl->lists.all); ++i) {
286 struct vsp1_dl_list *list = &dl->lists.all[i];
288 list->size = VSP1_DL_BODY_SIZE;
290 list->in_use = false;
291 list->dma = dl->dma + VSP1_DL_BODY_SIZE * i;
292 list->body = dl->mem + VSP1_DL_BODY_SIZE * i;
298 void vsp1_dl_destroy(struct vsp1_dl *dl)
300 dma_free_wc(dl->vsp1->dev, dl->size, dl->mem, dl->dma);