2 * vsp1_drm.c -- R-Car VSP1 DRM API
4 * Copyright (C) 2015 Renesas Electronics Corporation
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/device.h>
15 #include <linux/slab.h>
17 #include <media/media-entity.h>
18 #include <media/v4l2-subdev.h>
19 #include <media/vsp1.h>
26 #include "vsp1_pipe.h"
27 #include "vsp1_rwpf.h"
30 /* -----------------------------------------------------------------------------
34 void vsp1_drm_display_start(struct vsp1_device *vsp1)
36 vsp1_dlm_irq_display_start(vsp1->drm->pipe.output->dlm);
39 /* -----------------------------------------------------------------------------
43 int vsp1_du_init(struct device *dev)
45 struct vsp1_device *vsp1 = dev_get_drvdata(dev);
52 EXPORT_SYMBOL_GPL(vsp1_du_init);
55 * vsp1_du_setup_lif - Setup the output part of the VSP pipeline
56 * @dev: the VSP device
57 * @cfg: the LIF configuration
59 * Configure the output part of VSP DRM pipeline for the given frame @cfg.width
60 * and @cfg.height. This sets up formats on the BRU source pad, the WPF0 sink
61 * and source pads, and the LIF sink pad.
63 * As the media bus code on the BRU source pad is conditioned by the
64 * configuration of the BRU sink 0 pad, we also set up the formats on all BRU
65 * sinks, even if the configuration will be overwritten later by
66 * vsp1_du_setup_rpf(). This ensures that the BRU configuration is set to a well
69 * Return 0 on success or a negative error code on failure.
71 int vsp1_du_setup_lif(struct device *dev, const struct vsp1_du_lif_config *cfg)
73 struct vsp1_device *vsp1 = dev_get_drvdata(dev);
74 struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
75 struct vsp1_bru *bru = vsp1->bru;
76 struct v4l2_subdev_format format;
82 * NULL configuration means the CRTC is being disabled, stop
83 * the pipeline and turn the light off.
85 ret = vsp1_pipeline_stop(pipe);
86 if (ret == -ETIMEDOUT)
87 dev_err(vsp1->dev, "DRM pipeline stop timeout\n");
89 media_pipeline_stop(&pipe->output->entity.subdev.entity);
91 for (i = 0; i < bru->entity.source_pad; ++i) {
92 vsp1->drm->inputs[i].enabled = false;
93 bru->inputs[i].rpf = NULL;
94 pipe->inputs[i] = NULL;
99 vsp1_dlm_reset(pipe->output->dlm);
100 vsp1_device_put(vsp1);
102 dev_dbg(vsp1->dev, "%s: pipeline disabled\n", __func__);
107 dev_dbg(vsp1->dev, "%s: configuring LIF with format %ux%u\n",
108 __func__, cfg->width, cfg->height);
111 * Configure the format at the BRU sinks and propagate it through the
114 memset(&format, 0, sizeof(format));
115 format.which = V4L2_SUBDEV_FORMAT_ACTIVE;
117 for (i = 0; i < bru->entity.source_pad; ++i) {
120 format.format.width = cfg->width;
121 format.format.height = cfg->height;
122 format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32;
123 format.format.field = V4L2_FIELD_NONE;
125 ret = v4l2_subdev_call(&bru->entity.subdev, pad,
126 set_fmt, NULL, &format);
130 dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n",
131 __func__, format.format.width, format.format.height,
132 format.format.code, i);
135 format.pad = bru->entity.source_pad;
136 format.format.width = cfg->width;
137 format.format.height = cfg->height;
138 format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32;
139 format.format.field = V4L2_FIELD_NONE;
141 ret = v4l2_subdev_call(&bru->entity.subdev, pad, set_fmt, NULL,
146 dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n",
147 __func__, format.format.width, format.format.height,
148 format.format.code, i);
150 format.pad = RWPF_PAD_SINK;
151 ret = v4l2_subdev_call(&vsp1->wpf[0]->entity.subdev, pad, set_fmt, NULL,
156 dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on WPF0 sink\n",
157 __func__, format.format.width, format.format.height,
160 format.pad = RWPF_PAD_SOURCE;
161 ret = v4l2_subdev_call(&vsp1->wpf[0]->entity.subdev, pad, get_fmt, NULL,
166 dev_dbg(vsp1->dev, "%s: got format %ux%u (%x) on WPF0 source\n",
167 __func__, format.format.width, format.format.height,
170 format.pad = LIF_PAD_SINK;
171 ret = v4l2_subdev_call(&vsp1->lif->entity.subdev, pad, set_fmt, NULL,
176 dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on LIF sink\n",
177 __func__, format.format.width, format.format.height,
181 * Verify that the format at the output of the pipeline matches the
182 * requested frame size and media bus code.
184 if (format.format.width != cfg->width ||
185 format.format.height != cfg->height ||
186 format.format.code != MEDIA_BUS_FMT_ARGB8888_1X32) {
187 dev_dbg(vsp1->dev, "%s: format mismatch\n", __func__);
192 * Mark the pipeline as streaming and enable the VSP1. This will store
193 * the pipeline pointer in all entities, which the s_stream handlers
194 * will need. We don't start the entities themselves right at this point
195 * as there's no plane configured yet, so we can't start processing
198 ret = vsp1_device_get(vsp1);
202 ret = media_pipeline_start(&pipe->output->entity.subdev.entity,
205 dev_dbg(vsp1->dev, "%s: pipeline start failed\n", __func__);
206 vsp1_device_put(vsp1);
210 dev_dbg(vsp1->dev, "%s: pipeline enabled\n", __func__);
214 EXPORT_SYMBOL_GPL(vsp1_du_setup_lif);
217 * vsp1_du_atomic_begin - Prepare for an atomic update
218 * @dev: the VSP device
220 void vsp1_du_atomic_begin(struct device *dev)
222 struct vsp1_device *vsp1 = dev_get_drvdata(dev);
223 struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
225 vsp1->drm->num_inputs = pipe->num_inputs;
227 EXPORT_SYMBOL_GPL(vsp1_du_atomic_begin);
230 * vsp1_du_atomic_update - Setup one RPF input of the VSP pipeline
231 * @dev: the VSP device
232 * @rpf_index: index of the RPF to setup (0-based)
233 * @cfg: the RPF configuration
235 * Configure the VSP to perform image composition through RPF @rpf_index as
236 * described by the @cfg configuration. The image to compose is referenced by
237 * @cfg.mem and composed using the @cfg.src crop rectangle and the @cfg.dst
238 * composition rectangle. The Z-order is configurable with higher @zpos values
241 * If the @cfg configuration is NULL, the RPF will be disabled. Calling the
242 * function on a disabled RPF is allowed.
244 * Image format as stored in memory is expressed as a V4L2 @cfg.pixelformat
245 * value. The memory pitch is configurable to allow for padding at end of lines,
246 * or simply for images that extend beyond the crop rectangle boundaries. The
247 * @cfg.pitch value is expressed in bytes and applies to all planes for
248 * multiplanar formats.
250 * The source memory buffer is referenced by the DMA address of its planes in
251 * the @cfg.mem array. Up to two planes are supported. The second plane DMA
252 * address is ignored for formats using a single plane.
254 * This function isn't reentrant, the caller needs to serialize calls.
256 * Return 0 on success or a negative error code on failure.
258 int vsp1_du_atomic_update(struct device *dev, unsigned int rpf_index,
259 const struct vsp1_du_atomic_config *cfg)
261 struct vsp1_device *vsp1 = dev_get_drvdata(dev);
262 const struct vsp1_format_info *fmtinfo;
263 struct vsp1_rwpf *rpf;
265 if (rpf_index >= vsp1->info->rpf_count)
268 rpf = vsp1->rpf[rpf_index];
271 dev_dbg(vsp1->dev, "%s: RPF%u: disable requested\n", __func__,
274 vsp1->drm->inputs[rpf_index].enabled = false;
279 "%s: RPF%u: (%u,%u)/%ux%u -> (%u,%u)/%ux%u (%08x), pitch %u dma { %pad, %pad, %pad } zpos %u\n",
281 cfg->src.left, cfg->src.top, cfg->src.width, cfg->src.height,
282 cfg->dst.left, cfg->dst.top, cfg->dst.width, cfg->dst.height,
283 cfg->pixelformat, cfg->pitch, &cfg->mem[0], &cfg->mem[1],
284 &cfg->mem[2], cfg->zpos);
287 * Store the format, stride, memory buffer address, crop and compose
288 * rectangles and Z-order position and for the input.
290 fmtinfo = vsp1_get_format_info(vsp1, cfg->pixelformat);
292 dev_dbg(vsp1->dev, "Unsupport pixel format %08x for RPF\n",
297 rpf->fmtinfo = fmtinfo;
298 rpf->format.num_planes = fmtinfo->planes;
299 rpf->format.plane_fmt[0].bytesperline = cfg->pitch;
300 rpf->format.plane_fmt[1].bytesperline = cfg->pitch;
301 rpf->alpha = cfg->alpha;
303 rpf->mem.addr[0] = cfg->mem[0];
304 rpf->mem.addr[1] = cfg->mem[1];
305 rpf->mem.addr[2] = cfg->mem[2];
307 vsp1->drm->inputs[rpf_index].crop = cfg->src;
308 vsp1->drm->inputs[rpf_index].compose = cfg->dst;
309 vsp1->drm->inputs[rpf_index].zpos = cfg->zpos;
310 vsp1->drm->inputs[rpf_index].enabled = true;
314 EXPORT_SYMBOL_GPL(vsp1_du_atomic_update);
316 static int vsp1_du_setup_rpf_pipe(struct vsp1_device *vsp1,
317 struct vsp1_rwpf *rpf, unsigned int bru_input)
319 struct v4l2_subdev_selection sel;
320 struct v4l2_subdev_format format;
321 const struct v4l2_rect *crop;
325 * Configure the format on the RPF sink pad and propagate it up to the
328 crop = &vsp1->drm->inputs[rpf->entity.index].crop;
330 memset(&format, 0, sizeof(format));
331 format.which = V4L2_SUBDEV_FORMAT_ACTIVE;
332 format.pad = RWPF_PAD_SINK;
333 format.format.width = crop->width + crop->left;
334 format.format.height = crop->height + crop->top;
335 format.format.code = rpf->fmtinfo->mbus;
336 format.format.field = V4L2_FIELD_NONE;
338 ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_fmt, NULL,
344 "%s: set format %ux%u (%x) on RPF%u sink\n",
345 __func__, format.format.width, format.format.height,
346 format.format.code, rpf->entity.index);
348 memset(&sel, 0, sizeof(sel));
349 sel.which = V4L2_SUBDEV_FORMAT_ACTIVE;
350 sel.pad = RWPF_PAD_SINK;
351 sel.target = V4L2_SEL_TGT_CROP;
354 ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_selection, NULL,
360 "%s: set selection (%u,%u)/%ux%u on RPF%u sink\n",
361 __func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height,
365 * RPF source, hardcode the format to ARGB8888 to turn on format
366 * conversion if needed.
368 format.pad = RWPF_PAD_SOURCE;
370 ret = v4l2_subdev_call(&rpf->entity.subdev, pad, get_fmt, NULL,
376 "%s: got format %ux%u (%x) on RPF%u source\n",
377 __func__, format.format.width, format.format.height,
378 format.format.code, rpf->entity.index);
380 format.format.code = MEDIA_BUS_FMT_ARGB8888_1X32;
382 ret = v4l2_subdev_call(&rpf->entity.subdev, pad, set_fmt, NULL,
387 /* BRU sink, propagate the format from the RPF source. */
388 format.pad = bru_input;
390 ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_fmt, NULL,
395 dev_dbg(vsp1->dev, "%s: set format %ux%u (%x) on BRU pad %u\n",
396 __func__, format.format.width, format.format.height,
397 format.format.code, format.pad);
400 sel.target = V4L2_SEL_TGT_COMPOSE;
401 sel.r = vsp1->drm->inputs[rpf->entity.index].compose;
403 ret = v4l2_subdev_call(&vsp1->bru->entity.subdev, pad, set_selection,
409 "%s: set selection (%u,%u)/%ux%u on BRU pad %u\n",
410 __func__, sel.r.left, sel.r.top, sel.r.width, sel.r.height,
416 static unsigned int rpf_zpos(struct vsp1_device *vsp1, struct vsp1_rwpf *rpf)
418 return vsp1->drm->inputs[rpf->entity.index].zpos;
422 * vsp1_du_atomic_flush - Commit an atomic update
423 * @dev: the VSP device
425 void vsp1_du_atomic_flush(struct device *dev)
427 struct vsp1_device *vsp1 = dev_get_drvdata(dev);
428 struct vsp1_pipeline *pipe = &vsp1->drm->pipe;
429 struct vsp1_rwpf *inputs[VSP1_MAX_RPF] = { NULL, };
430 struct vsp1_entity *entity;
431 struct vsp1_dl_list *dl;
436 /* Prepare the display list. */
437 dl = vsp1_dl_list_get(pipe->output->dlm);
439 /* Count the number of enabled inputs and sort them by Z-order. */
440 pipe->num_inputs = 0;
442 for (i = 0; i < vsp1->info->rpf_count; ++i) {
443 struct vsp1_rwpf *rpf = vsp1->rpf[i];
446 if (!vsp1->drm->inputs[i].enabled) {
447 pipe->inputs[i] = NULL;
451 pipe->inputs[i] = rpf;
453 /* Insert the RPF in the sorted RPFs array. */
454 for (j = pipe->num_inputs++; j > 0; --j) {
455 if (rpf_zpos(vsp1, inputs[j-1]) <= rpf_zpos(vsp1, rpf))
457 inputs[j] = inputs[j-1];
463 /* Setup the RPF input pipeline for every enabled input. */
464 for (i = 0; i < vsp1->info->num_bru_inputs; ++i) {
465 struct vsp1_rwpf *rpf = inputs[i];
468 vsp1->bru->inputs[i].rpf = NULL;
472 vsp1->bru->inputs[i].rpf = rpf;
474 rpf->entity.sink_pad = i;
476 dev_dbg(vsp1->dev, "%s: connecting RPF.%u to BRU:%u\n",
477 __func__, rpf->entity.index, i);
479 ret = vsp1_du_setup_rpf_pipe(vsp1, rpf, i);
482 "%s: failed to setup RPF.%u\n",
483 __func__, rpf->entity.index);
486 /* Configure all entities in the pipeline. */
487 list_for_each_entry(entity, &pipe->entities, list_pipe) {
488 /* Disconnect unused RPFs from the pipeline. */
489 if (entity->type == VSP1_ENTITY_RPF) {
490 struct vsp1_rwpf *rpf = to_rwpf(&entity->subdev);
492 if (!pipe->inputs[rpf->entity.index]) {
493 vsp1_dl_list_write(dl, entity->route->reg,
494 VI6_DPR_NODE_UNUSED);
499 vsp1_entity_route_setup(entity, pipe, dl);
501 if (entity->ops->configure) {
502 entity->ops->configure(entity, pipe, dl,
503 VSP1_ENTITY_PARAMS_INIT);
504 entity->ops->configure(entity, pipe, dl,
505 VSP1_ENTITY_PARAMS_RUNTIME);
506 entity->ops->configure(entity, pipe, dl,
507 VSP1_ENTITY_PARAMS_PARTITION);
511 vsp1_dl_list_commit(dl);
513 /* Start or stop the pipeline if needed. */
514 if (!vsp1->drm->num_inputs && pipe->num_inputs) {
515 vsp1_write(vsp1, VI6_DISP_IRQ_STA, 0);
516 vsp1_write(vsp1, VI6_DISP_IRQ_ENB, VI6_DISP_IRQ_ENB_DSTE);
517 spin_lock_irqsave(&pipe->irqlock, flags);
518 vsp1_pipeline_run(pipe);
519 spin_unlock_irqrestore(&pipe->irqlock, flags);
520 } else if (vsp1->drm->num_inputs && !pipe->num_inputs) {
521 vsp1_write(vsp1, VI6_DISP_IRQ_ENB, 0);
522 vsp1_pipeline_stop(pipe);
525 EXPORT_SYMBOL_GPL(vsp1_du_atomic_flush);
527 /* -----------------------------------------------------------------------------
531 int vsp1_drm_create_links(struct vsp1_device *vsp1)
533 const u32 flags = MEDIA_LNK_FL_ENABLED | MEDIA_LNK_FL_IMMUTABLE;
538 * VSPD instances require a BRU to perform composition and a LIF to
541 if (!vsp1->bru || !vsp1->lif)
544 for (i = 0; i < vsp1->info->rpf_count; ++i) {
545 struct vsp1_rwpf *rpf = vsp1->rpf[i];
547 ret = media_create_pad_link(&rpf->entity.subdev.entity,
549 &vsp1->bru->entity.subdev.entity,
554 rpf->entity.sink = &vsp1->bru->entity.subdev.entity;
555 rpf->entity.sink_pad = i;
558 ret = media_create_pad_link(&vsp1->bru->entity.subdev.entity,
559 vsp1->bru->entity.source_pad,
560 &vsp1->wpf[0]->entity.subdev.entity,
561 RWPF_PAD_SINK, flags);
565 vsp1->bru->entity.sink = &vsp1->wpf[0]->entity.subdev.entity;
566 vsp1->bru->entity.sink_pad = RWPF_PAD_SINK;
568 ret = media_create_pad_link(&vsp1->wpf[0]->entity.subdev.entity,
570 &vsp1->lif->entity.subdev.entity,
571 LIF_PAD_SINK, flags);
578 int vsp1_drm_init(struct vsp1_device *vsp1)
580 struct vsp1_pipeline *pipe;
583 vsp1->drm = devm_kzalloc(vsp1->dev, sizeof(*vsp1->drm), GFP_KERNEL);
587 pipe = &vsp1->drm->pipe;
589 vsp1_pipeline_init(pipe);
591 /* The DRM pipeline is static, add entities manually. */
592 for (i = 0; i < vsp1->info->rpf_count; ++i) {
593 struct vsp1_rwpf *input = vsp1->rpf[i];
595 list_add_tail(&input->entity.list_pipe, &pipe->entities);
598 list_add_tail(&vsp1->bru->entity.list_pipe, &pipe->entities);
599 list_add_tail(&vsp1->wpf[0]->entity.list_pipe, &pipe->entities);
600 list_add_tail(&vsp1->lif->entity.list_pipe, &pipe->entities);
602 pipe->bru = &vsp1->bru->entity;
603 pipe->lif = &vsp1->lif->entity;
604 pipe->output = vsp1->wpf[0];
605 pipe->output->pipe = pipe;
610 void vsp1_drm_cleanup(struct vsp1_device *vsp1)