2 * vsp1_rpf.c -- R-Car VSP1 Read Pixel Formatter
4 * Copyright (C) 2013-2014 Renesas Electronics Corporation
6 * Contact: Laurent Pinchart (laurent.pinchart@ideasonboard.com)
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published by
10 * the Free Software Foundation; either version 2 of the License, or
11 * (at your option) any later version.
14 #include <linux/device.h>
16 #include <media/v4l2-subdev.h>
19 #include "vsp1_rwpf.h"
20 #include "vsp1_video.h"
22 #define RPF_MAX_WIDTH 8190
23 #define RPF_MAX_HEIGHT 8190
25 /* -----------------------------------------------------------------------------
29 static inline void vsp1_rpf_write(struct vsp1_rwpf *rpf, u32 reg, u32 data)
31 vsp1_mod_write(&rpf->entity, reg + rpf->entity.index * VI6_RPF_OFFSET,
35 /* -----------------------------------------------------------------------------
36 * V4L2 Subdevice Core Operations
39 static int rpf_s_stream(struct v4l2_subdev *subdev, int enable)
41 struct vsp1_pipeline *pipe = to_vsp1_pipeline(&subdev->entity);
42 struct vsp1_rwpf *rpf = to_rwpf(subdev);
43 const struct vsp1_format_info *fmtinfo = rpf->fmtinfo;
44 const struct v4l2_pix_format_mplane *format = &rpf->format;
45 const struct v4l2_rect *crop = &rpf->crop;
52 /* Source size, stride and crop offsets.
54 * The crop offsets correspond to the location of the crop rectangle top
55 * left corner in the plane buffer. Only two offsets are needed, as
56 * planes 2 and 3 always have identical strides.
58 vsp1_rpf_write(rpf, VI6_RPF_SRC_BSIZE,
59 (crop->width << VI6_RPF_SRC_BSIZE_BHSIZE_SHIFT) |
60 (crop->height << VI6_RPF_SRC_BSIZE_BVSIZE_SHIFT));
61 vsp1_rpf_write(rpf, VI6_RPF_SRC_ESIZE,
62 (crop->width << VI6_RPF_SRC_ESIZE_EHSIZE_SHIFT) |
63 (crop->height << VI6_RPF_SRC_ESIZE_EVSIZE_SHIFT));
65 rpf->offsets[0] = crop->top * format->plane_fmt[0].bytesperline
66 + crop->left * fmtinfo->bpp[0] / 8;
67 pstride = format->plane_fmt[0].bytesperline
68 << VI6_RPF_SRCM_PSTRIDE_Y_SHIFT;
70 if (format->num_planes > 1) {
71 rpf->offsets[1] = crop->top * format->plane_fmt[1].bytesperline
72 + crop->left * fmtinfo->bpp[1] / 8;
73 pstride |= format->plane_fmt[1].bytesperline
74 << VI6_RPF_SRCM_PSTRIDE_C_SHIFT;
79 vsp1_rpf_write(rpf, VI6_RPF_SRCM_PSTRIDE, pstride);
81 /* Now that the offsets have been computed program the DMA addresses. */
82 rpf->ops->set_memory(rpf);
85 infmt = VI6_RPF_INFMT_CIPM
86 | (fmtinfo->hwfmt << VI6_RPF_INFMT_RDFMT_SHIFT);
89 infmt |= VI6_RPF_INFMT_SPYCS;
91 infmt |= VI6_RPF_INFMT_SPUVS;
93 if (rpf->entity.formats[RWPF_PAD_SINK].code !=
94 rpf->entity.formats[RWPF_PAD_SOURCE].code)
95 infmt |= VI6_RPF_INFMT_CSC;
97 vsp1_rpf_write(rpf, VI6_RPF_INFMT, infmt);
98 vsp1_rpf_write(rpf, VI6_RPF_DSWAP, fmtinfo->swap);
100 /* Output location */
101 vsp1_rpf_write(rpf, VI6_RPF_LOC,
102 (rpf->location.left << VI6_RPF_LOC_HCOORD_SHIFT) |
103 (rpf->location.top << VI6_RPF_LOC_VCOORD_SHIFT));
105 /* Use the alpha channel (extended to 8 bits) when available or an
106 * alpha value set through the V4L2_CID_ALPHA_COMPONENT control
107 * otherwise. Disable color keying.
109 vsp1_rpf_write(rpf, VI6_RPF_ALPH_SEL, VI6_RPF_ALPH_SEL_AEXT_EXT |
110 (fmtinfo->alpha ? VI6_RPF_ALPH_SEL_ASEL_PACKED
111 : VI6_RPF_ALPH_SEL_ASEL_FIXED));
113 vsp1_rpf_write(rpf, VI6_RPF_VRTCOL_SET,
114 rpf->alpha << VI6_RPF_VRTCOL_SET_LAYA_SHIFT);
116 vsp1_pipeline_propagate_alpha(pipe, &rpf->entity, rpf->alpha);
118 vsp1_rpf_write(rpf, VI6_RPF_MSK_CTRL, 0);
119 vsp1_rpf_write(rpf, VI6_RPF_CKEY_CTRL, 0);
124 /* -----------------------------------------------------------------------------
125 * V4L2 Subdevice Operations
128 static struct v4l2_subdev_video_ops rpf_video_ops = {
129 .s_stream = rpf_s_stream,
132 static struct v4l2_subdev_pad_ops rpf_pad_ops = {
133 .enum_mbus_code = vsp1_rwpf_enum_mbus_code,
134 .enum_frame_size = vsp1_rwpf_enum_frame_size,
135 .get_fmt = vsp1_rwpf_get_format,
136 .set_fmt = vsp1_rwpf_set_format,
137 .get_selection = vsp1_rwpf_get_selection,
138 .set_selection = vsp1_rwpf_set_selection,
141 static struct v4l2_subdev_ops rpf_ops = {
142 .video = &rpf_video_ops,
146 /* -----------------------------------------------------------------------------
147 * Video Device Operations
150 static void rpf_set_memory(struct vsp1_rwpf *rpf)
152 vsp1_rpf_write(rpf, VI6_RPF_SRCM_ADDR_Y,
153 rpf->buf_addr[0] + rpf->offsets[0]);
154 vsp1_rpf_write(rpf, VI6_RPF_SRCM_ADDR_C0,
155 rpf->buf_addr[1] + rpf->offsets[1]);
156 vsp1_rpf_write(rpf, VI6_RPF_SRCM_ADDR_C1,
157 rpf->buf_addr[2] + rpf->offsets[1]);
160 static const struct vsp1_rwpf_operations rpf_vdev_ops = {
161 .set_memory = rpf_set_memory,
164 /* -----------------------------------------------------------------------------
165 * Initialization and Cleanup
168 struct vsp1_rwpf *vsp1_rpf_create(struct vsp1_device *vsp1, unsigned int index)
170 struct v4l2_subdev *subdev;
171 struct vsp1_rwpf *rpf;
174 rpf = devm_kzalloc(vsp1->dev, sizeof(*rpf), GFP_KERNEL);
176 return ERR_PTR(-ENOMEM);
178 rpf->ops = &rpf_vdev_ops;
180 rpf->max_width = RPF_MAX_WIDTH;
181 rpf->max_height = RPF_MAX_HEIGHT;
183 rpf->entity.type = VSP1_ENTITY_RPF;
184 rpf->entity.index = index;
186 ret = vsp1_entity_init(vsp1, &rpf->entity, 2);
190 /* Initialize the V4L2 subdev. */
191 subdev = &rpf->entity.subdev;
192 v4l2_subdev_init(subdev, &rpf_ops);
194 subdev->entity.ops = &vsp1->media_ops;
195 subdev->internal_ops = &vsp1_subdev_internal_ops;
196 snprintf(subdev->name, sizeof(subdev->name), "%s rpf.%u",
197 dev_name(vsp1->dev), index);
198 v4l2_set_subdevdata(subdev, rpf);
199 subdev->flags |= V4L2_SUBDEV_FL_HAS_DEVNODE;
201 vsp1_entity_init_formats(subdev, NULL);
203 /* Initialize the control handler. */
204 ret = vsp1_rwpf_init_ctrls(rpf);
206 dev_err(vsp1->dev, "rpf%u: failed to initialize controls\n",
214 vsp1_entity_destroy(&rpf->entity);