2 * Elonics E4000 silicon tuner driver
4 * Copyright (C) 2012 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
21 #include "e4000_priv.h"
22 #include <linux/math64.h>
24 /* Max transfer size done by I2C transfer functions */
25 #define MAX_XFER_SIZE 64
27 /* write multiple registers */
28 static int e4000_wr_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
31 u8 buf[MAX_XFER_SIZE];
32 struct i2c_msg msg[1] = {
34 .addr = priv->client->addr,
41 if (1 + len > sizeof(buf)) {
42 dev_warn(&priv->client->dev,
43 "%s: i2c wr reg=%04x: len=%d is too big!\n",
44 KBUILD_MODNAME, reg, len);
49 memcpy(&buf[1], val, len);
51 ret = i2c_transfer(priv->client->adapter, msg, 1);
55 dev_warn(&priv->client->dev,
56 "%s: i2c wr failed=%d reg=%02x len=%d\n",
57 KBUILD_MODNAME, ret, reg, len);
63 /* read multiple registers */
64 static int e4000_rd_regs(struct e4000_priv *priv, u8 reg, u8 *val, int len)
67 u8 buf[MAX_XFER_SIZE];
68 struct i2c_msg msg[2] = {
70 .addr = priv->client->addr,
75 .addr = priv->client->addr,
82 if (len > sizeof(buf)) {
83 dev_warn(&priv->client->dev,
84 "%s: i2c rd reg=%04x: len=%d is too big!\n",
85 KBUILD_MODNAME, reg, len);
89 ret = i2c_transfer(priv->client->adapter, msg, 2);
91 memcpy(val, buf, len);
94 dev_warn(&priv->client->dev,
95 "%s: i2c rd failed=%d reg=%02x len=%d\n",
96 KBUILD_MODNAME, ret, reg, len);
103 /* write single register */
104 static int e4000_wr_reg(struct e4000_priv *priv, u8 reg, u8 val)
106 return e4000_wr_regs(priv, reg, &val, 1);
109 /* read single register */
110 static int e4000_rd_reg(struct e4000_priv *priv, u8 reg, u8 *val)
112 return e4000_rd_regs(priv, reg, val, 1);
115 static int e4000_init(struct dvb_frontend *fe)
117 struct e4000_priv *priv = fe->tuner_priv;
120 dev_dbg(&priv->client->dev, "%s:\n", __func__);
122 if (fe->ops.i2c_gate_ctrl)
123 fe->ops.i2c_gate_ctrl(fe, 1);
125 /* dummy I2C to ensure I2C wakes up */
126 ret = e4000_wr_reg(priv, 0x02, 0x40);
129 ret = e4000_wr_reg(priv, 0x00, 0x01);
133 /* disable output clock */
134 ret = e4000_wr_reg(priv, 0x06, 0x00);
138 ret = e4000_wr_reg(priv, 0x7a, 0x96);
142 /* configure gains */
143 ret = e4000_wr_regs(priv, 0x7e, "\x01\xfe", 2);
147 ret = e4000_wr_reg(priv, 0x82, 0x00);
151 ret = e4000_wr_reg(priv, 0x24, 0x05);
155 ret = e4000_wr_regs(priv, 0x87, "\x20\x01", 2);
159 ret = e4000_wr_regs(priv, 0x9f, "\x7f\x07", 2);
163 /* DC offset control */
164 ret = e4000_wr_reg(priv, 0x2d, 0x1f);
168 ret = e4000_wr_regs(priv, 0x70, "\x01\x01", 2);
173 ret = e4000_wr_reg(priv, 0x1a, 0x17);
177 ret = e4000_wr_reg(priv, 0x1f, 0x1a);
181 if (fe->ops.i2c_gate_ctrl)
182 fe->ops.i2c_gate_ctrl(fe, 0);
186 if (fe->ops.i2c_gate_ctrl)
187 fe->ops.i2c_gate_ctrl(fe, 0);
189 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
193 static int e4000_sleep(struct dvb_frontend *fe)
195 struct e4000_priv *priv = fe->tuner_priv;
198 dev_dbg(&priv->client->dev, "%s:\n", __func__);
200 if (fe->ops.i2c_gate_ctrl)
201 fe->ops.i2c_gate_ctrl(fe, 1);
203 ret = e4000_wr_reg(priv, 0x00, 0x00);
207 if (fe->ops.i2c_gate_ctrl)
208 fe->ops.i2c_gate_ctrl(fe, 0);
212 if (fe->ops.i2c_gate_ctrl)
213 fe->ops.i2c_gate_ctrl(fe, 0);
215 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
219 static int e4000_set_params(struct dvb_frontend *fe)
221 struct e4000_priv *priv = fe->tuner_priv;
222 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
223 int ret, i, sigma_delta;
225 u8 buf[5], i_data[4], q_data[4];
227 dev_dbg(&priv->client->dev,
228 "%s: delivery_system=%d frequency=%d bandwidth_hz=%d\n",
229 __func__, c->delivery_system, c->frequency,
232 if (fe->ops.i2c_gate_ctrl)
233 fe->ops.i2c_gate_ctrl(fe, 1);
235 /* gain control manual */
236 ret = e4000_wr_reg(priv, 0x1a, 0x00);
241 for (i = 0; i < ARRAY_SIZE(e4000_pll_lut); i++) {
242 if (c->frequency <= e4000_pll_lut[i].freq)
246 if (i == ARRAY_SIZE(e4000_pll_lut)) {
252 * Note: Currently f_vco overflows when c->frequency is 1 073 741 824 Hz
255 f_vco = c->frequency * e4000_pll_lut[i].mul;
256 sigma_delta = div_u64(0x10000ULL * (f_vco % priv->clock), priv->clock);
257 buf[0] = f_vco / priv->clock;
258 buf[1] = (sigma_delta >> 0) & 0xff;
259 buf[2] = (sigma_delta >> 8) & 0xff;
261 buf[4] = e4000_pll_lut[i].div;
263 dev_dbg(&priv->client->dev,
264 "%s: f_vco=%u pll div=%d sigma_delta=%04x\n",
265 __func__, f_vco, buf[0], sigma_delta);
267 ret = e4000_wr_regs(priv, 0x09, buf, 5);
271 /* LNA filter (RF filter) */
272 for (i = 0; i < ARRAY_SIZE(e400_lna_filter_lut); i++) {
273 if (c->frequency <= e400_lna_filter_lut[i].freq)
277 if (i == ARRAY_SIZE(e400_lna_filter_lut)) {
282 ret = e4000_wr_reg(priv, 0x10, e400_lna_filter_lut[i].val);
287 for (i = 0; i < ARRAY_SIZE(e4000_if_filter_lut); i++) {
288 if (c->bandwidth_hz <= e4000_if_filter_lut[i].freq)
292 if (i == ARRAY_SIZE(e4000_if_filter_lut)) {
297 buf[0] = e4000_if_filter_lut[i].reg11_val;
298 buf[1] = e4000_if_filter_lut[i].reg12_val;
300 ret = e4000_wr_regs(priv, 0x11, buf, 2);
305 for (i = 0; i < ARRAY_SIZE(e4000_band_lut); i++) {
306 if (c->frequency <= e4000_band_lut[i].freq)
310 if (i == ARRAY_SIZE(e4000_band_lut)) {
315 ret = e4000_wr_reg(priv, 0x07, e4000_band_lut[i].reg07_val);
319 ret = e4000_wr_reg(priv, 0x78, e4000_band_lut[i].reg78_val);
324 for (i = 0; i < 4; i++) {
326 ret = e4000_wr_regs(priv, 0x15, "\x00\x7e\x24", 3);
328 ret = e4000_wr_regs(priv, 0x15, "\x00\x7f", 2);
330 ret = e4000_wr_regs(priv, 0x15, "\x01", 1);
332 ret = e4000_wr_regs(priv, 0x16, "\x7e", 1);
337 ret = e4000_wr_reg(priv, 0x29, 0x01);
341 ret = e4000_rd_regs(priv, 0x2a, buf, 3);
345 i_data[i] = (((buf[2] >> 0) & 0x3) << 6) | (buf[0] & 0x3f);
346 q_data[i] = (((buf[2] >> 4) & 0x3) << 6) | (buf[1] & 0x3f);
349 swap(q_data[2], q_data[3]);
350 swap(i_data[2], i_data[3]);
352 ret = e4000_wr_regs(priv, 0x50, q_data, 4);
356 ret = e4000_wr_regs(priv, 0x60, i_data, 4);
360 /* gain control auto */
361 ret = e4000_wr_reg(priv, 0x1a, 0x17);
365 if (fe->ops.i2c_gate_ctrl)
366 fe->ops.i2c_gate_ctrl(fe, 0);
370 if (fe->ops.i2c_gate_ctrl)
371 fe->ops.i2c_gate_ctrl(fe, 0);
373 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
377 static int e4000_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
379 struct e4000_priv *priv = fe->tuner_priv;
381 dev_dbg(&priv->client->dev, "%s:\n", __func__);
383 *frequency = 0; /* Zero-IF */
388 static const struct dvb_tuner_ops e4000_tuner_ops = {
390 .name = "Elonics E4000",
391 .frequency_min = 174000000,
392 .frequency_max = 862000000,
396 .sleep = e4000_sleep,
397 .set_params = e4000_set_params,
399 .get_if_frequency = e4000_get_if_frequency,
402 static int e4000_probe(struct i2c_client *client,
403 const struct i2c_device_id *id)
405 struct e4000_config *cfg = client->dev.platform_data;
406 struct dvb_frontend *fe = cfg->fe;
407 struct e4000_priv *priv;
411 if (fe->ops.i2c_gate_ctrl)
412 fe->ops.i2c_gate_ctrl(fe, 1);
414 priv = kzalloc(sizeof(struct e4000_priv), GFP_KERNEL);
417 dev_err(&client->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
421 priv->clock = cfg->clock;
422 priv->client = client;
425 /* check if the tuner is there */
426 ret = e4000_rd_reg(priv, 0x02, &chip_id);
430 dev_dbg(&priv->client->dev,
431 "%s: chip_id=%02x\n", __func__, chip_id);
433 if (chip_id != 0x40) {
438 /* put sleep as chip seems to be in normal mode by default */
439 ret = e4000_wr_reg(priv, 0x00, 0x00);
443 dev_info(&priv->client->dev,
444 "%s: Elonics E4000 successfully identified\n",
447 fe->tuner_priv = priv;
448 memcpy(&fe->ops.tuner_ops, &e4000_tuner_ops,
449 sizeof(struct dvb_tuner_ops));
451 if (fe->ops.i2c_gate_ctrl)
452 fe->ops.i2c_gate_ctrl(fe, 0);
454 i2c_set_clientdata(client, priv);
458 if (fe->ops.i2c_gate_ctrl)
459 fe->ops.i2c_gate_ctrl(fe, 0);
461 dev_dbg(&client->dev, "%s: failed=%d\n", __func__, ret);
466 static int e4000_remove(struct i2c_client *client)
468 struct e4000_priv *priv = i2c_get_clientdata(client);
469 struct dvb_frontend *fe = priv->fe;
471 dev_dbg(&client->dev, "%s:\n", __func__);
473 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
474 fe->tuner_priv = NULL;
480 static const struct i2c_device_id e4000_id[] = {
484 MODULE_DEVICE_TABLE(i2c, e4000_id);
486 static struct i2c_driver e4000_driver = {
488 .owner = THIS_MODULE,
491 .probe = e4000_probe,
492 .remove = e4000_remove,
493 .id_table = e4000_id,
496 module_i2c_driver(e4000_driver);
498 MODULE_DESCRIPTION("Elonics E4000 silicon tuner driver");
499 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
500 MODULE_LICENSE("GPL");