2 * Montage M88TS2022 silicon tuner driver
4 * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License along
17 * with this program; if not, write to the Free Software Foundation, Inc.,
18 * 51 Franklin Street, Fifth Floor, Boston, MA 02110-1301 USA.
20 * Some calculations are taken from existing TS2020 driver.
23 #include "m88ts2022_priv.h"
25 /* write multiple registers */
26 static int m88ts2022_wr_regs(struct m88ts2022_priv *priv,
27 u8 reg, const u8 *val, int len)
30 #define MAX_WR_XFER_LEN (MAX_WR_LEN + 1)
32 u8 buf[MAX_WR_XFER_LEN];
33 struct i2c_msg msg[1] = {
35 .addr = priv->client->addr,
42 if (WARN_ON(len > MAX_WR_LEN))
46 memcpy(&buf[1], val, len);
48 ret = i2c_transfer(priv->client->adapter, msg, 1);
52 dev_warn(&priv->client->dev,
53 "%s: i2c wr failed=%d reg=%02x len=%d\n",
54 KBUILD_MODNAME, ret, reg, len);
61 /* read multiple registers */
62 static int m88ts2022_rd_regs(struct m88ts2022_priv *priv, u8 reg,
66 #define MAX_RD_XFER_LEN (MAX_RD_LEN)
68 u8 buf[MAX_RD_XFER_LEN];
69 struct i2c_msg msg[2] = {
71 .addr = priv->client->addr,
76 .addr = priv->client->addr,
83 if (WARN_ON(len > MAX_RD_LEN))
86 ret = i2c_transfer(priv->client->adapter, msg, 2);
88 memcpy(val, buf, len);
91 dev_warn(&priv->client->dev,
92 "%s: i2c rd failed=%d reg=%02x len=%d\n",
93 KBUILD_MODNAME, ret, reg, len);
100 /* write single register */
101 static int m88ts2022_wr_reg(struct m88ts2022_priv *priv, u8 reg, u8 val)
103 return m88ts2022_wr_regs(priv, reg, &val, 1);
106 /* read single register */
107 static int m88ts2022_rd_reg(struct m88ts2022_priv *priv, u8 reg, u8 *val)
109 return m88ts2022_rd_regs(priv, reg, val, 1);
112 /* write single register with mask */
113 static int m88ts2022_wr_reg_mask(struct m88ts2022_priv *priv,
114 u8 reg, u8 val, u8 mask)
119 /* no need for read if whole reg is written */
121 ret = m88ts2022_rd_regs(priv, reg, &u8tmp, 1);
130 return m88ts2022_wr_regs(priv, reg, &val, 1);
133 static int m88ts2022_cmd(struct dvb_frontend *fe,
134 int op, int sleep, u8 reg, u8 mask, u8 val, u8 *reg_val)
136 struct m88ts2022_priv *priv = fe->tuner_priv;
139 struct m88ts2022_reg_val reg_vals[] = {
146 for (i = 0; i < 2; i++) {
147 dev_dbg(&priv->client->dev,
148 "%s: i=%d op=%02x reg=%02x mask=%02x val=%02x\n",
149 __func__, i, op, reg, mask, val);
151 for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
152 ret = m88ts2022_wr_reg(priv, reg_vals[i].reg,
158 usleep_range(sleep * 1000, sleep * 10000);
160 ret = m88ts2022_rd_reg(priv, reg, &u8tmp);
164 if ((u8tmp & mask) != val)
174 static int m88ts2022_set_params(struct dvb_frontend *fe)
176 struct m88ts2022_priv *priv = fe->tuner_priv;
177 struct dtv_frontend_properties *c = &fe->dtv_property_cache;
179 unsigned int frequency_khz, frequency_offset_khz, f_3db_hz;
180 unsigned int f_ref_khz, f_vco_khz, div_ref, div_out, pll_n, gdiv28;
181 u8 buf[3], u8tmp, cap_code, lpf_gm, lpf_mxdiv, div_max, div_min;
183 dev_dbg(&priv->client->dev,
184 "%s: frequency=%d symbol_rate=%d rolloff=%d\n",
185 __func__, c->frequency, c->symbol_rate, c->rolloff);
187 * Integer-N PLL synthesizer
188 * kHz is used for all calculations to keep calculations within 32-bit
190 f_ref_khz = DIV_ROUND_CLOSEST(priv->cfg.clock, 1000);
191 div_ref = DIV_ROUND_CLOSEST(f_ref_khz, 2000);
193 if (c->symbol_rate < 5000000)
194 frequency_offset_khz = 3000; /* 3 MHz */
196 frequency_offset_khz = 0;
198 frequency_khz = c->frequency + frequency_offset_khz;
200 if (frequency_khz < 1103000) {
210 ret = m88ts2022_wr_regs(priv, 0x10, buf, 2);
214 f_vco_khz = frequency_khz * div_out;
215 pll_n = f_vco_khz * div_ref / f_ref_khz;
217 priv->frequency_khz = pll_n * f_ref_khz / div_ref / div_out;
220 u16tmp = pll_n - 1024;
221 else if (pll_n < 6143)
222 u16tmp = pll_n + 1024;
224 u16tmp = pll_n + 3072;
226 buf[0] = (u16tmp >> 8) & 0x3f;
227 buf[1] = (u16tmp >> 0) & 0xff;
228 buf[2] = div_ref - 8;
229 ret = m88ts2022_wr_regs(priv, 0x01, buf, 3);
233 dev_dbg(&priv->client->dev,
234 "%s: frequency=%u offset=%d f_vco_khz=%u pll_n=%u div_ref=%u div_out=%u\n",
235 __func__, priv->frequency_khz,
236 priv->frequency_khz - c->frequency, f_vco_khz, pll_n,
239 ret = m88ts2022_cmd(fe, 0x10, 5, 0x15, 0x40, 0x00, NULL);
243 ret = m88ts2022_rd_reg(priv, 0x14, &u8tmp);
249 ret = m88ts2022_wr_reg_mask(priv, 0x10, 0x80, 0x80);
253 ret = m88ts2022_wr_reg(priv, 0x11, 0x6f);
257 ret = m88ts2022_cmd(fe, 0x10, 5, 0x15, 0x40, 0x00, NULL);
262 ret = m88ts2022_rd_reg(priv, 0x14, &u8tmp);
268 ret = m88ts2022_wr_reg_mask(priv, 0x10, 0x00, 0x02);
273 ret = m88ts2022_cmd(fe, 0x08, 5, 0x3c, 0xff, 0x00, NULL);
277 ret = m88ts2022_wr_reg(priv, 0x25, 0x00);
281 ret = m88ts2022_wr_reg(priv, 0x27, 0x70);
285 ret = m88ts2022_wr_reg(priv, 0x41, 0x09);
289 ret = m88ts2022_wr_reg(priv, 0x08, 0x0b);
294 gdiv28 = DIV_ROUND_CLOSEST(f_ref_khz * 1694U, 1000000U);
296 ret = m88ts2022_wr_reg(priv, 0x04, gdiv28);
300 ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
304 cap_code = u8tmp & 0x3f;
306 ret = m88ts2022_wr_reg(priv, 0x41, 0x0d);
310 ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
315 cap_code = (cap_code + u8tmp) / 2;
316 gdiv28 = gdiv28 * 207 / (cap_code * 2 + 151);
317 div_max = gdiv28 * 135 / 100;
318 div_min = gdiv28 * 78 / 100;
319 div_max = clamp_val(div_max, 0U, 63U);
321 f_3db_hz = c->symbol_rate * 135UL / 200UL;
322 f_3db_hz += 2000000U + (frequency_offset_khz * 1000U);
323 f_3db_hz = clamp(f_3db_hz, 7000000U, 40000000U);
325 #define LPF_COEFF 3200U
326 lpf_gm = DIV_ROUND_CLOSEST(f_3db_hz * gdiv28, LPF_COEFF * f_ref_khz);
327 lpf_gm = clamp_val(lpf_gm, 1U, 23U);
329 lpf_mxdiv = DIV_ROUND_CLOSEST(lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz);
330 if (lpf_mxdiv < div_min)
331 lpf_mxdiv = DIV_ROUND_CLOSEST(++lpf_gm * LPF_COEFF * f_ref_khz, f_3db_hz);
332 lpf_mxdiv = clamp_val(lpf_mxdiv, 0U, div_max);
334 ret = m88ts2022_wr_reg(priv, 0x04, lpf_mxdiv);
338 ret = m88ts2022_wr_reg(priv, 0x06, lpf_gm);
342 ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
346 cap_code = u8tmp & 0x3f;
348 ret = m88ts2022_wr_reg(priv, 0x41, 0x09);
352 ret = m88ts2022_cmd(fe, 0x04, 2, 0x26, 0xff, 0x00, &u8tmp);
357 cap_code = (cap_code + u8tmp) / 2;
359 u8tmp = cap_code | 0x80;
360 ret = m88ts2022_wr_reg(priv, 0x25, u8tmp);
364 ret = m88ts2022_wr_reg(priv, 0x27, 0x30);
368 ret = m88ts2022_wr_reg(priv, 0x08, 0x09);
372 ret = m88ts2022_cmd(fe, 0x01, 20, 0x21, 0xff, 0x00, NULL);
377 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
382 static int m88ts2022_init(struct dvb_frontend *fe)
384 struct m88ts2022_priv *priv = fe->tuner_priv;
387 static const struct m88ts2022_reg_val reg_vals[] = {
400 dev_dbg(&priv->client->dev, "%s:\n", __func__);
402 ret = m88ts2022_wr_reg(priv, 0x00, 0x01);
406 ret = m88ts2022_wr_reg(priv, 0x00, 0x03);
410 switch (priv->cfg.clock_out) {
411 case M88TS2022_CLOCK_OUT_DISABLED:
414 case M88TS2022_CLOCK_OUT_ENABLED:
416 ret = m88ts2022_wr_reg(priv, 0x05, priv->cfg.clock_out_div);
420 case M88TS2022_CLOCK_OUT_ENABLED_XTALOUT:
427 ret = m88ts2022_wr_reg(priv, 0x42, u8tmp);
431 if (priv->cfg.loop_through)
436 ret = m88ts2022_wr_reg(priv, 0x62, u8tmp);
440 for (i = 0; i < ARRAY_SIZE(reg_vals); i++) {
441 ret = m88ts2022_wr_reg(priv, reg_vals[i].reg, reg_vals[i].val);
447 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
451 static int m88ts2022_sleep(struct dvb_frontend *fe)
453 struct m88ts2022_priv *priv = fe->tuner_priv;
455 dev_dbg(&priv->client->dev, "%s:\n", __func__);
457 ret = m88ts2022_wr_reg(priv, 0x00, 0x00);
462 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
466 static int m88ts2022_get_frequency(struct dvb_frontend *fe, u32 *frequency)
468 struct m88ts2022_priv *priv = fe->tuner_priv;
469 dev_dbg(&priv->client->dev, "%s:\n", __func__);
471 *frequency = priv->frequency_khz;
475 static int m88ts2022_get_if_frequency(struct dvb_frontend *fe, u32 *frequency)
477 struct m88ts2022_priv *priv = fe->tuner_priv;
478 dev_dbg(&priv->client->dev, "%s:\n", __func__);
480 *frequency = 0; /* Zero-IF */
484 static int m88ts2022_get_rf_strength(struct dvb_frontend *fe, u16 *strength)
486 struct m88ts2022_priv *priv = fe->tuner_priv;
490 unsigned int gain1, gain2, gain3;
492 ret = m88ts2022_rd_reg(priv, 0x3d, &u8tmp);
496 gain1 = (u8tmp >> 0) & 0x1f;
497 gain1 = clamp(gain1, 0U, 15U);
499 ret = m88ts2022_rd_reg(priv, 0x21, &u8tmp);
503 gain2 = (u8tmp >> 0) & 0x1f;
504 gain2 = clamp(gain2, 2U, 16U);
506 ret = m88ts2022_rd_reg(priv, 0x66, &u8tmp);
510 gain3 = (u8tmp >> 3) & 0x07;
511 gain3 = clamp(gain3, 0U, 6U);
513 gain = gain1 * 265 + gain2 * 338 + gain3 * 285;
515 /* scale value to 0x0000-0xffff */
516 u16tmp = (0xffff - gain);
517 u16tmp = clamp_val(u16tmp, 59000U, 61500U);
519 *strength = (u16tmp - 59000) * 0xffff / (61500 - 59000);
522 dev_dbg(&priv->client->dev, "%s: failed=%d\n", __func__, ret);
526 static const struct dvb_tuner_ops m88ts2022_tuner_ops = {
528 .name = "Montage M88TS2022",
529 .frequency_min = 950000,
530 .frequency_max = 2150000,
533 .init = m88ts2022_init,
534 .sleep = m88ts2022_sleep,
535 .set_params = m88ts2022_set_params,
537 .get_frequency = m88ts2022_get_frequency,
538 .get_if_frequency = m88ts2022_get_if_frequency,
539 .get_rf_strength = m88ts2022_get_rf_strength,
542 static int m88ts2022_probe(struct i2c_client *client,
543 const struct i2c_device_id *id)
545 struct m88ts2022_config *cfg = client->dev.platform_data;
546 struct dvb_frontend *fe = cfg->fe;
547 struct m88ts2022_priv *priv;
551 priv = kzalloc(sizeof(struct m88ts2022_priv), GFP_KERNEL);
554 dev_err(&client->dev, "%s: kzalloc() failed\n", KBUILD_MODNAME);
558 memcpy(&priv->cfg, cfg, sizeof(struct m88ts2022_config));
559 priv->client = client;
561 /* check if the tuner is there */
562 ret = m88ts2022_rd_reg(priv, 0x00, &u8tmp);
566 if ((u8tmp & 0x03) == 0x00) {
567 ret = m88ts2022_wr_reg(priv, 0x00, 0x01);
571 usleep_range(2000, 50000);
574 ret = m88ts2022_wr_reg(priv, 0x00, 0x03);
578 usleep_range(2000, 50000);
580 ret = m88ts2022_rd_reg(priv, 0x00, &chip_id);
584 dev_dbg(&priv->client->dev, "%s: chip_id=%02x\n", __func__, chip_id);
594 switch (priv->cfg.clock_out) {
595 case M88TS2022_CLOCK_OUT_DISABLED:
598 case M88TS2022_CLOCK_OUT_ENABLED:
600 ret = m88ts2022_wr_reg(priv, 0x05, priv->cfg.clock_out_div);
604 case M88TS2022_CLOCK_OUT_ENABLED_XTALOUT:
611 ret = m88ts2022_wr_reg(priv, 0x42, u8tmp);
615 if (priv->cfg.loop_through)
620 ret = m88ts2022_wr_reg(priv, 0x62, u8tmp);
625 ret = m88ts2022_wr_reg(priv, 0x00, 0x00);
629 dev_info(&priv->client->dev,
630 "%s: Montage M88TS2022 successfully identified\n",
633 fe->tuner_priv = priv;
634 memcpy(&fe->ops.tuner_ops, &m88ts2022_tuner_ops,
635 sizeof(struct dvb_tuner_ops));
637 i2c_set_clientdata(client, priv);
640 dev_dbg(&client->dev, "%s: failed=%d\n", __func__, ret);
645 static int m88ts2022_remove(struct i2c_client *client)
647 struct m88ts2022_priv *priv = i2c_get_clientdata(client);
648 struct dvb_frontend *fe = priv->cfg.fe;
649 dev_dbg(&client->dev, "%s:\n", __func__);
651 memset(&fe->ops.tuner_ops, 0, sizeof(struct dvb_tuner_ops));
652 fe->tuner_priv = NULL;
658 static const struct i2c_device_id m88ts2022_id[] = {
662 MODULE_DEVICE_TABLE(i2c, m88ts2022_id);
664 static struct i2c_driver m88ts2022_driver = {
666 .owner = THIS_MODULE,
669 .probe = m88ts2022_probe,
670 .remove = m88ts2022_remove,
671 .id_table = m88ts2022_id,
674 module_i2c_driver(m88ts2022_driver);
676 MODULE_DESCRIPTION("Montage M88TS2022 silicon tuner driver");
677 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
678 MODULE_LICENSE("GPL");