2 * Mirics MSi001 silicon tuner driver
4 * Copyright (C) 2013 Antti Palosaari <crope@iki.fi>
5 * Copyright (C) 2014 Antti Palosaari <crope@iki.fi>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License as published by
9 * the Free Software Foundation; either version 2 of the License, or
10 * (at your option) any later version.
12 * This program is distributed in the hope that it will be useful,
13 * but WITHOUT ANY WARRANTY; without even the implied warranty of
14 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
18 #include <linux/module.h>
19 #include <linux/gcd.h>
20 #include <media/v4l2-device.h>
21 #include <media/v4l2-ctrls.h>
23 static const struct v4l2_frequency_band bands[] = {
25 .type = V4L2_TUNER_RF,
27 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
29 .rangehigh = 263000000,
31 .type = V4L2_TUNER_RF,
33 .capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS,
34 .rangelow = 390000000,
35 .rangehigh = 960000000,
40 struct spi_device *spi;
41 struct v4l2_subdev sd;
44 struct v4l2_ctrl_handler hdl;
45 struct v4l2_ctrl *bandwidth_auto;
46 struct v4l2_ctrl *bandwidth;
47 struct v4l2_ctrl *lna_gain;
48 struct v4l2_ctrl *mixer_gain;
49 struct v4l2_ctrl *if_gain;
54 static inline struct msi001 *sd_to_msi001(struct v4l2_subdev *sd)
56 return container_of(sd, struct msi001, sd);
59 static int msi001_wreg(struct msi001 *s, u32 data)
61 /* Register format: 4 bits addr + 20 bits value */
62 return spi_write(s->spi, &data, 3);
65 static int msi001_set_gain(struct msi001 *s, int lna_gain, int mixer_gain,
71 dev_dbg(&s->spi->dev, "lna=%d mixer=%d if=%d\n",
72 lna_gain, mixer_gain, if_gain);
75 reg |= (59 - if_gain) << 4;
77 reg |= (1 - mixer_gain) << 12;
78 reg |= (1 - lna_gain) << 13;
81 ret = msi001_wreg(s, reg);
87 dev_dbg(&s->spi->dev, "failed %d\n", ret);
91 static int msi001_set_tuner(struct msi001 *s)
94 unsigned int n, m, thresh, frac, vco_step, tmp, f_if1;
97 u8 mode, filter_mode, lo_div;
104 { 50000000, 0xe1, 16}, /* AM_MODE2, antenna 2 */
105 {108000000, 0x42, 32}, /* VHF_MODE */
106 {330000000, 0x44, 16}, /* B3_MODE */
107 {960000000, 0x48, 4}, /* B45_MODE */
108 { ~0U, 0x50, 2}, /* BL_MODE */
110 static const struct {
114 { 0, 0x03}, /* Zero IF */
115 { 450000, 0x02}, /* 450 kHz IF */
116 {1620000, 0x01}, /* 1.62 MHz IF */
117 {2048000, 0x00}, /* 2.048 MHz IF */
119 static const struct {
122 } bandwidth_lut[] = {
123 { 200000, 0x00}, /* 200 kHz */
124 { 300000, 0x01}, /* 300 kHz */
125 { 600000, 0x02}, /* 600 kHz */
126 {1536000, 0x03}, /* 1.536 MHz */
127 {5000000, 0x04}, /* 5 MHz */
128 {6000000, 0x05}, /* 6 MHz */
129 {7000000, 0x06}, /* 7 MHz */
130 {8000000, 0x07}, /* 8 MHz */
133 unsigned int f_rf = s->f_tuner;
137 * 200000, 300000, 600000, 1536000, 5000000, 6000000, 7000000, 8000000
139 unsigned int bandwidth;
142 * intermediate frequency (Hz)
143 * 0, 450000, 1620000, 2048000
145 unsigned int f_if = 0;
146 #define F_REF 24000000
150 dev_dbg(&s->spi->dev, "f_rf=%d f_if=%d\n", f_rf, f_if);
152 for (i = 0; i < ARRAY_SIZE(band_lut); i++) {
153 if (f_rf <= band_lut[i].rf) {
154 mode = band_lut[i].mode;
155 lo_div = band_lut[i].lo_div;
160 if (i == ARRAY_SIZE(band_lut)) {
165 /* AM_MODE is upconverted */
166 if ((mode >> 0) & 0x1)
171 for (i = 0; i < ARRAY_SIZE(if_freq_lut); i++) {
172 if (f_if == if_freq_lut[i].freq) {
173 filter_mode = if_freq_lut[i].filter_mode;
178 if (i == ARRAY_SIZE(if_freq_lut)) {
184 bandwidth = s->bandwidth->val;
185 bandwidth = clamp(bandwidth, 200000U, 8000000U);
187 for (i = 0; i < ARRAY_SIZE(bandwidth_lut); i++) {
188 if (bandwidth <= bandwidth_lut[i].freq) {
189 bandwidth = bandwidth_lut[i].val;
194 if (i == ARRAY_SIZE(bandwidth_lut)) {
199 s->bandwidth->val = bandwidth_lut[i].freq;
201 dev_dbg(&s->spi->dev, "bandwidth selected=%d\n", bandwidth_lut[i].freq);
203 f_vco = (u64) (f_rf + f_if + f_if1) * lo_div;
205 m = do_div(tmp64, F_REF * R_REF);
206 n = (unsigned int) tmp64;
208 vco_step = F_OUT_STEP * lo_div;
209 thresh = (F_REF * R_REF) / vco_step;
210 frac = 1ul * thresh * m / (F_REF * R_REF);
212 /* Find out greatest common divisor and divide to smaller. */
213 tmp = gcd(thresh, frac);
217 /* Force divide to reg max. Resolution will be reduced. */
218 tmp = DIV_ROUND_UP(thresh, 4095);
219 thresh = DIV_ROUND_CLOSEST(thresh, tmp);
220 frac = DIV_ROUND_CLOSEST(frac, tmp);
222 /* calc real RF set */
223 tmp = 1ul * F_REF * R_REF * n;
224 tmp += 1ul * F_REF * R_REF * frac / thresh;
227 dev_dbg(&s->spi->dev, "rf=%u:%u n=%d thresh=%d frac=%d\n",
228 f_rf, tmp, n, thresh, frac);
230 ret = msi001_wreg(s, 0x00000e);
234 ret = msi001_wreg(s, 0x000003);
240 reg |= filter_mode << 12;
241 reg |= bandwidth << 14;
244 ret = msi001_wreg(s, reg);
252 ret = msi001_wreg(s, reg);
259 ret = msi001_wreg(s, reg);
263 ret = msi001_set_gain(s, s->lna_gain->cur.val, s->mixer_gain->cur.val,
264 s->if_gain->cur.val);
271 ret = msi001_wreg(s, reg);
277 dev_dbg(&s->spi->dev, "failed %d\n", ret);
281 static int msi001_s_power(struct v4l2_subdev *sd, int on)
283 struct msi001 *s = sd_to_msi001(sd);
286 dev_dbg(&s->spi->dev, "on=%d\n", on);
291 ret = msi001_wreg(s, 0x000000);
296 static const struct v4l2_subdev_core_ops msi001_core_ops = {
297 .s_power = msi001_s_power,
300 static int msi001_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *v)
302 struct msi001 *s = sd_to_msi001(sd);
304 dev_dbg(&s->spi->dev, "index=%d\n", v->index);
306 strlcpy(v->name, "Mirics MSi001", sizeof(v->name));
307 v->type = V4L2_TUNER_RF;
308 v->capability = V4L2_TUNER_CAP_1HZ | V4L2_TUNER_CAP_FREQ_BANDS;
309 v->rangelow = 49000000;
310 v->rangehigh = 960000000;
315 static int msi001_s_tuner(struct v4l2_subdev *sd, const struct v4l2_tuner *v)
317 struct msi001 *s = sd_to_msi001(sd);
319 dev_dbg(&s->spi->dev, "index=%d\n", v->index);
323 static int msi001_g_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *f)
325 struct msi001 *s = sd_to_msi001(sd);
327 dev_dbg(&s->spi->dev, "tuner=%d\n", f->tuner);
328 f->frequency = s->f_tuner;
332 static int msi001_s_frequency(struct v4l2_subdev *sd,
333 const struct v4l2_frequency *f)
335 struct msi001 *s = sd_to_msi001(sd);
338 dev_dbg(&s->spi->dev, "tuner=%d type=%d frequency=%u\n",
339 f->tuner, f->type, f->frequency);
341 if (f->frequency < ((bands[0].rangehigh + bands[1].rangelow) / 2))
345 s->f_tuner = clamp_t(unsigned int, f->frequency,
346 bands[band].rangelow, bands[band].rangehigh);
348 return msi001_set_tuner(s);
351 static int msi001_enum_freq_bands(struct v4l2_subdev *sd,
352 struct v4l2_frequency_band *band)
354 struct msi001 *s = sd_to_msi001(sd);
356 dev_dbg(&s->spi->dev, "tuner=%d type=%d index=%d\n",
357 band->tuner, band->type, band->index);
359 if (band->index >= ARRAY_SIZE(bands))
362 band->capability = bands[band->index].capability;
363 band->rangelow = bands[band->index].rangelow;
364 band->rangehigh = bands[band->index].rangehigh;
369 static const struct v4l2_subdev_tuner_ops msi001_tuner_ops = {
370 .g_tuner = msi001_g_tuner,
371 .s_tuner = msi001_s_tuner,
372 .g_frequency = msi001_g_frequency,
373 .s_frequency = msi001_s_frequency,
374 .enum_freq_bands = msi001_enum_freq_bands,
377 static const struct v4l2_subdev_ops msi001_ops = {
378 .core = &msi001_core_ops,
379 .tuner = &msi001_tuner_ops,
382 static int msi001_s_ctrl(struct v4l2_ctrl *ctrl)
384 struct msi001 *s = container_of(ctrl->handler, struct msi001, hdl);
388 dev_dbg(&s->spi->dev,
389 "id=%d name=%s val=%d min=%lld max=%lld step=%lld\n",
390 ctrl->id, ctrl->name, ctrl->val,
391 ctrl->minimum, ctrl->maximum, ctrl->step);
394 case V4L2_CID_RF_TUNER_BANDWIDTH_AUTO:
395 case V4L2_CID_RF_TUNER_BANDWIDTH:
396 ret = msi001_set_tuner(s);
398 case V4L2_CID_RF_TUNER_LNA_GAIN:
399 ret = msi001_set_gain(s, s->lna_gain->val,
400 s->mixer_gain->cur.val, s->if_gain->cur.val);
402 case V4L2_CID_RF_TUNER_MIXER_GAIN:
403 ret = msi001_set_gain(s, s->lna_gain->cur.val,
404 s->mixer_gain->val, s->if_gain->cur.val);
406 case V4L2_CID_RF_TUNER_IF_GAIN:
407 ret = msi001_set_gain(s, s->lna_gain->cur.val,
408 s->mixer_gain->cur.val, s->if_gain->val);
411 dev_dbg(&s->spi->dev, "unkown control %d\n", ctrl->id);
418 static const struct v4l2_ctrl_ops msi001_ctrl_ops = {
419 .s_ctrl = msi001_s_ctrl,
422 static int msi001_probe(struct spi_device *spi)
427 dev_dbg(&spi->dev, "\n");
429 s = kzalloc(sizeof(struct msi001), GFP_KERNEL);
432 dev_dbg(&spi->dev, "Could not allocate memory for msi001\n");
437 s->f_tuner = bands[0].rangelow;
438 v4l2_spi_subdev_init(&s->sd, spi, &msi001_ops);
440 /* Register controls */
441 v4l2_ctrl_handler_init(&s->hdl, 5);
442 s->bandwidth_auto = v4l2_ctrl_new_std(&s->hdl, &msi001_ctrl_ops,
443 V4L2_CID_RF_TUNER_BANDWIDTH_AUTO, 0, 1, 1, 1);
444 s->bandwidth = v4l2_ctrl_new_std(&s->hdl, &msi001_ctrl_ops,
445 V4L2_CID_RF_TUNER_BANDWIDTH, 200000, 8000000, 1, 200000);
446 v4l2_ctrl_auto_cluster(2, &s->bandwidth_auto, 0, false);
447 s->lna_gain = v4l2_ctrl_new_std(&s->hdl, &msi001_ctrl_ops,
448 V4L2_CID_RF_TUNER_LNA_GAIN, 0, 1, 1, 1);
449 s->mixer_gain = v4l2_ctrl_new_std(&s->hdl, &msi001_ctrl_ops,
450 V4L2_CID_RF_TUNER_MIXER_GAIN, 0, 1, 1, 1);
451 s->if_gain = v4l2_ctrl_new_std(&s->hdl, &msi001_ctrl_ops,
452 V4L2_CID_RF_TUNER_IF_GAIN, 0, 59, 1, 0);
455 dev_err(&s->spi->dev, "Could not initialize controls\n");
456 /* control init failed, free handler */
457 goto err_ctrl_handler_free;
460 s->sd.ctrl_handler = &s->hdl;
463 err_ctrl_handler_free:
464 v4l2_ctrl_handler_free(&s->hdl);
470 static int msi001_remove(struct spi_device *spi)
472 struct v4l2_subdev *sd = spi_get_drvdata(spi);
473 struct msi001 *s = sd_to_msi001(sd);
475 dev_dbg(&spi->dev, "\n");
478 * Registered by v4l2_spi_new_subdev() from master driver, but we must
479 * unregister it from here. Weird.
481 v4l2_device_unregister_subdev(&s->sd);
482 v4l2_ctrl_handler_free(&s->hdl);
487 static const struct spi_device_id msi001_id[] = {
491 MODULE_DEVICE_TABLE(spi, msi001_id);
493 static struct spi_driver msi001_driver = {
496 .owner = THIS_MODULE,
498 .probe = msi001_probe,
499 .remove = msi001_remove,
500 .id_table = msi001_id,
502 module_spi_driver(msi001_driver);
504 MODULE_AUTHOR("Antti Palosaari <crope@iki.fi>");
505 MODULE_DESCRIPTION("Mirics MSi001");
506 MODULE_LICENSE("GPL");