2 * mxl111sf-i2c.c - driver for the MaxLinear MXL111SF
4 * Copyright (C) 2010-2014 Michael Krufky <mkrufky@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 * GNU General Public License for more details.
16 * You should have received a copy of the GNU General Public License
17 * along with this program; if not, write to the Free Software
18 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
21 #include "mxl111sf-i2c.h"
24 /* SW-I2C ----------------------------------------------------------------- */
26 #define SW_I2C_ADDR 0x1a
27 #define SW_I2C_EN 0x02
28 #define SW_SCL_OUT 0x04
29 #define SW_SDA_OUT 0x08
30 #define SW_SDA_IN 0x04
32 #define SW_I2C_BUSY_ADDR 0x2f
33 #define SW_I2C_BUSY 0x02
35 static int mxl111sf_i2c_bitbang_sendbyte(struct mxl111sf_state *state,
41 mxl_i2c("(0x%02x)", byte);
43 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
47 for (i = 0; i < 8; i++) {
49 data = (byte & (0x80 >> i)) ? SW_SDA_OUT : 0;
51 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
52 0x10 | SW_I2C_EN | data);
56 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
57 0x10 | SW_I2C_EN | data | SW_SCL_OUT);
61 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
62 0x10 | SW_I2C_EN | data);
67 /* last bit was 0 so we need to release SDA */
69 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
70 0x10 | SW_I2C_EN | SW_SDA_OUT);
75 /* CLK high for ACK readback */
76 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
77 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
81 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
85 /* drop the CLK after getting ACK, SDA will go high right away */
86 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
87 0x10 | SW_I2C_EN | SW_SDA_OUT);
97 static int mxl111sf_i2c_bitbang_recvbyte(struct mxl111sf_state *state,
108 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
109 0x10 | SW_I2C_EN | SW_SDA_OUT);
113 for (i = 0; i < 8; i++) {
114 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
116 SW_SCL_OUT | SW_SDA_OUT);
120 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &data);
124 if (data & SW_SDA_IN)
127 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
128 0x10 | SW_I2C_EN | SW_SDA_OUT);
137 static int mxl111sf_i2c_start(struct mxl111sf_state *state)
143 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
144 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
148 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
149 0x10 | SW_I2C_EN | SW_SCL_OUT);
153 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
154 0x10 | SW_I2C_EN); /* start */
160 static int mxl111sf_i2c_stop(struct mxl111sf_state *state)
166 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
167 0x10 | SW_I2C_EN); /* stop */
171 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
172 0x10 | SW_I2C_EN | SW_SCL_OUT);
176 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
177 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
181 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
182 0x10 | SW_SCL_OUT | SW_SDA_OUT);
188 static int mxl111sf_i2c_ack(struct mxl111sf_state *state)
195 ret = mxl111sf_read_reg(state, SW_I2C_BUSY_ADDR, &b);
199 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
205 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
206 0x10 | SW_I2C_EN | SW_SCL_OUT);
210 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
211 0x10 | SW_I2C_EN | SW_SDA_OUT);
217 static int mxl111sf_i2c_nack(struct mxl111sf_state *state)
223 /* SDA high to signal last byte read from slave */
224 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
225 0x10 | SW_I2C_EN | SW_SCL_OUT | SW_SDA_OUT);
229 ret = mxl111sf_write_reg(state, SW_I2C_ADDR,
230 0x10 | SW_I2C_EN | SW_SDA_OUT);
236 /* ------------------------------------------------------------------------ */
238 static int mxl111sf_i2c_sw_xfer_msg(struct mxl111sf_state *state,
245 if (msg->flags & I2C_M_RD) {
247 ret = mxl111sf_i2c_start(state);
251 ret = mxl111sf_i2c_bitbang_sendbyte(state,
252 (msg->addr << 1) | 0x01);
254 mxl111sf_i2c_stop(state);
258 for (i = 0; i < msg->len; i++) {
259 ret = mxl111sf_i2c_bitbang_recvbyte(state,
262 mxl111sf_i2c_stop(state);
266 if (i < msg->len - 1)
267 mxl111sf_i2c_ack(state);
270 mxl111sf_i2c_nack(state);
272 ret = mxl111sf_i2c_stop(state);
278 ret = mxl111sf_i2c_start(state);
282 ret = mxl111sf_i2c_bitbang_sendbyte(state,
283 (msg->addr << 1) & 0xfe);
285 mxl111sf_i2c_stop(state);
289 for (i = 0; i < msg->len; i++) {
290 ret = mxl111sf_i2c_bitbang_sendbyte(state,
293 mxl111sf_i2c_stop(state);
298 /* FIXME: we only want to do this on the last transaction */
299 mxl111sf_i2c_stop(state);
305 /* HW-I2C ----------------------------------------------------------------- */
307 #define USB_WRITE_I2C_CMD 0x99
308 #define USB_READ_I2C_CMD 0xdd
309 #define USB_END_I2C_CMD 0xfe
311 #define USB_WRITE_I2C_CMD_LEN 26
312 #define USB_READ_I2C_CMD_LEN 24
314 #define I2C_MUX_REG 0x30
315 #define I2C_CONTROL_REG 0x00
316 #define I2C_SLAVE_ADDR_REG 0x08
317 #define I2C_DATA_REG 0x0c
318 #define I2C_INT_STATUS_REG 0x10
320 static int mxl111sf_i2c_send_data(struct mxl111sf_state *state,
323 int ret = mxl111sf_ctrl_msg(state->d, wdata[0],
324 &wdata[1], 25, NULL, 0);
330 static int mxl111sf_i2c_get_data(struct mxl111sf_state *state,
331 u8 index, u8 *wdata, u8 *rdata)
333 int ret = mxl111sf_ctrl_msg(state->d, wdata[0],
334 &wdata[1], 25, rdata, 24);
340 static u8 mxl111sf_i2c_check_status(struct mxl111sf_state *state)
347 buf[0] = USB_READ_I2C_CMD;
350 buf[2] = I2C_INT_STATUS_REG;
354 buf[5] = USB_END_I2C_CMD;
356 mxl111sf_i2c_get_data(state, 0, buf, buf);
364 static u8 mxl111sf_i2c_check_fifo(struct mxl111sf_state *state)
371 buf[0] = USB_READ_I2C_CMD;
374 buf[2] = I2C_MUX_REG;
378 buf[5] = I2C_INT_STATUS_REG;
381 buf[8] = USB_END_I2C_CMD;
383 mxl111sf_i2c_get_data(state, 0, buf, buf);
385 if (0x08 == (buf[1] & 0x08))
388 if ((buf[5] & 0x02) == 0x02)
389 mxl_i2c("(buf[5] & 0x02) == 0x02"); /* FIXME */
394 static int mxl111sf_i2c_readagain(struct mxl111sf_state *state,
403 mxl_i2c("read %d bytes", count);
405 while ((fifo_status == 0) && (i++ < 5))
406 fifo_status = mxl111sf_i2c_check_fifo(state);
408 i2c_w_data[0] = 0xDD;
409 i2c_w_data[1] = 0x00;
411 for (i = 2; i < 26; i++)
412 i2c_w_data[i] = 0xFE;
414 for (i = 0; i < count; i++) {
415 i2c_w_data[2+(i*3)] = 0x0C;
416 i2c_w_data[3+(i*3)] = 0x00;
417 i2c_w_data[4+(i*3)] = 0x00;
420 mxl111sf_i2c_get_data(state, 0, i2c_w_data, i2c_r_data);
422 /* Check for I2C NACK status */
423 if (mxl111sf_i2c_check_status(state) == 1) {
426 for (i = 0; i < count; i++) {
427 rbuf[i] = i2c_r_data[(i*3)+1];
428 mxl_i2c("%02x\t %02x",
430 i2c_r_data[(i*3)+2]);
440 static int mxl111sf_i2c_hw_xfer_msg(struct mxl111sf_state *state,
453 mxl_i2c("addr: 0x%02x, read buff len: %d, write buff len: %d",
454 msg->addr, (msg->flags & I2C_M_RD) ? msg->len : 0,
455 (!(msg->flags & I2C_M_RD)) ? msg->len : 0);
457 for (index = 0; index < 26; index++)
458 buf[index] = USB_END_I2C_CMD;
460 /* command to indicate data payload is destined for I2C interface */
461 buf[0] = USB_WRITE_I2C_CMD;
464 /* enable I2C interface */
465 buf[2] = I2C_MUX_REG;
469 /* enable I2C interface */
470 buf[5] = I2C_MUX_REG;
474 /* set Timeout register on I2C interface */
479 /* enable Interrupts on I2C interface */
488 ret = mxl111sf_i2c_send_data(state, 0, buf);
490 /* write data on I2C bus */
491 if (!(msg->flags & I2C_M_RD) && (msg->len > 0)) {
492 mxl_i2c("%d\t%02x", msg->len, msg->buf[0]);
494 /* control register on I2C interface to initialize I2C bus */
495 buf[2] = I2C_CONTROL_REG;
497 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
499 /* I2C Slave device Address */
500 buf[5] = I2C_SLAVE_ADDR_REG;
501 buf[6] = (msg->addr);
503 buf[8] = USB_END_I2C_CMD;
504 ret = mxl111sf_i2c_send_data(state, 0, buf);
506 /* check for slave device status */
507 if (mxl111sf_i2c_check_status(state) == 1) {
508 mxl_i2c("NACK writing slave address %02x",
510 /* if NACK, stop I2C bus and exit */
511 buf[2] = I2C_CONTROL_REG;
513 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
518 /* I2C interface can do I2C operations in block of 8 bytes of
519 I2C data. calculation to figure out number of blocks of i2c
520 data required to program */
521 block_len = (msg->len / 8);
522 left_over_len = (msg->len % 8);
525 mxl_i2c("block_len %d, left_over_len %d",
526 block_len, left_over_len);
528 for (index = 0; index < block_len; index++) {
529 for (i = 0; i < 8; i++) {
530 /* write data on I2C interface */
531 buf[2+(i*3)] = I2C_DATA_REG;
532 buf[3+(i*3)] = msg->buf[(index*8)+i];
536 ret = mxl111sf_i2c_send_data(state, 0, buf);
538 /* check for I2C NACK status */
539 if (mxl111sf_i2c_check_status(state) == 1) {
540 mxl_i2c("NACK writing slave address %02x",
543 /* if NACK, stop I2C bus and exit */
544 buf[2] = I2C_CONTROL_REG;
546 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
554 for (k = 0; k < 26; k++)
555 buf[k] = USB_END_I2C_CMD;
560 for (i = 0; i < left_over_len; i++) {
561 buf[2+(i*3)] = I2C_DATA_REG;
562 buf[3+(i*3)] = msg->buf[(index*8)+i];
563 mxl_i2c("index = %d %d data %d",
564 index, i, msg->buf[(index*8)+i]);
567 ret = mxl111sf_i2c_send_data(state, 0, buf);
569 /* check for I2C NACK status */
570 if (mxl111sf_i2c_check_status(state) == 1) {
571 mxl_i2c("NACK writing slave address %02x",
574 /* if NACK, stop I2C bus and exit */
575 buf[2] = I2C_CONTROL_REG;
577 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
584 /* issue I2C STOP after write */
585 buf[2] = I2C_CONTROL_REG;
587 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
591 /* read data from I2C bus */
592 if ((msg->flags & I2C_M_RD) && (msg->len > 0)) {
593 mxl_i2c("read buf len %d", msg->len);
595 /* command to indicate data payload is
596 destined for I2C interface */
597 buf[2] = I2C_CONTROL_REG;
599 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
601 /* I2C xfer length */
603 buf[6] = (msg->len & 0xFF);
606 /* I2C slave device Address */
607 buf[8] = I2C_SLAVE_ADDR_REG;
610 buf[11] = USB_END_I2C_CMD;
611 ret = mxl111sf_i2c_send_data(state, 0, buf);
613 /* check for I2C NACK status */
614 if (mxl111sf_i2c_check_status(state) == 1) {
615 mxl_i2c("NACK reading slave address %02x",
618 /* if NACK, stop I2C bus and exit */
619 buf[2] = I2C_CONTROL_REG;
621 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
626 /* I2C interface can do I2C operations in block of 8 bytes of
627 I2C data. calculation to figure out number of blocks of
628 i2c data required to program */
629 block_len = ((msg->len) / 8);
630 left_over_len = ((msg->len) % 8);
633 mxl_i2c("block_len %d, left_over_len %d",
634 block_len, left_over_len);
636 /* command to read data from I2C interface */
637 buf[0] = USB_READ_I2C_CMD;
640 for (index = 0; index < block_len; index++) {
641 /* setup I2C read request packet on I2C interface */
642 for (i = 0; i < 8; i++) {
643 buf[2+(i*3)] = I2C_DATA_REG;
648 ret = mxl111sf_i2c_get_data(state, 0, buf, i2c_r_data);
650 /* check for I2C NACK status */
651 if (mxl111sf_i2c_check_status(state) == 1) {
652 mxl_i2c("NACK reading slave address %02x",
655 /* if NACK, stop I2C bus and exit */
656 buf[2] = I2C_CONTROL_REG;
658 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
663 /* copy data from i2c data payload to read buffer */
664 for (i = 0; i < 8; i++) {
665 rd_status[i] = i2c_r_data[(i*3)+2];
667 if (rd_status[i] == 0x04) {
669 mxl_i2c("i2c fifo empty!"
671 msg->buf[(index*8)+i] =
675 mxl111sf_i2c_readagain(
678 if (ret_status == 1) {
683 msg->buf[(index*8)+(k+i+1)] =
685 mxl_i2c("read data: %02x\t %02x",
686 msg->buf[(index*8)+(k+i)],
688 mxl_i2c("read data: %02x\t %02x",
689 msg->buf[(index*8)+(k+i+1)],
699 msg->buf[(index*8)+i] =
703 msg->buf[(index*8)+i] =
713 for (k = 0; k < 26; k++)
714 buf[k] = USB_END_I2C_CMD;
719 for (i = 0; i < left_over_len; i++) {
720 buf[2+(i*3)] = I2C_DATA_REG;
724 ret = mxl111sf_i2c_get_data(state, 0, buf,
727 /* check for I2C NACK status */
728 if (mxl111sf_i2c_check_status(state) == 1) {
729 mxl_i2c("NACK reading slave address %02x",
732 /* if NACK, stop I2C bus and exit */
733 buf[2] = I2C_CONTROL_REG;
735 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
740 for (i = 0; i < left_over_len; i++) {
741 msg->buf[(block_len*8)+i] =
743 mxl_i2c("read data: %02x\t %02x",
745 i2c_r_data[(i*3)+2]);
749 /* indicate I2C interface to issue NACK
750 after next I2C read op */
751 buf[0] = USB_WRITE_I2C_CMD;
754 /* control register */
755 buf[2] = I2C_CONTROL_REG;
757 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
759 buf[5] = USB_END_I2C_CMD;
760 ret = mxl111sf_i2c_send_data(state, 0, buf);
762 /* control register */
763 buf[2] = I2C_CONTROL_REG;
765 buf[4] = (HWI2C400) ? 0x03 : 0x0D;
769 /* STOP and disable I2C MUX */
770 buf[0] = USB_WRITE_I2C_CMD;
773 /* de-initilize I2C BUS */
774 buf[5] = USB_END_I2C_CMD;
775 mxl111sf_i2c_send_data(state, 0, buf);
777 /* Control Register */
778 buf[2] = I2C_CONTROL_REG;
782 /* disable I2C interface */
783 buf[5] = I2C_MUX_REG;
787 /* de-initilize I2C BUS */
788 buf[8] = USB_END_I2C_CMD;
789 mxl111sf_i2c_send_data(state, 0, buf);
791 /* disable I2C interface */
792 buf[2] = I2C_MUX_REG;
796 /* disable I2C interface */
797 buf[5] = I2C_MUX_REG;
801 /* disable I2C interface */
802 buf[8] = I2C_MUX_REG;
806 buf[11] = USB_END_I2C_CMD;
807 mxl111sf_i2c_send_data(state, 0, buf);
812 /* ------------------------------------------------------------------------ */
814 int mxl111sf_i2c_xfer(struct i2c_adapter *adap,
815 struct i2c_msg msg[], int num)
817 struct dvb_usb_device *d = i2c_get_adapdata(adap);
818 struct mxl111sf_state *state = d->priv;
819 int hwi2c = (state->chip_rev > MXL111SF_V6);
822 if (mutex_lock_interruptible(&d->i2c_mutex) < 0)
825 for (i = 0; i < num; i++) {
827 mxl111sf_i2c_hw_xfer_msg(state, &msg[i]) :
828 mxl111sf_i2c_sw_xfer_msg(state, &msg[i]);
830 mxl_debug_adv("failed with error %d on i2c "
831 "transaction %d of %d, %sing %d bytes "
832 "to/from 0x%02x", ret, i+1, num,
833 (msg[i].flags & I2C_M_RD) ?
835 msg[i].len, msg[i].addr);
841 mutex_unlock(&d->i2c_mutex);
843 return i == num ? num : -EREMOTEIO;