2 * Driver for the Conexant CX23885 PCIe bridge
4 * Copyright (c) 2006 Steven Toth <stoth@linuxtv.org>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
11 * This program is distributed in the hope that it will be useful,
12 * but WITHOUT ANY WARRANTY; without even the implied warranty of
13 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 * GNU General Public License for more details.
17 * You should have received a copy of the GNU General Public License
18 * along with this program; if not, write to the Free Software
19 * Foundation, Inc., 675 Mass Ave, Cambridge, MA 02139, USA.
22 #include <linux/module.h>
23 #include <linux/init.h>
24 #include <linux/device.h>
26 #include <linux/kthread.h>
27 #include <linux/file.h>
28 #include <linux/suspend.h>
31 #include <media/v4l2-common.h>
33 #include "dvb_ca_en50221.h"
42 #include "tuner-xc2028.h"
43 #include "tuner-simple.h"
45 #include "dibx000_common.h"
48 #include "stv0900_reg.h"
54 #include "netup-eeprom.h"
55 #include "netup-init.h"
58 static unsigned int debug;
60 #define dprintk(level, fmt, arg...)\
61 do { if (debug >= level)\
62 printk(KERN_DEBUG "%s/0: " fmt, dev->name, ## arg);\
65 /* ------------------------------------------------------------------ */
67 static unsigned int alt_tuner;
68 module_param(alt_tuner, int, 0644);
69 MODULE_PARM_DESC(alt_tuner, "Enable alternate tuner configuration");
71 DVB_DEFINE_MOD_OPT_ADAPTER_NR(adapter_nr);
73 /* ------------------------------------------------------------------ */
75 static int dvb_buf_setup(struct videobuf_queue *q,
76 unsigned int *count, unsigned int *size)
78 struct cx23885_tsport *port = q->priv_data;
80 port->ts_packet_size = 188 * 4;
81 port->ts_packet_count = 32;
83 *size = port->ts_packet_size * port->ts_packet_count;
88 static int dvb_buf_prepare(struct videobuf_queue *q,
89 struct videobuf_buffer *vb, enum v4l2_field field)
91 struct cx23885_tsport *port = q->priv_data;
92 return cx23885_buf_prepare(q, port, (struct cx23885_buffer *)vb, field);
95 static void dvb_buf_queue(struct videobuf_queue *q, struct videobuf_buffer *vb)
97 struct cx23885_tsport *port = q->priv_data;
98 cx23885_buf_queue(port, (struct cx23885_buffer *)vb);
101 static void dvb_buf_release(struct videobuf_queue *q,
102 struct videobuf_buffer *vb)
104 cx23885_free_buffer(q, (struct cx23885_buffer *)vb);
107 static struct videobuf_queue_ops dvb_qops = {
108 .buf_setup = dvb_buf_setup,
109 .buf_prepare = dvb_buf_prepare,
110 .buf_queue = dvb_buf_queue,
111 .buf_release = dvb_buf_release,
114 static struct s5h1409_config hauppauge_generic_config = {
115 .demod_address = 0x32 >> 1,
116 .output_mode = S5H1409_SERIAL_OUTPUT,
117 .gpio = S5H1409_GPIO_ON,
119 .inversion = S5H1409_INVERSION_OFF,
120 .status_mode = S5H1409_DEMODLOCKING,
121 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
124 static struct tda10048_config hauppauge_hvr1200_config = {
125 .demod_address = 0x10 >> 1,
126 .output_mode = TDA10048_SERIAL_OUTPUT,
127 .fwbulkwritelen = TDA10048_BULKWRITE_200,
128 .inversion = TDA10048_INVERSION_ON,
129 .dtv6_if_freq_khz = TDA10048_IF_3300,
130 .dtv7_if_freq_khz = TDA10048_IF_3800,
131 .dtv8_if_freq_khz = TDA10048_IF_4300,
132 .clk_freq_khz = TDA10048_CLK_16000,
135 static struct tda10048_config hauppauge_hvr1210_config = {
136 .demod_address = 0x10 >> 1,
137 .output_mode = TDA10048_SERIAL_OUTPUT,
138 .fwbulkwritelen = TDA10048_BULKWRITE_200,
139 .inversion = TDA10048_INVERSION_ON,
140 .dtv6_if_freq_khz = TDA10048_IF_3300,
141 .dtv7_if_freq_khz = TDA10048_IF_3500,
142 .dtv8_if_freq_khz = TDA10048_IF_4000,
143 .clk_freq_khz = TDA10048_CLK_16000,
146 static struct s5h1409_config hauppauge_ezqam_config = {
147 .demod_address = 0x32 >> 1,
148 .output_mode = S5H1409_SERIAL_OUTPUT,
149 .gpio = S5H1409_GPIO_OFF,
151 .inversion = S5H1409_INVERSION_ON,
152 .status_mode = S5H1409_DEMODLOCKING,
153 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
156 static struct s5h1409_config hauppauge_hvr1800lp_config = {
157 .demod_address = 0x32 >> 1,
158 .output_mode = S5H1409_SERIAL_OUTPUT,
159 .gpio = S5H1409_GPIO_OFF,
161 .inversion = S5H1409_INVERSION_OFF,
162 .status_mode = S5H1409_DEMODLOCKING,
163 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
166 static struct s5h1409_config hauppauge_hvr1500_config = {
167 .demod_address = 0x32 >> 1,
168 .output_mode = S5H1409_SERIAL_OUTPUT,
169 .gpio = S5H1409_GPIO_OFF,
170 .inversion = S5H1409_INVERSION_OFF,
171 .status_mode = S5H1409_DEMODLOCKING,
172 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
175 static struct mt2131_config hauppauge_generic_tunerconfig = {
179 static struct lgdt330x_config fusionhdtv_5_express = {
180 .demod_address = 0x0e,
181 .demod_chip = LGDT3303,
185 static struct s5h1409_config hauppauge_hvr1500q_config = {
186 .demod_address = 0x32 >> 1,
187 .output_mode = S5H1409_SERIAL_OUTPUT,
188 .gpio = S5H1409_GPIO_ON,
190 .inversion = S5H1409_INVERSION_OFF,
191 .status_mode = S5H1409_DEMODLOCKING,
192 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
195 static struct s5h1409_config dvico_s5h1409_config = {
196 .demod_address = 0x32 >> 1,
197 .output_mode = S5H1409_SERIAL_OUTPUT,
198 .gpio = S5H1409_GPIO_ON,
200 .inversion = S5H1409_INVERSION_OFF,
201 .status_mode = S5H1409_DEMODLOCKING,
202 .mpeg_timing = S5H1409_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
205 static struct s5h1411_config dvico_s5h1411_config = {
206 .output_mode = S5H1411_SERIAL_OUTPUT,
207 .gpio = S5H1411_GPIO_ON,
208 .qam_if = S5H1411_IF_44000,
209 .vsb_if = S5H1411_IF_44000,
210 .inversion = S5H1411_INVERSION_OFF,
211 .status_mode = S5H1411_DEMODLOCKING,
212 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
215 static struct s5h1411_config hcw_s5h1411_config = {
216 .output_mode = S5H1411_SERIAL_OUTPUT,
217 .gpio = S5H1411_GPIO_OFF,
218 .vsb_if = S5H1411_IF_44000,
219 .qam_if = S5H1411_IF_4000,
220 .inversion = S5H1411_INVERSION_ON,
221 .status_mode = S5H1411_DEMODLOCKING,
222 .mpeg_timing = S5H1411_MPEGTIMING_CONTINOUS_NONINVERTING_CLOCK,
225 static struct xc5000_config hauppauge_hvr1500q_tunerconfig = {
230 static struct xc5000_config dvico_xc5000_tunerconfig = {
235 static struct tda829x_config tda829x_no_probe = {
236 .probe_tuner = TDA829X_DONT_PROBE,
239 static struct tda18271_std_map hauppauge_tda18271_std_map = {
240 .atsc_6 = { .if_freq = 5380, .agc_mode = 3, .std = 3,
241 .if_lvl = 6, .rfagc_top = 0x37 },
242 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 0,
243 .if_lvl = 6, .rfagc_top = 0x37 },
246 static struct tda18271_std_map hauppauge_hvr1200_tda18271_std_map = {
247 .dvbt_6 = { .if_freq = 3300, .agc_mode = 3, .std = 4,
248 .if_lvl = 1, .rfagc_top = 0x37, },
249 .dvbt_7 = { .if_freq = 3800, .agc_mode = 3, .std = 5,
250 .if_lvl = 1, .rfagc_top = 0x37, },
251 .dvbt_8 = { .if_freq = 4300, .agc_mode = 3, .std = 6,
252 .if_lvl = 1, .rfagc_top = 0x37, },
255 static struct tda18271_config hauppauge_tda18271_config = {
256 .std_map = &hauppauge_tda18271_std_map,
257 .gate = TDA18271_GATE_ANALOG,
260 static struct tda18271_config hauppauge_hvr1200_tuner_config = {
261 .std_map = &hauppauge_hvr1200_tda18271_std_map,
262 .gate = TDA18271_GATE_ANALOG,
265 static struct tda18271_config hauppauge_hvr1210_tuner_config = {
266 .gate = TDA18271_GATE_DIGITAL,
269 static struct tda18271_std_map hauppauge_hvr127x_std_map = {
270 .atsc_6 = { .if_freq = 3250, .agc_mode = 3, .std = 4,
271 .if_lvl = 1, .rfagc_top = 0x58 },
272 .qam_6 = { .if_freq = 4000, .agc_mode = 3, .std = 5,
273 .if_lvl = 1, .rfagc_top = 0x58 },
276 static struct tda18271_config hauppauge_hvr127x_config = {
277 .std_map = &hauppauge_hvr127x_std_map,
280 static struct lgdt3305_config hauppauge_lgdt3305_config = {
282 .mpeg_mode = LGDT3305_MPEG_SERIAL,
283 .tpclk_edge = LGDT3305_TPCLK_FALLING_EDGE,
284 .tpvalid_polarity = LGDT3305_TP_VALID_HIGH,
286 .spectral_inversion = 1,
291 static struct dibx000_agc_config xc3028_agc_config = {
292 BAND_VHF | BAND_UHF, /* band_caps */
294 /* P_agc_use_sd_mod1=0, P_agc_use_sd_mod2=0, P_agc_freq_pwm_div=0,
295 * P_agc_inv_pwm1=0, P_agc_inv_pwm2=0,
296 * P_agc_inh_dc_rv_est=0, P_agc_time_est=3, P_agc_freeze=0,
297 * P_agc_nb_est=2, P_agc_write=0
299 (0 << 15) | (0 << 14) | (0 << 11) | (0 << 10) | (0 << 9) | (0 << 8) |
300 (3 << 5) | (0 << 4) | (2 << 1) | (0 << 0), /* setup */
303 21, /* time_stabiliz */
315 39718, /* agc2_max */
324 29, /* agc2_slope1 */
325 29, /* agc2_slope2 */
332 1, /* perform_agc_softsplit */
335 /* PLL Configuration for COFDM BW_MHz = 8.000000
336 * With external clock = 30.000000 */
337 static struct dibx000_bandwidth_config xc3028_bw_config = {
338 60000, /* internal */
339 30000, /* sampling */
340 1, /* pll_cfg: prediv */
341 8, /* pll_cfg: ratio */
342 3, /* pll_cfg: range */
343 1, /* pll_cfg: reset */
344 0, /* pll_cfg: bypass */
345 0, /* misc: refdiv */
346 0, /* misc: bypclk_div */
347 1, /* misc: IO_CLK_en_core */
348 1, /* misc: ADClkSrc */
349 0, /* misc: modulo */
350 (3 << 14) | (1 << 12) | (524 << 0), /* sad_cfg: refsel, sel, freq_15k */
351 (1 << 25) | 5816102, /* ifreq = 5.200000 MHz */
353 30000000 /* xtal_hz */
356 static struct dib7000p_config hauppauge_hvr1400_dib7000_config = {
357 .output_mpeg2_in_188_bytes = 1,
358 .hostbus_diversity = 1,
359 .tuner_is_baseband = 0,
362 .agc_config_count = 1,
363 .agc = &xc3028_agc_config,
364 .bw = &xc3028_bw_config,
366 .gpio_dir = DIB7000P_GPIO_DEFAULT_DIRECTIONS,
367 .gpio_val = DIB7000P_GPIO_DEFAULT_VALUES,
368 .gpio_pwm_pos = DIB7000P_GPIO_DEFAULT_PWM_POS,
374 .output_mode = OUTMODE_MPEG2_SERIAL,
377 static struct zl10353_config dvico_fusionhdtv_xc3028 = {
378 .demod_address = 0x0f,
381 .disable_i2c_gate_ctrl = 1,
384 static struct stv0900_reg stv0900_ts_regs[] = {
385 { R0900_TSGENERAL, 0x00 },
386 { R0900_P1_TSSPEED, 0x40 },
387 { R0900_P2_TSSPEED, 0x40 },
388 { R0900_P1_TSCFGM, 0xc0 },
389 { R0900_P2_TSCFGM, 0xc0 },
390 { R0900_P1_TSCFGH, 0xe0 },
391 { R0900_P2_TSCFGH, 0xe0 },
392 { R0900_P1_TSCFGL, 0x20 },
393 { R0900_P2_TSCFGL, 0x20 },
394 { 0xffff, 0xff }, /* terminate */
397 static struct stv0900_config netup_stv0900_config = {
398 .demod_address = 0x68,
400 .clkmode = 3,/* 0-CLKI, 2-XTALI, else AUTO */
401 .diseqc_mode = 2,/* 2/3 PWM */
402 .ts_config_regs = stv0900_ts_regs,
403 .tun1_maddress = 0,/* 0x60 */
404 .tun2_maddress = 3,/* 0x63 */
405 .tun1_adc = 1,/* 1 Vpp */
406 .tun2_adc = 1,/* 1 Vpp */
409 static struct stv6110_config netup_stv6110_tunerconfig_a = {
414 static struct stv6110_config netup_stv6110_tunerconfig_b = {
419 static int tbs_set_voltage(struct dvb_frontend *fe, fe_sec_voltage_t voltage)
421 struct cx23885_tsport *port = fe->dvb->priv;
422 struct cx23885_dev *dev = port->dev;
424 if (voltage == SEC_VOLTAGE_18)
425 cx_write(MC417_RWD, 0x00001e00);/* GPIO-13 high */
426 else if (voltage == SEC_VOLTAGE_13)
427 cx_write(MC417_RWD, 0x00001a00);/* GPIO-13 low */
429 cx_write(MC417_RWD, 0x00001800);/* GPIO-12 low */
433 static struct cx24116_config tbs_cx24116_config = {
434 .demod_address = 0x05,
437 static struct cx24116_config tevii_cx24116_config = {
438 .demod_address = 0x55,
441 static struct cx24116_config dvbworld_cx24116_config = {
442 .demod_address = 0x05,
445 static struct lgs8gxx_config mygica_x8506_lgs8gl5_config = {
446 .prod = LGS8GXX_PROD_LGS8GL5,
447 .demod_address = 0x19,
451 .if_clk_freq = 30400, /* 30.4 MHz */
452 .if_freq = 5380, /* 5.38 MHz */
459 static struct xc5000_config mygica_x8506_xc5000_config = {
464 static int cx23885_dvb_set_frontend(struct dvb_frontend *fe,
465 struct dvb_frontend_parameters *param)
467 struct cx23885_tsport *port = fe->dvb->priv;
468 struct cx23885_dev *dev = port->dev;
470 switch (dev->board) {
471 case CX23885_BOARD_HAUPPAUGE_HVR1275:
472 switch (param->u.vsb.modulation) {
474 cx23885_gpio_clear(dev, GPIO_5);
479 cx23885_gpio_set(dev, GPIO_5);
484 return (port->set_frontend_save) ?
485 port->set_frontend_save(fe, param) : -ENODEV;
488 static struct lgs8gxx_config magicpro_prohdtve2_lgs8g75_config = {
489 .prod = LGS8GXX_PROD_LGS8G75,
490 .demod_address = 0x19,
494 .if_clk_freq = 30400, /* 30.4 MHz */
495 .if_freq = 6500, /* 6.50 MHz */
499 .adc_vpp = 2, /* 1.6 Vpp */
503 static struct xc5000_config magicpro_prohdtve2_xc5000_config = {
508 static int dvb_register(struct cx23885_tsport *port)
510 struct cx23885_dev *dev = port->dev;
511 struct cx23885_i2c *i2c_bus = NULL, *i2c_bus2 = NULL;
512 struct videobuf_dvb_frontend *fe0;
515 /* Get the first frontend */
516 fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
520 /* init struct videobuf_dvb */
521 fe0->dvb.name = dev->name;
524 switch (dev->board) {
525 case CX23885_BOARD_HAUPPAUGE_HVR1250:
526 i2c_bus = &dev->i2c_bus[0];
527 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
528 &hauppauge_generic_config,
530 if (fe0->dvb.frontend != NULL) {
531 dvb_attach(mt2131_attach, fe0->dvb.frontend,
533 &hauppauge_generic_tunerconfig, 0);
536 case CX23885_BOARD_HAUPPAUGE_HVR1270:
537 case CX23885_BOARD_HAUPPAUGE_HVR1275:
538 i2c_bus = &dev->i2c_bus[0];
539 fe0->dvb.frontend = dvb_attach(lgdt3305_attach,
540 &hauppauge_lgdt3305_config,
542 if (fe0->dvb.frontend != NULL) {
543 dvb_attach(tda18271_attach, fe0->dvb.frontend,
544 0x60, &dev->i2c_bus[1].i2c_adap,
545 &hauppauge_hvr127x_config);
548 /* FIXME: temporary hack */
549 /* define bridge override to set_frontend */
550 port->set_frontend_save = fe0->dvb.frontend->ops.set_frontend;
551 fe0->dvb.frontend->ops.set_frontend = cx23885_dvb_set_frontend;
554 case CX23885_BOARD_HAUPPAUGE_HVR1255:
555 i2c_bus = &dev->i2c_bus[0];
556 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
559 if (fe0->dvb.frontend != NULL) {
560 dvb_attach(tda18271_attach, fe0->dvb.frontend,
561 0x60, &dev->i2c_bus[1].i2c_adap,
562 &hauppauge_tda18271_config);
565 case CX23885_BOARD_HAUPPAUGE_HVR1800:
566 i2c_bus = &dev->i2c_bus[0];
570 dvb_attach(s5h1409_attach,
571 &hauppauge_ezqam_config,
573 if (fe0->dvb.frontend != NULL) {
574 dvb_attach(tda829x_attach, fe0->dvb.frontend,
575 &dev->i2c_bus[1].i2c_adap, 0x42,
577 dvb_attach(tda18271_attach, fe0->dvb.frontend,
578 0x60, &dev->i2c_bus[1].i2c_adap,
579 &hauppauge_tda18271_config);
585 dvb_attach(s5h1409_attach,
586 &hauppauge_generic_config,
588 if (fe0->dvb.frontend != NULL)
589 dvb_attach(mt2131_attach, fe0->dvb.frontend,
591 &hauppauge_generic_tunerconfig, 0);
595 case CX23885_BOARD_HAUPPAUGE_HVR1800lp:
596 i2c_bus = &dev->i2c_bus[0];
597 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
598 &hauppauge_hvr1800lp_config,
600 if (fe0->dvb.frontend != NULL) {
601 dvb_attach(mt2131_attach, fe0->dvb.frontend,
603 &hauppauge_generic_tunerconfig, 0);
606 case CX23885_BOARD_DVICO_FUSIONHDTV_5_EXP:
607 i2c_bus = &dev->i2c_bus[0];
608 fe0->dvb.frontend = dvb_attach(lgdt330x_attach,
609 &fusionhdtv_5_express,
611 if (fe0->dvb.frontend != NULL) {
612 dvb_attach(simple_tuner_attach, fe0->dvb.frontend,
613 &i2c_bus->i2c_adap, 0x61,
614 TUNER_LG_TDVS_H06XF);
617 case CX23885_BOARD_HAUPPAUGE_HVR1500Q:
618 i2c_bus = &dev->i2c_bus[1];
619 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
620 &hauppauge_hvr1500q_config,
621 &dev->i2c_bus[0].i2c_adap);
622 if (fe0->dvb.frontend != NULL)
623 dvb_attach(xc5000_attach, fe0->dvb.frontend,
625 &hauppauge_hvr1500q_tunerconfig);
627 case CX23885_BOARD_HAUPPAUGE_HVR1500:
628 i2c_bus = &dev->i2c_bus[1];
629 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
630 &hauppauge_hvr1500_config,
631 &dev->i2c_bus[0].i2c_adap);
632 if (fe0->dvb.frontend != NULL) {
633 struct dvb_frontend *fe;
634 struct xc2028_config cfg = {
635 .i2c_adap = &i2c_bus->i2c_adap,
638 static struct xc2028_ctrl ctl = {
639 .fname = XC2028_DEFAULT_FIRMWARE,
641 .demod = XC3028_FE_OREN538,
644 fe = dvb_attach(xc2028_attach,
645 fe0->dvb.frontend, &cfg);
646 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
647 fe->ops.tuner_ops.set_config(fe, &ctl);
650 case CX23885_BOARD_HAUPPAUGE_HVR1200:
651 case CX23885_BOARD_HAUPPAUGE_HVR1700:
652 i2c_bus = &dev->i2c_bus[0];
653 fe0->dvb.frontend = dvb_attach(tda10048_attach,
654 &hauppauge_hvr1200_config,
656 if (fe0->dvb.frontend != NULL) {
657 dvb_attach(tda829x_attach, fe0->dvb.frontend,
658 &dev->i2c_bus[1].i2c_adap, 0x42,
660 dvb_attach(tda18271_attach, fe0->dvb.frontend,
661 0x60, &dev->i2c_bus[1].i2c_adap,
662 &hauppauge_hvr1200_tuner_config);
665 case CX23885_BOARD_HAUPPAUGE_HVR1210:
666 i2c_bus = &dev->i2c_bus[0];
667 fe0->dvb.frontend = dvb_attach(tda10048_attach,
668 &hauppauge_hvr1210_config,
670 if (fe0->dvb.frontend != NULL) {
671 dvb_attach(tda18271_attach, fe0->dvb.frontend,
672 0x60, &dev->i2c_bus[1].i2c_adap,
673 &hauppauge_hvr1210_tuner_config);
676 case CX23885_BOARD_HAUPPAUGE_HVR1400:
677 i2c_bus = &dev->i2c_bus[0];
678 fe0->dvb.frontend = dvb_attach(dib7000p_attach,
680 0x12, &hauppauge_hvr1400_dib7000_config);
681 if (fe0->dvb.frontend != NULL) {
682 struct dvb_frontend *fe;
683 struct xc2028_config cfg = {
684 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
687 static struct xc2028_ctrl ctl = {
688 .fname = XC3028L_DEFAULT_FIRMWARE,
691 /* This is true for all demods with
693 .type = XC2028_D2633,
696 fe = dvb_attach(xc2028_attach,
697 fe0->dvb.frontend, &cfg);
698 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
699 fe->ops.tuner_ops.set_config(fe, &ctl);
702 case CX23885_BOARD_DVICO_FUSIONHDTV_7_DUAL_EXP:
703 i2c_bus = &dev->i2c_bus[port->nr - 1];
705 fe0->dvb.frontend = dvb_attach(s5h1409_attach,
706 &dvico_s5h1409_config,
708 if (fe0->dvb.frontend == NULL)
709 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
710 &dvico_s5h1411_config,
712 if (fe0->dvb.frontend != NULL)
713 dvb_attach(xc5000_attach, fe0->dvb.frontend,
715 &dvico_xc5000_tunerconfig);
717 case CX23885_BOARD_DVICO_FUSIONHDTV_DVB_T_DUAL_EXP: {
718 i2c_bus = &dev->i2c_bus[port->nr - 1];
720 fe0->dvb.frontend = dvb_attach(zl10353_attach,
721 &dvico_fusionhdtv_xc3028,
723 if (fe0->dvb.frontend != NULL) {
724 struct dvb_frontend *fe;
725 struct xc2028_config cfg = {
726 .i2c_adap = &i2c_bus->i2c_adap,
729 static struct xc2028_ctrl ctl = {
730 .fname = XC2028_DEFAULT_FIRMWARE,
732 .demod = XC3028_FE_ZARLINK456,
735 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
737 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
738 fe->ops.tuner_ops.set_config(fe, &ctl);
742 case CX23885_BOARD_LEADTEK_WINFAST_PXDVR3200_H:
743 case CX23885_BOARD_COMPRO_VIDEOMATE_E650F:
744 i2c_bus = &dev->i2c_bus[0];
746 fe0->dvb.frontend = dvb_attach(zl10353_attach,
747 &dvico_fusionhdtv_xc3028,
749 if (fe0->dvb.frontend != NULL) {
750 struct dvb_frontend *fe;
751 struct xc2028_config cfg = {
752 .i2c_adap = &dev->i2c_bus[1].i2c_adap,
755 static struct xc2028_ctrl ctl = {
756 .fname = XC2028_DEFAULT_FIRMWARE,
758 .demod = XC3028_FE_ZARLINK456,
761 fe = dvb_attach(xc2028_attach, fe0->dvb.frontend,
763 if (fe != NULL && fe->ops.tuner_ops.set_config != NULL)
764 fe->ops.tuner_ops.set_config(fe, &ctl);
767 case CX23885_BOARD_TBS_6920:
768 i2c_bus = &dev->i2c_bus[0];
770 fe0->dvb.frontend = dvb_attach(cx24116_attach,
773 if (fe0->dvb.frontend != NULL)
774 fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
777 case CX23885_BOARD_TEVII_S470:
778 i2c_bus = &dev->i2c_bus[1];
780 fe0->dvb.frontend = dvb_attach(cx24116_attach,
781 &tevii_cx24116_config,
783 if (fe0->dvb.frontend != NULL)
784 fe0->dvb.frontend->ops.set_voltage = tbs_set_voltage;
787 case CX23885_BOARD_DVBWORLD_2005:
788 i2c_bus = &dev->i2c_bus[1];
790 fe0->dvb.frontend = dvb_attach(cx24116_attach,
791 &dvbworld_cx24116_config,
794 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
795 i2c_bus = &dev->i2c_bus[0];
799 fe0->dvb.frontend = dvb_attach(stv0900_attach,
800 &netup_stv0900_config,
801 &i2c_bus->i2c_adap, 0);
802 if (fe0->dvb.frontend != NULL) {
803 if (dvb_attach(stv6110_attach,
805 &netup_stv6110_tunerconfig_a,
806 &i2c_bus->i2c_adap)) {
807 if (!dvb_attach(lnbh24_attach,
813 "No LNBH24 found!\n");
820 fe0->dvb.frontend = dvb_attach(stv0900_attach,
821 &netup_stv0900_config,
822 &i2c_bus->i2c_adap, 1);
823 if (fe0->dvb.frontend != NULL) {
824 if (dvb_attach(stv6110_attach,
826 &netup_stv6110_tunerconfig_b,
827 &i2c_bus->i2c_adap)) {
828 if (!dvb_attach(lnbh24_attach,
834 "No LNBH24 found!\n");
841 case CX23885_BOARD_MYGICA_X8506:
842 i2c_bus = &dev->i2c_bus[0];
843 i2c_bus2 = &dev->i2c_bus[1];
844 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
845 &mygica_x8506_lgs8gl5_config,
847 if (fe0->dvb.frontend != NULL) {
848 dvb_attach(xc5000_attach,
851 &mygica_x8506_xc5000_config);
854 case CX23885_BOARD_MAGICPRO_PROHDTVE2:
855 i2c_bus = &dev->i2c_bus[0];
856 i2c_bus2 = &dev->i2c_bus[1];
857 fe0->dvb.frontend = dvb_attach(lgs8gxx_attach,
858 &magicpro_prohdtve2_lgs8g75_config,
860 if (fe0->dvb.frontend != NULL) {
861 dvb_attach(xc5000_attach,
864 &magicpro_prohdtve2_xc5000_config);
867 case CX23885_BOARD_HAUPPAUGE_HVR1850:
868 i2c_bus = &dev->i2c_bus[0];
869 fe0->dvb.frontend = dvb_attach(s5h1411_attach,
872 if (fe0->dvb.frontend != NULL)
873 dvb_attach(tda18271_attach, fe0->dvb.frontend,
874 0x60, &dev->i2c_bus[0].i2c_adap,
875 &hauppauge_tda18271_config);
879 printk(KERN_INFO "%s: The frontend of your DVB/ATSC card "
880 " isn't supported yet\n",
884 if (NULL == fe0->dvb.frontend) {
885 printk(KERN_ERR "%s: frontend initialization failed\n",
889 /* define general-purpose callback pointer */
890 fe0->dvb.frontend->callback = cx23885_tuner_callback;
892 /* Put the analog decoder in standby to keep it quiet */
893 call_all(dev, tuner, s_standby);
895 if (fe0->dvb.frontend->ops.analog_ops.standby)
896 fe0->dvb.frontend->ops.analog_ops.standby(fe0->dvb.frontend);
898 /* register everything */
899 ret = videobuf_dvb_register_bus(&port->frontends, THIS_MODULE, port,
900 &dev->pci->dev, adapter_nr, 0);
903 switch (dev->board) {
904 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI: {
905 static struct netup_card_info cinfo;
907 netup_get_card_info(&dev->i2c_bus[0].i2c_adap, &cinfo);
908 memcpy(port->frontends.adapter.proposed_mac,
909 cinfo.port[port->nr - 1].mac, 6);
910 printk(KERN_INFO "NetUP Dual DVB-S2 CI card port%d MAC="
911 "%02X:%02X:%02X:%02X:%02X:%02X\n",
913 port->frontends.adapter.proposed_mac[0],
914 port->frontends.adapter.proposed_mac[1],
915 port->frontends.adapter.proposed_mac[2],
916 port->frontends.adapter.proposed_mac[3],
917 port->frontends.adapter.proposed_mac[4],
918 port->frontends.adapter.proposed_mac[5]);
928 int cx23885_dvb_register(struct cx23885_tsport *port)
931 struct videobuf_dvb_frontend *fe0;
932 struct cx23885_dev *dev = port->dev;
935 /* Here we need to allocate the correct number of frontends,
936 * as reflected in the cards struct. The reality is that currrently
937 * no cx23885 boards support this - yet. But, if we don't modify this
938 * code then the second frontend would never be allocated (later)
939 * and fail with error before the attach in dvb_register().
940 * Without these changes we risk an OOPS later. The changes here
941 * are for safety, and should provide a good foundation for the
942 * future addition of any multi-frontend cx23885 based boards.
944 printk(KERN_INFO "%s() allocating %d frontend(s)\n", __func__,
945 port->num_frontends);
947 for (i = 1; i <= port->num_frontends; i++) {
948 if (videobuf_dvb_alloc_frontend(
949 &port->frontends, i) == NULL) {
950 printk(KERN_ERR "%s() failed to alloc\n", __func__);
954 fe0 = videobuf_dvb_get_frontend(&port->frontends, i);
958 dprintk(1, "%s\n", __func__);
959 dprintk(1, " ->probed by Card=%d Name=%s, PCI %02x:%02x\n",
968 /* We have to init the queue for each frontend on a port. */
969 printk(KERN_INFO "%s: cx23885 based dvb card\n", dev->name);
970 videobuf_queue_sg_init(&fe0->dvb.dvbq, &dvb_qops,
971 &dev->pci->dev, &port->slock,
972 V4L2_BUF_TYPE_VIDEO_CAPTURE, V4L2_FIELD_TOP,
973 sizeof(struct cx23885_buffer), port);
975 err = dvb_register(port);
977 printk(KERN_ERR "%s() dvb_register failed err = %d\n",
983 int cx23885_dvb_unregister(struct cx23885_tsport *port)
985 struct videobuf_dvb_frontend *fe0;
987 /* FIXME: in an error condition where the we have
988 * an expected number of frontends (attach problem)
989 * then this might not clean up correctly, if 1
991 * This comment only applies to future boards IF they
992 * implement MFE support.
994 fe0 = videobuf_dvb_get_frontend(&port->frontends, 1);
995 if (fe0->dvb.frontend)
996 videobuf_dvb_unregister_bus(&port->frontends);
998 switch (port->dev->board) {
999 case CX23885_BOARD_NETUP_DUAL_DVBS2_CI:
1000 netup_ci_exit(port);