drivers/media/video/cx25840/cx25840-core.c

   1 /* cx25840 - Conexant CX25840 audio/video decoder driver
   2  *
   3  * Copyright (C) 2004 Ulf Eklund
   4  *
   5  * Based on the saa7115 driver and on the first verison of Chris Kennedy's
   6  * cx25840 driver.
   7  *
   8  * Changes by Tyler Trafford <tatrafford@comcast.net>
   9  *    - cleanup/rewrite for V4L2 API (2005)
  10  *
  11  * VBI support by Hans Verkuil <hverkuil@xs4all.nl>.
  12  *
  13  * NTSC sliced VBI support by Christopher Neufeld <television@cneufeld.ca>
  14  * with additional fixes by Hans Verkuil <hverkuil@xs4all.nl>.
  15  *
  16  * CX23885 support by Steven Toth <stoth@linuxtv.org>.
  17  *
  18  * CX2388[578] IRQ handling, IO Pin mux configuration and other small fixes are
  19  * Copyright (C) 2010 Andy Walls <awalls@md.metrocast.net>
  20  *
  21  * This program is free software; you can redistribute it and/or
  22  * modify it under the terms of the GNU General Public License
  23  * as published by the Free Software Foundation; either version 2
  24  * of the License, or (at your option) any later version.
  25  *
  26  * This program is distributed in the hope that it will be useful,
  27  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  28  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  29  * GNU General Public License for more details.
  30  *
  31  * You should have received a copy of the GNU General Public License
  32  * along with this program; if not, write to the Free Software
  33  * Foundation, Inc., 51 Franklin Street, Fifth Floor, Boston, MA  02110-1301, USA.
  34  */
  35
  36
  37 #include <linux/kernel.h>
  38 #include <linux/module.h>
  39 #include <linux/slab.h>
  40 #include <linux/videodev2.h>
  41 #include <linux/i2c.h>
  42 #include <linux/delay.h>
  43 #include <media/v4l2-common.h>
  44 #include <media/v4l2-chip-ident.h>
  45 #include <media/v4l2-i2c-drv.h>
  46 #include <media/cx25840.h>
  47
  48 #include "cx25840-core.h"
  49
  50 MODULE_DESCRIPTION("Conexant CX25840 audio/video decoder driver");
  51 MODULE_AUTHOR("Ulf Eklund, Chris Kennedy, Hans Verkuil, Tyler Trafford");
  52 MODULE_LICENSE("GPL");
  53
  54 #define CX25840_VID_INT_STAT_REG 0x410
  55 #define CX25840_VID_INT_STAT_BITS 0x0000ffff
  56 #define CX25840_VID_INT_MASK_BITS 0xffff0000
  57 #define CX25840_VID_INT_MASK_SHFT 16
  58 #define CX25840_VID_INT_MASK_REG 0x412
  59
  60 #define CX23885_AUD_MC_INT_MASK_REG 0x80c
  61 #define CX23885_AUD_MC_INT_STAT_BITS 0xffff0000
  62 #define CX23885_AUD_MC_INT_CTRL_BITS 0x0000ffff
  63 #define CX23885_AUD_MC_INT_STAT_SHFT 16
  64
  65 #define CX25840_AUD_INT_CTRL_REG 0x812
  66 #define CX25840_AUD_INT_STAT_REG 0x813
  67
  68 #define CX23885_PIN_CTRL_IRQ_REG 0x123
  69 #define CX23885_PIN_CTRL_IRQ_IR_STAT  0x40
  70 #define CX23885_PIN_CTRL_IRQ_AUD_STAT 0x20
  71 #define CX23885_PIN_CTRL_IRQ_VID_STAT 0x10
  72
  73 #define CX25840_IR_STATS_REG    0x210
  74 #define CX25840_IR_IRQEN_REG    0x214
  75
  76 static int cx25840_debug;
  77
  78 module_param_named(debug,cx25840_debug, int, 0644);
  79
  80 MODULE_PARM_DESC(debug, "Debugging messages [0=Off (default) 1=On]");
  81
  82
  83 /* ----------------------------------------------------------------------- */
  84
  85 int cx25840_write(struct i2c_client *client, u16 addr, u8 value)
  86 {
  87         u8 buffer[3];
  88         buffer[0] = addr >> 8;
  89         buffer[1] = addr & 0xff;
  90         buffer[2] = value;
  91         return i2c_master_send(client, buffer, 3);
  92 }
  93
  94 int cx25840_write4(struct i2c_client *client, u16 addr, u32 value)
  95 {
  96         u8 buffer[6];
  97         buffer[0] = addr >> 8;
  98         buffer[1] = addr & 0xff;
  99         buffer[2] = value & 0xff;
 100         buffer[3] = (value >> 8) & 0xff;
 101         buffer[4] = (value >> 16) & 0xff;
 102         buffer[5] = value >> 24;
 103         return i2c_master_send(client, buffer, 6);
 104 }
 105
 106 u8 cx25840_read(struct i2c_client * client, u16 addr)
 107 {
 108         struct i2c_msg msgs[2];
 109         u8 tx_buf[2], rx_buf[1];
 110
 111         /* Write register address */
 112         tx_buf[0] = addr >> 8;
 113         tx_buf[1] = addr & 0xff;
 114         msgs[0].addr = client->addr;
 115         msgs[0].flags = 0;
 116         msgs[0].len = 2;
 117         msgs[0].buf = (char *) tx_buf;
 118
 119         /* Read data from register */
 120         msgs[1].addr = client->addr;
 121         msgs[1].flags = I2C_M_RD;
 122         msgs[1].len = 1;
 123         msgs[1].buf = (char *) rx_buf;
 124
 125         if (i2c_transfer(client->adapter, msgs, 2) < 2)
 126                 return 0;
 127
 128         return rx_buf[0];
 129 }
 130
 131 u32 cx25840_read4(struct i2c_client * client, u16 addr)
 132 {
 133         struct i2c_msg msgs[2];
 134         u8 tx_buf[2], rx_buf[4];
 135
 136         /* Write register address */
 137         tx_buf[0] = addr >> 8;
 138         tx_buf[1] = addr & 0xff;
 139         msgs[0].addr = client->addr;
 140         msgs[0].flags = 0;
 141         msgs[0].len = 2;
 142         msgs[0].buf = (char *) tx_buf;
 143
 144         /* Read data from registers */
 145         msgs[1].addr = client->addr;
 146         msgs[1].flags = I2C_M_RD;
 147         msgs[1].len = 4;
 148         msgs[1].buf = (char *) rx_buf;
 149
 150         if (i2c_transfer(client->adapter, msgs, 2) < 2)
 151                 return 0;
 152
 153         return (rx_buf[3] << 24) | (rx_buf[2] << 16) | (rx_buf[1] << 8) |
 154                 rx_buf[0];
 155 }
 156
 157 int cx25840_and_or(struct i2c_client *client, u16 addr, unsigned and_mask,
 158                    u8 or_value)
 159 {
 160         return cx25840_write(client, addr,
 161                              (cx25840_read(client, addr) & and_mask) |
 162                              or_value);
 163 }
 164
 165 int cx25840_and_or4(struct i2c_client *client, u16 addr, u32 and_mask,
 166                     u32 or_value)
 167 {
 168         return cx25840_write4(client, addr,
 169                               (cx25840_read4(client, addr) & and_mask) |
 170                               or_value);
 171 }
 172
 173 /* ----------------------------------------------------------------------- */
 174
 175 static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
 176                                                 enum cx25840_audio_input aud_input);
 177
 178 /* ----------------------------------------------------------------------- */
 179
 180 static int cx23885_s_io_pin_config(struct v4l2_subdev *sd, size_t n,
 181                                       struct v4l2_subdev_io_pin_config *p)
 182 {
 183         struct i2c_client *client = v4l2_get_subdevdata(sd);
 184         int i;
 185         u32 pin_ctrl;
 186         u8 gpio_oe, gpio_data, strength;
 187
 188         pin_ctrl = cx25840_read4(client, 0x120);
 189         gpio_oe = cx25840_read(client, 0x160);
 190         gpio_data = cx25840_read(client, 0x164);
 191
 192         for (i = 0; i < n; i++) {
 193                 strength = p[i].strength;
 194                 if (strength > CX25840_PIN_DRIVE_FAST)
 195                         strength = CX25840_PIN_DRIVE_FAST;
 196
 197                 switch (p[i].pin) {
 198                 case CX23885_PIN_IRQ_N_GPIO16:
 199                         if (p[i].function != CX23885_PAD_IRQ_N) {
 200                                 /* GPIO16 */
 201                                 pin_ctrl &= ~(0x1 << 25);
 202                         } else {
 203                                 /* IRQ_N */
 204                                 if (p[i].flags &
 205                                         (V4L2_SUBDEV_IO_PIN_DISABLE |
 206                                          V4L2_SUBDEV_IO_PIN_INPUT)) {
 207                                         pin_ctrl &= ~(0x1 << 25);
 208                                 } else {
 209                                         pin_ctrl |= (0x1 << 25);
 210                                 }
 211                                 if (p[i].flags &
 212                                         V4L2_SUBDEV_IO_PIN_ACTIVE_LOW) {
 213                                         pin_ctrl &= ~(0x1 << 24);
 214                                 } else {
 215                                         pin_ctrl |= (0x1 << 24);
 216                                 }
 217                         }
 218                         break;
 219                 case CX23885_PIN_IR_RX_GPIO19:
 220                         if (p[i].function != CX23885_PAD_GPIO19) {
 221                                 /* IR_RX */
 222                                 gpio_oe |= (0x1 << 0);
 223                                 pin_ctrl &= ~(0x3 << 18);
 224                                 pin_ctrl |= (strength << 18);
 225                         } else {
 226                                 /* GPIO19 */
 227                                 gpio_oe &= ~(0x1 << 0);
 228                                 if (p[i].flags & V4L2_SUBDEV_IO_PIN_SET_VALUE) {
 229                                         gpio_data &= ~(0x1 << 0);
 230                                         gpio_data |= ((p[i].value & 0x1) << 0);
 231                                 }
 232                                 pin_ctrl &= ~(0x3 << 12);
 233                                 pin_ctrl |= (strength << 12);
 234                         }
 235                         break;
 236                 case CX23885_PIN_IR_TX_GPIO20:
 237                         if (p[i].function != CX23885_PAD_GPIO20) {
 238                                 /* IR_TX */
 239                                 gpio_oe |= (0x1 << 1);
 240                                 if (p[i].flags & V4L2_SUBDEV_IO_PIN_DISABLE)
 241                                         pin_ctrl &= ~(0x1 << 10);
 242                                 else
 243                                         pin_ctrl |= (0x1 << 10);
 244                                 pin_ctrl &= ~(0x3 << 18);
 245                                 pin_ctrl |= (strength << 18);
 246                         } else {
 247                                 /* GPIO20 */
 248                                 gpio_oe &= ~(0x1 << 1);
 249                                 if (p[i].flags & V4L2_SUBDEV_IO_PIN_SET_VALUE) {
 250                                         gpio_data &= ~(0x1 << 1);
 251                                         gpio_data |= ((p[i].value & 0x1) << 1);
 252                                 }
 253                                 pin_ctrl &= ~(0x3 << 12);
 254                                 pin_ctrl |= (strength << 12);
 255                         }
 256                         break;
 257                 case CX23885_PIN_I2S_SDAT_GPIO21:
 258                         if (p[i].function != CX23885_PAD_GPIO21) {
 259                                 /* I2S_SDAT */
 260                                 /* TODO: Input or Output config */
 261                                 gpio_oe |= (0x1 << 2);
 262                                 pin_ctrl &= ~(0x3 << 22);
 263                                 pin_ctrl |= (strength << 22);
 264                         } else {
 265                                 /* GPIO21 */
 266                                 gpio_oe &= ~(0x1 << 2);
 267                                 if (p[i].flags & V4L2_SUBDEV_IO_PIN_SET_VALUE) {
 268                                         gpio_data &= ~(0x1 << 2);
 269                                         gpio_data |= ((p[i].value & 0x1) << 2);
 270                                 }
 271                                 pin_ctrl &= ~(0x3 << 12);
 272                                 pin_ctrl |= (strength << 12);
 273                         }
 274                         break;
 275                 case CX23885_PIN_I2S_WCLK_GPIO22:
 276                         if (p[i].function != CX23885_PAD_GPIO22) {
 277                                 /* I2S_WCLK */
 278                                 /* TODO: Input or Output config */
 279                                 gpio_oe |= (0x1 << 3);
 280                                 pin_ctrl &= ~(0x3 << 22);
 281                                 pin_ctrl |= (strength << 22);
 282                         } else {
 283                                 /* GPIO22 */
 284                                 gpio_oe &= ~(0x1 << 3);
 285                                 if (p[i].flags & V4L2_SUBDEV_IO_PIN_SET_VALUE) {
 286                                         gpio_data &= ~(0x1 << 3);
 287                                         gpio_data |= ((p[i].value & 0x1) << 3);
 288                                 }
 289                                 pin_ctrl &= ~(0x3 << 12);
 290                                 pin_ctrl |= (strength << 12);
 291                         }
 292                         break;
 293                 case CX23885_PIN_I2S_BCLK_GPIO23:
 294                         if (p[i].function != CX23885_PAD_GPIO23) {
 295                                 /* I2S_BCLK */
 296                                 /* TODO: Input or Output config */
 297                                 gpio_oe |= (0x1 << 4);
 298                                 pin_ctrl &= ~(0x3 << 22);
 299                                 pin_ctrl |= (strength << 22);
 300                         } else {
 301                                 /* GPIO23 */
 302                                 gpio_oe &= ~(0x1 << 4);
 303                                 if (p[i].flags & V4L2_SUBDEV_IO_PIN_SET_VALUE) {
 304                                         gpio_data &= ~(0x1 << 4);
 305                                         gpio_data |= ((p[i].value & 0x1) << 4);
 306                                 }
 307                                 pin_ctrl &= ~(0x3 << 12);
 308                                 pin_ctrl |= (strength << 12);
 309                         }
 310                         break;
 311                 }
 312         }
 313
 314         cx25840_write(client, 0x164, gpio_data);
 315         cx25840_write(client, 0x160, gpio_oe);
 316         cx25840_write4(client, 0x120, pin_ctrl);
 317         return 0;
 318 }
 319
 320 static int common_s_io_pin_config(struct v4l2_subdev *sd, size_t n,
 321                                       struct v4l2_subdev_io_pin_config *pincfg)
 322 {
 323         struct cx25840_state *state = to_state(sd);
 324
 325         if (is_cx2388x(state))
 326                 return cx23885_s_io_pin_config(sd, n, pincfg);
 327         return 0;
 328 }
 329
 330 /* ----------------------------------------------------------------------- */
 331
 332 static void init_dll1(struct i2c_client *client)
 333 {
 334         /* This is the Hauppauge sequence used to
 335          * initialize the Delay Lock Loop 1 (ADC DLL). */
 336         cx25840_write(client, 0x159, 0x23);
 337         cx25840_write(client, 0x15a, 0x87);
 338         cx25840_write(client, 0x15b, 0x06);
 339         udelay(10);
 340         cx25840_write(client, 0x159, 0xe1);
 341         udelay(10);
 342         cx25840_write(client, 0x15a, 0x86);
 343         cx25840_write(client, 0x159, 0xe0);
 344         cx25840_write(client, 0x159, 0xe1);
 345         cx25840_write(client, 0x15b, 0x10);
 346 }
 347
 348 static void init_dll2(struct i2c_client *client)
 349 {
 350         /* This is the Hauppauge sequence used to
 351          * initialize the Delay Lock Loop 2 (ADC DLL). */
 352         cx25840_write(client, 0x15d, 0xe3);
 353         cx25840_write(client, 0x15e, 0x86);
 354         cx25840_write(client, 0x15f, 0x06);
 355         udelay(10);
 356         cx25840_write(client, 0x15d, 0xe1);
 357         cx25840_write(client, 0x15d, 0xe0);
 358         cx25840_write(client, 0x15d, 0xe1);
 359 }
 360
 361 static void cx25836_initialize(struct i2c_client *client)
 362 {
 363         /* reset configuration is described on page 3-77 of the CX25836 datasheet */
 364         /* 2. */
 365         cx25840_and_or(client, 0x000, ~0x01, 0x01);
 366         cx25840_and_or(client, 0x000, ~0x01, 0x00);
 367         /* 3a. */
 368         cx25840_and_or(client, 0x15a, ~0x70, 0x00);
 369         /* 3b. */
 370         cx25840_and_or(client, 0x15b, ~0x1e, 0x06);
 371         /* 3c. */
 372         cx25840_and_or(client, 0x159, ~0x02, 0x02);
 373         /* 3d. */
 374         udelay(10);
 375         /* 3e. */
 376         cx25840_and_or(client, 0x159, ~0x02, 0x00);
 377         /* 3f. */
 378         cx25840_and_or(client, 0x159, ~0xc0, 0xc0);
 379         /* 3g. */
 380         cx25840_and_or(client, 0x159, ~0x01, 0x00);
 381         cx25840_and_or(client, 0x159, ~0x01, 0x01);
 382         /* 3h. */
 383         cx25840_and_or(client, 0x15b, ~0x1e, 0x10);
 384 }
 385
 386 static void cx25840_work_handler(struct work_struct *work)
 387 {
 388         struct cx25840_state *state = container_of(work, struct cx25840_state, fw_work);
 389         cx25840_loadfw(state->c);
 390         wake_up(&state->fw_wait);
 391 }
 392
 393 static void cx25840_initialize(struct i2c_client *client)
 394 {
 395         DEFINE_WAIT(wait);
 396         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 397         struct workqueue_struct *q;
 398
 399         /* datasheet startup in numbered steps, refer to page 3-77 */
 400         /* 2. */
 401         cx25840_and_or(client, 0x803, ~0x10, 0x00);
 402         /* The default of this register should be 4, but I get 0 instead.
 403          * Set this register to 4 manually. */
 404         cx25840_write(client, 0x000, 0x04);
 405         /* 3. */
 406         init_dll1(client);
 407         init_dll2(client);
 408         cx25840_write(client, 0x136, 0x0a);
 409         /* 4. */
 410         cx25840_write(client, 0x13c, 0x01);
 411         cx25840_write(client, 0x13c, 0x00);
 412         /* 5. */
 413         /* Do the firmware load in a work handler to prevent.
 414            Otherwise the kernel is blocked waiting for the
 415            bit-banging i2c interface to finish uploading the
 416            firmware. */
 417         INIT_WORK(&state->fw_work, cx25840_work_handler);
 418         init_waitqueue_head(&state->fw_wait);
 419         q = create_singlethread_workqueue("cx25840_fw");
 420         prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
 421         queue_work(q, &state->fw_work);
 422         schedule();
 423         finish_wait(&state->fw_wait, &wait);
 424         destroy_workqueue(q);
 425
 426         /* 6. */
 427         cx25840_write(client, 0x115, 0x8c);
 428         cx25840_write(client, 0x116, 0x07);
 429         cx25840_write(client, 0x118, 0x02);
 430         /* 7. */
 431         cx25840_write(client, 0x4a5, 0x80);
 432         cx25840_write(client, 0x4a5, 0x00);
 433         cx25840_write(client, 0x402, 0x00);
 434         /* 8. */
 435         cx25840_and_or(client, 0x401, ~0x18, 0);
 436         cx25840_and_or(client, 0x4a2, ~0x10, 0x10);
 437         /* steps 8c and 8d are done in change_input() */
 438         /* 10. */
 439         cx25840_write(client, 0x8d3, 0x1f);
 440         cx25840_write(client, 0x8e3, 0x03);
 441
 442         cx25840_std_setup(client);
 443
 444         /* trial and error says these are needed to get audio */
 445         cx25840_write(client, 0x914, 0xa0);
 446         cx25840_write(client, 0x918, 0xa0);
 447         cx25840_write(client, 0x919, 0x01);
 448
 449         /* stereo prefered */
 450         cx25840_write(client, 0x809, 0x04);
 451         /* AC97 shift */
 452         cx25840_write(client, 0x8cf, 0x0f);
 453
 454         /* (re)set input */
 455         set_input(client, state->vid_input, state->aud_input);
 456
 457         /* start microcontroller */
 458         cx25840_and_or(client, 0x803, ~0x10, 0x10);
 459 }
 460
 461 static void cx23885_initialize(struct i2c_client *client)
 462 {
 463         DEFINE_WAIT(wait);
 464         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 465         struct workqueue_struct *q;
 466
 467         /*
 468          * Come out of digital power down
 469          * The CX23888, at least, needs this, otherwise registers aside from
 470          * 0x0-0x2 can't be read or written.
 471          */
 472         cx25840_write(client, 0x000, 0);
 473
 474         /* Internal Reset */
 475         cx25840_and_or(client, 0x102, ~0x01, 0x01);
 476         cx25840_and_or(client, 0x102, ~0x01, 0x00);
 477
 478         /* Stop microcontroller */
 479         cx25840_and_or(client, 0x803, ~0x10, 0x00);
 480
 481         /* DIF in reset? */
 482         cx25840_write(client, 0x398, 0);
 483
 484         /*
 485          * Trust the default xtal, no division
 486          * '885: 28.636363... MHz
 487          * '887: 25.000000 MHz
 488          * '888: 50.000000 MHz
 489          */
 490         cx25840_write(client, 0x2, 0x76);
 491
 492         /* Power up all the PLL's and DLL */
 493         cx25840_write(client, 0x1, 0x40);
 494
 495         /* Sys PLL */
 496         switch (state->id) {
 497         case V4L2_IDENT_CX23888_AV:
 498                 /*
 499                  * 50.0 MHz * (0xb + 0xe8ba26/0x2000000)/4 = 5 * 28.636363 MHz
 500                  * 572.73 MHz before post divide
 501                  */
 502                 cx25840_write4(client, 0x11c, 0x00e8ba26);
 503                 cx25840_write4(client, 0x118, 0x0000040b);
 504                 break;
 505         case V4L2_IDENT_CX23887_AV:
 506                 /*
 507                  * 25.0 MHz * (0x16 + 0x1d1744c/0x2000000)/4 = 5 * 28.636363 MHz
 508                  * 572.73 MHz before post divide
 509                  */
 510                 cx25840_write4(client, 0x11c, 0x01d1744c);
 511                 cx25840_write4(client, 0x118, 0x00000416);
 512                 break;
 513         case V4L2_IDENT_CX23885_AV:
 514         default:
 515                 /*
 516                  * 28.636363 MHz * (0x14 + 0x0/0x2000000)/4 = 5 * 28.636363 MHz
 517                  * 572.73 MHz before post divide
 518                  */
 519                 cx25840_write4(client, 0x11c, 0x00000000);
 520                 cx25840_write4(client, 0x118, 0x00000414);
 521                 break;
 522         }
 523
 524         /* Disable DIF bypass */
 525         cx25840_write4(client, 0x33c, 0x00000001);
 526
 527         /* DIF Src phase inc */
 528         cx25840_write4(client, 0x340, 0x0df7df83);
 529
 530         /*
 531          * Vid PLL
 532          * Setup for a BT.656 pixel clock of 13.5 Mpixels/second
 533          *
 534          * 28.636363 MHz * (0xf + 0x02be2c9/0x2000000)/4 = 8 * 13.5 MHz
 535          * 432.0 MHz before post divide
 536          */
 537         cx25840_write4(client, 0x10c, 0x002be2c9);
 538         cx25840_write4(client, 0x108, 0x0000040f);
 539
 540         /* Luma */
 541         cx25840_write4(client, 0x414, 0x00107d12);
 542
 543         /* Chroma */
 544         cx25840_write4(client, 0x420, 0x3d008282);
 545
 546         /*
 547          * Aux PLL
 548          * Initial setup for audio sample clock:
 549          * 48 ksps, 16 bits/sample, x160 multiplier = 122.88 MHz
 550          * Intial I2S output/master clock(?):
 551          * 48 ksps, 16 bits/sample, x16 multiplier = 12.288 MHz
 552          */
 553         switch (state->id) {
 554         case V4L2_IDENT_CX23888_AV:
 555                 /*
 556                  * 50.0 MHz * (0x7 + 0x0bedfa4/0x2000000)/3 = 122.88 MHz
 557                  * 368.64 MHz before post divide
 558                  * 122.88 MHz / 0xa = 12.288 MHz
 559                  */
 560                 cx25840_write4(client, 0x114, 0x00bedfa4);
 561                 cx25840_write4(client, 0x110, 0x000a0307);
 562                 break;
 563         case V4L2_IDENT_CX23887_AV:
 564                 /*
 565                  * 25.0 MHz * (0xe + 0x17dbf48/0x2000000)/3 = 122.88 MHz
 566                  * 368.64 MHz before post divide
 567                  * 122.88 MHz / 0xa = 12.288 MHz
 568                  */
 569                 cx25840_write4(client, 0x114, 0x017dbf48);
 570                 cx25840_write4(client, 0x110, 0x000a030e);
 571                 break;
 572         case V4L2_IDENT_CX23885_AV:
 573         default:
 574                 /*
 575                  * 28.636363 MHz * (0xc + 0x1bf0c9e/0x2000000)/3 = 122.88 MHz
 576                  * 368.64 MHz before post divide
 577                  * 122.88 MHz / 0xa = 12.288 MHz
 578                  */
 579                 cx25840_write4(client, 0x114, 0x01bf0c9e);
 580                 cx25840_write4(client, 0x110, 0x000a030c);
 581                 break;
 582         };
 583
 584         /* ADC2 input select */
 585         cx25840_write(client, 0x102, 0x10);
 586
 587         /* VIN1 & VIN5 */
 588         cx25840_write(client, 0x103, 0x11);
 589
 590         /* Enable format auto detect */
 591         cx25840_write(client, 0x400, 0);
 592         /* Fast subchroma lock */
 593         /* White crush, Chroma AGC & Chroma Killer enabled */
 594         cx25840_write(client, 0x401, 0xe8);
 595
 596         /* Select AFE clock pad output source */
 597         cx25840_write(client, 0x144, 0x05);
 598
 599         /* Drive GPIO2 direction and values for HVR1700
 600          * where an onboard mux selects the output of demodulator
 601          * vs the 417. Failure to set this results in no DTV.
 602          * It's safe to set this across all Hauppauge boards
 603          * currently, regardless of the board type.
 604          */
 605         cx25840_write(client, 0x160, 0x1d);
 606         cx25840_write(client, 0x164, 0x00);
 607
 608         /* Do the firmware load in a work handler to prevent.
 609            Otherwise the kernel is blocked waiting for the
 610            bit-banging i2c interface to finish uploading the
 611            firmware. */
 612         INIT_WORK(&state->fw_work, cx25840_work_handler);
 613         init_waitqueue_head(&state->fw_wait);
 614         q = create_singlethread_workqueue("cx25840_fw");
 615         prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
 616         queue_work(q, &state->fw_work);
 617         schedule();
 618         finish_wait(&state->fw_wait, &wait);
 619         destroy_workqueue(q);
 620
 621         cx25840_std_setup(client);
 622
 623         /* (re)set input */
 624         set_input(client, state->vid_input, state->aud_input);
 625
 626         /* start microcontroller */
 627         cx25840_and_or(client, 0x803, ~0x10, 0x10);
 628
 629         /* Disable and clear video interrupts - we don't use them */
 630         cx25840_write4(client, CX25840_VID_INT_STAT_REG, 0xffffffff);
 631
 632         /* Disable and clear audio interrupts - we don't use them */
 633         cx25840_write(client, CX25840_AUD_INT_CTRL_REG, 0xff);
 634         cx25840_write(client, CX25840_AUD_INT_STAT_REG, 0xff);
 635 }
 636
 637 /* ----------------------------------------------------------------------- */
 638
 639 static void cx231xx_initialize(struct i2c_client *client)
 640 {
 641         DEFINE_WAIT(wait);
 642         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 643         struct workqueue_struct *q;
 644
 645         /* Internal Reset */
 646         cx25840_and_or(client, 0x102, ~0x01, 0x01);
 647         cx25840_and_or(client, 0x102, ~0x01, 0x00);
 648
 649         /* Stop microcontroller */
 650         cx25840_and_or(client, 0x803, ~0x10, 0x00);
 651
 652         /* DIF in reset? */
 653         cx25840_write(client, 0x398, 0);
 654
 655         /* Trust the default xtal, no division */
 656         /* This changes for the cx23888 products */
 657         cx25840_write(client, 0x2, 0x76);
 658
 659         /* Bring down the regulator for AUX clk */
 660         cx25840_write(client, 0x1, 0x40);
 661
 662         /* Disable DIF bypass */
 663         cx25840_write4(client, 0x33c, 0x00000001);
 664
 665         /* DIF Src phase inc */
 666         cx25840_write4(client, 0x340, 0x0df7df83);
 667
 668         /* Luma */
 669         cx25840_write4(client, 0x414, 0x00107d12);
 670
 671         /* Chroma */
 672         cx25840_write4(client, 0x420, 0x3d008282);
 673
 674         /* ADC2 input select */
 675         cx25840_write(client, 0x102, 0x10);
 676
 677         /* VIN1 & VIN5 */
 678         cx25840_write(client, 0x103, 0x11);
 679
 680         /* Enable format auto detect */
 681         cx25840_write(client, 0x400, 0);
 682         /* Fast subchroma lock */
 683         /* White crush, Chroma AGC & Chroma Killer enabled */
 684         cx25840_write(client, 0x401, 0xe8);
 685
 686         /* Do the firmware load in a work handler to prevent.
 687            Otherwise the kernel is blocked waiting for the
 688            bit-banging i2c interface to finish uploading the
 689            firmware. */
 690         INIT_WORK(&state->fw_work, cx25840_work_handler);
 691         init_waitqueue_head(&state->fw_wait);
 692         q = create_singlethread_workqueue("cx25840_fw");
 693         prepare_to_wait(&state->fw_wait, &wait, TASK_UNINTERRUPTIBLE);
 694         queue_work(q, &state->fw_work);
 695         schedule();
 696         finish_wait(&state->fw_wait, &wait);
 697         destroy_workqueue(q);
 698
 699         cx25840_std_setup(client);
 700
 701         /* (re)set input */
 702         set_input(client, state->vid_input, state->aud_input);
 703
 704         /* start microcontroller */
 705         cx25840_and_or(client, 0x803, ~0x10, 0x10);
 706 }
 707
 708 /* ----------------------------------------------------------------------- */
 709
 710 void cx25840_std_setup(struct i2c_client *client)
 711 {
 712         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 713         v4l2_std_id std = state->std;
 714         int hblank, hactive, burst, vblank, vactive, sc;
 715         int vblank656, src_decimation;
 716         int luma_lpf, uv_lpf, comb;
 717         u32 pll_int, pll_frac, pll_post;
 718
 719         /* datasheet startup, step 8d */
 720         if (std & ~V4L2_STD_NTSC)
 721                 cx25840_write(client, 0x49f, 0x11);
 722         else
 723                 cx25840_write(client, 0x49f, 0x14);
 724
 725         if (std & V4L2_STD_625_50) {
 726                 hblank = 132;
 727                 hactive = 720;
 728                 burst = 93;
 729                 vblank = 36;
 730                 vactive = 580;
 731                 vblank656 = 40;
 732                 src_decimation = 0x21f;
 733                 luma_lpf = 2;
 734
 735                 if (std & V4L2_STD_SECAM) {
 736                         uv_lpf = 0;
 737                         comb = 0;
 738                         sc = 0x0a425f;
 739                 } else if (std == V4L2_STD_PAL_Nc) {
 740                         uv_lpf = 1;
 741                         comb = 0x20;
 742                         sc = 556453;
 743                 } else {
 744                         uv_lpf = 1;
 745                         comb = 0x20;
 746                         sc = 688739;
 747                 }
 748         } else {
 749                 hactive = 720;
 750                 hblank = 122;
 751                 vactive = 487;
 752                 luma_lpf = 1;
 753                 uv_lpf = 1;
 754
 755                 src_decimation = 0x21f;
 756                 if (std == V4L2_STD_PAL_60) {
 757                         vblank = 26;
 758                         vblank656 = 26;
 759                         burst = 0x5b;
 760                         luma_lpf = 2;
 761                         comb = 0x20;
 762                         sc = 688739;
 763                 } else if (std == V4L2_STD_PAL_M) {
 764                         vblank = 20;
 765                         vblank656 = 24;
 766                         burst = 0x61;
 767                         comb = 0x20;
 768                         sc = 555452;
 769                 } else {
 770                         vblank = 26;
 771                         vblank656 = 26;
 772                         burst = 0x5b;
 773                         comb = 0x66;
 774                         sc = 556063;
 775                 }
 776         }
 777
 778         /* DEBUG: Displays configured PLL frequency */
 779         if (!is_cx231xx(state)) {
 780                 pll_int = cx25840_read(client, 0x108);
 781                 pll_frac = cx25840_read4(client, 0x10c) & 0x1ffffff;
 782                 pll_post = cx25840_read(client, 0x109);
 783                 v4l_dbg(1, cx25840_debug, client,
 784                         "PLL regs = int: %u, frac: %u, post: %u\n",
 785                         pll_int, pll_frac, pll_post);
 786
 787                 if (pll_post) {
 788                         int fin, fsc;
 789                         int pll = (28636363L * ((((u64)pll_int) << 25L) + pll_frac)) >> 25L;
 790
 791                         pll /= pll_post;
 792                         v4l_dbg(1, cx25840_debug, client, "PLL = %d.%06d MHz\n",
 793                                         pll / 1000000, pll % 1000000);
 794                         v4l_dbg(1, cx25840_debug, client, "PLL/8 = %d.%06d MHz\n",
 795                                         pll / 8000000, (pll / 8) % 1000000);
 796
 797                         fin = ((u64)src_decimation * pll) >> 12;
 798                         v4l_dbg(1, cx25840_debug, client,
 799                                         "ADC Sampling freq = %d.%06d MHz\n",
 800                                         fin / 1000000, fin % 1000000);
 801
 802                         fsc = (((u64)sc) * pll) >> 24L;
 803                         v4l_dbg(1, cx25840_debug, client,
 804                                         "Chroma sub-carrier freq = %d.%06d MHz\n",
 805                                         fsc / 1000000, fsc % 1000000);
 806
 807                         v4l_dbg(1, cx25840_debug, client, "hblank %i, hactive %i, "
 808                                 "vblank %i, vactive %i, vblank656 %i, src_dec %i, "
 809                                 "burst 0x%02x, luma_lpf %i, uv_lpf %i, comb 0x%02x, "
 810                                 "sc 0x%06x\n",
 811                                 hblank, hactive, vblank, vactive, vblank656,
 812                                 src_decimation, burst, luma_lpf, uv_lpf, comb, sc);
 813                 }
 814         }
 815
 816         /* Sets horizontal blanking delay and active lines */
 817         cx25840_write(client, 0x470, hblank);
 818         cx25840_write(client, 0x471,
 819                         0xff & (((hblank >> 8) & 0x3) | (hactive << 4)));
 820         cx25840_write(client, 0x472, hactive >> 4);
 821
 822         /* Sets burst gate delay */
 823         cx25840_write(client, 0x473, burst);
 824
 825         /* Sets vertical blanking delay and active duration */
 826         cx25840_write(client, 0x474, vblank);
 827         cx25840_write(client, 0x475,
 828                         0xff & (((vblank >> 8) & 0x3) | (vactive << 4)));
 829         cx25840_write(client, 0x476, vactive >> 4);
 830         cx25840_write(client, 0x477, vblank656);
 831
 832         /* Sets src decimation rate */
 833         cx25840_write(client, 0x478, 0xff & src_decimation);
 834         cx25840_write(client, 0x479, 0xff & (src_decimation >> 8));
 835
 836         /* Sets Luma and UV Low pass filters */
 837         cx25840_write(client, 0x47a, luma_lpf << 6 | ((uv_lpf << 4) & 0x30));
 838
 839         /* Enables comb filters */
 840         cx25840_write(client, 0x47b, comb);
 841
 842         /* Sets SC Step*/
 843         cx25840_write(client, 0x47c, sc);
 844         cx25840_write(client, 0x47d, 0xff & sc >> 8);
 845         cx25840_write(client, 0x47e, 0xff & sc >> 16);
 846
 847         /* Sets VBI parameters */
 848         if (std & V4L2_STD_625_50) {
 849                 cx25840_write(client, 0x47f, 0x01);
 850                 state->vbi_line_offset = 5;
 851         } else {
 852                 cx25840_write(client, 0x47f, 0x00);
 853                 state->vbi_line_offset = 8;
 854         }
 855 }
 856
 857 /* ----------------------------------------------------------------------- */
 858
 859 static void input_change(struct i2c_client *client)
 860 {
 861         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 862         v4l2_std_id std = state->std;
 863
 864         /* Follow step 8c and 8d of section 3.16 in the cx25840 datasheet */
 865         if (std & V4L2_STD_SECAM) {
 866                 cx25840_write(client, 0x402, 0);
 867         }
 868         else {
 869                 cx25840_write(client, 0x402, 0x04);
 870                 cx25840_write(client, 0x49f, (std & V4L2_STD_NTSC) ? 0x14 : 0x11);
 871         }
 872         cx25840_and_or(client, 0x401, ~0x60, 0);
 873         cx25840_and_or(client, 0x401, ~0x60, 0x60);
 874         cx25840_and_or(client, 0x810, ~0x01, 1);
 875
 876         if (state->radio) {
 877                 cx25840_write(client, 0x808, 0xf9);
 878                 cx25840_write(client, 0x80b, 0x00);
 879         }
 880         else if (std & V4L2_STD_525_60) {
 881                 /* Certain Hauppauge PVR150 models have a hardware bug
 882                    that causes audio to drop out. For these models the
 883                    audio standard must be set explicitly.
 884                    To be precise: it affects cards with tuner models
 885                    85, 99 and 112 (model numbers from tveeprom). */
 886                 int hw_fix = state->pvr150_workaround;
 887
 888                 if (std == V4L2_STD_NTSC_M_JP) {
 889                         /* Japan uses EIAJ audio standard */
 890                         cx25840_write(client, 0x808, hw_fix ? 0x2f : 0xf7);
 891                 } else if (std == V4L2_STD_NTSC_M_KR) {
 892                         /* South Korea uses A2 audio standard */
 893                         cx25840_write(client, 0x808, hw_fix ? 0x3f : 0xf8);
 894                 } else {
 895                         /* Others use the BTSC audio standard */
 896                         cx25840_write(client, 0x808, hw_fix ? 0x1f : 0xf6);
 897                 }
 898                 cx25840_write(client, 0x80b, 0x00);
 899         } else if (std & V4L2_STD_PAL) {
 900                 /* Autodetect audio standard and audio system */
 901                 cx25840_write(client, 0x808, 0xff);
 902                 /* Since system PAL-L is pretty much non-existant and
 903                    not used by any public broadcast network, force
 904                    6.5 MHz carrier to be interpreted as System DK,
 905                    this avoids DK audio detection instability */
 906                cx25840_write(client, 0x80b, 0x00);
 907         } else if (std & V4L2_STD_SECAM) {
 908                 /* Autodetect audio standard and audio system */
 909                 cx25840_write(client, 0x808, 0xff);
 910                 /* If only one of SECAM-DK / SECAM-L is required, then force
 911                   6.5MHz carrier, else autodetect it */
 912                 if ((std & V4L2_STD_SECAM_DK) &&
 913                     !(std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC))) {
 914                         /* 6.5 MHz carrier to be interpreted as System DK */
 915                         cx25840_write(client, 0x80b, 0x00);
 916                } else if (!(std & V4L2_STD_SECAM_DK) &&
 917                           (std & (V4L2_STD_SECAM_L | V4L2_STD_SECAM_LC))) {
 918                         /* 6.5 MHz carrier to be interpreted as System L */
 919                         cx25840_write(client, 0x80b, 0x08);
 920                } else {
 921                         /* 6.5 MHz carrier to be autodetected */
 922                         cx25840_write(client, 0x80b, 0x10);
 923                }
 924         }
 925
 926         cx25840_and_or(client, 0x810, ~0x01, 0);
 927 }
 928
 929 static int set_input(struct i2c_client *client, enum cx25840_video_input vid_input,
 930                                                 enum cx25840_audio_input aud_input)
 931 {
 932         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
 933         u8 is_composite = (vid_input >= CX25840_COMPOSITE1 &&
 934                            vid_input <= CX25840_COMPOSITE8);
 935         u8 is_component = (vid_input & CX25840_COMPONENT_ON) ==
 936                         CX25840_COMPONENT_ON;
 937         int luma = vid_input & 0xf0;
 938         int chroma = vid_input & 0xf00;
 939         u8 reg;
 940
 941         v4l_dbg(1, cx25840_debug, client,
 942                 "decoder set video input %d, audio input %d\n",
 943                 vid_input, aud_input);
 944
 945         if (vid_input >= CX25840_VIN1_CH1) {
 946                 v4l_dbg(1, cx25840_debug, client, "vid_input 0x%x\n",
 947                         vid_input);
 948                 reg = vid_input & 0xff;
 949                 is_composite = !is_component &&
 950                         ((vid_input & CX25840_SVIDEO_ON) != CX25840_SVIDEO_ON);
 951
 952                 v4l_dbg(1, cx25840_debug, client, "mux cfg 0x%x comp=%d\n",
 953                         reg, is_composite);
 954         } else if (is_composite) {
 955                 reg = 0xf0 + (vid_input - CX25840_COMPOSITE1);
 956         } else {
 957                 if ((vid_input & ~0xff0) ||
 958                     luma < CX25840_SVIDEO_LUMA1 || luma > CX25840_SVIDEO_LUMA8 ||
 959                     chroma < CX25840_SVIDEO_CHROMA4 || chroma > CX25840_SVIDEO_CHROMA8) {
 960                         v4l_err(client, "0x%04x is not a valid video input!\n",
 961                                 vid_input);
 962                         return -EINVAL;
 963                 }
 964                 reg = 0xf0 + ((luma - CX25840_SVIDEO_LUMA1) >> 4);
 965                 if (chroma >= CX25840_SVIDEO_CHROMA7) {
 966                         reg &= 0x3f;
 967                         reg |= (chroma - CX25840_SVIDEO_CHROMA7) >> 2;
 968                 } else {
 969                         reg &= 0xcf;
 970                         reg |= (chroma - CX25840_SVIDEO_CHROMA4) >> 4;
 971                 }
 972         }
 973
 974         /* The caller has previously prepared the correct routing
 975          * configuration in reg (for the cx23885) so we have no
 976          * need to attempt to flip bits for earlier av decoders.
 977          */
 978         if (!is_cx2388x(state) && !is_cx231xx(state)) {
 979                 switch (aud_input) {
 980                 case CX25840_AUDIO_SERIAL:
 981                         /* do nothing, use serial audio input */
 982                         break;
 983                 case CX25840_AUDIO4: reg &= ~0x30; break;
 984                 case CX25840_AUDIO5: reg &= ~0x30; reg |= 0x10; break;
 985                 case CX25840_AUDIO6: reg &= ~0x30; reg |= 0x20; break;
 986                 case CX25840_AUDIO7: reg &= ~0xc0; break;
 987                 case CX25840_AUDIO8: reg &= ~0xc0; reg |= 0x40; break;
 988
 989                 default:
 990                         v4l_err(client, "0x%04x is not a valid audio input!\n",
 991                                 aud_input);
 992                         return -EINVAL;
 993                 }
 994         }
 995
 996         cx25840_write(client, 0x103, reg);
 997
 998         /* Set INPUT_MODE to Composite, S-Video or Component */
 999         if (is_component)
1000                 cx25840_and_or(client, 0x401, ~0x6, 0x6);
1001         else
1002                 cx25840_and_or(client, 0x401, ~0x6, is_composite ? 0 : 0x02);
1003
1004         if (!is_cx2388x(state) && !is_cx231xx(state)) {
1005                 /* Set CH_SEL_ADC2 to 1 if input comes from CH3 */
1006                 cx25840_and_or(client, 0x102, ~0x2, (reg & 0x80) == 0 ? 2 : 0);
1007                 /* Set DUAL_MODE_ADC2 to 1 if input comes from both CH2&CH3 */
1008                 if ((reg & 0xc0) != 0xc0 && (reg & 0x30) != 0x30)
1009                         cx25840_and_or(client, 0x102, ~0x4, 4);
1010                 else
1011                         cx25840_and_or(client, 0x102, ~0x4, 0);
1012         } else {
1013                 /* Set DUAL_MODE_ADC2 to 1 if component*/
1014                 cx25840_and_or(client, 0x102, ~0x4, is_component ? 0x4 : 0x0);
1015                 if (is_composite) {
1016                         /* ADC2 input select channel 2 */
1017                         cx25840_and_or(client, 0x102, ~0x2, 0);
1018                 } else if (!is_component) {
1019                         /* S-Video */
1020                         if (chroma >= CX25840_SVIDEO_CHROMA7) {
1021                                 /* ADC2 input select channel 3 */
1022                                 cx25840_and_or(client, 0x102, ~0x2, 2);
1023                         } else {
1024                                 /* ADC2 input select channel 2 */
1025                                 cx25840_and_or(client, 0x102, ~0x2, 0);
1026                         }
1027                 }
1028         }
1029
1030         state->vid_input = vid_input;
1031         state->aud_input = aud_input;
1032         if (!is_cx2583x(state)) {
1033                 cx25840_audio_set_path(client);
1034                 input_change(client);
1035         }
1036
1037         if (is_cx2388x(state)) {
1038                 /* Audio channel 1 src : Parallel 1 */
1039                 cx25840_write(client, 0x124, 0x03);
1040
1041                 /* Select AFE clock pad output source */
1042                 cx25840_write(client, 0x144, 0x05);
1043
1044                 /* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
1045                 cx25840_write(client, 0x914, 0xa0);
1046
1047                 /* I2S_OUT_CTL:
1048                  * I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
1049                  * I2S_OUT_MASTER_MODE = Master
1050                  */
1051                 cx25840_write(client, 0x918, 0xa0);
1052                 cx25840_write(client, 0x919, 0x01);
1053         } else if (is_cx231xx(state)) {
1054                 /* Audio channel 1 src : Parallel 1 */
1055                 cx25840_write(client, 0x124, 0x03);
1056
1057                 /* I2S_IN_CTL: I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1 */
1058                 cx25840_write(client, 0x914, 0xa0);
1059
1060                 /* I2S_OUT_CTL:
1061                  * I2S_IN_SONY_MODE, LEFT SAMPLE on WS=1
1062                  * I2S_OUT_MASTER_MODE = Master
1063                  */
1064                 cx25840_write(client, 0x918, 0xa0);
1065                 cx25840_write(client, 0x919, 0x01);
1066         }
1067
1068         return 0;
1069 }
1070
1071 /* ----------------------------------------------------------------------- */
1072
1073 static int set_v4lstd(struct i2c_client *client)
1074 {
1075         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
1076         u8 fmt = 0;     /* zero is autodetect */
1077         u8 pal_m = 0;
1078
1079         /* First tests should be against specific std */
1080         if (state->std == V4L2_STD_NTSC_M_JP) {
1081                 fmt = 0x2;
1082         } else if (state->std == V4L2_STD_NTSC_443) {
1083                 fmt = 0x3;
1084         } else if (state->std == V4L2_STD_PAL_M) {
1085                 pal_m = 1;
1086                 fmt = 0x5;
1087         } else if (state->std == V4L2_STD_PAL_N) {
1088                 fmt = 0x6;
1089         } else if (state->std == V4L2_STD_PAL_Nc) {
1090                 fmt = 0x7;
1091         } else if (state->std == V4L2_STD_PAL_60) {
1092                 fmt = 0x8;
1093         } else {
1094                 /* Then, test against generic ones */
1095                 if (state->std & V4L2_STD_NTSC)
1096                         fmt = 0x1;
1097                 else if (state->std & V4L2_STD_PAL)
1098                         fmt = 0x4;
1099                 else if (state->std & V4L2_STD_SECAM)
1100                         fmt = 0xc;
1101         }
1102
1103         v4l_dbg(1, cx25840_debug, client, "changing video std to fmt %i\n",fmt);
1104
1105         /* Follow step 9 of section 3.16 in the cx25840 datasheet.
1106            Without this PAL may display a vertical ghosting effect.
1107            This happens for example with the Yuan MPC622. */
1108         if (fmt >= 4 && fmt < 8) {
1109                 /* Set format to NTSC-M */
1110                 cx25840_and_or(client, 0x400, ~0xf, 1);
1111                 /* Turn off LCOMB */
1112                 cx25840_and_or(client, 0x47b, ~6, 0);
1113         }
1114         cx25840_and_or(client, 0x400, ~0xf, fmt);
1115         cx25840_and_or(client, 0x403, ~0x3, pal_m);
1116         cx25840_std_setup(client);
1117         if (!is_cx2583x(state))
1118                 input_change(client);
1119         return 0;
1120 }
1121
1122 /* ----------------------------------------------------------------------- */
1123
1124 static int cx25840_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
1125 {
1126         struct cx25840_state *state = to_state(sd);
1127         struct i2c_client *client = v4l2_get_subdevdata(sd);
1128
1129         switch (ctrl->id) {
1130         case CX25840_CID_ENABLE_PVR150_WORKAROUND:
1131                 state->pvr150_workaround = ctrl->value;
1132                 set_input(client, state->vid_input, state->aud_input);
1133                 break;
1134
1135         case V4L2_CID_BRIGHTNESS:
1136                 if (ctrl->value < 0 || ctrl->value > 255) {
1137                         v4l_err(client, "invalid brightness setting %d\n",
1138                                     ctrl->value);
1139                         return -ERANGE;
1140                 }
1141
1142                 cx25840_write(client, 0x414, ctrl->value - 128);
1143                 break;
1144
1145         case V4L2_CID_CONTRAST:
1146                 if (ctrl->value < 0 || ctrl->value > 127) {
1147                         v4l_err(client, "invalid contrast setting %d\n",
1148                                     ctrl->value);
1149                         return -ERANGE;
1150                 }
1151
1152                 cx25840_write(client, 0x415, ctrl->value << 1);
1153                 break;
1154
1155         case V4L2_CID_SATURATION:
1156                 if (ctrl->value < 0 || ctrl->value > 127) {
1157                         v4l_err(client, "invalid saturation setting %d\n",
1158                                     ctrl->value);
1159                         return -ERANGE;
1160                 }
1161
1162                 cx25840_write(client, 0x420, ctrl->value << 1);
1163                 cx25840_write(client, 0x421, ctrl->value << 1);
1164                 break;
1165
1166         case V4L2_CID_HUE:
1167                 if (ctrl->value < -128 || ctrl->value > 127) {
1168                         v4l_err(client, "invalid hue setting %d\n", ctrl->value);
1169                         return -ERANGE;
1170                 }
1171
1172                 cx25840_write(client, 0x422, ctrl->value);
1173                 break;
1174
1175         case V4L2_CID_AUDIO_VOLUME:
1176         case V4L2_CID_AUDIO_BASS:
1177         case V4L2_CID_AUDIO_TREBLE:
1178         case V4L2_CID_AUDIO_BALANCE:
1179         case V4L2_CID_AUDIO_MUTE:
1180                 if (is_cx2583x(state))
1181                         return -EINVAL;
1182                 return cx25840_audio_s_ctrl(sd, ctrl);
1183
1184         default:
1185                 return -EINVAL;
1186         }
1187
1188         return 0;
1189 }
1190
1191 static int cx25840_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
1192 {
1193         struct cx25840_state *state = to_state(sd);
1194         struct i2c_client *client = v4l2_get_subdevdata(sd);
1195
1196         switch (ctrl->id) {
1197         case CX25840_CID_ENABLE_PVR150_WORKAROUND:
1198                 ctrl->value = state->pvr150_workaround;
1199                 break;
1200         case V4L2_CID_BRIGHTNESS:
1201                 ctrl->value = (s8)cx25840_read(client, 0x414) + 128;
1202                 break;
1203         case V4L2_CID_CONTRAST:
1204                 ctrl->value = cx25840_read(client, 0x415) >> 1;
1205                 break;
1206         case V4L2_CID_SATURATION:
1207                 ctrl->value = cx25840_read(client, 0x420) >> 1;
1208                 break;
1209         case V4L2_CID_HUE:
1210                 ctrl->value = (s8)cx25840_read(client, 0x422);
1211                 break;
1212         case V4L2_CID_AUDIO_VOLUME:
1213         case V4L2_CID_AUDIO_BASS:
1214         case V4L2_CID_AUDIO_TREBLE:
1215         case V4L2_CID_AUDIO_BALANCE:
1216         case V4L2_CID_AUDIO_MUTE:
1217                 if (is_cx2583x(state))
1218                         return -EINVAL;
1219                 return cx25840_audio_g_ctrl(sd, ctrl);
1220         default:
1221                 return -EINVAL;
1222         }
1223
1224         return 0;
1225 }
1226
1227 /* ----------------------------------------------------------------------- */
1228
1229 static int cx25840_s_mbus_fmt(struct v4l2_subdev *sd, struct v4l2_mbus_framefmt *fmt)
1230 {
1231         struct cx25840_state *state = to_state(sd);
1232         struct i2c_client *client = v4l2_get_subdevdata(sd);
1233         int HSC, VSC, Vsrc, Hsrc, filter, Vlines;
1234         int is_50Hz = !(state->std & V4L2_STD_525_60);
1235
1236         if (fmt->code != V4L2_MBUS_FMT_FIXED)
1237                 return -EINVAL;
1238
1239         fmt->field = V4L2_FIELD_INTERLACED;
1240         fmt->colorspace = V4L2_COLORSPACE_SMPTE170M;
1241
1242         Vsrc = (cx25840_read(client, 0x476) & 0x3f) << 4;
1243         Vsrc |= (cx25840_read(client, 0x475) & 0xf0) >> 4;
1244
1245         Hsrc = (cx25840_read(client, 0x472) & 0x3f) << 4;
1246         Hsrc |= (cx25840_read(client, 0x471) & 0xf0) >> 4;
1247
1248         Vlines = fmt->height + (is_50Hz ? 4 : 7);
1249
1250         if ((fmt->width * 16 < Hsrc) || (Hsrc < fmt->width) ||
1251                         (Vlines * 8 < Vsrc) || (Vsrc < Vlines)) {
1252                 v4l_err(client, "%dx%d is not a valid size!\n",
1253                                 fmt->width, fmt->height);
1254                 return -ERANGE;
1255         }
1256
1257         HSC = (Hsrc * (1 << 20)) / fmt->width - (1 << 20);
1258         VSC = (1 << 16) - (Vsrc * (1 << 9) / Vlines - (1 << 9));
1259         VSC &= 0x1fff;
1260
1261         if (fmt->width >= 385)
1262                 filter = 0;
1263         else if (fmt->width > 192)
1264                 filter = 1;
1265         else if (fmt->width > 96)
1266                 filter = 2;
1267         else
1268                 filter = 3;
1269
1270         v4l_dbg(1, cx25840_debug, client, "decoder set size %dx%d -> scale  %ux%u\n",
1271                         fmt->width, fmt->height, HSC, VSC);
1272
1273         /* HSCALE=HSC */
1274         cx25840_write(client, 0x418, HSC & 0xff);
1275         cx25840_write(client, 0x419, (HSC >> 8) & 0xff);
1276         cx25840_write(client, 0x41a, HSC >> 16);
1277         /* VSCALE=VSC */
1278         cx25840_write(client, 0x41c, VSC & 0xff);
1279         cx25840_write(client, 0x41d, VSC >> 8);
1280         /* VS_INTRLACE=1 VFILT=filter */
1281         cx25840_write(client, 0x41e, 0x8 | filter);
1282         return 0;
1283 }
1284
1285 /* ----------------------------------------------------------------------- */
1286
1287 static void log_video_status(struct i2c_client *client)
1288 {
1289         static const char *const fmt_strs[] = {
1290                 "0x0",
1291                 "NTSC-M", "NTSC-J", "NTSC-4.43",
1292                 "PAL-BDGHI", "PAL-M", "PAL-N", "PAL-Nc", "PAL-60",
1293                 "0x9", "0xA", "0xB",
1294                 "SECAM",
1295                 "0xD", "0xE", "0xF"
1296         };
1297
1298         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
1299         u8 vidfmt_sel = cx25840_read(client, 0x400) & 0xf;
1300         u8 gen_stat1 = cx25840_read(client, 0x40d);
1301         u8 gen_stat2 = cx25840_read(client, 0x40e);
1302         int vid_input = state->vid_input;
1303
1304         v4l_info(client, "Video signal:              %spresent\n",
1305                     (gen_stat2 & 0x20) ? "" : "not ");
1306         v4l_info(client, "Detected format:           %s\n",
1307                     fmt_strs[gen_stat1 & 0xf]);
1308
1309         v4l_info(client, "Specified standard:        %s\n",
1310                     vidfmt_sel ? fmt_strs[vidfmt_sel] : "automatic detection");
1311
1312         if (vid_input >= CX25840_COMPOSITE1 &&
1313             vid_input <= CX25840_COMPOSITE8) {
1314                 v4l_info(client, "Specified video input:     Composite %d\n",
1315                         vid_input - CX25840_COMPOSITE1 + 1);
1316         } else {
1317                 v4l_info(client, "Specified video input:     S-Video (Luma In%d, Chroma In%d)\n",
1318                         (vid_input & 0xf0) >> 4, (vid_input & 0xf00) >> 8);
1319         }
1320
1321         v4l_info(client, "Specified audioclock freq: %d Hz\n", state->audclk_freq);
1322 }
1323
1324 /* ----------------------------------------------------------------------- */
1325
1326 static void log_audio_status(struct i2c_client *client)
1327 {
1328         struct cx25840_state *state = to_state(i2c_get_clientdata(client));
1329         u8 download_ctl = cx25840_read(client, 0x803);
1330         u8 mod_det_stat0 = cx25840_read(client, 0x804);
1331         u8 mod_det_stat1 = cx25840_read(client, 0x805);
1332         u8 audio_config = cx25840_read(client, 0x808);
1333         u8 pref_mode = cx25840_read(client, 0x809);
1334         u8 afc0 = cx25840_read(client, 0x80b);
1335         u8 mute_ctl = cx25840_read(client, 0x8d3);
1336         int aud_input = state->aud_input;
1337         char *p;
1338
1339         switch (mod_det_stat0) {
1340         case 0x00: p = "mono"; break;
1341         case 0x01: p = "stereo"; break;
1342         case 0x02: p = "dual"; break;
1343         case 0x04: p = "tri"; break;
1344         case 0x10: p = "mono with SAP"; break;
1345         case 0x11: p = "stereo with SAP"; break;
1346         case 0x12: p = "dual with SAP"; break;
1347         case 0x14: p = "tri with SAP"; break;
1348         case 0xfe: p = "forced mode"; break;
1349         default: p = "not defined";
1350         }
1351         v4l_info(client, "Detected audio mode:       %s\n", p);
1352
1353         switch (mod_det_stat1) {
1354         case 0x00: p = "not defined"; break;
1355         case 0x01: p = "EIAJ"; break;
1356         case 0x02: p = "A2-M"; break;
1357         case 0x03: p = "A2-BG"; break;
1358         case 0x04: p = "A2-DK1"; break;
1359         case 0x05: p = "A2-DK2"; break;
1360         case 0x06: p = "A2-DK3"; break;
1361         case 0x07: p = "A1 (6.0 MHz FM Mono)"; break;
1362         case 0x08: p = "AM-L"; break;
1363         case 0x09: p = "NICAM-BG"; break;
1364         case 0x0a: p = "NICAM-DK"; break;
1365         case 0x0b: p = "NICAM-I"; break;
1366         case 0x0c: p = "NICAM-L"; break;
1367         case 0x0d: p = "BTSC/EIAJ/A2-M Mono (4.5 MHz FMMono)"; break;
1368         case 0x0e: p = "IF FM Radio"; break;
1369         case 0x0f: p = "BTSC"; break;
1370         case 0x10: p = "high-deviation FM"; break;
1371         case 0x11: p = "very high-deviation FM"; break;
1372         case 0xfd: p = "unknown audio standard"; break;
1373         case 0xfe: p = "forced audio standard"; break;
1374         case 0xff: p = "no detected audio standard"; break;
1375         default: p = "not defined";
1376         }
1377         v4l_info(client, "Detected audio standard:   %s\n", p);
1378         v4l_info(client, "Audio muted:               %s\n",
1379                     (state->unmute_volume >= 0) ? "yes" : "no");
1380         v4l_info(client, "Audio microcontroller:     %s\n",
1381                     (download_ctl & 0x10) ?
1382                                 ((mute_ctl & 0x2) ? "detecting" : "running") : "stopped");
1383
1384         switch (audio_config >> 4) {
1385         case 0x00: p = "undefined"; break;
1386         case 0x01: p = "BTSC"; break;
1387         case 0x02: p = "EIAJ"; break;
1388         case 0x03: p = "A2-M"; break;
1389         case 0x04: p = "A2-BG"; break;
1390         case 0x05: p = "A2-DK1"; break;
1391         case 0x06: p = "A2-DK2"; break;
1392         case 0x07: p = "A2-DK3"; break;
1393         case 0x08: p = "A1 (6.0 MHz FM Mono)"; break;
1394         case 0x09: p = "AM-L"; break;
1395         case 0x0a: p = "NICAM-BG"; break;
1396         case 0x0b: p = "NICAM-DK"; break;
1397         case 0x0c: p = "NICAM-I"; break;
1398         case 0x0d: p = "NICAM-L"; break;
1399         case 0x0e: p = "FM radio"; break;
1400         case 0x0f: p = "automatic detection"; break;
1401         default: p = "undefined";
1402         }
1403         v4l_info(client, "Configured audio standard: %s\n", p);
1404
1405         if ((audio_config >> 4) < 0xF) {
1406                 switch (audio_config & 0xF) {
1407                 case 0x00: p = "MONO1 (LANGUAGE A/Mono L+R channel for BTSC, EIAJ, A2)"; break;
1408                 case 0x01: p = "MONO2 (LANGUAGE B)"; break;
1409                 case 0x02: p = "MONO3 (STEREO forced MONO)"; break;
1410                 case 0x03: p = "MONO4 (NICAM ANALOG-Language C/Analog Fallback)"; break;
1411                 case 0x04: p = "STEREO"; break;
1412                 case 0x05: p = "DUAL1 (AB)"; break;
1413                 case 0x06: p = "DUAL2 (AC) (FM)"; break;
1414                 case 0x07: p = "DUAL3 (BC) (FM)"; break;
1415                 case 0x08: p = "DUAL4 (AC) (AM)"; break;
1416                 case 0x09: p = "DUAL5 (BC) (AM)"; break;
1417                 case 0x0a: p = "SAP"; break;
1418                 default: p = "undefined";
1419                 }
1420                 v4l_info(client, "Configured audio mode:     %s\n", p);
1421         } else {
1422                 switch (audio_config & 0xF) {
1423                 case 0x00: p = "BG"; break;
1424                 case 0x01: p = "DK1"; break;
1425                 case 0x02: p = "DK2"; break;
1426                 case 0x03: p = "DK3"; break;
1427                 case 0x04: p = "I"; break;
1428                 case 0x05: p = "L"; break;
1429                 case 0x06: p = "BTSC"; break;
1430                 case 0x07: p = "EIAJ"; break;
1431                 case 0x08: p = "A2-M"; break;
1432                 case 0x09: p = "FM Radio"; break;
1433                 case 0x0f: p = "automatic standard and mode detection"; break;
1434                 default: p = "undefined";
1435                 }
1436                 v4l_info(client, "Configured audio system:   %s\n", p);
1437         }
1438
1439         if (aud_input) {
1440                 v4l_info(client, "Specified audio input:     Tuner (In%d)\n", aud_input);
1441         } else {
1442                 v4l_info(client, "Specified audio input:     External\n");
1443         }
1444
1445         switch (pref_mode & 0xf) {
1446         case 0: p = "mono/language A"; break;
1447         case 1: p = "language B"; break;
1448         case 2: p = "language C"; break;
1449         case 3: p = "analog fallback"; break;
1450         case 4: p = "stereo"; break;
1451         case 5: p = "language AC"; break;
1452         case 6: p = "language BC"; break;
1453         case 7: p = "language AB"; break;
1454         default: p = "undefined";
1455         }
1456         v4l_info(client, "Preferred audio mode:      %s\n", p);
1457
1458         if ((audio_config & 0xf) == 0xf) {
1459                 switch ((afc0 >> 3) & 0x3) {
1460                 case 0: p = "system DK"; break;
1461                 case 1: p = "system L"; break;
1462                 case 2: p = "autodetect"; break;
1463                 default: p = "undefined";
1464                 }
1465                 v4l_info(client, "Selected 65 MHz format:    %s\n", p);
1466
1467                 switch (afc0 & 0x7) {
1468                 case 0: p = "chroma"; break;
1469                 case 1: p = "BTSC"; break;
1470                 case 2: p = "EIAJ"; break;
1471                 case 3: p = "A2-M"; break;
1472                 case 4: p = "autodetect"; break;
1473                 default: p = "undefined";
1474                 }
1475                 v4l_info(client, "Selected 45 MHz format:    %s\n", p);
1476         }
1477 }
1478
1479 /* ----------------------------------------------------------------------- */
1480
1481 /* This load_fw operation must be called to load the driver's firmware.
1482    Without this the audio standard detection will fail and you will
1483    only get mono.
1484
1485    Since loading the firmware is often problematic when the driver is
1486    compiled into the kernel I recommend postponing calling this function
1487    until the first open of the video device. Another reason for
1488    postponing it is that loading this firmware takes a long time (seconds)
1489    due to the slow i2c bus speed. So it will speed up the boot process if
1490    you can avoid loading the fw as long as the video device isn't used.  */
1491 static int cx25840_load_fw(struct v4l2_subdev *sd)
1492 {
1493         struct cx25840_state *state = to_state(sd);
1494         struct i2c_client *client = v4l2_get_subdevdata(sd);
1495
1496         if (!state->is_initialized) {
1497                 /* initialize and load firmware */
1498                 state->is_initialized = 1;
1499                 if (is_cx2583x(state))
1500                         cx25836_initialize(client);
1501                 else if (is_cx2388x(state))
1502                         cx23885_initialize(client);
1503                 else if (is_cx231xx(state))
1504                         cx231xx_initialize(client);
1505                 else
1506                         cx25840_initialize(client);
1507         }
1508         return 0;
1509 }
1510
1511 #ifdef CONFIG_VIDEO_ADV_DEBUG
1512 static int cx25840_g_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
1513 {
1514         struct i2c_client *client = v4l2_get_subdevdata(sd);
1515
1516         if (!v4l2_chip_match_i2c_client(client, &reg->match))
1517                 return -EINVAL;
1518         if (!capable(CAP_SYS_ADMIN))
1519                 return -EPERM;
1520         reg->size = 1;
1521         reg->val = cx25840_read(client, reg->reg & 0x0fff);
1522         return 0;
1523 }
1524
1525 static int cx25840_s_register(struct v4l2_subdev *sd, struct v4l2_dbg_register *reg)
1526 {
1527         struct i2c_client *client = v4l2_get_subdevdata(sd);
1528
1529         if (!v4l2_chip_match_i2c_client(client, &reg->match))
1530                 return -EINVAL;
1531         if (!capable(CAP_SYS_ADMIN))
1532                 return -EPERM;
1533         cx25840_write(client, reg->reg & 0x0fff, reg->val & 0xff);
1534         return 0;
1535 }
1536 #endif
1537
1538 static int cx25840_s_audio_stream(struct v4l2_subdev *sd, int enable)
1539 {
1540         struct cx25840_state *state = to_state(sd);
1541         struct i2c_client *client = v4l2_get_subdevdata(sd);
1542         u8 v;
1543
1544         if (is_cx2583x(state) || is_cx2388x(state) || is_cx231xx(state))
1545                 return 0;
1546
1547         v4l_dbg(1, cx25840_debug, client, "%s audio output\n",
1548                         enable ? "enable" : "disable");
1549
1550         if (enable) {
1551                 v = cx25840_read(client, 0x115) | 0x80;
1552                 cx25840_write(client, 0x115, v);
1553                 v = cx25840_read(client, 0x116) | 0x03;
1554                 cx25840_write(client, 0x116, v);
1555         } else {
1556                 v = cx25840_read(client, 0x115) & ~(0x80);
1557                 cx25840_write(client, 0x115, v);
1558                 v = cx25840_read(client, 0x116) & ~(0x03);
1559                 cx25840_write(client, 0x116, v);
1560         }
1561         return 0;
1562 }
1563
1564 static int cx25840_s_stream(struct v4l2_subdev *sd, int enable)
1565 {
1566         struct cx25840_state *state = to_state(sd);
1567         struct i2c_client *client = v4l2_get_subdevdata(sd);
1568         u8 v;
1569
1570         v4l_dbg(1, cx25840_debug, client, "%s video output\n",
1571                         enable ? "enable" : "disable");
1572         if (enable) {
1573                 if (is_cx2388x(state) || is_cx231xx(state)) {
1574                         v = cx25840_read(client, 0x421) | 0x0b;
1575                         cx25840_write(client, 0x421, v);
1576                 } else {
1577                         v = cx25840_read(client, 0x115) | 0x0c;
1578                         cx25840_write(client, 0x115, v);
1579                         v = cx25840_read(client, 0x116) | 0x04;
1580                         cx25840_write(client, 0x116, v);
1581                 }
1582         } else {
1583                 if (is_cx2388x(state) || is_cx231xx(state)) {
1584                         v = cx25840_read(client, 0x421) & ~(0x0b);
1585                         cx25840_write(client, 0x421, v);
1586                 } else {
1587                         v = cx25840_read(client, 0x115) & ~(0x0c);
1588                         cx25840_write(client, 0x115, v);
1589                         v = cx25840_read(client, 0x116) & ~(0x04);
1590                         cx25840_write(client, 0x116, v);
1591                 }
1592         }
1593         return 0;
1594 }
1595
1596 static int cx25840_queryctrl(struct v4l2_subdev *sd, struct v4l2_queryctrl *qc)
1597 {
1598         struct cx25840_state *state = to_state(sd);
1599
1600         switch (qc->id) {
1601         case V4L2_CID_BRIGHTNESS:
1602                 return v4l2_ctrl_query_fill(qc, 0, 255, 1, 128);
1603         case V4L2_CID_CONTRAST:
1604         case V4L2_CID_SATURATION:
1605                 return v4l2_ctrl_query_fill(qc, 0, 127, 1, 64);
1606         case V4L2_CID_HUE:
1607                 return v4l2_ctrl_query_fill(qc, -128, 127, 1, 0);
1608         default:
1609                 break;
1610         }
1611         if (is_cx2583x(state))
1612                 return -EINVAL;
1613
1614         switch (qc->id) {
1615         case V4L2_CID_AUDIO_VOLUME:
1616                 return v4l2_ctrl_query_fill(qc, 0, 65535,
1617                                 65535 / 100, state->default_volume);
1618         case V4L2_CID_AUDIO_MUTE:
1619                 return v4l2_ctrl_query_fill(qc, 0, 1, 1, 0);
1620         case V4L2_CID_AUDIO_BALANCE:
1621         case V4L2_CID_AUDIO_BASS:
1622         case V4L2_CID_AUDIO_TREBLE:
1623                 return v4l2_ctrl_query_fill(qc, 0, 65535, 65535 / 100, 32768);
1624         default:
1625                 return -EINVAL;
1626         }
1627         return -EINVAL;
1628 }
1629
1630 static int cx25840_s_std(struct v4l2_subdev *sd, v4l2_std_id std)
1631 {
1632         struct cx25840_state *state = to_state(sd);
1633         struct i2c_client *client = v4l2_get_subdevdata(sd);
1634
1635         if (state->radio == 0 && state->std == std)
1636                 return 0;
1637         state->radio = 0;
1638         state->std = std;
1639         return set_v4lstd(client);
1640 }
1641
1642 static int cx25840_s_radio(struct v4l2_subdev *sd)
1643 {
1644         struct cx25840_state *state = to_state(sd);
1645
1646         state->radio = 1;
1647         return 0;
1648 }
1649
1650 static int cx25840_s_video_routing(struct v4l2_subdev *sd,
1651                                    u32 input, u32 output, u32 config)
1652 {
1653         struct cx25840_state *state = to_state(sd);
1654         struct i2c_client *client = v4l2_get_subdevdata(sd);
1655
1656         return set_input(client, input, state->aud_input);
1657 }
1658
1659 static int cx25840_s_audio_routing(struct v4l2_subdev *sd,
1660                                    u32 input, u32 output, u32 config)
1661 {
1662         struct cx25840_state *state = to_state(sd);
1663         struct i2c_client *client = v4l2_get_subdevdata(sd);
1664
1665         if (is_cx2583x(state))
1666                 return -EINVAL;
1667         return set_input(client, state->vid_input, input);
1668 }
1669
1670 static int cx25840_s_frequency(struct v4l2_subdev *sd, struct v4l2_frequency *freq)
1671 {
1672         struct cx25840_state *state = to_state(sd);
1673         struct i2c_client *client = v4l2_get_subdevdata(sd);
1674
1675         if (!is_cx2583x(state))
1676                 input_change(client);
1677         return 0;
1678 }
1679
1680 static int cx25840_g_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1681 {
1682         struct cx25840_state *state = to_state(sd);
1683         struct i2c_client *client = v4l2_get_subdevdata(sd);
1684         u8 vpres = cx25840_read(client, 0x40e) & 0x20;
1685         u8 mode;
1686         int val = 0;
1687
1688         if (state->radio)
1689                 return 0;
1690
1691         vt->signal = vpres ? 0xffff : 0x0;
1692         if (is_cx2583x(state))
1693                 return 0;
1694
1695         vt->capability |=
1696                 V4L2_TUNER_CAP_STEREO | V4L2_TUNER_CAP_LANG1 |
1697                 V4L2_TUNER_CAP_LANG2 | V4L2_TUNER_CAP_SAP;
1698
1699         mode = cx25840_read(client, 0x804);
1700
1701         /* get rxsubchans and audmode */
1702         if ((mode & 0xf) == 1)
1703                 val |= V4L2_TUNER_SUB_STEREO;
1704         else
1705                 val |= V4L2_TUNER_SUB_MONO;
1706
1707         if (mode == 2 || mode == 4)
1708                 val = V4L2_TUNER_SUB_LANG1 | V4L2_TUNER_SUB_LANG2;
1709
1710         if (mode & 0x10)
1711                 val |= V4L2_TUNER_SUB_SAP;
1712
1713         vt->rxsubchans = val;
1714         vt->audmode = state->audmode;
1715         return 0;
1716 }
1717
1718 static int cx25840_s_tuner(struct v4l2_subdev *sd, struct v4l2_tuner *vt)
1719 {
1720         struct cx25840_state *state = to_state(sd);
1721         struct i2c_client *client = v4l2_get_subdevdata(sd);
1722
1723         if (state->radio || is_cx2583x(state))
1724                 return 0;
1725
1726         switch (vt->audmode) {
1727                 case V4L2_TUNER_MODE_MONO:
1728                         /* mono      -> mono
1729                            stereo    -> mono
1730                            bilingual -> lang1 */
1731                         cx25840_and_or(client, 0x809, ~0xf, 0x00);
1732                         break;
1733                 case V4L2_TUNER_MODE_STEREO:
1734                 case V4L2_TUNER_MODE_LANG1:
1735                         /* mono      -> mono
1736                            stereo    -> stereo
1737                            bilingual -> lang1 */
1738                         cx25840_and_or(client, 0x809, ~0xf, 0x04);
1739                         break;
1740                 case V4L2_TUNER_MODE_LANG1_LANG2:
1741                         /* mono      -> mono
1742                            stereo    -> stereo
1743                            bilingual -> lang1/lang2 */
1744                         cx25840_and_or(client, 0x809, ~0xf, 0x07);
1745                         break;
1746                 case V4L2_TUNER_MODE_LANG2:
1747                         /* mono      -> mono
1748                            stereo    -> stereo
1749                            bilingual -> lang2 */
1750                         cx25840_and_or(client, 0x809, ~0xf, 0x01);
1751                         break;
1752                 default:
1753                         return -EINVAL;
1754         }
1755         state->audmode = vt->audmode;
1756         return 0;
1757 }
1758
1759 static int cx25840_reset(struct v4l2_subdev *sd, u32 val)
1760 {
1761         struct cx25840_state *state = to_state(sd);
1762         struct i2c_client *client = v4l2_get_subdevdata(sd);
1763
1764         if (is_cx2583x(state))
1765                 cx25836_initialize(client);
1766         else if (is_cx2388x(state))
1767                 cx23885_initialize(client);
1768         else if (is_cx231xx(state))
1769                 cx231xx_initialize(client);
1770         else
1771                 cx25840_initialize(client);
1772         return 0;
1773 }
1774
1775 static int cx25840_g_chip_ident(struct v4l2_subdev *sd, struct v4l2_dbg_chip_ident *chip)
1776 {
1777         struct cx25840_state *state = to_state(sd);
1778         struct i2c_client *client = v4l2_get_subdevdata(sd);
1779
1780         return v4l2_chip_ident_i2c_client(client, chip, state->id, state->rev);
1781 }
1782
1783 static int cx25840_log_status(struct v4l2_subdev *sd)
1784 {
1785         struct cx25840_state *state = to_state(sd);
1786         struct i2c_client *client = v4l2_get_subdevdata(sd);
1787
1788         log_video_status(client);
1789         if (!is_cx2583x(state))
1790                 log_audio_status(client);
1791         cx25840_ir_log_status(sd);
1792         return 0;
1793 }
1794
1795 static int cx23885_irq_handler(struct v4l2_subdev *sd, u32 status,
1796                                bool *handled)
1797 {
1798         struct cx25840_state *state = to_state(sd);
1799         struct i2c_client *c = v4l2_get_subdevdata(sd);
1800         u8 irq_stat, aud_stat, aud_en, ir_stat, ir_en;
1801         u32 vid_stat, aud_mc_stat;
1802         bool block_handled;
1803         int ret = 0;
1804
1805         irq_stat = cx25840_read(c, CX23885_PIN_CTRL_IRQ_REG);
1806         v4l_dbg(2, cx25840_debug, c, "AV Core IRQ status (entry): %s %s %s\n",
1807                 irq_stat & CX23885_PIN_CTRL_IRQ_IR_STAT ? "ir" : "  ",
1808                 irq_stat & CX23885_PIN_CTRL_IRQ_AUD_STAT ? "aud" : "   ",
1809                 irq_stat & CX23885_PIN_CTRL_IRQ_VID_STAT ? "vid" : "   ");
1810
1811         if ((is_cx23885(state) || is_cx23887(state))) {
1812                 ir_stat = cx25840_read(c, CX25840_IR_STATS_REG);
1813                 ir_en = cx25840_read(c, CX25840_IR_IRQEN_REG);
1814                 v4l_dbg(2, cx25840_debug, c,
1815                         "AV Core ir IRQ status: %#04x disables: %#04x\n",
1816                         ir_stat, ir_en);
1817                 if (irq_stat & CX23885_PIN_CTRL_IRQ_IR_STAT) {
1818                         block_handled = false;
1819                         ret = cx25840_ir_irq_handler(sd,
1820                                                      status, &block_handled);
1821                         if (block_handled)
1822                                 *handled = true;
1823                 }
1824         }
1825
1826         aud_stat = cx25840_read(c, CX25840_AUD_INT_STAT_REG);
1827         aud_en = cx25840_read(c, CX25840_AUD_INT_CTRL_REG);
1828         v4l_dbg(2, cx25840_debug, c,
1829                 "AV Core audio IRQ status: %#04x disables: %#04x\n",
1830                 aud_stat, aud_en);
1831         aud_mc_stat = cx25840_read4(c, CX23885_AUD_MC_INT_MASK_REG);
1832         v4l_dbg(2, cx25840_debug, c,
1833                 "AV Core audio MC IRQ status: %#06x enables: %#06x\n",
1834                 aud_mc_stat >> CX23885_AUD_MC_INT_STAT_SHFT,
1835                 aud_mc_stat & CX23885_AUD_MC_INT_CTRL_BITS);
1836         if (irq_stat & CX23885_PIN_CTRL_IRQ_AUD_STAT) {
1837                 if (aud_stat) {
1838                         cx25840_write(c, CX25840_AUD_INT_STAT_REG, aud_stat);
1839                         *handled = true;
1840                 }
1841         }
1842
1843         vid_stat = cx25840_read4(c, CX25840_VID_INT_STAT_REG);
1844         v4l_dbg(2, cx25840_debug, c,
1845                 "AV Core video IRQ status: %#06x disables: %#06x\n",
1846                 vid_stat & CX25840_VID_INT_STAT_BITS,
1847                 vid_stat >> CX25840_VID_INT_MASK_SHFT);
1848         if (irq_stat & CX23885_PIN_CTRL_IRQ_VID_STAT) {
1849                 if (vid_stat & CX25840_VID_INT_STAT_BITS) {
1850                         cx25840_write4(c, CX25840_VID_INT_STAT_REG, vid_stat);
1851                         *handled = true;
1852                 }
1853         }
1854
1855         irq_stat = cx25840_read(c, CX23885_PIN_CTRL_IRQ_REG);
1856         v4l_dbg(2, cx25840_debug, c, "AV Core IRQ status (exit): %s %s %s\n",
1857                 irq_stat & CX23885_PIN_CTRL_IRQ_IR_STAT ? "ir" : "  ",
1858                 irq_stat & CX23885_PIN_CTRL_IRQ_AUD_STAT ? "aud" : "   ",
1859                 irq_stat & CX23885_PIN_CTRL_IRQ_VID_STAT ? "vid" : "   ");
1860
1861         return ret;
1862 }
1863
1864 static int cx25840_irq_handler(struct v4l2_subdev *sd, u32 status,
1865                                bool *handled)
1866 {
1867         struct cx25840_state *state = to_state(sd);
1868
1869         *handled = false;
1870
1871         /* Only support the CX2388[578] AV Core for now */
1872         if (is_cx2388x(state))
1873                 return cx23885_irq_handler(sd, status, handled);
1874
1875         return -ENODEV;
1876 }
1877
1878 /* ----------------------------------------------------------------------- */
1879
1880 static const struct v4l2_subdev_core_ops cx25840_core_ops = {
1881         .log_status = cx25840_log_status,
1882         .g_chip_ident = cx25840_g_chip_ident,
1883         .g_ctrl = cx25840_g_ctrl,
1884         .s_ctrl = cx25840_s_ctrl,
1885         .queryctrl = cx25840_queryctrl,
1886         .s_std = cx25840_s_std,
1887         .reset = cx25840_reset,
1888         .load_fw = cx25840_load_fw,
1889         .s_io_pin_config = common_s_io_pin_config,
1890 #ifdef CONFIG_VIDEO_ADV_DEBUG
1891         .g_register = cx25840_g_register,
1892         .s_register = cx25840_s_register,
1893 #endif
1894         .interrupt_service_routine = cx25840_irq_handler,
1895 };
1896
1897 static const struct v4l2_subdev_tuner_ops cx25840_tuner_ops = {
1898         .s_frequency = cx25840_s_frequency,
1899         .s_radio = cx25840_s_radio,
1900         .g_tuner = cx25840_g_tuner,
1901         .s_tuner = cx25840_s_tuner,
1902 };
1903
1904 static const struct v4l2_subdev_audio_ops cx25840_audio_ops = {
1905         .s_clock_freq = cx25840_s_clock_freq,
1906         .s_routing = cx25840_s_audio_routing,
1907         .s_stream = cx25840_s_audio_stream,
1908 };
1909
1910 static const struct v4l2_subdev_video_ops cx25840_video_ops = {
1911         .s_routing = cx25840_s_video_routing,
1912         .s_mbus_fmt = cx25840_s_mbus_fmt,
1913         .s_stream = cx25840_s_stream,
1914 };
1915
1916 static const struct v4l2_subdev_vbi_ops cx25840_vbi_ops = {
1917         .decode_vbi_line = cx25840_decode_vbi_line,
1918         .s_raw_fmt = cx25840_s_raw_fmt,
1919         .s_sliced_fmt = cx25840_s_sliced_fmt,
1920         .g_sliced_fmt = cx25840_g_sliced_fmt,
1921 };
1922
1923 static const struct v4l2_subdev_ops cx25840_ops = {
1924         .core = &cx25840_core_ops,
1925         .tuner = &cx25840_tuner_ops,
1926         .audio = &cx25840_audio_ops,
1927         .video = &cx25840_video_ops,
1928         .vbi = &cx25840_vbi_ops,
1929         .ir = &cx25840_ir_ops,
1930 };
1931
1932 /* ----------------------------------------------------------------------- */
1933
1934 static u32 get_cx2388x_ident(struct i2c_client *client)
1935 {
1936         u32 ret;
1937
1938         /* Come out of digital power down */
1939         cx25840_write(client, 0x000, 0);
1940
1941         /* Detecting whether the part is cx23885/7/8 is more
1942          * difficult than it needs to be. No ID register. Instead we
1943          * probe certain registers indicated in the datasheets to look
1944          * for specific defaults that differ between the silicon designs. */
1945
1946         /* It's either 885/7 if the IR Tx Clk Divider register exists */
1947         if (cx25840_read4(client, 0x204) & 0xffff) {
1948                 /* CX23885 returns bogus repetitive byte values for the DIF,
1949                  * which doesn't exist for it. (Ex. 8a8a8a8a or 31313131) */
1950                 ret = cx25840_read4(client, 0x300);
1951                 if (((ret & 0xffff0000) >> 16) == (ret & 0xffff)) {
1952                         /* No DIF */
1953                         ret = V4L2_IDENT_CX23885_AV;
1954                 } else {
1955                         /* CX23887 has a broken DIF, but the registers
1956                          * appear valid (but unsed), good enough to detect. */
1957                         ret = V4L2_IDENT_CX23887_AV;
1958                 }
1959         } else if (cx25840_read4(client, 0x300) & 0x0fffffff) {
1960                 /* DIF PLL Freq Word reg exists; chip must be a CX23888 */
1961                 ret = V4L2_IDENT_CX23888_AV;
1962         } else {
1963                 v4l_err(client, "Unable to detect h/w, assuming cx23887\n");
1964                 ret = V4L2_IDENT_CX23887_AV;
1965         }
1966
1967         /* Back into digital power down */
1968         cx25840_write(client, 0x000, 2);
1969         return ret;
1970 }
1971
1972 static int cx25840_probe(struct i2c_client *client,
1973                          const struct i2c_device_id *did)
1974 {
1975         struct cx25840_state *state;
1976         struct v4l2_subdev *sd;
1977         u32 id = V4L2_IDENT_NONE;
1978         u16 device_id;
1979
1980         /* Check if the adapter supports the needed features */
1981         if (!i2c_check_functionality(client->adapter, I2C_FUNC_SMBUS_BYTE_DATA))
1982                 return -EIO;
1983
1984         v4l_dbg(1, cx25840_debug, client, "detecting cx25840 client on address 0x%x\n", client->addr << 1);
1985
1986         device_id = cx25840_read(client, 0x101) << 8;
1987         device_id |= cx25840_read(client, 0x100);
1988         v4l_dbg(1, cx25840_debug, client, "device_id = 0x%04x\n", device_id);
1989
1990         /* The high byte of the device ID should be
1991          * 0x83 for the cx2583x and 0x84 for the cx2584x */
1992         if ((device_id & 0xff00) == 0x8300) {
1993                 id = V4L2_IDENT_CX25836 + ((device_id >> 4) & 0xf) - 6;
1994         } else if ((device_id & 0xff00) == 0x8400) {
1995                 id = V4L2_IDENT_CX25840 + ((device_id >> 4) & 0xf);
1996         } else if (device_id == 0x0000) {
1997                 id = get_cx2388x_ident(client);
1998         } else if ((device_id & 0xfff0) == 0x5A30) {
1999                 /* The CX23100 (0x5A3C = 23100) doesn't have an A/V decoder */
2000                 id = V4L2_IDENT_CX2310X_AV;
2001         } else if ((device_id & 0xff) == (device_id >> 8)) {
2002                 v4l_err(client,
2003                         "likely a confused/unresponsive cx2388[578] A/V decoder"
2004                         " found @ 0x%x (%s)\n",
2005                         client->addr << 1, client->adapter->name);
2006                 v4l_err(client, "A method to reset it from the cx25840 driver"
2007                         " software is not known at this time\n");
2008                 return -ENODEV;
2009         } else {
2010                 v4l_dbg(1, cx25840_debug, client, "cx25840 not found\n");
2011                 return -ENODEV;
2012         }
2013
2014         state = kzalloc(sizeof(struct cx25840_state), GFP_KERNEL);
2015         if (state == NULL)
2016                 return -ENOMEM;
2017
2018         sd = &state->sd;
2019         v4l2_i2c_subdev_init(sd, client, &cx25840_ops);
2020         switch (id) {
2021         case V4L2_IDENT_CX23885_AV:
2022                 v4l_info(client, "cx23885 A/V decoder found @ 0x%x (%s)\n",
2023                          client->addr << 1, client->adapter->name);
2024                 break;
2025         case V4L2_IDENT_CX23887_AV:
2026                 v4l_info(client, "cx23887 A/V decoder found @ 0x%x (%s)\n",
2027                          client->addr << 1, client->adapter->name);
2028                 break;
2029         case V4L2_IDENT_CX23888_AV:
2030                 v4l_info(client, "cx23888 A/V decoder found @ 0x%x (%s)\n",
2031                          client->addr << 1, client->adapter->name);
2032                 break;
2033         case V4L2_IDENT_CX2310X_AV:
2034                 v4l_info(client, "cx%d A/V decoder found @ 0x%x (%s)\n",
2035                          device_id, client->addr << 1, client->adapter->name);
2036                 break;
2037         case V4L2_IDENT_CX25840:
2038         case V4L2_IDENT_CX25841:
2039         case V4L2_IDENT_CX25842:
2040         case V4L2_IDENT_CX25843:
2041                 /* Note: revision '(device_id & 0x0f) == 2' was never built. The
2042                    marking skips from 0x1 == 22 to 0x3 == 23. */
2043                 v4l_info(client, "cx25%3x-2%x found @ 0x%x (%s)\n",
2044                          (device_id & 0xfff0) >> 4,
2045                          (device_id & 0x0f) < 3 ? (device_id & 0x0f) + 1
2046                                                 : (device_id & 0x0f),
2047                          client->addr << 1, client->adapter->name);
2048                 break;
2049         case V4L2_IDENT_CX25836:
2050         case V4L2_IDENT_CX25837:
2051         default:
2052                 v4l_info(client, "cx25%3x-%x found @ 0x%x (%s)\n",
2053                          (device_id & 0xfff0) >> 4, device_id & 0x0f,
2054                          client->addr << 1, client->adapter->name);
2055                 break;
2056         }
2057
2058         state->c = client;
2059         state->vid_input = CX25840_COMPOSITE7;
2060         state->aud_input = CX25840_AUDIO8;
2061         state->audclk_freq = 48000;
2062         state->pvr150_workaround = 0;
2063         state->audmode = V4L2_TUNER_MODE_LANG1;
2064         state->unmute_volume = -1;
2065         state->default_volume = 228 - cx25840_read(client, 0x8d4);
2066         state->default_volume = ((state->default_volume / 2) + 23) << 9;
2067         state->vbi_line_offset = 8;
2068         state->id = id;
2069         state->rev = device_id;
2070
2071         cx25840_ir_probe(sd);
2072         return 0;
2073 }
2074
2075 static int cx25840_remove(struct i2c_client *client)
2076 {
2077         struct v4l2_subdev *sd = i2c_get_clientdata(client);
2078
2079         cx25840_ir_remove(sd);
2080         v4l2_device_unregister_subdev(sd);
2081         kfree(to_state(sd));
2082         return 0;
2083 }
2084
2085 static const struct i2c_device_id cx25840_id[] = {
2086         { "cx25840", 0 },
2087         { }
2088 };
2089 MODULE_DEVICE_TABLE(i2c, cx25840_id);
2090
2091 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
2092         .name = "cx25840",
2093         .probe = cx25840_probe,
2094         .remove = cx25840_remove,
2095         .id_table = cx25840_id,
2096 };