4 * Copyright (C) 2008 Jean-Francois Moine (http://moinejf.free.fr)
5 * Copyright (C) 2009 Hans de Goede <hdegoede@redhat.com>
7 * This module is adapted from the ov51x-jpeg package, which itself
8 * was adapted from the ov511 driver.
10 * Original copyright for the ov511 driver is:
12 * Copyright (c) 1999-2006 Mark W. McClelland
13 * Support for OV519, OV8610 Copyright (c) 2003 Joerg Heckenbach
14 * Many improvements by Bret Wallach <bwallac1@san.rr.com>
15 * Color fixes by by Orion Sky Lawlor <olawlor@acm.org> (2/26/2000)
16 * OV7620 fixes by Charl P. Botha <cpbotha@ieee.org>
17 * Changes by Claudio Matsuoka <claudio@conectiva.com>
19 * ov51x-jpeg original copyright is:
21 * Copyright (c) 2004-2007 Romain Beauxis <toots@rastageeks.org>
22 * Support for OV7670 sensors was contributed by Sam Skipsey <aoanla@yahoo.com>
24 * This program is free software; you can redistribute it and/or modify
25 * it under the terms of the GNU General Public License as published by
26 * the Free Software Foundation; either version 2 of the License, or
29 * This program is distributed in the hope that it will be useful,
30 * but WITHOUT ANY WARRANTY; without even the implied warranty of
31 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
32 * GNU General Public License for more details.
34 * You should have received a copy of the GNU General Public License
35 * along with this program; if not, write to the Free Software
36 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
39 #define MODULE_NAME "ov519"
41 #include <linux/input.h>
44 /* The jpeg_hdr is used by w996Xcf only */
45 /* The CONEX_CAM define for jpeg.h needs renaming, now its used here too */
49 MODULE_AUTHOR("Jean-Francois Moine <http://moinejf.free.fr>");
50 MODULE_DESCRIPTION("OV519 USB Camera Driver");
51 MODULE_LICENSE("GPL");
53 /* global parameters */
54 static int frame_rate;
56 /* Number of times to retry a failed I2C transaction. Increase this if you
57 * are getting "Failed to read sensor ID..." */
58 static int i2c_detect_tries = 10;
69 NCTRL /* number of controls */
72 /* ov519 device descriptor */
74 struct gspca_dev gspca_dev; /* !! must be the first item */
76 struct gspca_ctrl ctrls[NCTRL];
81 #define BRIDGE_OV511 0
82 #define BRIDGE_OV511PLUS 1
83 #define BRIDGE_OV518 2
84 #define BRIDGE_OV518PLUS 3
85 #define BRIDGE_OV519 4
86 #define BRIDGE_OVFX2 5
87 #define BRIDGE_W9968CF 6
91 #define BRIDGE_INVERT_LED 8
93 char snapshot_pressed;
94 char snapshot_needs_reset;
96 /* Determined by sensor type */
100 #define QUALITY_MIN 50
101 #define QUALITY_MAX 70
102 #define QUALITY_DEF 50
104 u8 stopped; /* Streaming is temporarily paused */
107 u8 frame_rate; /* current Framerate */
108 u8 clockdiv; /* clockdiv override */
110 s8 sensor; /* Type of image sensor chip (SEN_*) */
115 s16 sensor_reg_cache[256];
117 u8 jpeg_hdr[JPEG_HDR_SZ];
135 /* Note this is a bit of a hack, but the w9968cf driver needs the code for all
136 the ov sensors which is already present here. When we have the time we
137 really should move the sensor drivers to v4l2 sub drivers. */
140 /* V4L2 controls supported by the driver */
141 static void setbrightness(struct gspca_dev *gspca_dev);
142 static void setcontrast(struct gspca_dev *gspca_dev);
143 static void setcolors(struct gspca_dev *gspca_dev);
144 static void sethvflip(struct gspca_dev *gspca_dev);
145 static void setautobright(struct gspca_dev *gspca_dev);
146 static void setfreq(struct gspca_dev *gspca_dev);
147 static void setfreq_i(struct sd *sd);
149 static const struct ctrl sd_ctrls[] = {
152 .id = V4L2_CID_BRIGHTNESS,
153 .type = V4L2_CTRL_TYPE_INTEGER,
154 .name = "Brightness",
158 .default_value = 127,
160 .set_control = setbrightness,
164 .id = V4L2_CID_CONTRAST,
165 .type = V4L2_CTRL_TYPE_INTEGER,
170 .default_value = 127,
172 .set_control = setcontrast,
176 .id = V4L2_CID_SATURATION,
177 .type = V4L2_CTRL_TYPE_INTEGER,
182 .default_value = 127,
184 .set_control = setcolors,
186 /* The flip controls work with ov7670 only */
189 .id = V4L2_CID_HFLIP,
190 .type = V4L2_CTRL_TYPE_BOOLEAN,
197 .set_control = sethvflip,
201 .id = V4L2_CID_VFLIP,
202 .type = V4L2_CTRL_TYPE_BOOLEAN,
209 .set_control = sethvflip,
213 .id = V4L2_CID_AUTOBRIGHTNESS,
214 .type = V4L2_CTRL_TYPE_BOOLEAN,
215 .name = "Auto Brightness",
221 .set_control = setautobright,
225 .id = V4L2_CID_POWER_LINE_FREQUENCY,
226 .type = V4L2_CTRL_TYPE_MENU,
227 .name = "Light frequency filter",
229 .maximum = 2, /* 0: 0, 1: 50Hz, 2:60Hz */
233 .set_control = setfreq,
237 static const struct v4l2_pix_format ov519_vga_mode[] = {
238 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
240 .sizeimage = 320 * 240 * 3 / 8 + 590,
241 .colorspace = V4L2_COLORSPACE_JPEG,
243 {640, 480, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
245 .sizeimage = 640 * 480 * 3 / 8 + 590,
246 .colorspace = V4L2_COLORSPACE_JPEG,
249 static const struct v4l2_pix_format ov519_sif_mode[] = {
250 {160, 120, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
252 .sizeimage = 160 * 120 * 3 / 8 + 590,
253 .colorspace = V4L2_COLORSPACE_JPEG,
255 {176, 144, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
257 .sizeimage = 176 * 144 * 3 / 8 + 590,
258 .colorspace = V4L2_COLORSPACE_JPEG,
260 {320, 240, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
262 .sizeimage = 320 * 240 * 3 / 8 + 590,
263 .colorspace = V4L2_COLORSPACE_JPEG,
265 {352, 288, V4L2_PIX_FMT_JPEG, V4L2_FIELD_NONE,
267 .sizeimage = 352 * 288 * 3 / 8 + 590,
268 .colorspace = V4L2_COLORSPACE_JPEG,
272 /* Note some of the sizeimage values for the ov511 / ov518 may seem
273 larger then necessary, however they need to be this big as the ov511 /
274 ov518 always fills the entire isoc frame, using 0 padding bytes when
275 it doesn't have any data. So with low framerates the amount of data
276 transfered can become quite large (libv4l will remove all the 0 padding
278 static const struct v4l2_pix_format ov518_vga_mode[] = {
279 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
281 .sizeimage = 320 * 240 * 3,
282 .colorspace = V4L2_COLORSPACE_JPEG,
284 {640, 480, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
286 .sizeimage = 640 * 480 * 2,
287 .colorspace = V4L2_COLORSPACE_JPEG,
290 static const struct v4l2_pix_format ov518_sif_mode[] = {
291 {160, 120, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
294 .colorspace = V4L2_COLORSPACE_JPEG,
296 {176, 144, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
299 .colorspace = V4L2_COLORSPACE_JPEG,
301 {320, 240, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
303 .sizeimage = 320 * 240 * 3,
304 .colorspace = V4L2_COLORSPACE_JPEG,
306 {352, 288, V4L2_PIX_FMT_OV518, V4L2_FIELD_NONE,
308 .sizeimage = 352 * 288 * 3,
309 .colorspace = V4L2_COLORSPACE_JPEG,
313 static const struct v4l2_pix_format ov511_vga_mode[] = {
314 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
316 .sizeimage = 320 * 240 * 3,
317 .colorspace = V4L2_COLORSPACE_JPEG,
319 {640, 480, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
321 .sizeimage = 640 * 480 * 2,
322 .colorspace = V4L2_COLORSPACE_JPEG,
325 static const struct v4l2_pix_format ov511_sif_mode[] = {
326 {160, 120, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
329 .colorspace = V4L2_COLORSPACE_JPEG,
331 {176, 144, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
334 .colorspace = V4L2_COLORSPACE_JPEG,
336 {320, 240, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
338 .sizeimage = 320 * 240 * 3,
339 .colorspace = V4L2_COLORSPACE_JPEG,
341 {352, 288, V4L2_PIX_FMT_OV511, V4L2_FIELD_NONE,
343 .sizeimage = 352 * 288 * 3,
344 .colorspace = V4L2_COLORSPACE_JPEG,
348 static const struct v4l2_pix_format ovfx2_vga_mode[] = {
349 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
351 .sizeimage = 320 * 240,
352 .colorspace = V4L2_COLORSPACE_SRGB,
354 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
356 .sizeimage = 640 * 480,
357 .colorspace = V4L2_COLORSPACE_SRGB,
360 static const struct v4l2_pix_format ovfx2_cif_mode[] = {
361 {160, 120, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
363 .sizeimage = 160 * 120,
364 .colorspace = V4L2_COLORSPACE_SRGB,
366 {176, 144, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
368 .sizeimage = 176 * 144,
369 .colorspace = V4L2_COLORSPACE_SRGB,
371 {320, 240, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
373 .sizeimage = 320 * 240,
374 .colorspace = V4L2_COLORSPACE_SRGB,
376 {352, 288, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
378 .sizeimage = 352 * 288,
379 .colorspace = V4L2_COLORSPACE_SRGB,
382 static const struct v4l2_pix_format ovfx2_ov2610_mode[] = {
383 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
384 .bytesperline = 1600,
385 .sizeimage = 1600 * 1200,
386 .colorspace = V4L2_COLORSPACE_SRGB},
388 static const struct v4l2_pix_format ovfx2_ov3610_mode[] = {
389 {640, 480, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
391 .sizeimage = 640 * 480,
392 .colorspace = V4L2_COLORSPACE_SRGB,
394 {800, 600, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
396 .sizeimage = 800 * 600,
397 .colorspace = V4L2_COLORSPACE_SRGB,
399 {1024, 768, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
400 .bytesperline = 1024,
401 .sizeimage = 1024 * 768,
402 .colorspace = V4L2_COLORSPACE_SRGB,
404 {1600, 1200, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
405 .bytesperline = 1600,
406 .sizeimage = 1600 * 1200,
407 .colorspace = V4L2_COLORSPACE_SRGB,
409 {2048, 1536, V4L2_PIX_FMT_SBGGR8, V4L2_FIELD_NONE,
410 .bytesperline = 2048,
411 .sizeimage = 2048 * 1536,
412 .colorspace = V4L2_COLORSPACE_SRGB,
417 /* Registers common to OV511 / OV518 */
418 #define R51x_FIFO_PSIZE 0x30 /* 2 bytes wide w/ OV518(+) */
419 #define R51x_SYS_RESET 0x50
420 /* Reset type flags */
421 #define OV511_RESET_OMNICE 0x08
422 #define R51x_SYS_INIT 0x53
423 #define R51x_SYS_SNAP 0x52
424 #define R51x_SYS_CUST_ID 0x5F
425 #define R51x_COMP_LUT_BEGIN 0x80
427 /* OV511 Camera interface register numbers */
428 #define R511_CAM_DELAY 0x10
429 #define R511_CAM_EDGE 0x11
430 #define R511_CAM_PXCNT 0x12
431 #define R511_CAM_LNCNT 0x13
432 #define R511_CAM_PXDIV 0x14
433 #define R511_CAM_LNDIV 0x15
434 #define R511_CAM_UV_EN 0x16
435 #define R511_CAM_LINE_MODE 0x17
436 #define R511_CAM_OPTS 0x18
438 #define R511_SNAP_FRAME 0x19
439 #define R511_SNAP_PXCNT 0x1A
440 #define R511_SNAP_LNCNT 0x1B
441 #define R511_SNAP_PXDIV 0x1C
442 #define R511_SNAP_LNDIV 0x1D
443 #define R511_SNAP_UV_EN 0x1E
444 #define R511_SNAP_UV_EN 0x1E
445 #define R511_SNAP_OPTS 0x1F
447 #define R511_DRAM_FLOW_CTL 0x20
448 #define R511_FIFO_OPTS 0x31
449 #define R511_I2C_CTL 0x40
450 #define R511_SYS_LED_CTL 0x55 /* OV511+ only */
451 #define R511_COMP_EN 0x78
452 #define R511_COMP_LUT_EN 0x79
454 /* OV518 Camera interface register numbers */
455 #define R518_GPIO_OUT 0x56 /* OV518(+) only */
456 #define R518_GPIO_CTL 0x57 /* OV518(+) only */
458 /* OV519 Camera interface register numbers */
459 #define OV519_R10_H_SIZE 0x10
460 #define OV519_R11_V_SIZE 0x11
461 #define OV519_R12_X_OFFSETL 0x12
462 #define OV519_R13_X_OFFSETH 0x13
463 #define OV519_R14_Y_OFFSETL 0x14
464 #define OV519_R15_Y_OFFSETH 0x15
465 #define OV519_R16_DIVIDER 0x16
466 #define OV519_R20_DFR 0x20
467 #define OV519_R25_FORMAT 0x25
469 /* OV519 System Controller register numbers */
470 #define OV519_SYS_RESET1 0x51
471 #define OV519_SYS_EN_CLK1 0x54
473 #define OV519_GPIO_DATA_OUT0 0x71
474 #define OV519_GPIO_IO_CTRL0 0x72
476 #define OV511_ENDPOINT_ADDRESS 1 /* Isoc endpoint number */
479 * The FX2 chip does not give us a zero length read at end of frame.
480 * It does, however, give a short read at the end of a frame, if
481 * necessary, rather than run two frames together.
483 * By choosing the right bulk transfer size, we are guaranteed to always
484 * get a short read for the last read of each frame. Frame sizes are
485 * always a composite number (width * height, or a multiple) so if we
486 * choose a prime number, we are guaranteed that the last read of a
487 * frame will be short.
489 * But it isn't that easy: the 2.6 kernel requires a multiple of 4KB,
490 * otherwise EOVERFLOW "babbling" errors occur. I have not been able
491 * to figure out why. [PMiller]
493 * The constant (13 * 4096) is the largest "prime enough" number less than 64KB.
495 * It isn't enough to know the number of bytes per frame, in case we
496 * have data dropouts or buffer overruns (even though the FX2 double
497 * buffers, there are some pretty strict real time constraints for
498 * isochronous transfer for larger frame sizes).
500 #define OVFX2_BULK_SIZE (13 * 4096)
503 #define R51x_I2C_W_SID 0x41
504 #define R51x_I2C_SADDR_3 0x42
505 #define R51x_I2C_SADDR_2 0x43
506 #define R51x_I2C_R_SID 0x44
507 #define R51x_I2C_DATA 0x45
508 #define R518_I2C_CTL 0x47 /* OV518(+) only */
509 #define OVFX2_I2C_ADDR 0x00
512 #define OV7xx0_SID 0x42
513 #define OV_HIRES_SID 0x60 /* OV9xxx / OV2xxx / OV3xxx */
514 #define OV8xx0_SID 0xa0
515 #define OV6xx0_SID 0xc0
517 /* OV7610 registers */
518 #define OV7610_REG_GAIN 0x00 /* gain setting (5:0) */
519 #define OV7610_REG_BLUE 0x01 /* blue channel balance */
520 #define OV7610_REG_RED 0x02 /* red channel balance */
521 #define OV7610_REG_SAT 0x03 /* saturation */
522 #define OV8610_REG_HUE 0x04 /* 04 reserved */
523 #define OV7610_REG_CNT 0x05 /* Y contrast */
524 #define OV7610_REG_BRT 0x06 /* Y brightness */
525 #define OV7610_REG_COM_C 0x14 /* misc common regs */
526 #define OV7610_REG_ID_HIGH 0x1c /* manufacturer ID MSB */
527 #define OV7610_REG_ID_LOW 0x1d /* manufacturer ID LSB */
528 #define OV7610_REG_COM_I 0x29 /* misc settings */
530 /* OV7670 registers */
531 #define OV7670_REG_GAIN 0x00 /* Gain lower 8 bits (rest in vref) */
532 #define OV7670_REG_BLUE 0x01 /* blue gain */
533 #define OV7670_REG_RED 0x02 /* red gain */
534 #define OV7670_REG_VREF 0x03 /* Pieces of GAIN, VSTART, VSTOP */
535 #define OV7670_REG_COM1 0x04 /* Control 1 */
536 #define OV7670_REG_AECHH 0x07 /* AEC MS 5 bits */
537 #define OV7670_REG_COM3 0x0c /* Control 3 */
538 #define OV7670_REG_COM4 0x0d /* Control 4 */
539 #define OV7670_REG_COM5 0x0e /* All "reserved" */
540 #define OV7670_REG_COM6 0x0f /* Control 6 */
541 #define OV7670_REG_AECH 0x10 /* More bits of AEC value */
542 #define OV7670_REG_CLKRC 0x11 /* Clock control */
543 #define OV7670_REG_COM7 0x12 /* Control 7 */
544 #define OV7670_COM7_FMT_VGA 0x00
545 #define OV7670_COM7_YUV 0x00 /* YUV */
546 #define OV7670_COM7_FMT_QVGA 0x10 /* QVGA format */
547 #define OV7670_COM7_FMT_MASK 0x38
548 #define OV7670_COM7_RESET 0x80 /* Register reset */
549 #define OV7670_REG_COM8 0x13 /* Control 8 */
550 #define OV7670_COM8_AEC 0x01 /* Auto exposure enable */
551 #define OV7670_COM8_AWB 0x02 /* White balance enable */
552 #define OV7670_COM8_AGC 0x04 /* Auto gain enable */
553 #define OV7670_COM8_BFILT 0x20 /* Band filter enable */
554 #define OV7670_COM8_AECSTEP 0x40 /* Unlimited AEC step size */
555 #define OV7670_COM8_FASTAEC 0x80 /* Enable fast AGC/AEC */
556 #define OV7670_REG_COM9 0x14 /* Control 9 - gain ceiling */
557 #define OV7670_REG_COM10 0x15 /* Control 10 */
558 #define OV7670_REG_HSTART 0x17 /* Horiz start high bits */
559 #define OV7670_REG_HSTOP 0x18 /* Horiz stop high bits */
560 #define OV7670_REG_VSTART 0x19 /* Vert start high bits */
561 #define OV7670_REG_VSTOP 0x1a /* Vert stop high bits */
562 #define OV7670_REG_MVFP 0x1e /* Mirror / vflip */
563 #define OV7670_MVFP_VFLIP 0x10 /* vertical flip */
564 #define OV7670_MVFP_MIRROR 0x20 /* Mirror image */
565 #define OV7670_REG_AEW 0x24 /* AGC upper limit */
566 #define OV7670_REG_AEB 0x25 /* AGC lower limit */
567 #define OV7670_REG_VPT 0x26 /* AGC/AEC fast mode op region */
568 #define OV7670_REG_HREF 0x32 /* HREF pieces */
569 #define OV7670_REG_TSLB 0x3a /* lots of stuff */
570 #define OV7670_REG_COM11 0x3b /* Control 11 */
571 #define OV7670_COM11_EXP 0x02
572 #define OV7670_COM11_HZAUTO 0x10 /* Auto detect 50/60 Hz */
573 #define OV7670_REG_COM12 0x3c /* Control 12 */
574 #define OV7670_REG_COM13 0x3d /* Control 13 */
575 #define OV7670_COM13_GAMMA 0x80 /* Gamma enable */
576 #define OV7670_COM13_UVSAT 0x40 /* UV saturation auto adjustment */
577 #define OV7670_REG_COM14 0x3e /* Control 14 */
578 #define OV7670_REG_EDGE 0x3f /* Edge enhancement factor */
579 #define OV7670_REG_COM15 0x40 /* Control 15 */
580 #define OV7670_COM15_R00FF 0xc0 /* 00 to FF */
581 #define OV7670_REG_COM16 0x41 /* Control 16 */
582 #define OV7670_COM16_AWBGAIN 0x08 /* AWB gain enable */
583 #define OV7670_REG_BRIGHT 0x55 /* Brightness */
584 #define OV7670_REG_CONTRAS 0x56 /* Contrast control */
585 #define OV7670_REG_GFIX 0x69 /* Fix gain control */
586 #define OV7670_REG_RGB444 0x8c /* RGB 444 control */
587 #define OV7670_REG_HAECC1 0x9f /* Hist AEC/AGC control 1 */
588 #define OV7670_REG_HAECC2 0xa0 /* Hist AEC/AGC control 2 */
589 #define OV7670_REG_BD50MAX 0xa5 /* 50hz banding step limit */
590 #define OV7670_REG_HAECC3 0xa6 /* Hist AEC/AGC control 3 */
591 #define OV7670_REG_HAECC4 0xa7 /* Hist AEC/AGC control 4 */
592 #define OV7670_REG_HAECC5 0xa8 /* Hist AEC/AGC control 5 */
593 #define OV7670_REG_HAECC6 0xa9 /* Hist AEC/AGC control 6 */
594 #define OV7670_REG_HAECC7 0xaa /* Hist AEC/AGC control 7 */
595 #define OV7670_REG_BD60MAX 0xab /* 60hz banding step limit */
601 struct ov_i2c_regvals {
606 /* Settings for OV2610 camera chip */
607 static const struct ov_i2c_regvals norm_2610[] = {
608 { 0x12, 0x80 }, /* reset */
611 static const struct ov_i2c_regvals norm_3620b[] = {
613 * From the datasheet: "Note that after writing to register COMH
614 * (0x12) to change the sensor mode, registers related to the
615 * sensor’s cropping window will be reset back to their default
618 * "wait 4096 external clock ... to make sure the sensor is
619 * stable and ready to access registers" i.e. 160us at 24MHz
622 { 0x12, 0x80 }, /* COMH reset */
623 { 0x12, 0x00 }, /* QXGA, master */
626 * 11 CLKRC "Clock Rate Control"
627 * [7] internal frequency doublers: on
628 * [6] video port mode: master
629 * [5:0] clock divider: 1
634 * 13 COMI "Common Control I"
635 * = 192 (0xC0) 11000000
636 * COMI[7] "AEC speed selection"
637 * = 1 (0x01) 1....... "Faster AEC correction"
638 * COMI[6] "AEC speed step selection"
639 * = 1 (0x01) .1...... "Big steps, fast"
640 * COMI[5] "Banding filter on off"
641 * = 0 (0x00) ..0..... "Off"
642 * COMI[4] "Banding filter option"
643 * = 0 (0x00) ...0.... "Main clock is 48 MHz and
646 * = 0 (0x00) ....0...
647 * COMI[2] "AGC auto manual control selection"
648 * = 0 (0x00) .....0.. "Manual"
649 * COMI[1] "AWB auto manual control selection"
650 * = 0 (0x00) ......0. "Manual"
651 * COMI[0] "Exposure control"
652 * = 0 (0x00) .......0 "Manual"
657 * 09 COMC "Common Control C"
658 * = 8 (0x08) 00001000
659 * COMC[7:5] "Reserved"
660 * = 0 (0x00) 000.....
661 * COMC[4] "Sleep Mode Enable"
662 * = 0 (0x00) ...0.... "Normal mode"
663 * COMC[3:2] "Sensor sampling reset timing selection"
664 * = 2 (0x02) ....10.. "Longer reset time"
665 * COMC[1:0] "Output drive current select"
666 * = 0 (0x00) ......00 "Weakest"
671 * 0C COMD "Common Control D"
672 * = 8 (0x08) 00001000
674 * = 0 (0x00) 0.......
675 * COMD[6] "Swap MSB and LSB at the output port"
676 * = 0 (0x00) .0...... "False"
677 * COMD[5:3] "Reserved"
678 * = 1 (0x01) ..001...
679 * COMD[2] "Output Average On Off"
680 * = 0 (0x00) .....0.. "Output Normal"
681 * COMD[1] "Sensor precharge voltage selection"
682 * = 0 (0x00) ......0. "Selects internal
683 * reference precharge
685 * COMD[0] "Snapshot option"
686 * = 0 (0x00) .......0 "Enable live video output
687 * after snapshot sequence"
692 * 0D COME "Common Control E"
693 * = 161 (0xA1) 10100001
694 * COME[7] "Output average option"
695 * = 1 (0x01) 1....... "Output average of 4 pixels"
696 * COME[6] "Anti-blooming control"
697 * = 0 (0x00) .0...... "Off"
698 * COME[5:3] "Reserved"
699 * = 4 (0x04) ..100...
700 * COME[2] "Clock output power down pin status"
701 * = 0 (0x00) .....0.. "Tri-state data output pin
703 * COME[1] "Data output pin status selection at power down"
704 * = 0 (0x00) ......0. "Tri-state VSYNC, PCLK,
705 * HREF, and CHSYNC pins on
707 * COME[0] "Auto zero circuit select"
708 * = 1 (0x01) .......1 "On"
713 * 0E COMF "Common Control F"
714 * = 112 (0x70) 01110000
715 * COMF[7] "System clock selection"
716 * = 0 (0x00) 0....... "Use 24 MHz system clock"
717 * COMF[6:4] "Reserved"
718 * = 7 (0x07) .111....
719 * COMF[3] "Manual auto negative offset canceling selection"
720 * = 0 (0x00) ....0... "Auto detect negative
721 * offset and cancel it"
722 * COMF[2:0] "Reserved"
723 * = 0 (0x00) .....000
728 * 0F COMG "Common Control G"
729 * = 66 (0x42) 01000010
730 * COMG[7] "Optical black output selection"
731 * = 0 (0x00) 0....... "Disable"
732 * COMG[6] "Black level calibrate selection"
733 * = 1 (0x01) .1...... "Use optical black pixels
735 * COMG[5:4] "Reserved"
736 * = 0 (0x00) ..00....
737 * COMG[3] "Channel offset adjustment"
738 * = 0 (0x00) ....0... "Disable offset adjustment"
739 * COMG[2] "ADC black level calibration option"
740 * = 0 (0x00) .....0.. "Use B/G line and G/R
741 * line to calibrate each
742 * channel's black level"
744 * = 1 (0x01) ......1.
745 * COMG[0] "ADC black level calibration enable"
746 * = 0 (0x00) .......0 "Disable"
751 * 14 COMJ "Common Control J"
752 * = 198 (0xC6) 11000110
753 * COMJ[7:6] "AGC gain ceiling"
754 * = 3 (0x03) 11...... "8x"
755 * COMJ[5:4] "Reserved"
756 * = 0 (0x00) ..00....
757 * COMJ[3] "Auto banding filter"
758 * = 0 (0x00) ....0... "Banding filter is always
759 * on off depending on
761 * COMJ[2] "VSYNC drop option"
762 * = 1 (0x01) .....1.. "SYNC is dropped if frame
764 * COMJ[1] "Frame data drop"
765 * = 1 (0x01) ......1. "Drop frame data if
766 * exposure is not within
767 * tolerance. In AEC mode,
768 * data is normally dropped
769 * when data is out of
772 * = 0 (0x00) .......0
777 * 15 COMK "Common Control K"
778 * = 2 (0x02) 00000010
779 * COMK[7] "CHSYNC pin output swap"
780 * = 0 (0x00) 0....... "CHSYNC"
781 * COMK[6] "HREF pin output swap"
782 * = 0 (0x00) .0...... "HREF"
783 * COMK[5] "PCLK output selection"
784 * = 0 (0x00) ..0..... "PCLK always output"
785 * COMK[4] "PCLK edge selection"
786 * = 0 (0x00) ...0.... "Data valid on falling edge"
787 * COMK[3] "HREF output polarity"
788 * = 0 (0x00) ....0... "positive"
790 * = 0 (0x00) .....0..
791 * COMK[1] "VSYNC polarity"
792 * = 1 (0x01) ......1. "negative"
793 * COMK[0] "HSYNC polarity"
794 * = 0 (0x00) .......0 "positive"
799 * 33 CHLF "Current Control"
800 * = 9 (0x09) 00001001
801 * CHLF[7:6] "Sensor current control"
802 * = 0 (0x00) 00......
803 * CHLF[5] "Sensor current range control"
804 * = 0 (0x00) ..0..... "normal range"
805 * CHLF[4] "Sensor current"
806 * = 0 (0x00) ...0.... "normal current"
807 * CHLF[3] "Sensor buffer current control"
808 * = 1 (0x01) ....1... "half current"
809 * CHLF[2] "Column buffer current control"
810 * = 0 (0x00) .....0.. "normal current"
811 * CHLF[1] "Analog DSP current control"
812 * = 0 (0x00) ......0. "normal current"
813 * CHLF[1] "ADC current control"
814 * = 0 (0x00) ......0. "normal current"
819 * 34 VBLM "Blooming Control"
820 * = 80 (0x50) 01010000
821 * VBLM[7] "Hard soft reset switch"
822 * = 0 (0x00) 0....... "Hard reset"
823 * VBLM[6:4] "Blooming voltage selection"
824 * = 5 (0x05) .101....
825 * VBLM[3:0] "Sensor current control"
826 * = 0 (0x00) ....0000
831 * 36 VCHG "Sensor Precharge Voltage Control"
832 * = 0 (0x00) 00000000
834 * = 0 (0x00) 0.......
835 * VCHG[6:4] "Sensor precharge voltage control"
836 * = 0 (0x00) .000....
837 * VCHG[3:0] "Sensor array common reference"
838 * = 0 (0x00) ....0000
843 * 37 ADC "ADC Reference Control"
844 * = 4 (0x04) 00000100
845 * ADC[7:4] "Reserved"
846 * = 0 (0x00) 0000....
847 * ADC[3] "ADC input signal range"
848 * = 0 (0x00) ....0... "Input signal 1.0x"
849 * ADC[2:0] "ADC range control"
850 * = 4 (0x04) .....100
855 * 38 ACOM "Analog Common Ground"
856 * = 82 (0x52) 01010010
857 * ACOM[7] "Analog gain control"
858 * = 0 (0x00) 0....... "Gain 1x"
859 * ACOM[6] "Analog black level calibration"
860 * = 1 (0x01) .1...... "On"
861 * ACOM[5:0] "Reserved"
862 * = 18 (0x12) ..010010
867 * 3A FREFA "Internal Reference Adjustment"
868 * = 0 (0x00) 00000000
870 * = 0 (0x00) 00000000
875 * 3C FVOPT "Internal Reference Adjustment"
876 * = 31 (0x1F) 00011111
878 * = 31 (0x1F) 00011111
883 * 44 Undocumented = 0 (0x00) 00000000
884 * 44[7:0] "It's a secret"
885 * = 0 (0x00) 00000000
890 * 40 Undocumented = 0 (0x00) 00000000
891 * 40[7:0] "It's a secret"
892 * = 0 (0x00) 00000000
897 * 41 Undocumented = 0 (0x00) 00000000
898 * 41[7:0] "It's a secret"
899 * = 0 (0x00) 00000000
904 * 42 Undocumented = 0 (0x00) 00000000
905 * 42[7:0] "It's a secret"
906 * = 0 (0x00) 00000000
911 * 43 Undocumented = 0 (0x00) 00000000
912 * 43[7:0] "It's a secret"
913 * = 0 (0x00) 00000000
918 * 45 Undocumented = 128 (0x80) 10000000
919 * 45[7:0] "It's a secret"
920 * = 128 (0x80) 10000000
925 * 48 Undocumented = 192 (0xC0) 11000000
926 * 48[7:0] "It's a secret"
927 * = 192 (0xC0) 11000000
932 * 49 Undocumented = 25 (0x19) 00011001
933 * 49[7:0] "It's a secret"
934 * = 25 (0x19) 00011001
939 * 4B Undocumented = 128 (0x80) 10000000
940 * 4B[7:0] "It's a secret"
941 * = 128 (0x80) 10000000
946 * 4D Undocumented = 196 (0xC4) 11000100
947 * 4D[7:0] "It's a secret"
948 * = 196 (0xC4) 11000100
953 * 35 VREF "Reference Voltage Control"
954 * = 76 (0x4C) 01001100
955 * VREF[7:5] "Column high reference control"
956 * = 2 (0x02) 010..... "higher voltage"
957 * VREF[4:2] "Column low reference control"
958 * = 3 (0x03) ...011.. "Highest voltage"
959 * VREF[1:0] "Reserved"
960 * = 0 (0x00) ......00
965 * 3D Undocumented = 0 (0x00) 00000000
966 * 3D[7:0] "It's a secret"
967 * = 0 (0x00) 00000000
972 * 3E Undocumented = 0 (0x00) 00000000
973 * 3E[7:0] "It's a secret"
974 * = 0 (0x00) 00000000
979 * 3B FREFB "Internal Reference Adjustment"
980 * = 24 (0x18) 00011000
982 * = 24 (0x18) 00011000
987 * 33 CHLF "Current Control"
988 * = 25 (0x19) 00011001
989 * CHLF[7:6] "Sensor current control"
990 * = 0 (0x00) 00......
991 * CHLF[5] "Sensor current range control"
992 * = 0 (0x00) ..0..... "normal range"
993 * CHLF[4] "Sensor current"
994 * = 1 (0x01) ...1.... "double current"
995 * CHLF[3] "Sensor buffer current control"
996 * = 1 (0x01) ....1... "half current"
997 * CHLF[2] "Column buffer current control"
998 * = 0 (0x00) .....0.. "normal current"
999 * CHLF[1] "Analog DSP current control"
1000 * = 0 (0x00) ......0. "normal current"
1001 * CHLF[1] "ADC current control"
1002 * = 0 (0x00) ......0. "normal current"
1007 * 34 VBLM "Blooming Control"
1008 * = 90 (0x5A) 01011010
1009 * VBLM[7] "Hard soft reset switch"
1010 * = 0 (0x00) 0....... "Hard reset"
1011 * VBLM[6:4] "Blooming voltage selection"
1012 * = 5 (0x05) .101....
1013 * VBLM[3:0] "Sensor current control"
1014 * = 10 (0x0A) ....1010
1019 * 3B FREFB "Internal Reference Adjustment"
1020 * = 0 (0x00) 00000000
1021 * FREFB[7:0] "Range"
1022 * = 0 (0x00) 00000000
1027 * 33 CHLF "Current Control"
1028 * = 9 (0x09) 00001001
1029 * CHLF[7:6] "Sensor current control"
1030 * = 0 (0x00) 00......
1031 * CHLF[5] "Sensor current range control"
1032 * = 0 (0x00) ..0..... "normal range"
1033 * CHLF[4] "Sensor current"
1034 * = 0 (0x00) ...0.... "normal current"
1035 * CHLF[3] "Sensor buffer current control"
1036 * = 1 (0x01) ....1... "half current"
1037 * CHLF[2] "Column buffer current control"
1038 * = 0 (0x00) .....0.. "normal current"
1039 * CHLF[1] "Analog DSP current control"
1040 * = 0 (0x00) ......0. "normal current"
1041 * CHLF[1] "ADC current control"
1042 * = 0 (0x00) ......0. "normal current"
1047 * 34 VBLM "Blooming Control"
1048 * = 80 (0x50) 01010000
1049 * VBLM[7] "Hard soft reset switch"
1050 * = 0 (0x00) 0....... "Hard reset"
1051 * VBLM[6:4] "Blooming voltage selection"
1052 * = 5 (0x05) .101....
1053 * VBLM[3:0] "Sensor current control"
1054 * = 0 (0x00) ....0000
1059 * 12 COMH "Common Control H"
1060 * = 64 (0x40) 01000000
1062 * = 0 (0x00) 0....... "No-op"
1063 * COMH[6:4] "Resolution selection"
1064 * = 4 (0x04) .100.... "XGA"
1065 * COMH[3] "Master slave selection"
1066 * = 0 (0x00) ....0... "Master mode"
1067 * COMH[2] "Internal B/R channel option"
1068 * = 0 (0x00) .....0.. "B/R use same channel"
1069 * COMH[1] "Color bar test pattern"
1070 * = 0 (0x00) ......0. "Off"
1071 * COMH[0] "Reserved"
1072 * = 0 (0x00) .......0
1077 * 17 HREFST "Horizontal window start"
1078 * = 31 (0x1F) 00011111
1079 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1080 * = 31 (0x1F) 00011111
1085 * 18 HREFEND "Horizontal window end"
1086 * = 95 (0x5F) 01011111
1087 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1088 * = 95 (0x5F) 01011111
1093 * 19 VSTRT "Vertical window start"
1094 * = 0 (0x00) 00000000
1095 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1096 * = 0 (0x00) 00000000
1101 * 1A VEND "Vertical window end"
1102 * = 96 (0x60) 01100000
1103 * VEND[7:0] "Vertical Window End, 8 MSBs"
1104 * = 96 (0x60) 01100000
1109 * 32 COMM "Common Control M"
1110 * = 18 (0x12) 00010010
1111 * COMM[7:6] "Pixel clock divide option"
1112 * = 0 (0x00) 00...... "/1"
1113 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1114 * = 2 (0x02) ..010...
1115 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1116 * = 2 (0x02) .....010
1121 * 03 COMA "Common Control A"
1122 * = 74 (0x4A) 01001010
1123 * COMA[7:4] "AWB Update Threshold"
1124 * = 4 (0x04) 0100....
1125 * COMA[3:2] "Vertical window end line control 2 LSBs"
1126 * = 2 (0x02) ....10..
1127 * COMA[1:0] "Vertical window start line control 2 LSBs"
1128 * = 2 (0x02) ......10
1133 * 11 CLKRC "Clock Rate Control"
1134 * = 128 (0x80) 10000000
1135 * CLKRC[7] "Internal frequency doublers on off seclection"
1136 * = 1 (0x01) 1....... "On"
1137 * CLKRC[6] "Digital video master slave selection"
1138 * = 0 (0x00) .0...... "Master mode, sensor
1140 * CLKRC[5:0] "Clock divider { CLK = PCLK/(1+CLKRC[5:0]) }"
1141 * = 0 (0x00) ..000000
1146 * 12 COMH "Common Control H"
1147 * = 0 (0x00) 00000000
1149 * = 0 (0x00) 0....... "No-op"
1150 * COMH[6:4] "Resolution selection"
1151 * = 0 (0x00) .000.... "QXGA"
1152 * COMH[3] "Master slave selection"
1153 * = 0 (0x00) ....0... "Master mode"
1154 * COMH[2] "Internal B/R channel option"
1155 * = 0 (0x00) .....0.. "B/R use same channel"
1156 * COMH[1] "Color bar test pattern"
1157 * = 0 (0x00) ......0. "Off"
1158 * COMH[0] "Reserved"
1159 * = 0 (0x00) .......0
1164 * 12 COMH "Common Control H"
1165 * = 64 (0x40) 01000000
1167 * = 0 (0x00) 0....... "No-op"
1168 * COMH[6:4] "Resolution selection"
1169 * = 4 (0x04) .100.... "XGA"
1170 * COMH[3] "Master slave selection"
1171 * = 0 (0x00) ....0... "Master mode"
1172 * COMH[2] "Internal B/R channel option"
1173 * = 0 (0x00) .....0.. "B/R use same channel"
1174 * COMH[1] "Color bar test pattern"
1175 * = 0 (0x00) ......0. "Off"
1176 * COMH[0] "Reserved"
1177 * = 0 (0x00) .......0
1182 * 17 HREFST "Horizontal window start"
1183 * = 31 (0x1F) 00011111
1184 * HREFST[7:0] "Horizontal window start, 8 MSBs"
1185 * = 31 (0x1F) 00011111
1190 * 18 HREFEND "Horizontal window end"
1191 * = 95 (0x5F) 01011111
1192 * HREFEND[7:0] "Horizontal Window End, 8 MSBs"
1193 * = 95 (0x5F) 01011111
1198 * 19 VSTRT "Vertical window start"
1199 * = 0 (0x00) 00000000
1200 * VSTRT[7:0] "Vertical Window Start, 8 MSBs"
1201 * = 0 (0x00) 00000000
1206 * 1A VEND "Vertical window end"
1207 * = 96 (0x60) 01100000
1208 * VEND[7:0] "Vertical Window End, 8 MSBs"
1209 * = 96 (0x60) 01100000
1214 * 32 COMM "Common Control M"
1215 * = 18 (0x12) 00010010
1216 * COMM[7:6] "Pixel clock divide option"
1217 * = 0 (0x00) 00...... "/1"
1218 * COMM[5:3] "Horizontal window end position, 3 LSBs"
1219 * = 2 (0x02) ..010...
1220 * COMM[2:0] "Horizontal window start position, 3 LSBs"
1221 * = 2 (0x02) .....010
1226 * 03 COMA "Common Control A"
1227 * = 74 (0x4A) 01001010
1228 * COMA[7:4] "AWB Update Threshold"
1229 * = 4 (0x04) 0100....
1230 * COMA[3:2] "Vertical window end line control 2 LSBs"
1231 * = 2 (0x02) ....10..
1232 * COMA[1:0] "Vertical window start line control 2 LSBs"
1233 * = 2 (0x02) ......10
1238 * 02 RED "Red Gain Control"
1239 * = 175 (0xAF) 10101111
1241 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1243 * = 47 (0x2F) .0101111
1248 * 2D ADDVSL "VSYNC Pulse Width"
1249 * = 210 (0xD2) 11010010
1250 * ADDVSL[7:0] "VSYNC pulse width, LSB"
1251 * = 210 (0xD2) 11010010
1256 * 00 GAIN = 24 (0x18) 00011000
1257 * GAIN[7:6] "Reserved"
1258 * = 0 (0x00) 00......
1260 * = 0 (0x00) ..0..... "False"
1262 * = 1 (0x01) ...1.... "True"
1264 * = 8 (0x08) ....1000
1269 * 01 BLUE "Blue Gain Control"
1270 * = 240 (0xF0) 11110000
1272 * = 1 (0x01) 1....... "gain = 1/(1+bitrev([6:0]))"
1274 * = 112 (0x70) .1110000
1279 * 10 AEC "Automatic Exposure Control"
1280 * = 10 (0x0A) 00001010
1281 * AEC[7:0] "Automatic Exposure Control, 8 MSBs"
1282 * = 10 (0x0A) 00001010
1294 static const struct ov_i2c_regvals norm_6x20[] = {
1295 { 0x12, 0x80 }, /* reset */
1298 { 0x05, 0x7f }, /* For when autoadjust is off */
1300 /* The ratio of 0x0c and 0x0d controls the white point */
1303 { 0x0f, 0x15 }, /* COMS */
1304 { 0x10, 0x75 }, /* AEC Exposure time */
1305 { 0x12, 0x24 }, /* Enable AGC */
1307 /* 0x16: 0x06 helps frame stability with moving objects */
1309 /* { 0x20, 0x30 }, * Aperture correction enable */
1310 { 0x26, 0xb2 }, /* BLC enable */
1311 /* 0x28: 0x05 Selects RGB format if RGB on */
1313 { 0x2a, 0x04 }, /* Disable framerate adjust */
1314 /* { 0x2b, 0xac }, * Framerate; Set 2a[7] first */
1316 { 0x33, 0xa0 }, /* Color Processing Parameter */
1317 { 0x34, 0xd2 }, /* Max A/D range */
1321 { 0x3c, 0x39 }, /* Enable AEC mode changing */
1322 { 0x3c, 0x3c }, /* Change AEC mode */
1323 { 0x3c, 0x24 }, /* Disable AEC mode changing */
1326 /* These next two registers (0x4a, 0x4b) are undocumented.
1327 * They control the color balance */
1330 { 0x4d, 0xd2 }, /* This reduces noise a bit */
1333 /* Do 50-53 have any effect? */
1334 /* Toggle 0x12[2] off and on here? */
1337 static const struct ov_i2c_regvals norm_6x30[] = {
1338 { 0x12, 0x80 }, /* Reset */
1339 { 0x00, 0x1f }, /* Gain */
1340 { 0x01, 0x99 }, /* Blue gain */
1341 { 0x02, 0x7c }, /* Red gain */
1342 { 0x03, 0xc0 }, /* Saturation */
1343 { 0x05, 0x0a }, /* Contrast */
1344 { 0x06, 0x95 }, /* Brightness */
1345 { 0x07, 0x2d }, /* Sharpness */
1348 { 0x0e, 0xa0 }, /* Was 0x20, bit7 enables a 2x gain which we need */
1351 { 0x11, 0x00 }, /* Pixel clock = fastest */
1352 { 0x12, 0x24 }, /* Enable AGC and AWB */
1367 { 0x23, 0xc0 }, /* Crystal circuit power level */
1368 { 0x25, 0x9a }, /* Increase AEC black ratio */
1369 { 0x26, 0xb2 }, /* BLC enable */
1373 { 0x2a, 0x84 }, /* 60 Hz power */
1374 { 0x2b, 0xa8 }, /* 60 Hz power */
1376 { 0x2d, 0x95 }, /* Enable auto-brightness */
1390 { 0x40, 0x00 }, /* White bal */
1391 { 0x41, 0x00 }, /* White bal */
1393 { 0x43, 0x3f }, /* White bal */
1403 { 0x4d, 0x10 }, /* U = 0.563u, V = 0.714v */
1405 { 0x4f, 0x07 }, /* UV avg., col. killer: max */
1407 { 0x54, 0x23 }, /* Max AGC gain: 18dB */
1412 { 0x59, 0x01 }, /* AGC dark current comp.: +1 */
1414 { 0x5b, 0x0f }, /* AWB chrominance levels */
1418 { 0x12, 0x20 }, /* Toggle AWB */
1422 /* Lawrence Glaister <lg@jfm.bc.ca> reports:
1424 * Register 0x0f in the 7610 has the following effects:
1426 * 0x85 (AEC method 1): Best overall, good contrast range
1427 * 0x45 (AEC method 2): Very overexposed
1428 * 0xa5 (spec sheet default): Ok, but the black level is
1429 * shifted resulting in loss of contrast
1430 * 0x05 (old driver setting): very overexposed, too much
1433 static const struct ov_i2c_regvals norm_7610[] = {
1440 { 0x28, 0x24 }, /* 0c */
1441 { 0x0f, 0x85 }, /* lg's setting */
1463 static const struct ov_i2c_regvals norm_7620[] = {
1464 { 0x12, 0x80 }, /* reset */
1465 { 0x00, 0x00 }, /* gain */
1466 { 0x01, 0x80 }, /* blue gain */
1467 { 0x02, 0x80 }, /* red gain */
1468 { 0x03, 0xc0 }, /* OV7670_REG_VREF */
1491 { 0x28, 0x22 }, /* Was 0x20, bit1 enables a 2x gain which we need */
1530 /* 7640 and 7648. The defaults should be OK for most registers. */
1531 static const struct ov_i2c_regvals norm_7640[] = {
1536 /* 7670. Defaults taken from OmniVision provided data,
1537 * as provided by Jonathan Corbet of OLPC */
1538 static const struct ov_i2c_regvals norm_7670[] = {
1539 { OV7670_REG_COM7, OV7670_COM7_RESET },
1540 { OV7670_REG_TSLB, 0x04 }, /* OV */
1541 { OV7670_REG_COM7, OV7670_COM7_FMT_VGA }, /* VGA */
1542 { OV7670_REG_CLKRC, 0x01 },
1544 * Set the hardware window. These values from OV don't entirely
1545 * make sense - hstop is less than hstart. But they work...
1547 { OV7670_REG_HSTART, 0x13 },
1548 { OV7670_REG_HSTOP, 0x01 },
1549 { OV7670_REG_HREF, 0xb6 },
1550 { OV7670_REG_VSTART, 0x02 },
1551 { OV7670_REG_VSTOP, 0x7a },
1552 { OV7670_REG_VREF, 0x0a },
1554 { OV7670_REG_COM3, 0x00 },
1555 { OV7670_REG_COM14, 0x00 },
1556 /* Mystery scaling numbers */
1562 /* { OV7670_REG_COM10, 0x0 }, */
1564 /* Gamma curve values */
1582 /* AGC and AEC parameters. Note we start by disabling those features,
1583 then turn them only after tweaking the values. */
1584 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1585 | OV7670_COM8_AECSTEP
1586 | OV7670_COM8_BFILT },
1587 { OV7670_REG_GAIN, 0x00 },
1588 { OV7670_REG_AECH, 0x00 },
1589 { OV7670_REG_COM4, 0x40 }, /* magic reserved bit */
1590 { OV7670_REG_COM9, 0x18 }, /* 4x gain + magic rsvd bit */
1591 { OV7670_REG_BD50MAX, 0x05 },
1592 { OV7670_REG_BD60MAX, 0x07 },
1593 { OV7670_REG_AEW, 0x95 },
1594 { OV7670_REG_AEB, 0x33 },
1595 { OV7670_REG_VPT, 0xe3 },
1596 { OV7670_REG_HAECC1, 0x78 },
1597 { OV7670_REG_HAECC2, 0x68 },
1598 { 0xa1, 0x03 }, /* magic */
1599 { OV7670_REG_HAECC3, 0xd8 },
1600 { OV7670_REG_HAECC4, 0xd8 },
1601 { OV7670_REG_HAECC5, 0xf0 },
1602 { OV7670_REG_HAECC6, 0x90 },
1603 { OV7670_REG_HAECC7, 0x94 },
1604 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1605 | OV7670_COM8_AECSTEP
1608 | OV7670_COM8_AEC },
1610 /* Almost all of these are magic "reserved" values. */
1611 { OV7670_REG_COM5, 0x61 },
1612 { OV7670_REG_COM6, 0x4b },
1614 { OV7670_REG_MVFP, 0x07 },
1623 { OV7670_REG_COM12, 0x78 },
1626 { OV7670_REG_GFIX, 0x00 },
1642 /* More reserved magic, some of which tweaks white balance */
1659 /* "9e for advance AWB" */
1661 { OV7670_REG_BLUE, 0x40 },
1662 { OV7670_REG_RED, 0x60 },
1663 { OV7670_REG_COM8, OV7670_COM8_FASTAEC
1664 | OV7670_COM8_AECSTEP
1668 | OV7670_COM8_AWB },
1670 /* Matrix coefficients */
1679 { OV7670_REG_COM16, OV7670_COM16_AWBGAIN },
1680 { OV7670_REG_EDGE, 0x00 },
1685 { OV7670_REG_COM13, OV7670_COM13_GAMMA
1686 | OV7670_COM13_UVSAT
1690 { OV7670_REG_COM16, 0x38 },
1694 { OV7670_REG_COM11, OV7670_COM11_EXP|OV7670_COM11_HZAUTO },
1707 /* Extra-weird stuff. Some sort of multiplexor register */
1733 static const struct ov_i2c_regvals norm_8610[] = {
1740 { 0x05, 0x30 }, /* was 0x10, new from windrv 090403 */
1741 { 0x06, 0x70 }, /* was 0x80, new from windrv 090403 */
1750 { 0x15, 0x01 }, /* Lin and Win think different about UV order */
1752 { 0x17, 0x38 }, /* was 0x2f, new from windrv 090403 */
1753 { 0x18, 0xea }, /* was 0xcf, new from windrv 090403 */
1754 { 0x19, 0x02 }, /* was 0x06, new from windrv 090403 */
1757 { 0x20, 0xd0 }, /* was 0x90, new from windrv 090403 */
1758 { 0x23, 0xc0 }, /* was 0x00, new from windrv 090403 */
1759 { 0x24, 0x30 }, /* was 0x1d, new from windrv 090403 */
1760 { 0x25, 0x50 }, /* was 0x57, new from windrv 090403 */
1766 { 0x2b, 0xc8 }, /* was 0xcc, new from windrv 090403 */
1768 { 0x2d, 0x45 }, /* was 0xd5, new from windrv 090403 */
1770 { 0x2f, 0x14 }, /* was 0x01, new from windrv 090403 */
1772 { 0x4d, 0x30 }, /* was 0x10, new from windrv 090403 */
1773 { 0x60, 0x02 }, /* was 0x01, new from windrv 090403 */
1774 { 0x61, 0x00 }, /* was 0x09, new from windrv 090403 */
1775 { 0x62, 0x5f }, /* was 0xd7, new from windrv 090403 */
1777 { 0x64, 0x53 }, /* new windrv 090403 says 0x57,
1778 * maybe thats wrong */
1782 { 0x68, 0xc0 }, /* was 0xaf, new from windrv 090403 */
1786 { 0x6c, 0x99 }, /* was 0x80, old windrv says 0x00, but
1787 * deleting bit7 colors the first images red */
1788 { 0x6d, 0x11 }, /* was 0x00, new from windrv 090403 */
1789 { 0x6e, 0x11 }, /* was 0x00, new from windrv 090403 */
1795 { 0x74, 0x00 },/* 0x60? - was 0x00, new from windrv 090403 */
1797 { 0x76, 0x02 }, /* was 0x02, new from windrv 090403 */
1802 { 0x7b, 0x10 }, /* was 0x13, new from windrv 090403 */
1804 { 0x7d, 0x08 }, /* was 0x09, new from windrv 090403 */
1805 { 0x7e, 0x08 }, /* was 0xc0, new from windrv 090403 */
1812 { 0x85, 0x62 }, /* was 0x61, new from windrv 090403 */
1818 { 0x12, 0x25 }, /* was 0x24, new from windrv 090403 */
1821 static unsigned char ov7670_abs_to_sm(unsigned char v)
1825 return (128 - v) | 0x80;
1828 /* Write a OV519 register */
1829 static int reg_w(struct sd *sd, u16 index, u16 value)
1833 switch (sd->bridge) {
1835 case BRIDGE_OV511PLUS:
1841 case BRIDGE_W9968CF:
1842 ret = usb_control_msg(sd->gspca_dev.dev,
1843 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1845 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1846 value, index, NULL, 0, 500);
1852 sd->gspca_dev.usb_buf[0] = value;
1853 ret = usb_control_msg(sd->gspca_dev.dev,
1854 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1856 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1858 sd->gspca_dev.usb_buf, 1, 500);
1861 err("Write reg 0x%04x -> [0x%02x] failed",
1866 PDEBUG(D_USBO, "Write reg 0x%04x -> [0x%02x]", value, index);
1870 /* Read from a OV519 register, note not valid for the w9968cf!! */
1871 /* returns: negative is error, pos or zero is data */
1872 static int reg_r(struct sd *sd, u16 index)
1877 switch (sd->bridge) {
1879 case BRIDGE_OV511PLUS:
1889 ret = usb_control_msg(sd->gspca_dev.dev,
1890 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1892 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1893 0, index, sd->gspca_dev.usb_buf, 1, 500);
1896 ret = sd->gspca_dev.usb_buf[0];
1897 PDEBUG(D_USBI, "Read reg [0x%02X] -> 0x%04X", index, ret);
1899 err("Read reg [0x%02x] failed", index);
1904 /* Read 8 values from a OV519 register */
1905 static int reg_r8(struct sd *sd,
1910 ret = usb_control_msg(sd->gspca_dev.dev,
1911 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
1913 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1914 0, index, sd->gspca_dev.usb_buf, 8, 500);
1917 ret = sd->gspca_dev.usb_buf[0];
1919 err("Read reg 8 [0x%02x] failed", index);
1925 * Writes bits at positions specified by mask to an OV51x reg. Bits that are in
1926 * the same position as 1's in "mask" are cleared and set to "value". Bits
1927 * that are in the same position as 0's in "mask" are preserved, regardless
1928 * of their respective state in "value".
1930 static int reg_w_mask(struct sd *sd,
1939 value &= mask; /* Enforce mask on value */
1940 ret = reg_r(sd, index);
1944 oldval = ret & ~mask; /* Clear the masked bits */
1945 value |= oldval; /* Set the desired bits */
1947 return reg_w(sd, index, value);
1951 * Writes multiple (n) byte value to a single register. Only valid with certain
1952 * registers (0x30 and 0xc4 - 0xce).
1954 static int ov518_reg_w32(struct sd *sd, u16 index, u32 value, int n)
1958 *((__le32 *) sd->gspca_dev.usb_buf) = __cpu_to_le32(value);
1960 ret = usb_control_msg(sd->gspca_dev.dev,
1961 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
1963 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
1965 sd->gspca_dev.usb_buf, n, 500);
1967 err("Write reg32 [%02x] %08x failed", index, value);
1974 static int ov511_i2c_w(struct sd *sd, u8 reg, u8 value)
1978 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
1980 /* Three byte write cycle */
1981 for (retries = 6; ; ) {
1982 /* Select camera register */
1983 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
1987 /* Write "value" to I2C data port of OV511 */
1988 rc = reg_w(sd, R51x_I2C_DATA, value);
1992 /* Initiate 3-byte write cycle */
1993 rc = reg_w(sd, R511_I2C_CTL, 0x01);
1998 rc = reg_r(sd, R511_I2C_CTL);
1999 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2004 if ((rc & 2) == 0) /* Ack? */
2006 if (--retries < 0) {
2007 PDEBUG(D_USBO, "i2c write retries exhausted");
2015 static int ov511_i2c_r(struct sd *sd, u8 reg)
2017 int rc, value, retries;
2019 /* Two byte write cycle */
2020 for (retries = 6; ; ) {
2021 /* Select camera register */
2022 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2026 /* Initiate 2-byte write cycle */
2027 rc = reg_w(sd, R511_I2C_CTL, 0x03);
2032 rc = reg_r(sd, R511_I2C_CTL);
2033 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2038 if ((rc & 2) == 0) /* Ack? */
2042 reg_w(sd, R511_I2C_CTL, 0x10);
2044 if (--retries < 0) {
2045 PDEBUG(D_USBI, "i2c write retries exhausted");
2050 /* Two byte read cycle */
2051 for (retries = 6; ; ) {
2052 /* Initiate 2-byte read cycle */
2053 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2058 rc = reg_r(sd, R511_I2C_CTL);
2059 } while (rc > 0 && ((rc & 1) == 0)); /* Retry until idle */
2064 if ((rc & 2) == 0) /* Ack? */
2068 rc = reg_w(sd, R511_I2C_CTL, 0x10);
2072 if (--retries < 0) {
2073 PDEBUG(D_USBI, "i2c read retries exhausted");
2078 value = reg_r(sd, R51x_I2C_DATA);
2080 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2082 /* This is needed to make i2c_w() work */
2083 rc = reg_w(sd, R511_I2C_CTL, 0x05);
2091 * The OV518 I2C I/O procedure is different, hence, this function.
2092 * This is normally only called from i2c_w(). Note that this function
2093 * always succeeds regardless of whether the sensor is present and working.
2095 static int ov518_i2c_w(struct sd *sd,
2101 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2103 /* Select camera register */
2104 rc = reg_w(sd, R51x_I2C_SADDR_3, reg);
2108 /* Write "value" to I2C data port of OV511 */
2109 rc = reg_w(sd, R51x_I2C_DATA, value);
2113 /* Initiate 3-byte write cycle */
2114 rc = reg_w(sd, R518_I2C_CTL, 0x01);
2118 /* wait for write complete */
2120 return reg_r8(sd, R518_I2C_CTL);
2124 * returns: negative is error, pos or zero is data
2126 * The OV518 I2C I/O procedure is different, hence, this function.
2127 * This is normally only called from i2c_r(). Note that this function
2128 * always succeeds regardless of whether the sensor is present and working.
2130 static int ov518_i2c_r(struct sd *sd, u8 reg)
2134 /* Select camera register */
2135 rc = reg_w(sd, R51x_I2C_SADDR_2, reg);
2139 /* Initiate 2-byte write cycle */
2140 rc = reg_w(sd, R518_I2C_CTL, 0x03);
2144 /* Initiate 2-byte read cycle */
2145 rc = reg_w(sd, R518_I2C_CTL, 0x05);
2148 value = reg_r(sd, R51x_I2C_DATA);
2149 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, value);
2153 static int ovfx2_i2c_w(struct sd *sd, u8 reg, u8 value)
2157 ret = usb_control_msg(sd->gspca_dev.dev,
2158 usb_sndctrlpipe(sd->gspca_dev.dev, 0),
2160 USB_DIR_OUT | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2161 (u16) value, (u16) reg, NULL, 0, 500);
2164 err("i2c 0x%02x -> [0x%02x] failed", value, reg);
2168 PDEBUG(D_USBO, "i2c 0x%02x -> [0x%02x]", value, reg);
2172 static int ovfx2_i2c_r(struct sd *sd, u8 reg)
2176 ret = usb_control_msg(sd->gspca_dev.dev,
2177 usb_rcvctrlpipe(sd->gspca_dev.dev, 0),
2179 USB_DIR_IN | USB_TYPE_VENDOR | USB_RECIP_DEVICE,
2180 0, (u16) reg, sd->gspca_dev.usb_buf, 1, 500);
2183 ret = sd->gspca_dev.usb_buf[0];
2184 PDEBUG(D_USBI, "i2c [0x%02X] -> 0x%02X", reg, ret);
2186 err("i2c read [0x%02x] failed", reg);
2191 static int i2c_w(struct sd *sd, u8 reg, u8 value)
2195 if (sd->sensor_reg_cache[reg] == value)
2198 switch (sd->bridge) {
2200 case BRIDGE_OV511PLUS:
2201 ret = ov511_i2c_w(sd, reg, value);
2204 case BRIDGE_OV518PLUS:
2206 ret = ov518_i2c_w(sd, reg, value);
2209 ret = ovfx2_i2c_w(sd, reg, value);
2211 case BRIDGE_W9968CF:
2212 ret = w9968cf_i2c_w(sd, reg, value);
2217 /* Up on sensor reset empty the register cache */
2218 if (reg == 0x12 && (value & 0x80))
2219 memset(sd->sensor_reg_cache, -1,
2220 sizeof(sd->sensor_reg_cache));
2222 sd->sensor_reg_cache[reg] = value;
2228 static int i2c_r(struct sd *sd, u8 reg)
2232 if (sd->sensor_reg_cache[reg] != -1)
2233 return sd->sensor_reg_cache[reg];
2235 switch (sd->bridge) {
2237 case BRIDGE_OV511PLUS:
2238 ret = ov511_i2c_r(sd, reg);
2241 case BRIDGE_OV518PLUS:
2243 ret = ov518_i2c_r(sd, reg);
2246 ret = ovfx2_i2c_r(sd, reg);
2248 case BRIDGE_W9968CF:
2249 ret = w9968cf_i2c_r(sd, reg);
2254 sd->sensor_reg_cache[reg] = ret;
2259 /* Writes bits at positions specified by mask to an I2C reg. Bits that are in
2260 * the same position as 1's in "mask" are cleared and set to "value". Bits
2261 * that are in the same position as 0's in "mask" are preserved, regardless
2262 * of their respective state in "value".
2264 static int i2c_w_mask(struct sd *sd,
2272 value &= mask; /* Enforce mask on value */
2273 rc = i2c_r(sd, reg);
2276 oldval = rc & ~mask; /* Clear the masked bits */
2277 value |= oldval; /* Set the desired bits */
2278 return i2c_w(sd, reg, value);
2281 /* Temporarily stops OV511 from functioning. Must do this before changing
2282 * registers while the camera is streaming */
2283 static inline int ov51x_stop(struct sd *sd)
2285 PDEBUG(D_STREAM, "stopping");
2287 switch (sd->bridge) {
2289 case BRIDGE_OV511PLUS:
2290 return reg_w(sd, R51x_SYS_RESET, 0x3d);
2292 case BRIDGE_OV518PLUS:
2293 return reg_w_mask(sd, R51x_SYS_RESET, 0x3a, 0x3a);
2295 return reg_w(sd, OV519_SYS_RESET1, 0x0f);
2297 return reg_w_mask(sd, 0x0f, 0x00, 0x02);
2298 case BRIDGE_W9968CF:
2299 return reg_w(sd, 0x3c, 0x0a05); /* stop USB transfer */
2305 /* Restarts OV511 after ov511_stop() is called. Has no effect if it is not
2306 * actually stopped (for performance). */
2307 static inline int ov51x_restart(struct sd *sd)
2311 PDEBUG(D_STREAM, "restarting");
2316 /* Reinitialize the stream */
2317 switch (sd->bridge) {
2319 case BRIDGE_OV511PLUS:
2320 return reg_w(sd, R51x_SYS_RESET, 0x00);
2322 case BRIDGE_OV518PLUS:
2323 rc = reg_w(sd, 0x2f, 0x80);
2326 return reg_w(sd, R51x_SYS_RESET, 0x00);
2328 return reg_w(sd, OV519_SYS_RESET1, 0x00);
2330 return reg_w_mask(sd, 0x0f, 0x02, 0x02);
2331 case BRIDGE_W9968CF:
2332 return reg_w(sd, 0x3c, 0x8a05); /* USB FIFO enable */
2338 static int ov51x_set_slave_ids(struct sd *sd, u8 slave);
2340 /* This does an initial reset of an OmniVision sensor and ensures that I2C
2341 * is synchronized. Returns <0 on failure.
2343 static int init_ov_sensor(struct sd *sd, u8 slave)
2347 if (ov51x_set_slave_ids(sd, slave) < 0)
2350 /* Reset the sensor */
2351 if (i2c_w(sd, 0x12, 0x80) < 0)
2354 /* Wait for it to initialize */
2357 for (i = 0; i < i2c_detect_tries; i++) {
2358 if (i2c_r(sd, OV7610_REG_ID_HIGH) == 0x7f &&
2359 i2c_r(sd, OV7610_REG_ID_LOW) == 0xa2) {
2360 PDEBUG(D_PROBE, "I2C synced in %d attempt(s)", i);
2364 /* Reset the sensor */
2365 if (i2c_w(sd, 0x12, 0x80) < 0)
2367 /* Wait for it to initialize */
2369 /* Dummy read to sync I2C */
2370 if (i2c_r(sd, 0x00) < 0)
2376 /* Set the read and write slave IDs. The "slave" argument is the write slave,
2377 * and the read slave will be set to (slave + 1).
2378 * This should not be called from outside the i2c I/O functions.
2379 * Sets I2C read and write slave IDs. Returns <0 for error
2381 static int ov51x_set_slave_ids(struct sd *sd,
2386 switch (sd->bridge) {
2388 return reg_w(sd, OVFX2_I2C_ADDR, slave);
2389 case BRIDGE_W9968CF:
2390 sd->sensor_addr = slave;
2394 rc = reg_w(sd, R51x_I2C_W_SID, slave);
2397 return reg_w(sd, R51x_I2C_R_SID, slave + 1);
2400 static int write_regvals(struct sd *sd,
2401 const struct ov_regvals *regvals,
2407 rc = reg_w(sd, regvals->reg, regvals->val);
2415 static int write_i2c_regvals(struct sd *sd,
2416 const struct ov_i2c_regvals *regvals,
2422 rc = i2c_w(sd, regvals->reg, regvals->val);
2430 /****************************************************************************
2432 * OV511 and sensor configuration
2434 ***************************************************************************/
2436 /* This initializes the OV2x10 / OV3610 / OV3620 */
2437 static int ov_hires_configure(struct sd *sd)
2441 if (sd->bridge != BRIDGE_OVFX2) {
2442 err("error hires sensors only supported with ovfx2");
2446 PDEBUG(D_PROBE, "starting ov hires configuration");
2448 /* Detect sensor (sub)type */
2449 high = i2c_r(sd, 0x0a);
2450 low = i2c_r(sd, 0x0b);
2451 /* info("%x, %x", high, low); */
2452 if (high == 0x96 && low == 0x40) {
2453 PDEBUG(D_PROBE, "Sensor is an OV2610");
2454 sd->sensor = SEN_OV2610;
2455 } else if (high == 0x36 && (low & 0x0f) == 0x00) {
2456 PDEBUG(D_PROBE, "Sensor is an OV3610");
2457 sd->sensor = SEN_OV3610;
2459 err("Error unknown sensor type: 0x%02x%02x",
2464 /* Set sensor-specific vars */
2469 /* This initializes the OV8110, OV8610 sensor. The OV8110 uses
2470 * the same register settings as the OV8610, since they are very similar.
2472 static int ov8xx0_configure(struct sd *sd)
2476 PDEBUG(D_PROBE, "starting ov8xx0 configuration");
2478 /* Detect sensor (sub)type */
2479 rc = i2c_r(sd, OV7610_REG_COM_I);
2481 PDEBUG(D_ERR, "Error detecting sensor type");
2484 if ((rc & 3) == 1) {
2485 sd->sensor = SEN_OV8610;
2487 err("Unknown image sensor version: %d", rc & 3);
2491 /* Set sensor-specific vars */
2495 /* This initializes the OV7610, OV7620, or OV76BE sensor. The OV76BE uses
2496 * the same register settings as the OV7610, since they are very similar.
2498 static int ov7xx0_configure(struct sd *sd)
2503 PDEBUG(D_PROBE, "starting OV7xx0 configuration");
2505 /* Detect sensor (sub)type */
2506 rc = i2c_r(sd, OV7610_REG_COM_I);
2509 * it appears to be wrongly detected as a 7610 by default */
2511 PDEBUG(D_ERR, "Error detecting sensor type");
2514 if ((rc & 3) == 3) {
2515 /* quick hack to make OV7670s work */
2516 high = i2c_r(sd, 0x0a);
2517 low = i2c_r(sd, 0x0b);
2518 /* info("%x, %x", high, low); */
2519 if (high == 0x76 && low == 0x73) {
2520 PDEBUG(D_PROBE, "Sensor is an OV7670");
2521 sd->sensor = SEN_OV7670;
2523 PDEBUG(D_PROBE, "Sensor is an OV7610");
2524 sd->sensor = SEN_OV7610;
2526 } else if ((rc & 3) == 1) {
2527 /* I don't know what's different about the 76BE yet. */
2528 if (i2c_r(sd, 0x15) & 1) {
2529 PDEBUG(D_PROBE, "Sensor is an OV7620AE");
2530 sd->sensor = SEN_OV7620AE;
2532 PDEBUG(D_PROBE, "Sensor is an OV76BE");
2533 sd->sensor = SEN_OV76BE;
2535 } else if ((rc & 3) == 0) {
2536 /* try to read product id registers */
2537 high = i2c_r(sd, 0x0a);
2539 PDEBUG(D_ERR, "Error detecting camera chip PID");
2542 low = i2c_r(sd, 0x0b);
2544 PDEBUG(D_ERR, "Error detecting camera chip VER");
2550 err("Sensor is an OV7630/OV7635");
2551 err("7630 is not supported by this driver");
2554 PDEBUG(D_PROBE, "Sensor is an OV7645");
2555 sd->sensor = SEN_OV7640; /* FIXME */
2558 PDEBUG(D_PROBE, "Sensor is an OV7645B");
2559 sd->sensor = SEN_OV7640; /* FIXME */
2562 PDEBUG(D_PROBE, "Sensor is an OV7648");
2563 sd->sensor = SEN_OV7648;
2566 PDEBUG(D_PROBE, "Unknown sensor: 0x76%x", low);
2570 PDEBUG(D_PROBE, "Sensor is an OV7620");
2571 sd->sensor = SEN_OV7620;
2574 err("Unknown image sensor version: %d", rc & 3);
2578 /* Set sensor-specific vars */
2582 /* This initializes the OV6620, OV6630, OV6630AE, or OV6630AF sensor. */
2583 static int ov6xx0_configure(struct sd *sd)
2586 PDEBUG(D_PROBE, "starting OV6xx0 configuration");
2588 /* Detect sensor (sub)type */
2589 rc = i2c_r(sd, OV7610_REG_COM_I);
2591 PDEBUG(D_ERR, "Error detecting sensor type");
2595 /* Ugh. The first two bits are the version bits, but
2596 * the entire register value must be used. I guess OVT
2597 * underestimated how many variants they would make. */
2600 sd->sensor = SEN_OV6630;
2601 warn("WARNING: Sensor is an OV66308. Your camera may have");
2602 warn("been misdetected in previous driver versions.");
2605 sd->sensor = SEN_OV6620;
2606 PDEBUG(D_PROBE, "Sensor is an OV6620");
2609 sd->sensor = SEN_OV6630;
2610 PDEBUG(D_PROBE, "Sensor is an OV66308AE");
2613 sd->sensor = SEN_OV66308AF;
2614 PDEBUG(D_PROBE, "Sensor is an OV66308AF");
2617 sd->sensor = SEN_OV6630;
2618 warn("WARNING: Sensor is an OV66307. Your camera may have");
2619 warn("been misdetected in previous driver versions.");
2622 err("FATAL: Unknown sensor version: 0x%02x", rc);
2626 /* Set sensor-specific vars */
2632 /* Turns on or off the LED. Only has an effect with OV511+/OV518(+)/OV519 */
2633 static void ov51x_led_control(struct sd *sd, int on)
2638 switch (sd->bridge) {
2639 /* OV511 has no LED control */
2640 case BRIDGE_OV511PLUS:
2641 reg_w(sd, R511_SYS_LED_CTL, on ? 1 : 0);
2644 case BRIDGE_OV518PLUS:
2645 reg_w_mask(sd, R518_GPIO_OUT, on ? 0x02 : 0x00, 0x02);
2648 reg_w_mask(sd, OV519_GPIO_DATA_OUT0, !on, 1); /* 0 / 1 */
2653 static void sd_reset_snapshot(struct gspca_dev *gspca_dev)
2655 struct sd *sd = (struct sd *) gspca_dev;
2657 if (!sd->snapshot_needs_reset)
2660 /* Note it is important that we clear sd->snapshot_needs_reset,
2661 before actually clearing the snapshot state in the bridge
2662 otherwise we might race with the pkt_scan interrupt handler */
2663 sd->snapshot_needs_reset = 0;
2665 switch (sd->bridge) {
2667 case BRIDGE_OV511PLUS:
2668 reg_w(sd, R51x_SYS_SNAP, 0x02);
2669 reg_w(sd, R51x_SYS_SNAP, 0x00);
2672 case BRIDGE_OV518PLUS:
2673 reg_w(sd, R51x_SYS_SNAP, 0x02); /* Reset */
2674 reg_w(sd, R51x_SYS_SNAP, 0x01); /* Enable */
2677 reg_w(sd, R51x_SYS_RESET, 0x40);
2678 reg_w(sd, R51x_SYS_RESET, 0x00);
2683 static int ov51x_upload_quan_tables(struct sd *sd)
2685 const unsigned char yQuanTable511[] = {
2686 0, 1, 1, 2, 2, 3, 3, 4,
2687 1, 1, 1, 2, 2, 3, 4, 4,
2688 1, 1, 2, 2, 3, 4, 4, 4,
2689 2, 2, 2, 3, 4, 4, 4, 4,
2690 2, 2, 3, 4, 4, 5, 5, 5,
2691 3, 3, 4, 4, 5, 5, 5, 5,
2692 3, 4, 4, 4, 5, 5, 5, 5,
2693 4, 4, 4, 4, 5, 5, 5, 5
2696 const unsigned char uvQuanTable511[] = {
2697 0, 2, 2, 3, 4, 4, 4, 4,
2698 2, 2, 2, 4, 4, 4, 4, 4,
2699 2, 2, 3, 4, 4, 4, 4, 4,
2700 3, 4, 4, 4, 4, 4, 4, 4,
2701 4, 4, 4, 4, 4, 4, 4, 4,
2702 4, 4, 4, 4, 4, 4, 4, 4,
2703 4, 4, 4, 4, 4, 4, 4, 4,
2704 4, 4, 4, 4, 4, 4, 4, 4
2707 /* OV518 quantization tables are 8x4 (instead of 8x8) */
2708 const unsigned char yQuanTable518[] = {
2709 5, 4, 5, 6, 6, 7, 7, 7,
2710 5, 5, 5, 5, 6, 7, 7, 7,
2711 6, 6, 6, 6, 7, 7, 7, 8,
2712 7, 7, 6, 7, 7, 7, 8, 8
2715 const unsigned char uvQuanTable518[] = {
2716 6, 6, 6, 7, 7, 7, 7, 7,
2717 6, 6, 6, 7, 7, 7, 7, 7,
2718 6, 6, 6, 7, 7, 7, 7, 8,
2719 7, 7, 7, 7, 7, 7, 8, 8
2722 const unsigned char *pYTable, *pUVTable;
2723 unsigned char val0, val1;
2724 int i, size, rc, reg = R51x_COMP_LUT_BEGIN;
2726 PDEBUG(D_PROBE, "Uploading quantization tables");
2728 if (sd->bridge == BRIDGE_OV511 || sd->bridge == BRIDGE_OV511PLUS) {
2729 pYTable = yQuanTable511;
2730 pUVTable = uvQuanTable511;
2733 pYTable = yQuanTable518;
2734 pUVTable = uvQuanTable518;
2738 for (i = 0; i < size; i++) {
2744 rc = reg_w(sd, reg, val0);
2753 rc = reg_w(sd, reg + size, val0);
2763 /* This initializes the OV511/OV511+ and the sensor */
2764 static int ov511_configure(struct gspca_dev *gspca_dev)
2766 struct sd *sd = (struct sd *) gspca_dev;
2769 /* For 511 and 511+ */
2770 const struct ov_regvals init_511[] = {
2771 { R51x_SYS_RESET, 0x7f },
2772 { R51x_SYS_INIT, 0x01 },
2773 { R51x_SYS_RESET, 0x7f },
2774 { R51x_SYS_INIT, 0x01 },
2775 { R51x_SYS_RESET, 0x3f },
2776 { R51x_SYS_INIT, 0x01 },
2777 { R51x_SYS_RESET, 0x3d },
2780 const struct ov_regvals norm_511[] = {
2781 { R511_DRAM_FLOW_CTL, 0x01 },
2782 { R51x_SYS_SNAP, 0x00 },
2783 { R51x_SYS_SNAP, 0x02 },
2784 { R51x_SYS_SNAP, 0x00 },
2785 { R511_FIFO_OPTS, 0x1f },
2786 { R511_COMP_EN, 0x00 },
2787 { R511_COMP_LUT_EN, 0x03 },
2790 const struct ov_regvals norm_511_p[] = {
2791 { R511_DRAM_FLOW_CTL, 0xff },
2792 { R51x_SYS_SNAP, 0x00 },
2793 { R51x_SYS_SNAP, 0x02 },
2794 { R51x_SYS_SNAP, 0x00 },
2795 { R511_FIFO_OPTS, 0xff },
2796 { R511_COMP_EN, 0x00 },
2797 { R511_COMP_LUT_EN, 0x03 },
2800 const struct ov_regvals compress_511[] = {
2811 PDEBUG(D_PROBE, "Device custom id %x", reg_r(sd, R51x_SYS_CUST_ID));
2813 rc = write_regvals(sd, init_511, ARRAY_SIZE(init_511));
2817 switch (sd->bridge) {
2819 rc = write_regvals(sd, norm_511, ARRAY_SIZE(norm_511));
2823 case BRIDGE_OV511PLUS:
2824 rc = write_regvals(sd, norm_511_p, ARRAY_SIZE(norm_511_p));
2830 /* Init compression */
2831 rc = write_regvals(sd, compress_511, ARRAY_SIZE(compress_511));
2835 rc = ov51x_upload_quan_tables(sd);
2837 PDEBUG(D_ERR, "Error uploading quantization tables");
2844 /* This initializes the OV518/OV518+ and the sensor */
2845 static int ov518_configure(struct gspca_dev *gspca_dev)
2847 struct sd *sd = (struct sd *) gspca_dev;
2850 /* For 518 and 518+ */
2851 const struct ov_regvals init_518[] = {
2852 { R51x_SYS_RESET, 0x40 },
2853 { R51x_SYS_INIT, 0xe1 },
2854 { R51x_SYS_RESET, 0x3e },
2855 { R51x_SYS_INIT, 0xe1 },
2856 { R51x_SYS_RESET, 0x00 },
2857 { R51x_SYS_INIT, 0xe1 },
2862 const struct ov_regvals norm_518[] = {
2863 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2864 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2875 const struct ov_regvals norm_518_p[] = {
2876 { R51x_SYS_SNAP, 0x02 }, /* Reset */
2877 { R51x_SYS_SNAP, 0x01 }, /* Enable */
2894 /* First 5 bits of custom ID reg are a revision ID on OV518 */
2895 PDEBUG(D_PROBE, "Device revision %d",
2896 0x1F & reg_r(sd, R51x_SYS_CUST_ID));
2898 rc = write_regvals(sd, init_518, ARRAY_SIZE(init_518));
2902 /* Set LED GPIO pin to output mode */
2903 rc = reg_w_mask(sd, R518_GPIO_CTL, 0x00, 0x02);
2907 switch (sd->bridge) {
2909 rc = write_regvals(sd, norm_518, ARRAY_SIZE(norm_518));
2913 case BRIDGE_OV518PLUS:
2914 rc = write_regvals(sd, norm_518_p, ARRAY_SIZE(norm_518_p));
2920 rc = ov51x_upload_quan_tables(sd);
2922 PDEBUG(D_ERR, "Error uploading quantization tables");
2926 rc = reg_w(sd, 0x2f, 0x80);
2933 static int ov519_configure(struct sd *sd)
2935 static const struct ov_regvals init_519[] = {
2936 { 0x5a, 0x6d }, /* EnableSystem */
2938 { 0x54, 0xff }, /* set bit2 to enable jpeg */
2942 /* Set LED pin to output mode. Bit 4 must be cleared or sensor
2943 * detection will fail. This deserves further investigation. */
2944 { OV519_GPIO_IO_CTRL0, 0xee },
2945 { 0x51, 0x0f }, /* SetUsbInit */
2948 /* windows reads 0x55 at this point*/
2951 return write_regvals(sd, init_519, ARRAY_SIZE(init_519));
2954 static int ovfx2_configure(struct sd *sd)
2956 static const struct ov_regvals init_fx2[] = {
2968 return write_regvals(sd, init_fx2, ARRAY_SIZE(init_fx2));
2971 /* this function is called at probe time */
2972 static int sd_config(struct gspca_dev *gspca_dev,
2973 const struct usb_device_id *id)
2975 struct sd *sd = (struct sd *) gspca_dev;
2976 struct cam *cam = &gspca_dev->cam;
2979 sd->bridge = id->driver_info & BRIDGE_MASK;
2980 sd->invert_led = id->driver_info & BRIDGE_INVERT_LED;
2982 switch (sd->bridge) {
2984 case BRIDGE_OV511PLUS:
2985 ret = ov511_configure(gspca_dev);
2988 case BRIDGE_OV518PLUS:
2989 ret = ov518_configure(gspca_dev);
2992 ret = ov519_configure(sd);
2995 ret = ovfx2_configure(sd);
2996 cam->bulk_size = OVFX2_BULK_SIZE;
2997 cam->bulk_nurbs = MAX_NURBS;
3000 case BRIDGE_W9968CF:
3001 ret = w9968cf_configure(sd);
3002 cam->reverse_alts = 1;
3009 ov51x_led_control(sd, 0); /* turn LED off */
3011 /* The OV519 must be more aggressive about sensor detection since
3012 * I2C write will never fail if the sensor is not present. We have
3013 * to try to initialize the sensor to detect its presence */
3017 if (init_ov_sensor(sd, OV7xx0_SID) >= 0) {
3018 if (ov7xx0_configure(sd) < 0) {
3019 PDEBUG(D_ERR, "Failed to configure OV7xx0");
3023 } else if (init_ov_sensor(sd, OV6xx0_SID) >= 0) {
3024 if (ov6xx0_configure(sd) < 0) {
3025 PDEBUG(D_ERR, "Failed to configure OV6xx0");
3029 } else if (init_ov_sensor(sd, OV8xx0_SID) >= 0) {
3030 if (ov8xx0_configure(sd) < 0) {
3031 PDEBUG(D_ERR, "Failed to configure OV8xx0");
3034 /* Test for 3xxx / 2xxx */
3035 } else if (init_ov_sensor(sd, OV_HIRES_SID) >= 0) {
3036 if (ov_hires_configure(sd) < 0) {
3037 PDEBUG(D_ERR, "Failed to configure high res OV");
3041 err("Can't determine sensor slave IDs");
3048 switch (sd->bridge) {
3050 case BRIDGE_OV511PLUS:
3052 cam->cam_mode = ov511_vga_mode;
3053 cam->nmodes = ARRAY_SIZE(ov511_vga_mode);
3055 cam->cam_mode = ov511_sif_mode;
3056 cam->nmodes = ARRAY_SIZE(ov511_sif_mode);
3060 case BRIDGE_OV518PLUS:
3062 cam->cam_mode = ov518_vga_mode;
3063 cam->nmodes = ARRAY_SIZE(ov518_vga_mode);
3065 cam->cam_mode = ov518_sif_mode;
3066 cam->nmodes = ARRAY_SIZE(ov518_sif_mode);
3071 cam->cam_mode = ov519_vga_mode;
3072 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3074 cam->cam_mode = ov519_sif_mode;
3075 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3079 if (sd->sensor == SEN_OV2610) {
3080 cam->cam_mode = ovfx2_ov2610_mode;
3081 cam->nmodes = ARRAY_SIZE(ovfx2_ov2610_mode);
3082 } else if (sd->sensor == SEN_OV3610) {
3083 cam->cam_mode = ovfx2_ov3610_mode;
3084 cam->nmodes = ARRAY_SIZE(ovfx2_ov3610_mode);
3085 } else if (!sd->sif) {
3086 cam->cam_mode = ov519_vga_mode;
3087 cam->nmodes = ARRAY_SIZE(ov519_vga_mode);
3089 cam->cam_mode = ov519_sif_mode;
3090 cam->nmodes = ARRAY_SIZE(ov519_sif_mode);
3093 case BRIDGE_W9968CF:
3094 cam->cam_mode = w9968cf_vga_mode;
3095 cam->nmodes = ARRAY_SIZE(w9968cf_vga_mode);
3099 /* w9968cf needs initialisation once the sensor is known */
3100 if (w9968cf_init(sd) < 0)
3104 gspca_dev->cam.ctrls = sd->ctrls;
3105 if (sd->sensor == SEN_OV7670)
3106 gspca_dev->ctrl_dis = 1 << COLORS;
3108 gspca_dev->ctrl_dis = (1 << HFLIP) | (1 << VFLIP);
3109 sd->quality = QUALITY_DEF;
3110 if (sd->sensor == SEN_OV7640 ||
3111 sd->sensor == SEN_OV7648)
3112 gspca_dev->ctrl_dis |= (1 << AUTOBRIGHT) | (1 << CONTRAST);
3113 if (sd->sensor == SEN_OV7670)
3114 gspca_dev->ctrl_dis |= 1 << AUTOBRIGHT;
3115 /* OV8610 Frequency filter control should work but needs testing */
3116 if (sd->sensor == SEN_OV8610)
3117 gspca_dev->ctrl_dis |= 1 << FREQ;
3118 /* No controls for the OV2610/OV3610 */
3119 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
3120 gspca_dev->ctrl_dis |= (1 << NCTRL) - 1;
3124 PDEBUG(D_ERR, "OV519 Config failed");
3128 /* this function is called at probe and resume time */
3129 static int sd_init(struct gspca_dev *gspca_dev)
3131 struct sd *sd = (struct sd *) gspca_dev;
3133 /* initialize the sensor */
3134 switch (sd->sensor) {
3136 if (write_i2c_regvals(sd, norm_2610, ARRAY_SIZE(norm_2610)))
3138 /* Enable autogain, autoexpo, awb, bandfilter */
3139 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3143 if (write_i2c_regvals(sd, norm_3620b, ARRAY_SIZE(norm_3620b)))
3145 /* Enable autogain, autoexpo, awb, bandfilter */
3146 if (i2c_w_mask(sd, 0x13, 0x27, 0x27) < 0)
3150 if (write_i2c_regvals(sd, norm_6x20, ARRAY_SIZE(norm_6x20)))
3155 sd->ctrls[CONTRAST].def = 200;
3156 /* The default is too low for the ov6630 */
3157 if (write_i2c_regvals(sd, norm_6x30, ARRAY_SIZE(norm_6x30)))
3161 /* case SEN_OV7610: */
3162 /* case SEN_OV76BE: */
3163 if (write_i2c_regvals(sd, norm_7610, ARRAY_SIZE(norm_7610)))
3165 if (i2c_w_mask(sd, 0x0e, 0x00, 0x40))
3170 if (write_i2c_regvals(sd, norm_7620, ARRAY_SIZE(norm_7620)))
3175 if (write_i2c_regvals(sd, norm_7640, ARRAY_SIZE(norm_7640)))
3179 sd->ctrls[FREQ].max = 3; /* auto */
3180 sd->ctrls[FREQ].def = 3;
3181 if (write_i2c_regvals(sd, norm_7670, ARRAY_SIZE(norm_7670)))
3185 if (write_i2c_regvals(sd, norm_8610, ARRAY_SIZE(norm_8610)))
3192 /* Set up the OV511/OV511+ with the given image parameters.
3194 * Do not put any sensor-specific code in here (including I2C I/O functions)
3196 static int ov511_mode_init_regs(struct sd *sd)
3198 int hsegs, vsegs, packet_size, fps, needed;
3200 struct usb_host_interface *alt;
3201 struct usb_interface *intf;
3203 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3204 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3206 err("Couldn't get altsetting");
3210 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3211 reg_w(sd, R51x_FIFO_PSIZE, packet_size >> 5);
3213 reg_w(sd, R511_CAM_UV_EN, 0x01);
3214 reg_w(sd, R511_SNAP_UV_EN, 0x01);
3215 reg_w(sd, R511_SNAP_OPTS, 0x03);
3217 /* Here I'm assuming that snapshot size == image size.
3218 * I hope that's always true. --claudio
3220 hsegs = (sd->gspca_dev.width >> 3) - 1;
3221 vsegs = (sd->gspca_dev.height >> 3) - 1;
3223 reg_w(sd, R511_CAM_PXCNT, hsegs);
3224 reg_w(sd, R511_CAM_LNCNT, vsegs);
3225 reg_w(sd, R511_CAM_PXDIV, 0x00);
3226 reg_w(sd, R511_CAM_LNDIV, 0x00);
3228 /* YUV420, low pass filter on */
3229 reg_w(sd, R511_CAM_OPTS, 0x03);
3231 /* Snapshot additions */
3232 reg_w(sd, R511_SNAP_PXCNT, hsegs);
3233 reg_w(sd, R511_SNAP_LNCNT, vsegs);
3234 reg_w(sd, R511_SNAP_PXDIV, 0x00);
3235 reg_w(sd, R511_SNAP_LNDIV, 0x00);
3237 /******** Set the framerate ********/
3239 sd->frame_rate = frame_rate;
3241 switch (sd->sensor) {
3243 /* No framerate control, doesn't like higher rates yet */
3247 /* Note once the FIXME's in mode_init_ov_sensor_regs() are fixed
3248 for more sensors we need to do this for them too */
3254 if (sd->gspca_dev.width == 320)
3260 switch (sd->frame_rate) {
3263 /* Not enough bandwidth to do 640x480 @ 30 fps */
3264 if (sd->gspca_dev.width != 640) {
3268 /* Fall through for 640x480 case */
3282 sd->clockdiv = (sd->clockdiv + 1) * 2 - 1;
3283 /* Higher then 10 does not work */
3284 if (sd->clockdiv > 10)
3290 /* No framerate control ?? */
3295 /* Check if we have enough bandwidth to disable compression */
3296 fps = (interlaced ? 60 : 30) / (sd->clockdiv + 1) + 1;
3297 needed = fps * sd->gspca_dev.width * sd->gspca_dev.height * 3 / 2;
3298 /* 1400 is a conservative estimate of the max nr of isoc packets/sec */
3299 if (needed > 1400 * packet_size) {
3300 /* Enable Y and UV quantization and compression */
3301 reg_w(sd, R511_COMP_EN, 0x07);
3302 reg_w(sd, R511_COMP_LUT_EN, 0x03);
3304 reg_w(sd, R511_COMP_EN, 0x06);
3305 reg_w(sd, R511_COMP_LUT_EN, 0x00);
3308 reg_w(sd, R51x_SYS_RESET, OV511_RESET_OMNICE);
3309 reg_w(sd, R51x_SYS_RESET, 0);
3314 /* Sets up the OV518/OV518+ with the given image parameters
3316 * OV518 needs a completely different approach, until we can figure out what
3317 * the individual registers do. Also, only 15 FPS is supported now.
3319 * Do not put any sensor-specific code in here (including I2C I/O functions)
3321 static int ov518_mode_init_regs(struct sd *sd)
3323 int hsegs, vsegs, packet_size;
3324 struct usb_host_interface *alt;
3325 struct usb_interface *intf;
3327 intf = usb_ifnum_to_if(sd->gspca_dev.dev, sd->gspca_dev.iface);
3328 alt = usb_altnum_to_altsetting(intf, sd->gspca_dev.alt);
3330 err("Couldn't get altsetting");
3334 packet_size = le16_to_cpu(alt->endpoint[0].desc.wMaxPacketSize);
3335 ov518_reg_w32(sd, R51x_FIFO_PSIZE, packet_size & ~7, 2);
3337 /******** Set the mode ********/
3348 if (sd->bridge == BRIDGE_OV518) {
3349 /* Set 8-bit (YVYU) input format */
3350 reg_w_mask(sd, 0x20, 0x08, 0x08);
3352 /* Set 12-bit (4:2:0) output format */
3353 reg_w_mask(sd, 0x28, 0x80, 0xf0);
3354 reg_w_mask(sd, 0x38, 0x80, 0xf0);
3356 reg_w(sd, 0x28, 0x80);
3357 reg_w(sd, 0x38, 0x80);
3360 hsegs = sd->gspca_dev.width / 16;
3361 vsegs = sd->gspca_dev.height / 4;
3363 reg_w(sd, 0x29, hsegs);
3364 reg_w(sd, 0x2a, vsegs);
3366 reg_w(sd, 0x39, hsegs);
3367 reg_w(sd, 0x3a, vsegs);
3369 /* Windows driver does this here; who knows why */
3370 reg_w(sd, 0x2f, 0x80);
3372 /******** Set the framerate ********/
3375 /* Mode independent, but framerate dependent, regs */
3376 /* 0x51: Clock divider; Only works on some cams which use 2 crystals */
3377 reg_w(sd, 0x51, 0x04);
3378 reg_w(sd, 0x22, 0x18);
3379 reg_w(sd, 0x23, 0xff);
3381 if (sd->bridge == BRIDGE_OV518PLUS) {
3382 switch (sd->sensor) {
3384 if (sd->gspca_dev.width == 320) {
3385 reg_w(sd, 0x20, 0x00);
3386 reg_w(sd, 0x21, 0x19);
3388 reg_w(sd, 0x20, 0x60);
3389 reg_w(sd, 0x21, 0x1f);
3393 reg_w(sd, 0x20, 0x00);
3394 reg_w(sd, 0x21, 0x19);
3397 reg_w(sd, 0x21, 0x19);
3400 reg_w(sd, 0x71, 0x17); /* Compression-related? */
3402 /* FIXME: Sensor-specific */
3403 /* Bit 5 is what matters here. Of course, it is "reserved" */
3404 i2c_w(sd, 0x54, 0x23);
3406 reg_w(sd, 0x2f, 0x80);
3408 if (sd->bridge == BRIDGE_OV518PLUS) {
3409 reg_w(sd, 0x24, 0x94);
3410 reg_w(sd, 0x25, 0x90);
3411 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3412 ov518_reg_w32(sd, 0xc6, 540, 2); /* 21ch */
3413 ov518_reg_w32(sd, 0xc7, 540, 2); /* 21ch */
3414 ov518_reg_w32(sd, 0xc8, 108, 2); /* 6ch */
3415 ov518_reg_w32(sd, 0xca, 131098, 3); /* 2001ah */
3416 ov518_reg_w32(sd, 0xcb, 532, 2); /* 214h */
3417 ov518_reg_w32(sd, 0xcc, 2400, 2); /* 960h */
3418 ov518_reg_w32(sd, 0xcd, 32, 2); /* 20h */
3419 ov518_reg_w32(sd, 0xce, 608, 2); /* 260h */
3421 reg_w(sd, 0x24, 0x9f);
3422 reg_w(sd, 0x25, 0x90);
3423 ov518_reg_w32(sd, 0xc4, 400, 2); /* 190h */
3424 ov518_reg_w32(sd, 0xc6, 381, 2); /* 17dh */
3425 ov518_reg_w32(sd, 0xc7, 381, 2); /* 17dh */
3426 ov518_reg_w32(sd, 0xc8, 128, 2); /* 80h */
3427 ov518_reg_w32(sd, 0xca, 183331, 3); /* 2cc23h */
3428 ov518_reg_w32(sd, 0xcb, 746, 2); /* 2eah */
3429 ov518_reg_w32(sd, 0xcc, 1750, 2); /* 6d6h */
3430 ov518_reg_w32(sd, 0xcd, 45, 2); /* 2dh */
3431 ov518_reg_w32(sd, 0xce, 851, 2); /* 353h */
3434 reg_w(sd, 0x2f, 0x80);
3440 /* Sets up the OV519 with the given image parameters
3442 * OV519 needs a completely different approach, until we can figure out what
3443 * the individual registers do.
3445 * Do not put any sensor-specific code in here (including I2C I/O functions)
3447 static int ov519_mode_init_regs(struct sd *sd)
3449 static const struct ov_regvals mode_init_519_ov7670[] = {
3450 { 0x5d, 0x03 }, /* Turn off suspend mode */
3451 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3452 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3453 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3457 { 0x37, 0x00 }, /* SetUsbInit */
3458 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3459 /* Enable both fields, YUV Input, disable defect comp (why?) */
3463 { 0x17, 0x50 }, /* undocumented */
3464 { 0x37, 0x00 }, /* undocumented */
3465 { 0x40, 0xff }, /* I2C timeout counter */
3466 { 0x46, 0x00 }, /* I2C clock prescaler */
3467 { 0x59, 0x04 }, /* new from windrv 090403 */
3468 { 0xff, 0x00 }, /* undocumented */
3469 /* windows reads 0x55 at this point, why? */
3472 static const struct ov_regvals mode_init_519[] = {
3473 { 0x5d, 0x03 }, /* Turn off suspend mode */
3474 { 0x53, 0x9f }, /* was 9b in 1.65-1.08 */
3475 { 0x54, 0x0f }, /* bit2 (jpeg enable) */
3476 { 0xa2, 0x20 }, /* a2-a5 are undocumented */
3480 { 0x37, 0x00 }, /* SetUsbInit */
3481 { 0x55, 0x02 }, /* 4.096 Mhz audio clock */
3482 /* Enable both fields, YUV Input, disable defect comp (why?) */
3484 { 0x17, 0x50 }, /* undocumented */
3485 { 0x37, 0x00 }, /* undocumented */
3486 { 0x40, 0xff }, /* I2C timeout counter */
3487 { 0x46, 0x00 }, /* I2C clock prescaler */
3488 { 0x59, 0x04 }, /* new from windrv 090403 */
3489 { 0xff, 0x00 }, /* undocumented */
3490 /* windows reads 0x55 at this point, why? */
3493 /******** Set the mode ********/
3494 if (sd->sensor != SEN_OV7670) {
3495 if (write_regvals(sd, mode_init_519,
3496 ARRAY_SIZE(mode_init_519)))
3498 if (sd->sensor == SEN_OV7640 ||
3499 sd->sensor == SEN_OV7648) {
3500 /* Select 8-bit input mode */
3501 reg_w_mask(sd, OV519_R20_DFR, 0x10, 0x10);
3504 if (write_regvals(sd, mode_init_519_ov7670,
3505 ARRAY_SIZE(mode_init_519_ov7670)))
3509 reg_w(sd, OV519_R10_H_SIZE, sd->gspca_dev.width >> 4);
3510 reg_w(sd, OV519_R11_V_SIZE, sd->gspca_dev.height >> 3);
3511 if (sd->sensor == SEN_OV7670 &&
3512 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3513 reg_w(sd, OV519_R12_X_OFFSETL, 0x04);
3514 else if (sd->sensor == SEN_OV7648 &&
3515 sd->gspca_dev.cam.cam_mode[sd->gspca_dev.curr_mode].priv)
3516 reg_w(sd, OV519_R12_X_OFFSETL, 0x01);
3518 reg_w(sd, OV519_R12_X_OFFSETL, 0x00);
3519 reg_w(sd, OV519_R13_X_OFFSETH, 0x00);
3520 reg_w(sd, OV519_R14_Y_OFFSETL, 0x00);
3521 reg_w(sd, OV519_R15_Y_OFFSETH, 0x00);
3522 reg_w(sd, OV519_R16_DIVIDER, 0x00);
3523 reg_w(sd, OV519_R25_FORMAT, 0x03); /* YUV422 */
3524 reg_w(sd, 0x26, 0x00); /* Undocumented */
3526 /******** Set the framerate ********/
3528 sd->frame_rate = frame_rate;
3530 /* FIXME: These are only valid at the max resolution. */
3532 switch (sd->sensor) {
3535 switch (sd->frame_rate) {
3538 reg_w(sd, 0xa4, 0x0c);
3539 reg_w(sd, 0x23, 0xff);
3542 reg_w(sd, 0xa4, 0x0c);
3543 reg_w(sd, 0x23, 0x1f);
3546 reg_w(sd, 0xa4, 0x0c);
3547 reg_w(sd, 0x23, 0x1b);
3550 reg_w(sd, 0xa4, 0x04);
3551 reg_w(sd, 0x23, 0xff);
3555 reg_w(sd, 0xa4, 0x04);
3556 reg_w(sd, 0x23, 0x1f);
3560 reg_w(sd, 0xa4, 0x04);
3561 reg_w(sd, 0x23, 0x1b);
3567 switch (sd->frame_rate) {
3568 default: /* 15 fps */
3570 reg_w(sd, 0xa4, 0x06);
3571 reg_w(sd, 0x23, 0xff);
3574 reg_w(sd, 0xa4, 0x06);
3575 reg_w(sd, 0x23, 0x1f);
3578 reg_w(sd, 0xa4, 0x06);
3579 reg_w(sd, 0x23, 0x1b);
3583 case SEN_OV7670: /* guesses, based on 7640 */
3584 PDEBUG(D_STREAM, "Setting framerate to %d fps",
3585 (sd->frame_rate == 0) ? 15 : sd->frame_rate);
3586 reg_w(sd, 0xa4, 0x10);
3587 switch (sd->frame_rate) {
3589 reg_w(sd, 0x23, 0xff);
3592 reg_w(sd, 0x23, 0x1b);
3596 reg_w(sd, 0x23, 0xff);
3605 static int mode_init_ov_sensor_regs(struct sd *sd)
3607 struct gspca_dev *gspca_dev;
3608 int qvga, xstart, xend, ystart, yend;
3611 gspca_dev = &sd->gspca_dev;
3612 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3614 /******** Mode (VGA/QVGA) and sensor specific regs ********/
3615 switch (sd->sensor) {
3617 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3618 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3619 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3620 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3621 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3622 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3623 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3627 xstart = (1040 - gspca_dev->width) / 2 + (0x1f << 4);
3628 ystart = (776 - gspca_dev->height) / 2;
3630 xstart = (2076 - gspca_dev->width) / 2 + (0x10 << 4);
3631 ystart = (1544 - gspca_dev->height) / 2;
3633 xend = xstart + gspca_dev->width;
3634 yend = ystart + gspca_dev->height;
3635 /* Writing to the COMH register resets the other windowing regs
3636 to their default values, so we must do this first. */
3637 i2c_w_mask(sd, 0x12, qvga ? 0x40 : 0x00, 0xf0);
3638 i2c_w_mask(sd, 0x32,
3639 (((xend >> 1) & 7) << 3) | ((xstart >> 1) & 7),
3641 i2c_w_mask(sd, 0x03,
3642 (((yend >> 1) & 3) << 2) | ((ystart >> 1) & 3),
3644 i2c_w(sd, 0x17, xstart >> 4);
3645 i2c_w(sd, 0x18, xend >> 4);
3646 i2c_w(sd, 0x19, ystart >> 3);
3647 i2c_w(sd, 0x1a, yend >> 3);
3650 /* For OV8610 qvga means qsvga */
3651 i2c_w_mask(sd, OV7610_REG_COM_C, qvga ? (1 << 5) : 0, 1 << 5);
3652 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3653 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3654 i2c_w_mask(sd, 0x2d, 0x00, 0x40); /* from windrv 090403 */
3655 i2c_w_mask(sd, 0x28, 0x20, 0x20); /* progressive mode on */
3658 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3659 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3660 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3661 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3666 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3667 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3668 i2c_w(sd, 0x24, qvga ? 0x20 : 0x3a);
3669 i2c_w(sd, 0x25, qvga ? 0x30 : 0x60);
3670 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3671 i2c_w_mask(sd, 0x67, qvga ? 0xb0 : 0x90, 0xf0);
3672 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3673 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3674 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3675 if (sd->sensor == SEN_OV76BE)
3676 i2c_w(sd, 0x35, qvga ? 0x1e : 0x9e);
3680 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3681 i2c_w_mask(sd, 0x28, qvga ? 0x00 : 0x20, 0x20);
3682 /* Setting this undocumented bit in qvga mode removes a very
3683 annoying vertical shaking of the image */
3684 i2c_w_mask(sd, 0x2d, qvga ? 0x40 : 0x00, 0x40);
3686 i2c_w_mask(sd, 0x67, qvga ? 0xf0 : 0x90, 0xf0);
3687 /* Allow higher automatic gain (to allow higher framerates) */
3688 i2c_w_mask(sd, 0x74, qvga ? 0x20 : 0x00, 0x20);
3689 i2c_w_mask(sd, 0x12, 0x04, 0x04); /* AWB: 1 */
3692 /* set COM7_FMT_VGA or COM7_FMT_QVGA
3693 * do we need to set anything else?
3694 * HSTART etc are set in set_ov_sensor_window itself */
3695 i2c_w_mask(sd, OV7670_REG_COM7,
3696 qvga ? OV7670_COM7_FMT_QVGA : OV7670_COM7_FMT_VGA,
3697 OV7670_COM7_FMT_MASK);
3698 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3699 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_AWB,
3701 if (qvga) { /* QVGA from ov7670.c by
3702 * Jonathan Corbet */
3713 /* OV7670 hardware window registers are split across
3714 * multiple locations */
3715 i2c_w(sd, OV7670_REG_HSTART, xstart >> 3);
3716 i2c_w(sd, OV7670_REG_HSTOP, xend >> 3);
3717 v = i2c_r(sd, OV7670_REG_HREF);
3718 v = (v & 0xc0) | ((xend & 0x7) << 3) | (xstart & 0x07);
3719 msleep(10); /* need to sleep between read and write to
3721 i2c_w(sd, OV7670_REG_HREF, v);
3723 i2c_w(sd, OV7670_REG_VSTART, ystart >> 2);
3724 i2c_w(sd, OV7670_REG_VSTOP, yend >> 2);
3725 v = i2c_r(sd, OV7670_REG_VREF);
3726 v = (v & 0xc0) | ((yend & 0x3) << 2) | (ystart & 0x03);
3727 msleep(10); /* need to sleep between read and write to
3729 i2c_w(sd, OV7670_REG_VREF, v);
3732 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3733 i2c_w_mask(sd, 0x13, 0x00, 0x20); /* Select 16 bit data bus */
3734 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3738 i2c_w_mask(sd, 0x14, qvga ? 0x20 : 0x00, 0x20);
3739 i2c_w_mask(sd, 0x12, 0x04, 0x06); /* AWB: 1 Test pattern: 0 */
3745 /******** Clock programming ********/
3746 i2c_w(sd, 0x11, sd->clockdiv);
3751 static void sethvflip(struct gspca_dev *gspca_dev)
3753 struct sd *sd = (struct sd *) gspca_dev;
3755 if (sd->sensor != SEN_OV7670)
3757 if (sd->gspca_dev.streaming)
3759 i2c_w_mask(sd, OV7670_REG_MVFP,
3760 OV7670_MVFP_MIRROR * sd->ctrls[HFLIP].val
3761 | OV7670_MVFP_VFLIP * sd->ctrls[VFLIP].val,
3762 OV7670_MVFP_MIRROR | OV7670_MVFP_VFLIP);
3763 if (sd->gspca_dev.streaming)
3767 static int set_ov_sensor_window(struct sd *sd)
3769 struct gspca_dev *gspca_dev;
3771 int hwsbase, hwebase, vwsbase, vwebase, hwscale, vwscale;
3774 /* mode setup is fully handled in mode_init_ov_sensor_regs for these */
3775 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610 ||
3776 sd->sensor == SEN_OV7670)
3777 return mode_init_ov_sensor_regs(sd);
3779 gspca_dev = &sd->gspca_dev;
3780 qvga = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 1;
3781 crop = gspca_dev->cam.cam_mode[(int) gspca_dev->curr_mode].priv & 2;
3783 /* The different sensor ICs handle setting up of window differently.
3784 * IF YOU SET IT WRONG, YOU WILL GET ALL ZERO ISOC DATA FROM OV51x!! */
3785 switch (sd->sensor) {
3796 vwsbase = vwebase = 0x05;
3805 if (sd->sensor == SEN_OV66308AF && qvga)
3806 /* HDG: this fixes U and V getting swapped */
3817 hwsbase = 0x2f; /* From 7620.SET (spec is wrong) */
3819 vwsbase = vwebase = 0x05;
3825 vwsbase = vwebase = 0x03;
3831 switch (sd->sensor) {
3835 if (qvga) { /* QCIF */
3840 vwscale = 1; /* The datasheet says 0;
3845 if (qvga) { /* QSVGA */
3853 default: /* SEN_OV7xx0 */
3854 if (qvga) { /* QVGA */
3863 ret = mode_init_ov_sensor_regs(sd);
3867 i2c_w(sd, 0x17, hwsbase);
3868 i2c_w(sd, 0x18, hwebase + (sd->sensor_width >> hwscale));
3869 i2c_w(sd, 0x19, vwsbase);
3870 i2c_w(sd, 0x1a, vwebase + (sd->sensor_height >> vwscale));
3875 /* -- start the camera -- */
3876 static int sd_start(struct gspca_dev *gspca_dev)
3878 struct sd *sd = (struct sd *) gspca_dev;
3881 /* Default for most bridges, allow bridge_mode_init_regs to override */
3882 sd->sensor_width = sd->gspca_dev.width;
3883 sd->sensor_height = sd->gspca_dev.height;
3885 switch (sd->bridge) {
3887 case BRIDGE_OV511PLUS:
3888 ret = ov511_mode_init_regs(sd);
3891 case BRIDGE_OV518PLUS:
3892 ret = ov518_mode_init_regs(sd);
3895 ret = ov519_mode_init_regs(sd);
3897 /* case BRIDGE_OVFX2: nothing to do */
3898 case BRIDGE_W9968CF:
3899 ret = w9968cf_mode_init_regs(sd);
3905 ret = set_ov_sensor_window(sd);
3909 setcontrast(gspca_dev);
3910 setbrightness(gspca_dev);
3911 setcolors(gspca_dev);
3912 sethvflip(gspca_dev);
3913 setautobright(gspca_dev);
3916 /* Force clear snapshot state in case the snapshot button was
3917 pressed while we weren't streaming */
3918 sd->snapshot_needs_reset = 1;
3919 sd_reset_snapshot(gspca_dev);
3921 sd->first_frame = 3;
3923 ret = ov51x_restart(sd);
3926 ov51x_led_control(sd, 1);
3929 PDEBUG(D_ERR, "camera start error:%d", ret);
3933 static void sd_stopN(struct gspca_dev *gspca_dev)
3935 struct sd *sd = (struct sd *) gspca_dev;
3938 ov51x_led_control(sd, 0);
3941 static void sd_stop0(struct gspca_dev *gspca_dev)
3943 struct sd *sd = (struct sd *) gspca_dev;
3945 if (!sd->gspca_dev.present)
3947 if (sd->bridge == BRIDGE_W9968CF)
3950 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
3951 /* If the last button state is pressed, release it now! */
3952 if (sd->snapshot_pressed) {
3953 input_report_key(gspca_dev->input_dev, KEY_CAMERA, 0);
3954 input_sync(gspca_dev->input_dev);
3955 sd->snapshot_pressed = 0;
3960 static void ov51x_handle_button(struct gspca_dev *gspca_dev, u8 state)
3962 struct sd *sd = (struct sd *) gspca_dev;
3964 if (sd->snapshot_pressed != state) {
3965 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
3966 input_report_key(gspca_dev->input_dev, KEY_CAMERA, state);
3967 input_sync(gspca_dev->input_dev);
3970 sd->snapshot_needs_reset = 1;
3972 sd->snapshot_pressed = state;
3974 /* On the ov511 / ov519 we need to reset the button state
3975 multiple times, as resetting does not work as long as the
3976 button stays pressed */
3977 switch (sd->bridge) {
3979 case BRIDGE_OV511PLUS:
3982 sd->snapshot_needs_reset = 1;
3988 static void ov511_pkt_scan(struct gspca_dev *gspca_dev,
3989 u8 *in, /* isoc packet */
3990 int len) /* iso packet length */
3992 struct sd *sd = (struct sd *) gspca_dev;
3994 /* SOF/EOF packets have 1st to 8th bytes zeroed and the 9th
3995 * byte non-zero. The EOF packet has image width/height in the
3996 * 10th and 11th bytes. The 9th byte is given as follows:
3999 * 6: compression enabled
4000 * 5: 422/420/400 modes
4001 * 4: 422/420/400 modes
4003 * 2: snapshot button on
4007 if (!(in[0] | in[1] | in[2] | in[3] | in[4] | in[5] | in[6] | in[7]) &&
4009 ov51x_handle_button(gspca_dev, (in[8] >> 2) & 1);
4012 if ((in[9] + 1) * 8 != gspca_dev->width ||
4013 (in[10] + 1) * 8 != gspca_dev->height) {
4014 PDEBUG(D_ERR, "Invalid frame size, got: %dx%d,"
4015 " requested: %dx%d\n",
4016 (in[9] + 1) * 8, (in[10] + 1) * 8,
4017 gspca_dev->width, gspca_dev->height);
4018 gspca_dev->last_packet_type = DISCARD_PACKET;
4021 /* Add 11 byte footer to frame, might be usefull */
4022 gspca_frame_add(gspca_dev, LAST_PACKET, in, 11);
4026 gspca_frame_add(gspca_dev, FIRST_PACKET, in, 0);
4031 /* Ignore the packet number */
4034 /* intermediate packet */
4035 gspca_frame_add(gspca_dev, INTER_PACKET, in, len);
4038 static void ov518_pkt_scan(struct gspca_dev *gspca_dev,
4039 u8 *data, /* isoc packet */
4040 int len) /* iso packet length */
4042 struct sd *sd = (struct sd *) gspca_dev;
4044 /* A false positive here is likely, until OVT gives me
4045 * the definitive SOF/EOF format */
4046 if ((!(data[0] | data[1] | data[2] | data[3] | data[5])) && data[6]) {
4047 ov51x_handle_button(gspca_dev, (data[6] >> 1) & 1);
4048 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4049 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4053 if (gspca_dev->last_packet_type == DISCARD_PACKET)
4056 /* Does this device use packet numbers ? */
4059 if (sd->packet_nr == data[len])
4061 /* The last few packets of the frame (which are all 0's
4062 except that they may contain part of the footer), are
4064 else if (sd->packet_nr == 0 || data[len]) {
4065 PDEBUG(D_ERR, "Invalid packet nr: %d (expect: %d)",
4066 (int)data[len], (int)sd->packet_nr);
4067 gspca_dev->last_packet_type = DISCARD_PACKET;
4072 /* intermediate packet */
4073 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4076 static void ov519_pkt_scan(struct gspca_dev *gspca_dev,
4077 u8 *data, /* isoc packet */
4078 int len) /* iso packet length */
4080 /* Header of ov519 is 16 bytes:
4081 * Byte Value Description
4085 * 3 0xXX 0x50 = SOF, 0x51 = EOF
4086 * 9 0xXX 0x01 initial frame without data,
4087 * 0x00 standard frame with image
4088 * 14 Lo in EOF: length of image data / 8
4092 if (data[0] == 0xff && data[1] == 0xff && data[2] == 0xff) {
4094 case 0x50: /* start of frame */
4095 /* Don't check the button state here, as the state
4096 usually (always ?) changes at EOF and checking it
4097 here leads to unnecessary snapshot state resets. */
4102 if (data[0] == 0xff || data[1] == 0xd8)
4103 gspca_frame_add(gspca_dev, FIRST_PACKET,
4106 gspca_dev->last_packet_type = DISCARD_PACKET;
4108 case 0x51: /* end of frame */
4109 ov51x_handle_button(gspca_dev, data[11] & 1);
4111 gspca_dev->last_packet_type = DISCARD_PACKET;
4112 gspca_frame_add(gspca_dev, LAST_PACKET,
4118 /* intermediate packet */
4119 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4122 static void ovfx2_pkt_scan(struct gspca_dev *gspca_dev,
4123 u8 *data, /* isoc packet */
4124 int len) /* iso packet length */
4126 struct sd *sd = (struct sd *) gspca_dev;
4128 gspca_frame_add(gspca_dev, INTER_PACKET, data, len);
4130 /* A short read signals EOF */
4131 if (len < OVFX2_BULK_SIZE) {
4132 /* If the frame is short, and it is one of the first ones
4133 the sensor and bridge are still syncing, so drop it. */
4134 if (sd->first_frame) {
4136 if (gspca_dev->image_len <
4137 sd->gspca_dev.width * sd->gspca_dev.height)
4138 gspca_dev->last_packet_type = DISCARD_PACKET;
4140 gspca_frame_add(gspca_dev, LAST_PACKET, NULL, 0);
4141 gspca_frame_add(gspca_dev, FIRST_PACKET, NULL, 0);
4145 static void sd_pkt_scan(struct gspca_dev *gspca_dev,
4146 u8 *data, /* isoc packet */
4147 int len) /* iso packet length */
4149 struct sd *sd = (struct sd *) gspca_dev;
4151 switch (sd->bridge) {
4153 case BRIDGE_OV511PLUS:
4154 ov511_pkt_scan(gspca_dev, data, len);
4157 case BRIDGE_OV518PLUS:
4158 ov518_pkt_scan(gspca_dev, data, len);
4161 ov519_pkt_scan(gspca_dev, data, len);
4164 ovfx2_pkt_scan(gspca_dev, data, len);
4166 case BRIDGE_W9968CF:
4167 w9968cf_pkt_scan(gspca_dev, data, len);
4172 /* -- management routines -- */
4174 static void setbrightness(struct gspca_dev *gspca_dev)
4176 struct sd *sd = (struct sd *) gspca_dev;
4179 val = sd->ctrls[BRIGHTNESS].val;
4180 switch (sd->sensor) {
4189 i2c_w(sd, OV7610_REG_BRT, val);
4193 /* 7620 doesn't like manual changes when in auto mode */
4194 if (!sd->ctrls[AUTOBRIGHT].val)
4195 i2c_w(sd, OV7610_REG_BRT, val);
4199 * i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_AEC); */
4200 i2c_w(sd, OV7670_REG_BRIGHT, ov7670_abs_to_sm(val));
4205 static void setcontrast(struct gspca_dev *gspca_dev)
4207 struct sd *sd = (struct sd *) gspca_dev;
4210 val = sd->ctrls[CONTRAST].val;
4211 switch (sd->sensor) {
4214 i2c_w(sd, OV7610_REG_CNT, val);
4218 i2c_w_mask(sd, OV7610_REG_CNT, val >> 4, 0x0f);
4221 static const u8 ctab[] = {
4222 0x03, 0x09, 0x0b, 0x0f, 0x53, 0x6f, 0x35, 0x7f
4225 /* Use Y gamma control instead. Bit 0 enables it. */
4226 i2c_w(sd, 0x64, ctab[val >> 5]);
4230 case SEN_OV7620AE: {
4231 static const u8 ctab[] = {
4232 0x01, 0x05, 0x09, 0x11, 0x15, 0x35, 0x37, 0x57,
4233 0x5b, 0xa5, 0xa7, 0xc7, 0xc9, 0xcf, 0xef, 0xff
4236 /* Use Y gamma control instead. Bit 0 enables it. */
4237 i2c_w(sd, 0x64, ctab[val >> 4]);
4241 /* check that this isn't just the same as ov7610 */
4242 i2c_w(sd, OV7670_REG_CONTRAS, val >> 1);
4247 static void setcolors(struct gspca_dev *gspca_dev)
4249 struct sd *sd = (struct sd *) gspca_dev;
4252 val = sd->ctrls[COLORS].val;
4253 switch (sd->sensor) {
4260 i2c_w(sd, OV7610_REG_SAT, val);
4264 /* Use UV gamma control instead. Bits 0 & 7 are reserved. */
4265 /* rc = ov_i2c_write(sd->dev, 0x62, (val >> 9) & 0x7e);
4268 i2c_w(sd, OV7610_REG_SAT, val);
4272 i2c_w(sd, OV7610_REG_SAT, val & 0xf0);
4275 /* supported later once I work out how to do it
4276 * transparently fail now! */
4277 /* set REG_COM13 values for UV sat auto mode */
4282 static void setautobright(struct gspca_dev *gspca_dev)
4284 struct sd *sd = (struct sd *) gspca_dev;
4286 if (sd->sensor == SEN_OV7640 || sd->sensor == SEN_OV7648 ||
4287 sd->sensor == SEN_OV7670 ||
4288 sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4291 i2c_w_mask(sd, 0x2d, sd->ctrls[AUTOBRIGHT].val ? 0x10 : 0x00, 0x10);
4294 static void setfreq_i(struct sd *sd)
4296 if (sd->sensor == SEN_OV2610 || sd->sensor == SEN_OV3610)
4299 if (sd->sensor == SEN_OV7670) {
4300 switch (sd->ctrls[FREQ].val) {
4301 case 0: /* Banding filter disabled */
4302 i2c_w_mask(sd, OV7670_REG_COM8, 0, OV7670_COM8_BFILT);
4305 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4307 i2c_w_mask(sd, OV7670_REG_COM11, 0x08, 0x18);
4310 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4312 i2c_w_mask(sd, OV7670_REG_COM11, 0x00, 0x18);
4314 case 3: /* Auto hz */
4315 i2c_w_mask(sd, OV7670_REG_COM8, OV7670_COM8_BFILT,
4317 i2c_w_mask(sd, OV7670_REG_COM11, OV7670_COM11_HZAUTO,
4322 switch (sd->ctrls[FREQ].val) {
4323 case 0: /* Banding filter disabled */
4324 i2c_w_mask(sd, 0x2d, 0x00, 0x04);
4325 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4327 case 1: /* 50 hz (filter on and framerate adj) */
4328 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4329 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4330 /* 20 fps -> 16.667 fps */
4331 if (sd->sensor == SEN_OV6620 ||
4332 sd->sensor == SEN_OV6630 ||
4333 sd->sensor == SEN_OV66308AF)
4334 i2c_w(sd, 0x2b, 0x5e);
4336 i2c_w(sd, 0x2b, 0xac);
4338 case 2: /* 60 hz (filter on, ...) */
4339 i2c_w_mask(sd, 0x2d, 0x04, 0x04);
4340 if (sd->sensor == SEN_OV6620 ||
4341 sd->sensor == SEN_OV6630 ||
4342 sd->sensor == SEN_OV66308AF) {
4343 /* 20 fps -> 15 fps */
4344 i2c_w_mask(sd, 0x2a, 0x80, 0x80);
4345 i2c_w(sd, 0x2b, 0xa8);
4347 /* no framerate adj. */
4348 i2c_w_mask(sd, 0x2a, 0x00, 0x80);
4354 static void setfreq(struct gspca_dev *gspca_dev)
4356 struct sd *sd = (struct sd *) gspca_dev;
4360 /* Ugly but necessary */
4361 if (sd->bridge == BRIDGE_W9968CF)
4362 w9968cf_set_crop_window(sd);
4365 static int sd_querymenu(struct gspca_dev *gspca_dev,
4366 struct v4l2_querymenu *menu)
4368 struct sd *sd = (struct sd *) gspca_dev;
4371 case V4L2_CID_POWER_LINE_FREQUENCY:
4372 switch (menu->index) {
4373 case 0: /* V4L2_CID_POWER_LINE_FREQUENCY_DISABLED */
4374 strcpy((char *) menu->name, "NoFliker");
4376 case 1: /* V4L2_CID_POWER_LINE_FREQUENCY_50HZ */
4377 strcpy((char *) menu->name, "50 Hz");
4379 case 2: /* V4L2_CID_POWER_LINE_FREQUENCY_60HZ */
4380 strcpy((char *) menu->name, "60 Hz");
4383 if (sd->sensor != SEN_OV7670)
4386 strcpy((char *) menu->name, "Automatic");
4394 static int sd_get_jcomp(struct gspca_dev *gspca_dev,
4395 struct v4l2_jpegcompression *jcomp)
4397 struct sd *sd = (struct sd *) gspca_dev;
4399 if (sd->bridge != BRIDGE_W9968CF)
4402 memset(jcomp, 0, sizeof *jcomp);
4403 jcomp->quality = sd->quality;
4404 jcomp->jpeg_markers = V4L2_JPEG_MARKER_DHT | V4L2_JPEG_MARKER_DQT |
4405 V4L2_JPEG_MARKER_DRI;
4409 static int sd_set_jcomp(struct gspca_dev *gspca_dev,
4410 struct v4l2_jpegcompression *jcomp)
4412 struct sd *sd = (struct sd *) gspca_dev;
4414 if (sd->bridge != BRIDGE_W9968CF)
4417 if (gspca_dev->streaming)
4420 if (jcomp->quality < QUALITY_MIN)
4421 sd->quality = QUALITY_MIN;
4422 else if (jcomp->quality > QUALITY_MAX)
4423 sd->quality = QUALITY_MAX;
4425 sd->quality = jcomp->quality;
4427 /* Return resulting jcomp params to app */
4428 sd_get_jcomp(gspca_dev, jcomp);
4433 /* sub-driver description */
4434 static const struct sd_desc sd_desc = {
4435 .name = MODULE_NAME,
4437 .nctrls = ARRAY_SIZE(sd_ctrls),
4438 .config = sd_config,
4443 .pkt_scan = sd_pkt_scan,
4444 .dq_callback = sd_reset_snapshot,
4445 .querymenu = sd_querymenu,
4446 .get_jcomp = sd_get_jcomp,
4447 .set_jcomp = sd_set_jcomp,
4448 #if defined(CONFIG_INPUT) || defined(CONFIG_INPUT_MODULE)
4453 /* -- module initialisation -- */
4454 static const __devinitdata struct usb_device_id device_table[] = {
4455 {USB_DEVICE(0x041e, 0x4003), .driver_info = BRIDGE_W9968CF },
4456 {USB_DEVICE(0x041e, 0x4052), .driver_info = BRIDGE_OV519 },
4457 {USB_DEVICE(0x041e, 0x405f), .driver_info = BRIDGE_OV519 },
4458 {USB_DEVICE(0x041e, 0x4060), .driver_info = BRIDGE_OV519 },
4459 {USB_DEVICE(0x041e, 0x4061), .driver_info = BRIDGE_OV519 },
4460 {USB_DEVICE(0x041e, 0x4064),
4461 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4462 {USB_DEVICE(0x041e, 0x4067), .driver_info = BRIDGE_OV519 },
4463 {USB_DEVICE(0x041e, 0x4068),
4464 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4465 {USB_DEVICE(0x045e, 0x028c), .driver_info = BRIDGE_OV519 },
4466 {USB_DEVICE(0x054c, 0x0154), .driver_info = BRIDGE_OV519 },
4467 {USB_DEVICE(0x054c, 0x0155),
4468 .driver_info = BRIDGE_OV519 | BRIDGE_INVERT_LED },
4469 {USB_DEVICE(0x05a9, 0x0511), .driver_info = BRIDGE_OV511 },
4470 {USB_DEVICE(0x05a9, 0x0518), .driver_info = BRIDGE_OV518 },
4471 {USB_DEVICE(0x05a9, 0x0519), .driver_info = BRIDGE_OV519 },
4472 {USB_DEVICE(0x05a9, 0x0530), .driver_info = BRIDGE_OV519 },
4473 {USB_DEVICE(0x05a9, 0x2800), .driver_info = BRIDGE_OVFX2 },
4474 {USB_DEVICE(0x05a9, 0x4519), .driver_info = BRIDGE_OV519 },
4475 {USB_DEVICE(0x05a9, 0x8519), .driver_info = BRIDGE_OV519 },
4476 {USB_DEVICE(0x05a9, 0xa511), .driver_info = BRIDGE_OV511PLUS },
4477 {USB_DEVICE(0x05a9, 0xa518), .driver_info = BRIDGE_OV518PLUS },
4478 {USB_DEVICE(0x0813, 0x0002), .driver_info = BRIDGE_OV511PLUS },
4479 {USB_DEVICE(0x0b62, 0x0059), .driver_info = BRIDGE_OVFX2 },
4480 {USB_DEVICE(0x0e96, 0xc001), .driver_info = BRIDGE_OVFX2 },
4481 {USB_DEVICE(0x1046, 0x9967), .driver_info = BRIDGE_W9968CF },
4482 {USB_DEVICE(0x8020, 0xEF04), .driver_info = BRIDGE_OVFX2 },
4486 MODULE_DEVICE_TABLE(usb, device_table);
4488 /* -- device connect -- */
4489 static int sd_probe(struct usb_interface *intf,
4490 const struct usb_device_id *id)
4492 return gspca_dev_probe(intf, id, &sd_desc, sizeof(struct sd),
4496 static struct usb_driver sd_driver = {
4497 .name = MODULE_NAME,
4498 .id_table = device_table,
4500 .disconnect = gspca_disconnect,
4502 .suspend = gspca_suspend,
4503 .resume = gspca_resume,
4507 /* -- module insert / remove -- */
4508 static int __init sd_mod_init(void)
4510 return usb_register(&sd_driver);
4512 static void __exit sd_mod_exit(void)
4514 usb_deregister(&sd_driver);
4517 module_init(sd_mod_init);
4518 module_exit(sd_mod_exit);
4520 module_param(frame_rate, int, 0644);
4521 MODULE_PARM_DESC(frame_rate, "Frame rate (5, 10, 15, 20 or 30 fps)");