2 * mt9t112 Camera Driver
4 * Copyright (C) 2009 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
7 * Based on ov772x driver, mt9m111 driver,
9 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
10 * Copyright (C) 2008, Robert Jarzmik <robert.jarzmik@free.fr>
11 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
12 * Copyright (C) 2008 Magnus Damm
13 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
15 * This program is free software; you can redistribute it and/or modify
16 * it under the terms of the GNU General Public License version 2 as
17 * published by the Free Software Foundation.
20 #include <linux/delay.h>
21 #include <linux/i2c.h>
22 #include <linux/init.h>
23 #include <linux/module.h>
24 #include <linux/slab.h>
25 #include <linux/v4l2-mediabus.h>
26 #include <linux/videodev2.h>
28 #include <media/mt9t112.h>
29 #include <media/soc_camera.h>
30 #include <media/v4l2-chip-ident.h>
31 #include <media/v4l2-common.h>
33 /* you can check PLL/clock info */
34 /* #define EXT_CLOCK 24000000 */
36 /************************************************************************
38 ************************************************************************/
42 #define MAX_WIDTH 2048
43 #define MAX_HEIGHT 1536
46 #define VGA_HEIGHT 480
51 #define ECHECKER(ret, x) \
58 #define mt9t112_reg_write(ret, client, a, b) \
59 ECHECKER(ret, __mt9t112_reg_write(client, a, b))
60 #define mt9t112_mcu_write(ret, client, a, b) \
61 ECHECKER(ret, __mt9t112_mcu_write(client, a, b))
63 #define mt9t112_reg_mask_set(ret, client, a, b, c) \
64 ECHECKER(ret, __mt9t112_reg_mask_set(client, a, b, c))
65 #define mt9t112_mcu_mask_set(ret, client, a, b, c) \
66 ECHECKER(ret, __mt9t112_mcu_mask_set(client, a, b, c))
68 #define mt9t112_reg_read(ret, client, a) \
69 ECHECKER(ret, __mt9t112_reg_read(client, a))
74 #define _VAR(id, offset, base) (base | (id & 0x1f) << 10 | (offset & 0x3ff))
75 #define VAR(id, offset) _VAR(id, offset, 0x0000)
76 #define VAR8(id, offset) _VAR(id, offset, 0x8000)
78 /************************************************************************
80 ************************************************************************/
81 struct mt9t112_format {
82 enum v4l2_mbus_pixelcode code;
83 enum v4l2_colorspace colorspace;
89 struct v4l2_subdev subdev;
90 struct mt9t112_camera_info *info;
91 struct i2c_client *client;
92 struct v4l2_rect frame;
93 const struct mt9t112_format *format;
97 #define INIT_DONE (1 << 0)
98 #define PCLK_RISING (1 << 1)
101 /************************************************************************
103 ************************************************************************/
105 static const struct mt9t112_format mt9t112_cfmts[] = {
107 .code = V4L2_MBUS_FMT_UYVY8_2X8,
108 .colorspace = V4L2_COLORSPACE_JPEG,
112 .code = V4L2_MBUS_FMT_VYUY8_2X8,
113 .colorspace = V4L2_COLORSPACE_JPEG,
117 .code = V4L2_MBUS_FMT_YUYV8_2X8,
118 .colorspace = V4L2_COLORSPACE_JPEG,
122 .code = V4L2_MBUS_FMT_YVYU8_2X8,
123 .colorspace = V4L2_COLORSPACE_JPEG,
127 .code = V4L2_MBUS_FMT_RGB555_2X8_PADHI_LE,
128 .colorspace = V4L2_COLORSPACE_SRGB,
132 .code = V4L2_MBUS_FMT_RGB565_2X8_LE,
133 .colorspace = V4L2_COLORSPACE_SRGB,
139 /************************************************************************
141 ************************************************************************/
142 static struct mt9t112_priv *to_mt9t112(const struct i2c_client *client)
144 return container_of(i2c_get_clientdata(client),
149 static int __mt9t112_reg_read(const struct i2c_client *client, u16 command)
151 struct i2c_msg msg[2];
155 command = swab16(command);
157 msg[0].addr = client->addr;
160 msg[0].buf = (u8 *)&command;
162 msg[1].addr = client->addr;
163 msg[1].flags = I2C_M_RD;
168 * if return value of this function is < 0,
170 * else, under 16bit is valid data.
172 ret = i2c_transfer(client->adapter, msg, 2);
176 memcpy(&ret, buf, 2);
180 static int __mt9t112_reg_write(const struct i2c_client *client,
181 u16 command, u16 data)
187 command = swab16(command);
190 memcpy(buf + 0, &command, 2);
191 memcpy(buf + 2, &data, 2);
193 msg.addr = client->addr;
199 * i2c_transfer return message length,
200 * but this function should return 0 if correct case
202 ret = i2c_transfer(client->adapter, &msg, 1);
209 static int __mt9t112_reg_mask_set(const struct i2c_client *client,
214 int val = __mt9t112_reg_read(client, command);
221 return __mt9t112_reg_write(client, command, val);
225 static int __mt9t112_mcu_read(const struct i2c_client *client, u16 command)
229 ret = __mt9t112_reg_write(client, 0x098E, command);
233 return __mt9t112_reg_read(client, 0x0990);
236 static int __mt9t112_mcu_write(const struct i2c_client *client,
237 u16 command, u16 data)
241 ret = __mt9t112_reg_write(client, 0x098E, command);
245 return __mt9t112_reg_write(client, 0x0990, data);
248 static int __mt9t112_mcu_mask_set(const struct i2c_client *client,
253 int val = __mt9t112_mcu_read(client, command);
260 return __mt9t112_mcu_write(client, command, val);
263 static int mt9t112_reset(const struct i2c_client *client)
267 mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0001);
269 mt9t112_reg_mask_set(ret, client, 0x001a, 0x0001, 0x0000);
275 #define CLOCK_INFO(a, b)
277 #define CLOCK_INFO(a, b) mt9t112_clock_info(a, b)
278 static int mt9t112_clock_info(const struct i2c_client *client, u32 ext)
280 int m, n, p1, p2, p3, p4, p5, p6, p7;
284 ext /= 1000; /* kbyte order */
286 mt9t112_reg_read(n, client, 0x0012);
293 mt9t112_reg_read(n, client, 0x002a);
300 mt9t112_reg_read(n, client, 0x002c);
303 mt9t112_reg_read(n, client, 0x0010);
305 n = (n >> 8) & 0x003f;
307 enable = ((6000 > ext) || (54000 < ext)) ? "X" : "";
308 dev_dbg(&client->dev, "EXTCLK : %10u K %s\n", ext, enable);
310 vco = 2 * m * ext / (n+1);
311 enable = ((384000 > vco) || (768000 < vco)) ? "X" : "";
312 dev_dbg(&client->dev, "VCO : %10u K %s\n", vco, enable);
314 clk = vco / (p1+1) / (p2+1);
315 enable = (96000 < clk) ? "X" : "";
316 dev_dbg(&client->dev, "PIXCLK : %10u K %s\n", clk, enable);
319 enable = (768000 < clk) ? "X" : "";
320 dev_dbg(&client->dev, "MIPICLK : %10u K %s\n", clk, enable);
323 enable = (96000 < clk) ? "X" : "";
324 dev_dbg(&client->dev, "MCU CLK : %10u K %s\n", clk, enable);
327 enable = (54000 < clk) ? "X" : "";
328 dev_dbg(&client->dev, "SOC CLK : %10u K %s\n", clk, enable);
331 enable = (70000 < clk) ? "X" : "";
332 dev_dbg(&client->dev, "Sensor CLK : %10u K %s\n", clk, enable);
335 dev_dbg(&client->dev, "External sensor : %10u K\n", clk);
338 enable = ((2000 > clk) || (24000 < clk)) ? "X" : "";
339 dev_dbg(&client->dev, "PFD : %10u K %s\n", clk, enable);
345 static void mt9t112_frame_check(u32 *width, u32 *height, u32 *left, u32 *top)
347 soc_camera_limit_side(left, width, 0, 0, MAX_WIDTH);
348 soc_camera_limit_side(top, height, 0, 0, MAX_HEIGHT);
351 static int mt9t112_set_a_frame_size(const struct i2c_client *client,
356 u16 wstart = (MAX_WIDTH - width) / 2;
357 u16 hstart = (MAX_HEIGHT - height) / 2;
359 /* (Context A) Image Width/Height */
360 mt9t112_mcu_write(ret, client, VAR(26, 0), width);
361 mt9t112_mcu_write(ret, client, VAR(26, 2), height);
363 /* (Context A) Output Width/Height */
364 mt9t112_mcu_write(ret, client, VAR(18, 43), 8 + width);
365 mt9t112_mcu_write(ret, client, VAR(18, 45), 8 + height);
367 /* (Context A) Start Row/Column */
368 mt9t112_mcu_write(ret, client, VAR(18, 2), 4 + hstart);
369 mt9t112_mcu_write(ret, client, VAR(18, 4), 4 + wstart);
371 /* (Context A) End Row/Column */
372 mt9t112_mcu_write(ret, client, VAR(18, 6), 11 + height + hstart);
373 mt9t112_mcu_write(ret, client, VAR(18, 8), 11 + width + wstart);
375 mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06);
380 static int mt9t112_set_pll_dividers(const struct i2c_client *client,
392 mt9t112_reg_mask_set(ret, client, 0x0010, 0x3fff, val);
395 val = ((p3 & 0x0F) << 8) |
398 mt9t112_reg_mask_set(ret, client, 0x0012, 0x0fff, val);
405 mt9t112_reg_mask_set(ret, client, 0x002A, 0x7fff, val);
410 mt9t112_reg_mask_set(ret, client, 0x002C, 0x100f, val);
415 static int mt9t112_init_pll(const struct i2c_client *client)
417 struct mt9t112_priv *priv = to_mt9t112(client);
420 mt9t112_reg_mask_set(ret, client, 0x0014, 0x003, 0x0001);
422 /* PLL control: BYPASS PLL = 8517 */
423 mt9t112_reg_write(ret, client, 0x0014, 0x2145);
425 /* Replace these registers when new timing parameters are generated */
426 mt9t112_set_pll_dividers(client,
427 priv->info->divider.m,
428 priv->info->divider.n,
429 priv->info->divider.p1,
430 priv->info->divider.p2,
431 priv->info->divider.p3,
432 priv->info->divider.p4,
433 priv->info->divider.p5,
434 priv->info->divider.p6,
435 priv->info->divider.p7);
443 mt9t112_reg_write(ret, client, 0x0014, 0x2525);
444 mt9t112_reg_write(ret, client, 0x0014, 0x2527);
445 mt9t112_reg_write(ret, client, 0x0014, 0x3427);
446 mt9t112_reg_write(ret, client, 0x0014, 0x3027);
452 * Reference clock count
453 * I2C Master Clock Divider
455 mt9t112_reg_write(ret, client, 0x0014, 0x3046);
456 mt9t112_reg_write(ret, client, 0x0016, 0x0400); /* JPEG initialization workaround */
457 mt9t112_reg_write(ret, client, 0x0022, 0x0190);
458 mt9t112_reg_write(ret, client, 0x3B84, 0x0212);
460 /* External sensor clock is PLL bypass */
461 mt9t112_reg_write(ret, client, 0x002E, 0x0500);
463 mt9t112_reg_mask_set(ret, client, 0x0018, 0x0002, 0x0002);
464 mt9t112_reg_mask_set(ret, client, 0x3B82, 0x0004, 0x0004);
467 mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0x0004);
470 mt9t112_reg_mask_set(ret, client, 0x0018, 0x0001, 0);
476 * Disable Secondary I2C Pads
478 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
480 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
482 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
484 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
486 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
488 mt9t112_reg_write(ret, client, 0x0614, 0x0001);
491 /* poll to verify out of standby. Must Poll this bit */
492 for (i = 0; i < 100; i++) {
493 mt9t112_reg_read(data, client, 0x0018);
494 if (!(0x4000 & data))
503 static int mt9t112_init_setting(const struct i2c_client *client)
508 /* Adaptive Output Clock (A) */
509 mt9t112_mcu_mask_set(ret, client, VAR(26, 160), 0x0040, 0x0000);
512 mt9t112_mcu_write(ret, client, VAR(18, 12), 0x0024);
514 /* Fine Correction (A) */
515 mt9t112_mcu_write(ret, client, VAR(18, 15), 0x00CC);
517 /* Fine IT Min (A) */
518 mt9t112_mcu_write(ret, client, VAR(18, 17), 0x01f1);
520 /* Fine IT Max Margin (A) */
521 mt9t112_mcu_write(ret, client, VAR(18, 19), 0x00fF);
523 /* Base Frame Lines (A) */
524 mt9t112_mcu_write(ret, client, VAR(18, 29), 0x032D);
526 /* Min Line Length (A) */
527 mt9t112_mcu_write(ret, client, VAR(18, 31), 0x073a);
529 /* Line Length (A) */
530 mt9t112_mcu_write(ret, client, VAR(18, 37), 0x07d0);
532 /* Adaptive Output Clock (B) */
533 mt9t112_mcu_mask_set(ret, client, VAR(27, 160), 0x0040, 0x0000);
536 mt9t112_mcu_write(ret, client, VAR(18, 74), 0x004);
538 /* Column Start (B) */
539 mt9t112_mcu_write(ret, client, VAR(18, 76), 0x004);
542 mt9t112_mcu_write(ret, client, VAR(18, 78), 0x60B);
545 mt9t112_mcu_write(ret, client, VAR(18, 80), 0x80B);
547 /* Fine Correction (B) */
548 mt9t112_mcu_write(ret, client, VAR(18, 87), 0x008C);
550 /* Fine IT Min (B) */
551 mt9t112_mcu_write(ret, client, VAR(18, 89), 0x01F1);
553 /* Fine IT Max Margin (B) */
554 mt9t112_mcu_write(ret, client, VAR(18, 91), 0x00FF);
556 /* Base Frame Lines (B) */
557 mt9t112_mcu_write(ret, client, VAR(18, 101), 0x0668);
559 /* Min Line Length (B) */
560 mt9t112_mcu_write(ret, client, VAR(18, 103), 0x0AF0);
562 /* Line Length (B) */
563 mt9t112_mcu_write(ret, client, VAR(18, 109), 0x0AF0);
566 * Flicker Dectection registers
567 * This section should be replaced whenever new Timing file is generated
568 * All the following registers need to be replaced
569 * Following registers are generated from Register Wizard but user can
570 * modify them. For detail see auto flicker detection tuning
573 /* FD_FDPERIOD_SELECT */
574 mt9t112_mcu_write(ret, client, VAR8(8, 5), 0x01);
576 /* PRI_B_CONFIG_FD_ALGO_RUN */
577 mt9t112_mcu_write(ret, client, VAR(27, 17), 0x0003);
579 /* PRI_A_CONFIG_FD_ALGO_RUN */
580 mt9t112_mcu_write(ret, client, VAR(26, 17), 0x0003);
583 * AFD range detection tuning registers
587 mt9t112_mcu_write(ret, client, VAR8(18, 165), 0x25);
590 mt9t112_mcu_write(ret, client, VAR8(18, 166), 0x28);
593 mt9t112_mcu_write(ret, client, VAR8(18, 167), 0x2C);
596 mt9t112_mcu_write(ret, client, VAR8(18, 168), 0x2F);
598 /* period_50Hz (A) */
599 mt9t112_mcu_write(ret, client, VAR8(18, 68), 0xBA);
601 /* secret register by aptina */
602 /* period_50Hz (A MSB) */
603 mt9t112_mcu_write(ret, client, VAR8(18, 303), 0x00);
605 /* period_60Hz (A) */
606 mt9t112_mcu_write(ret, client, VAR8(18, 69), 0x9B);
608 /* secret register by aptina */
609 /* period_60Hz (A MSB) */
610 mt9t112_mcu_write(ret, client, VAR8(18, 301), 0x00);
612 /* period_50Hz (B) */
613 mt9t112_mcu_write(ret, client, VAR8(18, 140), 0x82);
615 /* secret register by aptina */
616 /* period_50Hz (B) MSB */
617 mt9t112_mcu_write(ret, client, VAR8(18, 304), 0x00);
619 /* period_60Hz (B) */
620 mt9t112_mcu_write(ret, client, VAR8(18, 141), 0x6D);
622 /* secret register by aptina */
623 /* period_60Hz (B) MSB */
624 mt9t112_mcu_write(ret, client, VAR8(18, 302), 0x00);
627 mt9t112_mcu_write(ret, client, VAR8(8, 2), 0x10);
630 mt9t112_mcu_write(ret, client, VAR8(8, 9), 0x02);
633 mt9t112_mcu_write(ret, client, VAR8(8, 10), 0x03);
636 mt9t112_mcu_write(ret, client, VAR8(8, 12), 0x0A);
638 /* RX FIFO Watermark (A) */
639 mt9t112_mcu_write(ret, client, VAR(18, 70), 0x0014);
641 /* RX FIFO Watermark (B) */
642 mt9t112_mcu_write(ret, client, VAR(18, 142), 0x0014);
646 * CorePixCLK: 36.5 MHz
648 mt9t112_mcu_write(ret, client, VAR8(18, 0x0044), 133);
649 mt9t112_mcu_write(ret, client, VAR8(18, 0x0045), 110);
650 mt9t112_mcu_write(ret, client, VAR8(18, 0x008c), 130);
651 mt9t112_mcu_write(ret, client, VAR8(18, 0x008d), 108);
653 mt9t112_mcu_write(ret, client, VAR8(18, 0x00A5), 27);
654 mt9t112_mcu_write(ret, client, VAR8(18, 0x00a6), 30);
655 mt9t112_mcu_write(ret, client, VAR8(18, 0x00a7), 32);
656 mt9t112_mcu_write(ret, client, VAR8(18, 0x00a8), 35);
661 static int mt9t112_auto_focus_setting(const struct i2c_client *client)
665 mt9t112_mcu_write(ret, client, VAR(12, 13), 0x000F);
666 mt9t112_mcu_write(ret, client, VAR(12, 23), 0x0F0F);
667 mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06);
669 mt9t112_reg_write(ret, client, 0x0614, 0x0000);
671 mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x05);
672 mt9t112_mcu_write(ret, client, VAR8(12, 2), 0x02);
673 mt9t112_mcu_write(ret, client, VAR(12, 3), 0x0002);
674 mt9t112_mcu_write(ret, client, VAR(17, 3), 0x8001);
675 mt9t112_mcu_write(ret, client, VAR(17, 11), 0x0025);
676 mt9t112_mcu_write(ret, client, VAR(17, 13), 0x0193);
677 mt9t112_mcu_write(ret, client, VAR8(17, 33), 0x18);
678 mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x05);
683 static int mt9t112_auto_focus_trigger(const struct i2c_client *client)
687 mt9t112_mcu_write(ret, client, VAR8(12, 25), 0x01);
692 static int mt9t112_init_camera(const struct i2c_client *client)
696 ECHECKER(ret, mt9t112_reset(client));
698 ECHECKER(ret, mt9t112_init_pll(client));
700 ECHECKER(ret, mt9t112_init_setting(client));
702 ECHECKER(ret, mt9t112_auto_focus_setting(client));
704 mt9t112_reg_mask_set(ret, client, 0x0018, 0x0004, 0);
706 /* Analog setting B */
707 mt9t112_reg_write(ret, client, 0x3084, 0x2409);
708 mt9t112_reg_write(ret, client, 0x3092, 0x0A49);
709 mt9t112_reg_write(ret, client, 0x3094, 0x4949);
710 mt9t112_reg_write(ret, client, 0x3096, 0x4950);
713 * Disable adaptive clock
714 * PRI_A_CONFIG_JPEG_OB_TX_CONTROL_VAR
715 * PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR
717 mt9t112_mcu_write(ret, client, VAR(26, 160), 0x0A2E);
718 mt9t112_mcu_write(ret, client, VAR(27, 160), 0x0A2E);
720 /* Configure STatus in Status_before_length Format and enable header */
721 /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */
722 mt9t112_mcu_write(ret, client, VAR(27, 144), 0x0CB4);
724 /* Enable JPEG in context B */
725 /* PRI_B_CONFIG_JPEG_OB_TX_CONTROL_VAR */
726 mt9t112_mcu_write(ret, client, VAR8(27, 142), 0x01);
728 /* Disable Dac_TXLO */
729 mt9t112_reg_write(ret, client, 0x316C, 0x350F);
731 /* Set max slew rates */
732 mt9t112_reg_write(ret, client, 0x1E, 0x777);
737 /************************************************************************
739 ************************************************************************/
740 static int mt9t112_g_chip_ident(struct v4l2_subdev *sd,
741 struct v4l2_dbg_chip_ident *id)
743 struct i2c_client *client = v4l2_get_subdevdata(sd);
744 struct mt9t112_priv *priv = to_mt9t112(client);
746 id->ident = priv->model;
752 #ifdef CONFIG_VIDEO_ADV_DEBUG
753 static int mt9t112_g_register(struct v4l2_subdev *sd,
754 struct v4l2_dbg_register *reg)
756 struct i2c_client *client = v4l2_get_subdevdata(sd);
760 mt9t112_reg_read(ret, client, reg->reg);
762 reg->val = (__u64)ret;
767 static int mt9t112_s_register(struct v4l2_subdev *sd,
768 struct v4l2_dbg_register *reg)
770 struct i2c_client *client = v4l2_get_subdevdata(sd);
773 mt9t112_reg_write(ret, client, reg->reg, reg->val);
779 static struct v4l2_subdev_core_ops mt9t112_subdev_core_ops = {
780 .g_chip_ident = mt9t112_g_chip_ident,
781 #ifdef CONFIG_VIDEO_ADV_DEBUG
782 .g_register = mt9t112_g_register,
783 .s_register = mt9t112_s_register,
788 /************************************************************************
789 v4l2_subdev_video_ops
790 ************************************************************************/
791 static int mt9t112_s_stream(struct v4l2_subdev *sd, int enable)
793 struct i2c_client *client = v4l2_get_subdevdata(sd);
794 struct mt9t112_priv *priv = to_mt9t112(client);
800 * If user selected large output size,
801 * and used it long time,
802 * mt9t112 camera will be very warm.
804 * But current driver can not stop mt9t112 camera.
805 * So, set small size here to solve this problem.
807 mt9t112_set_a_frame_size(client, VGA_WIDTH, VGA_HEIGHT);
811 if (!(priv->flags & INIT_DONE)) {
812 u16 param = PCLK_RISING & priv->flags ? 0x0001 : 0x0000;
814 ECHECKER(ret, mt9t112_init_camera(client));
816 /* Invert PCLK (Data sampled on falling edge of pixclk) */
817 mt9t112_reg_write(ret, client, 0x3C20, param);
821 priv->flags |= INIT_DONE;
824 mt9t112_mcu_write(ret, client, VAR(26, 7), priv->format->fmt);
825 mt9t112_mcu_write(ret, client, VAR(26, 9), priv->format->order);
826 mt9t112_mcu_write(ret, client, VAR8(1, 0), 0x06);
828 mt9t112_set_a_frame_size(client,
832 ECHECKER(ret, mt9t112_auto_focus_trigger(client));
834 dev_dbg(&client->dev, "format : %d\n", priv->format->code);
835 dev_dbg(&client->dev, "size : %d x %d\n",
839 CLOCK_INFO(client, EXT_CLOCK);
844 static int mt9t112_set_params(struct mt9t112_priv *priv,
845 const struct v4l2_rect *rect,
846 enum v4l2_mbus_pixelcode code)
853 for (i = 0; i < ARRAY_SIZE(mt9t112_cfmts); i++)
854 if (mt9t112_cfmts[i].code == code)
857 if (i == ARRAY_SIZE(mt9t112_cfmts))
865 mt9t112_frame_check(&priv->frame.width, &priv->frame.height,
866 &priv->frame.left, &priv->frame.top);
868 priv->format = mt9t112_cfmts + i;
873 static int mt9t112_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
877 a->bounds.width = MAX_WIDTH;
878 a->bounds.height = MAX_HEIGHT;
881 a->defrect.width = VGA_WIDTH;
882 a->defrect.height = VGA_HEIGHT;
883 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
884 a->pixelaspect.numerator = 1;
885 a->pixelaspect.denominator = 1;
890 static int mt9t112_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
892 struct i2c_client *client = v4l2_get_subdevdata(sd);
893 struct mt9t112_priv *priv = to_mt9t112(client);
896 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
901 static int mt9t112_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
903 struct i2c_client *client = v4l2_get_subdevdata(sd);
904 struct mt9t112_priv *priv = to_mt9t112(client);
905 struct v4l2_rect *rect = &a->c;
907 return mt9t112_set_params(priv, rect, priv->format->code);
910 static int mt9t112_g_fmt(struct v4l2_subdev *sd,
911 struct v4l2_mbus_framefmt *mf)
913 struct i2c_client *client = v4l2_get_subdevdata(sd);
914 struct mt9t112_priv *priv = to_mt9t112(client);
916 mf->width = priv->frame.width;
917 mf->height = priv->frame.height;
918 mf->colorspace = priv->format->colorspace;
919 mf->code = priv->format->code;
920 mf->field = V4L2_FIELD_NONE;
925 static int mt9t112_s_fmt(struct v4l2_subdev *sd,
926 struct v4l2_mbus_framefmt *mf)
928 struct i2c_client *client = v4l2_get_subdevdata(sd);
929 struct mt9t112_priv *priv = to_mt9t112(client);
930 struct v4l2_rect rect = {
932 .height = mf->height,
933 .left = priv->frame.left,
934 .top = priv->frame.top,
938 ret = mt9t112_set_params(priv, &rect, mf->code);
941 mf->colorspace = priv->format->colorspace;
946 static int mt9t112_try_fmt(struct v4l2_subdev *sd,
947 struct v4l2_mbus_framefmt *mf)
949 unsigned int top, left;
952 for (i = 0; i < ARRAY_SIZE(mt9t112_cfmts); i++)
953 if (mt9t112_cfmts[i].code == mf->code)
956 if (i == ARRAY_SIZE(mt9t112_cfmts)) {
957 mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
958 mf->colorspace = V4L2_COLORSPACE_JPEG;
960 mf->colorspace = mt9t112_cfmts[i].colorspace;
963 mt9t112_frame_check(&mf->width, &mf->height, &left, &top);
965 mf->field = V4L2_FIELD_NONE;
970 static int mt9t112_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
971 enum v4l2_mbus_pixelcode *code)
973 if (index >= ARRAY_SIZE(mt9t112_cfmts))
976 *code = mt9t112_cfmts[index].code;
981 static int mt9t112_g_mbus_config(struct v4l2_subdev *sd,
982 struct v4l2_mbus_config *cfg)
984 struct i2c_client *client = v4l2_get_subdevdata(sd);
985 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
987 cfg->flags = V4L2_MBUS_MASTER | V4L2_MBUS_VSYNC_ACTIVE_HIGH |
988 V4L2_MBUS_HSYNC_ACTIVE_HIGH | V4L2_MBUS_DATA_ACTIVE_HIGH |
989 V4L2_MBUS_PCLK_SAMPLE_RISING | V4L2_MBUS_PCLK_SAMPLE_FALLING;
990 cfg->type = V4L2_MBUS_PARALLEL;
991 cfg->flags = soc_camera_apply_board_flags(icl, cfg);
996 static int mt9t112_s_mbus_config(struct v4l2_subdev *sd,
997 const struct v4l2_mbus_config *cfg)
999 struct i2c_client *client = v4l2_get_subdevdata(sd);
1000 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
1001 struct mt9t112_priv *priv = to_mt9t112(client);
1003 if (soc_camera_apply_board_flags(icl, cfg) & V4L2_MBUS_PCLK_SAMPLE_RISING)
1004 priv->flags |= PCLK_RISING;
1009 static struct v4l2_subdev_video_ops mt9t112_subdev_video_ops = {
1010 .s_stream = mt9t112_s_stream,
1011 .g_mbus_fmt = mt9t112_g_fmt,
1012 .s_mbus_fmt = mt9t112_s_fmt,
1013 .try_mbus_fmt = mt9t112_try_fmt,
1014 .cropcap = mt9t112_cropcap,
1015 .g_crop = mt9t112_g_crop,
1016 .s_crop = mt9t112_s_crop,
1017 .enum_mbus_fmt = mt9t112_enum_fmt,
1018 .g_mbus_config = mt9t112_g_mbus_config,
1019 .s_mbus_config = mt9t112_s_mbus_config,
1022 /************************************************************************
1024 ************************************************************************/
1025 static struct v4l2_subdev_ops mt9t112_subdev_ops = {
1026 .core = &mt9t112_subdev_core_ops,
1027 .video = &mt9t112_subdev_video_ops,
1030 static int mt9t112_camera_probe(struct i2c_client *client)
1032 struct mt9t112_priv *priv = to_mt9t112(client);
1033 const char *devname;
1037 * check and show chip ID
1039 mt9t112_reg_read(chipid, client, 0x0000);
1043 devname = "mt9t111";
1044 priv->model = V4L2_IDENT_MT9T111;
1047 devname = "mt9t112";
1048 priv->model = V4L2_IDENT_MT9T112;
1051 dev_err(&client->dev, "Product ID error %04x\n", chipid);
1055 dev_info(&client->dev, "%s chip ID %04x\n", devname, chipid);
1060 static int mt9t112_probe(struct i2c_client *client,
1061 const struct i2c_device_id *did)
1063 struct mt9t112_priv *priv;
1064 struct soc_camera_link *icl = soc_camera_i2c_to_link(client);
1065 struct v4l2_rect rect = {
1067 .height = VGA_HEIGHT,
1068 .left = (MAX_WIDTH - VGA_WIDTH) / 2,
1069 .top = (MAX_HEIGHT - VGA_HEIGHT) / 2,
1073 if (!icl || !icl->priv) {
1074 dev_err(&client->dev, "mt9t112: missing platform data!\n");
1078 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
1082 priv->info = icl->priv;
1084 v4l2_i2c_subdev_init(&priv->subdev, client, &mt9t112_subdev_ops);
1086 ret = mt9t112_camera_probe(client);
1092 /* Cannot fail: using the default supported pixel code */
1093 mt9t112_set_params(priv, &rect, V4L2_MBUS_FMT_UYVY8_2X8);
1098 static int mt9t112_remove(struct i2c_client *client)
1100 struct mt9t112_priv *priv = to_mt9t112(client);
1106 static const struct i2c_device_id mt9t112_id[] = {
1110 MODULE_DEVICE_TABLE(i2c, mt9t112_id);
1112 static struct i2c_driver mt9t112_i2c_driver = {
1116 .probe = mt9t112_probe,
1117 .remove = mt9t112_remove,
1118 .id_table = mt9t112_id,
1121 module_i2c_driver(mt9t112_i2c_driver);
1123 MODULE_DESCRIPTION("SoC Camera driver for mt9t112");
1124 MODULE_AUTHOR("Kuninori Morimoto");
1125 MODULE_LICENSE("GPL v2");