4 * Copyright (C) 2005 Mike Isely <isely@pobox.com>
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License
10 * This program is distributed in the hope that it will be useful,
11 * but WITHOUT ANY WARRANTY; without even the implied warranty of
12 * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
13 * GNU General Public License for more details.
15 * You should have received a copy of the GNU General Public License
16 * along with this program; if not, write to the Free Software
17 * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA 02111-1307 USA
21 #include <linux/errno.h>
22 #include <linux/string.h>
23 #include <linux/slab.h>
24 #include <linux/firmware.h>
25 #include <linux/videodev2.h>
26 #include <media/v4l2-common.h>
27 #include <media/tuner.h>
29 #include "pvrusb2-std.h"
30 #include "pvrusb2-util.h"
31 #include "pvrusb2-hdw.h"
32 #include "pvrusb2-i2c-core.h"
33 #include "pvrusb2-eeprom.h"
34 #include "pvrusb2-hdw-internal.h"
35 #include "pvrusb2-encoder.h"
36 #include "pvrusb2-debug.h"
37 #include "pvrusb2-fx2-cmd.h"
38 #include "pvrusb2-wm8775.h"
39 #include "pvrusb2-video-v4l.h"
40 #include "pvrusb2-cx2584x-v4l.h"
41 #include "pvrusb2-cs53l32a.h"
42 #include "pvrusb2-audio.h"
44 #define TV_MIN_FREQ 55250000L
45 #define TV_MAX_FREQ 850000000L
47 /* This defines a minimum interval that the decoder must remain quiet
48 before we are allowed to start it running. */
49 #define TIME_MSEC_DECODER_WAIT 50
51 /* This defines a minimum interval that the encoder must remain quiet
52 before we are allowed to configure it. I had this originally set to
53 50msec, but Martin Dauskardt <martin.dauskardt@gmx.de> reports that
54 things work better when it's set to 100msec. */
55 #define TIME_MSEC_ENCODER_WAIT 100
57 /* This defines the minimum interval that the encoder must successfully run
58 before we consider that the encoder has run at least once since its
59 firmware has been loaded. This measurement is in important for cases
60 where we can't do something until we know that the encoder has been run
62 #define TIME_MSEC_ENCODER_OK 250
64 static struct pvr2_hdw *unit_pointers[PVR_NUM] = {[ 0 ... PVR_NUM-1 ] = NULL};
65 static DEFINE_MUTEX(pvr2_unit_mtx);
68 static int procreload;
69 static int tuner[PVR_NUM] = { [0 ... PVR_NUM-1] = -1 };
70 static int tolerance[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 };
71 static int video_std[PVR_NUM] = { [0 ... PVR_NUM-1] = 0 };
72 static int init_pause_msec;
74 module_param(ctlchg, int, S_IRUGO|S_IWUSR);
75 MODULE_PARM_DESC(ctlchg, "0=optimize ctl change 1=always accept new ctl value");
76 module_param(init_pause_msec, int, S_IRUGO|S_IWUSR);
77 MODULE_PARM_DESC(init_pause_msec, "hardware initialization settling delay");
78 module_param(procreload, int, S_IRUGO|S_IWUSR);
79 MODULE_PARM_DESC(procreload,
80 "Attempt init failure recovery with firmware reload");
81 module_param_array(tuner, int, NULL, 0444);
82 MODULE_PARM_DESC(tuner,"specify installed tuner type");
83 module_param_array(video_std, int, NULL, 0444);
84 MODULE_PARM_DESC(video_std,"specify initial video standard");
85 module_param_array(tolerance, int, NULL, 0444);
86 MODULE_PARM_DESC(tolerance,"specify stream error tolerance");
88 /* US Broadcast channel 7 (175.25 MHz) */
89 static int default_tv_freq = 175250000L;
90 /* 104.3 MHz, a usable FM station for my area */
91 static int default_radio_freq = 104300000L;
93 module_param_named(tv_freq, default_tv_freq, int, 0444);
94 MODULE_PARM_DESC(tv_freq, "specify initial television frequency");
95 module_param_named(radio_freq, default_radio_freq, int, 0444);
96 MODULE_PARM_DESC(radio_freq, "specify initial radio frequency");
98 #define PVR2_CTL_WRITE_ENDPOINT 0x01
99 #define PVR2_CTL_READ_ENDPOINT 0x81
101 #define PVR2_GPIO_IN 0x9008
102 #define PVR2_GPIO_OUT 0x900c
103 #define PVR2_GPIO_DIR 0x9020
105 #define trace_firmware(...) pvr2_trace(PVR2_TRACE_FIRMWARE,__VA_ARGS__)
107 #define PVR2_FIRMWARE_ENDPOINT 0x02
109 /* size of a firmware chunk */
110 #define FIRMWARE_CHUNK_SIZE 0x2000
112 typedef void (*pvr2_subdev_update_func)(struct pvr2_hdw *,
113 struct v4l2_subdev *);
115 static const pvr2_subdev_update_func pvr2_module_update_functions[] = {
116 [PVR2_CLIENT_ID_WM8775] = pvr2_wm8775_subdev_update,
117 [PVR2_CLIENT_ID_SAA7115] = pvr2_saa7115_subdev_update,
118 [PVR2_CLIENT_ID_MSP3400] = pvr2_msp3400_subdev_update,
119 [PVR2_CLIENT_ID_CX25840] = pvr2_cx25840_subdev_update,
120 [PVR2_CLIENT_ID_CS53L32A] = pvr2_cs53l32a_subdev_update,
123 static const char *module_names[] = {
124 [PVR2_CLIENT_ID_MSP3400] = "msp3400",
125 [PVR2_CLIENT_ID_CX25840] = "cx25840",
126 [PVR2_CLIENT_ID_SAA7115] = "saa7115",
127 [PVR2_CLIENT_ID_TUNER] = "tuner",
128 [PVR2_CLIENT_ID_DEMOD] = "tuner",
129 [PVR2_CLIENT_ID_CS53L32A] = "cs53l32a",
130 [PVR2_CLIENT_ID_WM8775] = "wm8775",
134 static const unsigned char *module_i2c_addresses[] = {
135 [PVR2_CLIENT_ID_TUNER] = "\x60\x61\x62\x63",
136 [PVR2_CLIENT_ID_DEMOD] = "\x43",
137 [PVR2_CLIENT_ID_MSP3400] = "\x40",
138 [PVR2_CLIENT_ID_SAA7115] = "\x21",
139 [PVR2_CLIENT_ID_WM8775] = "\x1b",
140 [PVR2_CLIENT_ID_CX25840] = "\x44",
141 [PVR2_CLIENT_ID_CS53L32A] = "\x11",
145 /* Define the list of additional controls we'll dynamically construct based
146 on query of the cx2341x module. */
147 struct pvr2_mpeg_ids {
151 static const struct pvr2_mpeg_ids mpeg_ids[] = {
153 .strid = "audio_layer",
154 .id = V4L2_CID_MPEG_AUDIO_ENCODING,
156 .strid = "audio_bitrate",
157 .id = V4L2_CID_MPEG_AUDIO_L2_BITRATE,
159 /* Already using audio_mode elsewhere :-( */
160 .strid = "mpeg_audio_mode",
161 .id = V4L2_CID_MPEG_AUDIO_MODE,
163 .strid = "mpeg_audio_mode_extension",
164 .id = V4L2_CID_MPEG_AUDIO_MODE_EXTENSION,
166 .strid = "audio_emphasis",
167 .id = V4L2_CID_MPEG_AUDIO_EMPHASIS,
169 .strid = "audio_crc",
170 .id = V4L2_CID_MPEG_AUDIO_CRC,
172 .strid = "video_aspect",
173 .id = V4L2_CID_MPEG_VIDEO_ASPECT,
175 .strid = "video_b_frames",
176 .id = V4L2_CID_MPEG_VIDEO_B_FRAMES,
178 .strid = "video_gop_size",
179 .id = V4L2_CID_MPEG_VIDEO_GOP_SIZE,
181 .strid = "video_gop_closure",
182 .id = V4L2_CID_MPEG_VIDEO_GOP_CLOSURE,
184 .strid = "video_bitrate_mode",
185 .id = V4L2_CID_MPEG_VIDEO_BITRATE_MODE,
187 .strid = "video_bitrate",
188 .id = V4L2_CID_MPEG_VIDEO_BITRATE,
190 .strid = "video_bitrate_peak",
191 .id = V4L2_CID_MPEG_VIDEO_BITRATE_PEAK,
193 .strid = "video_temporal_decimation",
194 .id = V4L2_CID_MPEG_VIDEO_TEMPORAL_DECIMATION,
196 .strid = "stream_type",
197 .id = V4L2_CID_MPEG_STREAM_TYPE,
199 .strid = "video_spatial_filter_mode",
200 .id = V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER_MODE,
202 .strid = "video_spatial_filter",
203 .id = V4L2_CID_MPEG_CX2341X_VIDEO_SPATIAL_FILTER,
205 .strid = "video_luma_spatial_filter_type",
206 .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_SPATIAL_FILTER_TYPE,
208 .strid = "video_chroma_spatial_filter_type",
209 .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_SPATIAL_FILTER_TYPE,
211 .strid = "video_temporal_filter_mode",
212 .id = V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER_MODE,
214 .strid = "video_temporal_filter",
215 .id = V4L2_CID_MPEG_CX2341X_VIDEO_TEMPORAL_FILTER,
217 .strid = "video_median_filter_type",
218 .id = V4L2_CID_MPEG_CX2341X_VIDEO_MEDIAN_FILTER_TYPE,
220 .strid = "video_luma_median_filter_top",
221 .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_TOP,
223 .strid = "video_luma_median_filter_bottom",
224 .id = V4L2_CID_MPEG_CX2341X_VIDEO_LUMA_MEDIAN_FILTER_BOTTOM,
226 .strid = "video_chroma_median_filter_top",
227 .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_TOP,
229 .strid = "video_chroma_median_filter_bottom",
230 .id = V4L2_CID_MPEG_CX2341X_VIDEO_CHROMA_MEDIAN_FILTER_BOTTOM,
233 #define MPEGDEF_COUNT ARRAY_SIZE(mpeg_ids)
236 static const char *control_values_srate[] = {
237 [V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100] = "44.1 kHz",
238 [V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000] = "48 kHz",
239 [V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000] = "32 kHz",
244 static const char *control_values_input[] = {
245 [PVR2_CVAL_INPUT_TV] = "television", /*xawtv needs this name*/
246 [PVR2_CVAL_INPUT_DTV] = "dtv",
247 [PVR2_CVAL_INPUT_RADIO] = "radio",
248 [PVR2_CVAL_INPUT_SVIDEO] = "s-video",
249 [PVR2_CVAL_INPUT_COMPOSITE] = "composite",
253 static const char *control_values_audiomode[] = {
254 [V4L2_TUNER_MODE_MONO] = "Mono",
255 [V4L2_TUNER_MODE_STEREO] = "Stereo",
256 [V4L2_TUNER_MODE_LANG1] = "Lang1",
257 [V4L2_TUNER_MODE_LANG2] = "Lang2",
258 [V4L2_TUNER_MODE_LANG1_LANG2] = "Lang1+Lang2",
262 static const char *control_values_hsm[] = {
263 [PVR2_CVAL_HSM_FAIL] = "Fail",
264 [PVR2_CVAL_HSM_HIGH] = "High",
265 [PVR2_CVAL_HSM_FULL] = "Full",
269 static const char *pvr2_state_names[] = {
270 [PVR2_STATE_NONE] = "none",
271 [PVR2_STATE_DEAD] = "dead",
272 [PVR2_STATE_COLD] = "cold",
273 [PVR2_STATE_WARM] = "warm",
274 [PVR2_STATE_ERROR] = "error",
275 [PVR2_STATE_READY] = "ready",
276 [PVR2_STATE_RUN] = "run",
280 struct pvr2_fx2cmd_descdef {
285 static const struct pvr2_fx2cmd_descdef pvr2_fx2cmd_desc[] = {
286 {FX2CMD_MEM_WRITE_DWORD, "write encoder dword"},
287 {FX2CMD_MEM_READ_DWORD, "read encoder dword"},
288 {FX2CMD_HCW_ZILOG_RESET, "zilog IR reset control"},
289 {FX2CMD_MEM_READ_64BYTES, "read encoder 64bytes"},
290 {FX2CMD_REG_WRITE, "write encoder register"},
291 {FX2CMD_REG_READ, "read encoder register"},
292 {FX2CMD_MEMSEL, "encoder memsel"},
293 {FX2CMD_I2C_WRITE, "i2c write"},
294 {FX2CMD_I2C_READ, "i2c read"},
295 {FX2CMD_GET_USB_SPEED, "get USB speed"},
296 {FX2CMD_STREAMING_ON, "stream on"},
297 {FX2CMD_STREAMING_OFF, "stream off"},
298 {FX2CMD_FWPOST1, "fwpost1"},
299 {FX2CMD_POWER_OFF, "power off"},
300 {FX2CMD_POWER_ON, "power on"},
301 {FX2CMD_DEEP_RESET, "deep reset"},
302 {FX2CMD_GET_EEPROM_ADDR, "get rom addr"},
303 {FX2CMD_GET_IR_CODE, "get IR code"},
304 {FX2CMD_HCW_DEMOD_RESETIN, "hcw demod resetin"},
305 {FX2CMD_HCW_DTV_STREAMING_ON, "hcw dtv stream on"},
306 {FX2CMD_HCW_DTV_STREAMING_OFF, "hcw dtv stream off"},
307 {FX2CMD_ONAIR_DTV_STREAMING_ON, "onair dtv stream on"},
308 {FX2CMD_ONAIR_DTV_STREAMING_OFF, "onair dtv stream off"},
309 {FX2CMD_ONAIR_DTV_POWER_ON, "onair dtv power on"},
310 {FX2CMD_ONAIR_DTV_POWER_OFF, "onair dtv power off"},
314 static int pvr2_hdw_set_input(struct pvr2_hdw *hdw,int v);
315 static void pvr2_hdw_state_sched(struct pvr2_hdw *);
316 static int pvr2_hdw_state_eval(struct pvr2_hdw *);
317 static void pvr2_hdw_set_cur_freq(struct pvr2_hdw *,unsigned long);
318 static void pvr2_hdw_worker_poll(struct work_struct *work);
319 static int pvr2_hdw_wait(struct pvr2_hdw *,int state);
320 static int pvr2_hdw_untrip_unlocked(struct pvr2_hdw *);
321 static void pvr2_hdw_state_log_state(struct pvr2_hdw *);
322 static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl);
323 static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw);
324 static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw);
325 static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw);
326 static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw);
327 static void pvr2_hdw_quiescent_timeout(unsigned long);
328 static void pvr2_hdw_encoder_wait_timeout(unsigned long);
329 static void pvr2_hdw_encoder_run_timeout(unsigned long);
330 static int pvr2_issue_simple_cmd(struct pvr2_hdw *,u32);
331 static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
332 unsigned int timeout,int probe_fl,
333 void *write_data,unsigned int write_len,
334 void *read_data,unsigned int read_len);
335 static int pvr2_hdw_check_cropcap(struct pvr2_hdw *hdw);
338 static void trace_stbit(const char *name,int val)
340 pvr2_trace(PVR2_TRACE_STBITS,
341 "State bit %s <-- %s",
342 name,(val ? "true" : "false"));
345 static int ctrl_channelfreq_get(struct pvr2_ctrl *cptr,int *vp)
347 struct pvr2_hdw *hdw = cptr->hdw;
348 if ((hdw->freqProgSlot > 0) && (hdw->freqProgSlot <= FREQTABLE_SIZE)) {
349 *vp = hdw->freqTable[hdw->freqProgSlot-1];
356 static int ctrl_channelfreq_set(struct pvr2_ctrl *cptr,int m,int v)
358 struct pvr2_hdw *hdw = cptr->hdw;
359 unsigned int slotId = hdw->freqProgSlot;
360 if ((slotId > 0) && (slotId <= FREQTABLE_SIZE)) {
361 hdw->freqTable[slotId-1] = v;
362 /* Handle side effects correctly - if we're tuned to this
363 slot, then forgot the slot id relation since the stored
364 frequency has been changed. */
365 if (hdw->freqSelector) {
366 if (hdw->freqSlotRadio == slotId) {
367 hdw->freqSlotRadio = 0;
370 if (hdw->freqSlotTelevision == slotId) {
371 hdw->freqSlotTelevision = 0;
378 static int ctrl_channelprog_get(struct pvr2_ctrl *cptr,int *vp)
380 *vp = cptr->hdw->freqProgSlot;
384 static int ctrl_channelprog_set(struct pvr2_ctrl *cptr,int m,int v)
386 struct pvr2_hdw *hdw = cptr->hdw;
387 if ((v >= 0) && (v <= FREQTABLE_SIZE)) {
388 hdw->freqProgSlot = v;
393 static int ctrl_channel_get(struct pvr2_ctrl *cptr,int *vp)
395 struct pvr2_hdw *hdw = cptr->hdw;
396 *vp = hdw->freqSelector ? hdw->freqSlotRadio : hdw->freqSlotTelevision;
400 static int ctrl_channel_set(struct pvr2_ctrl *cptr,int m,int slotId)
403 struct pvr2_hdw *hdw = cptr->hdw;
404 if ((slotId < 0) || (slotId > FREQTABLE_SIZE)) return 0;
406 freq = hdw->freqTable[slotId-1];
408 pvr2_hdw_set_cur_freq(hdw,freq);
410 if (hdw->freqSelector) {
411 hdw->freqSlotRadio = slotId;
413 hdw->freqSlotTelevision = slotId;
418 static int ctrl_freq_get(struct pvr2_ctrl *cptr,int *vp)
420 *vp = pvr2_hdw_get_cur_freq(cptr->hdw);
424 static int ctrl_freq_is_dirty(struct pvr2_ctrl *cptr)
426 return cptr->hdw->freqDirty != 0;
429 static void ctrl_freq_clear_dirty(struct pvr2_ctrl *cptr)
431 cptr->hdw->freqDirty = 0;
434 static int ctrl_freq_set(struct pvr2_ctrl *cptr,int m,int v)
436 pvr2_hdw_set_cur_freq(cptr->hdw,v);
440 static int ctrl_cropl_min_get(struct pvr2_ctrl *cptr, int *left)
442 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
443 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
447 *left = cap->bounds.left;
451 static int ctrl_cropl_max_get(struct pvr2_ctrl *cptr, int *left)
453 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
454 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
458 *left = cap->bounds.left;
459 if (cap->bounds.width > cptr->hdw->cropw_val) {
460 *left += cap->bounds.width - cptr->hdw->cropw_val;
465 static int ctrl_cropt_min_get(struct pvr2_ctrl *cptr, int *top)
467 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
468 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
472 *top = cap->bounds.top;
476 static int ctrl_cropt_max_get(struct pvr2_ctrl *cptr, int *top)
478 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
479 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
483 *top = cap->bounds.top;
484 if (cap->bounds.height > cptr->hdw->croph_val) {
485 *top += cap->bounds.height - cptr->hdw->croph_val;
490 static int ctrl_cropw_max_get(struct pvr2_ctrl *cptr, int *val)
492 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
493 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
498 if (cap->bounds.width > cptr->hdw->cropl_val) {
499 *val = cap->bounds.width - cptr->hdw->cropl_val;
504 static int ctrl_croph_max_get(struct pvr2_ctrl *cptr, int *val)
506 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
507 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
512 if (cap->bounds.height > cptr->hdw->cropt_val) {
513 *val = cap->bounds.height - cptr->hdw->cropt_val;
518 static int ctrl_get_cropcapbl(struct pvr2_ctrl *cptr, int *val)
520 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
521 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
525 *val = cap->bounds.left;
529 static int ctrl_get_cropcapbt(struct pvr2_ctrl *cptr, int *val)
531 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
532 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
536 *val = cap->bounds.top;
540 static int ctrl_get_cropcapbw(struct pvr2_ctrl *cptr, int *val)
542 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
543 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
547 *val = cap->bounds.width;
551 static int ctrl_get_cropcapbh(struct pvr2_ctrl *cptr, int *val)
553 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
554 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
558 *val = cap->bounds.height;
562 static int ctrl_get_cropcapdl(struct pvr2_ctrl *cptr, int *val)
564 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
565 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
569 *val = cap->defrect.left;
573 static int ctrl_get_cropcapdt(struct pvr2_ctrl *cptr, int *val)
575 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
576 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
580 *val = cap->defrect.top;
584 static int ctrl_get_cropcapdw(struct pvr2_ctrl *cptr, int *val)
586 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
587 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
591 *val = cap->defrect.width;
595 static int ctrl_get_cropcapdh(struct pvr2_ctrl *cptr, int *val)
597 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
598 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
602 *val = cap->defrect.height;
606 static int ctrl_get_cropcappan(struct pvr2_ctrl *cptr, int *val)
608 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
609 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
613 *val = cap->pixelaspect.numerator;
617 static int ctrl_get_cropcappad(struct pvr2_ctrl *cptr, int *val)
619 struct v4l2_cropcap *cap = &cptr->hdw->cropcap_info;
620 int stat = pvr2_hdw_check_cropcap(cptr->hdw);
624 *val = cap->pixelaspect.denominator;
628 static int ctrl_vres_max_get(struct pvr2_ctrl *cptr,int *vp)
630 /* Actual maximum depends on the video standard in effect. */
631 if (cptr->hdw->std_mask_cur & V4L2_STD_525_60) {
639 static int ctrl_vres_min_get(struct pvr2_ctrl *cptr,int *vp)
641 /* Actual minimum depends on device digitizer type. */
642 if (cptr->hdw->hdw_desc->flag_has_cx25840) {
650 static int ctrl_get_input(struct pvr2_ctrl *cptr,int *vp)
652 *vp = cptr->hdw->input_val;
656 static int ctrl_check_input(struct pvr2_ctrl *cptr,int v)
658 return ((1 << v) & cptr->hdw->input_allowed_mask) != 0;
661 static int ctrl_set_input(struct pvr2_ctrl *cptr,int m,int v)
663 return pvr2_hdw_set_input(cptr->hdw,v);
666 static int ctrl_isdirty_input(struct pvr2_ctrl *cptr)
668 return cptr->hdw->input_dirty != 0;
671 static void ctrl_cleardirty_input(struct pvr2_ctrl *cptr)
673 cptr->hdw->input_dirty = 0;
677 static int ctrl_freq_max_get(struct pvr2_ctrl *cptr, int *vp)
680 struct pvr2_hdw *hdw = cptr->hdw;
681 if (hdw->tuner_signal_stale) {
682 pvr2_hdw_status_poll(hdw);
684 fv = hdw->tuner_signal_info.rangehigh;
686 /* Safety fallback */
690 if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) {
699 static int ctrl_freq_min_get(struct pvr2_ctrl *cptr, int *vp)
702 struct pvr2_hdw *hdw = cptr->hdw;
703 if (hdw->tuner_signal_stale) {
704 pvr2_hdw_status_poll(hdw);
706 fv = hdw->tuner_signal_info.rangelow;
708 /* Safety fallback */
712 if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) {
721 static int ctrl_cx2341x_is_dirty(struct pvr2_ctrl *cptr)
723 return cptr->hdw->enc_stale != 0;
726 static void ctrl_cx2341x_clear_dirty(struct pvr2_ctrl *cptr)
728 cptr->hdw->enc_stale = 0;
729 cptr->hdw->enc_unsafe_stale = 0;
732 static int ctrl_cx2341x_get(struct pvr2_ctrl *cptr,int *vp)
735 struct v4l2_ext_controls cs;
736 struct v4l2_ext_control c1;
737 memset(&cs,0,sizeof(cs));
738 memset(&c1,0,sizeof(c1));
741 c1.id = cptr->info->v4l_id;
742 ret = cx2341x_ext_ctrls(&cptr->hdw->enc_ctl_state, 0, &cs,
749 static int ctrl_cx2341x_set(struct pvr2_ctrl *cptr,int m,int v)
752 struct pvr2_hdw *hdw = cptr->hdw;
753 struct v4l2_ext_controls cs;
754 struct v4l2_ext_control c1;
755 memset(&cs,0,sizeof(cs));
756 memset(&c1,0,sizeof(c1));
759 c1.id = cptr->info->v4l_id;
761 ret = cx2341x_ext_ctrls(&hdw->enc_ctl_state,
762 hdw->state_encoder_run, &cs,
765 /* Oops. cx2341x is telling us it's not safe to change
766 this control while we're capturing. Make a note of this
767 fact so that the pipeline will be stopped the next time
768 controls are committed. Then go on ahead and store this
770 ret = cx2341x_ext_ctrls(&hdw->enc_ctl_state,
773 if (!ret) hdw->enc_unsafe_stale = !0;
780 static unsigned int ctrl_cx2341x_getv4lflags(struct pvr2_ctrl *cptr)
782 struct v4l2_queryctrl qctrl;
783 struct pvr2_ctl_info *info;
784 qctrl.id = cptr->info->v4l_id;
785 cx2341x_ctrl_query(&cptr->hdw->enc_ctl_state,&qctrl);
786 /* Strip out the const so we can adjust a function pointer. It's
787 OK to do this here because we know this is a dynamically created
788 control, so the underlying storage for the info pointer is (a)
789 private to us, and (b) not in read-only storage. Either we do
790 this or we significantly complicate the underlying control
792 info = (struct pvr2_ctl_info *)(cptr->info);
793 if (qctrl.flags & V4L2_CTRL_FLAG_READ_ONLY) {
794 if (info->set_value) {
795 info->set_value = NULL;
798 if (!(info->set_value)) {
799 info->set_value = ctrl_cx2341x_set;
805 static int ctrl_streamingenabled_get(struct pvr2_ctrl *cptr,int *vp)
807 *vp = cptr->hdw->state_pipeline_req;
811 static int ctrl_masterstate_get(struct pvr2_ctrl *cptr,int *vp)
813 *vp = cptr->hdw->master_state;
817 static int ctrl_hsm_get(struct pvr2_ctrl *cptr,int *vp)
819 int result = pvr2_hdw_is_hsm(cptr->hdw);
820 *vp = PVR2_CVAL_HSM_FULL;
821 if (result < 0) *vp = PVR2_CVAL_HSM_FAIL;
822 if (result) *vp = PVR2_CVAL_HSM_HIGH;
826 static int ctrl_stdavail_get(struct pvr2_ctrl *cptr,int *vp)
828 *vp = cptr->hdw->std_mask_avail;
832 static int ctrl_stdavail_set(struct pvr2_ctrl *cptr,int m,int v)
834 struct pvr2_hdw *hdw = cptr->hdw;
836 ns = hdw->std_mask_avail;
837 ns = (ns & ~m) | (v & m);
838 if (ns == hdw->std_mask_avail) return 0;
839 hdw->std_mask_avail = ns;
840 pvr2_hdw_internal_set_std_avail(hdw);
841 pvr2_hdw_internal_find_stdenum(hdw);
845 static int ctrl_std_val_to_sym(struct pvr2_ctrl *cptr,int msk,int val,
846 char *bufPtr,unsigned int bufSize,
849 *len = pvr2_std_id_to_str(bufPtr,bufSize,msk & val);
853 static int ctrl_std_sym_to_val(struct pvr2_ctrl *cptr,
854 const char *bufPtr,unsigned int bufSize,
859 ret = pvr2_std_str_to_id(&id,bufPtr,bufSize);
860 if (ret < 0) return ret;
861 if (mskp) *mskp = id;
862 if (valp) *valp = id;
866 static int ctrl_stdcur_get(struct pvr2_ctrl *cptr,int *vp)
868 *vp = cptr->hdw->std_mask_cur;
872 static int ctrl_stdcur_set(struct pvr2_ctrl *cptr,int m,int v)
874 struct pvr2_hdw *hdw = cptr->hdw;
876 ns = hdw->std_mask_cur;
877 ns = (ns & ~m) | (v & m);
878 if (ns == hdw->std_mask_cur) return 0;
879 hdw->std_mask_cur = ns;
881 pvr2_hdw_internal_find_stdenum(hdw);
885 static int ctrl_stdcur_is_dirty(struct pvr2_ctrl *cptr)
887 return cptr->hdw->std_dirty != 0;
890 static void ctrl_stdcur_clear_dirty(struct pvr2_ctrl *cptr)
892 cptr->hdw->std_dirty = 0;
895 static int ctrl_signal_get(struct pvr2_ctrl *cptr,int *vp)
897 struct pvr2_hdw *hdw = cptr->hdw;
898 pvr2_hdw_status_poll(hdw);
899 *vp = hdw->tuner_signal_info.signal;
903 static int ctrl_audio_modes_present_get(struct pvr2_ctrl *cptr,int *vp)
906 unsigned int subchan;
907 struct pvr2_hdw *hdw = cptr->hdw;
908 pvr2_hdw_status_poll(hdw);
909 subchan = hdw->tuner_signal_info.rxsubchans;
910 if (subchan & V4L2_TUNER_SUB_MONO) {
911 val |= (1 << V4L2_TUNER_MODE_MONO);
913 if (subchan & V4L2_TUNER_SUB_STEREO) {
914 val |= (1 << V4L2_TUNER_MODE_STEREO);
916 if (subchan & V4L2_TUNER_SUB_LANG1) {
917 val |= (1 << V4L2_TUNER_MODE_LANG1);
919 if (subchan & V4L2_TUNER_SUB_LANG2) {
920 val |= (1 << V4L2_TUNER_MODE_LANG2);
927 static int ctrl_stdenumcur_set(struct pvr2_ctrl *cptr,int m,int v)
929 struct pvr2_hdw *hdw = cptr->hdw;
930 if (v < 0) return -EINVAL;
931 if (v > hdw->std_enum_cnt) return -EINVAL;
932 hdw->std_enum_cur = v;
935 if (hdw->std_mask_cur == hdw->std_defs[v].id) return 0;
936 hdw->std_mask_cur = hdw->std_defs[v].id;
942 static int ctrl_stdenumcur_get(struct pvr2_ctrl *cptr,int *vp)
944 *vp = cptr->hdw->std_enum_cur;
949 static int ctrl_stdenumcur_is_dirty(struct pvr2_ctrl *cptr)
951 return cptr->hdw->std_dirty != 0;
955 static void ctrl_stdenumcur_clear_dirty(struct pvr2_ctrl *cptr)
957 cptr->hdw->std_dirty = 0;
961 #define DEFINT(vmin,vmax) \
962 .type = pvr2_ctl_int, \
963 .def.type_int.min_value = vmin, \
964 .def.type_int.max_value = vmax
966 #define DEFENUM(tab) \
967 .type = pvr2_ctl_enum, \
968 .def.type_enum.count = ARRAY_SIZE(tab), \
969 .def.type_enum.value_names = tab
972 .type = pvr2_ctl_bool
974 #define DEFMASK(msk,tab) \
975 .type = pvr2_ctl_bitmask, \
976 .def.type_bitmask.valid_bits = msk, \
977 .def.type_bitmask.bit_names = tab
979 #define DEFREF(vname) \
980 .set_value = ctrl_set_##vname, \
981 .get_value = ctrl_get_##vname, \
982 .is_dirty = ctrl_isdirty_##vname, \
983 .clear_dirty = ctrl_cleardirty_##vname
986 #define VCREATE_FUNCS(vname) \
987 static int ctrl_get_##vname(struct pvr2_ctrl *cptr,int *vp) \
988 {*vp = cptr->hdw->vname##_val; return 0;} \
989 static int ctrl_set_##vname(struct pvr2_ctrl *cptr,int m,int v) \
990 {cptr->hdw->vname##_val = v; cptr->hdw->vname##_dirty = !0; return 0;} \
991 static int ctrl_isdirty_##vname(struct pvr2_ctrl *cptr) \
992 {return cptr->hdw->vname##_dirty != 0;} \
993 static void ctrl_cleardirty_##vname(struct pvr2_ctrl *cptr) \
994 {cptr->hdw->vname##_dirty = 0;}
996 VCREATE_FUNCS(brightness)
997 VCREATE_FUNCS(contrast)
998 VCREATE_FUNCS(saturation)
1000 VCREATE_FUNCS(volume)
1001 VCREATE_FUNCS(balance)
1003 VCREATE_FUNCS(treble)
1005 VCREATE_FUNCS(cropl)
1006 VCREATE_FUNCS(cropt)
1007 VCREATE_FUNCS(cropw)
1008 VCREATE_FUNCS(croph)
1009 VCREATE_FUNCS(audiomode)
1010 VCREATE_FUNCS(res_hor)
1011 VCREATE_FUNCS(res_ver)
1012 VCREATE_FUNCS(srate)
1014 /* Table definition of all controls which can be manipulated */
1015 static const struct pvr2_ctl_info control_defs[] = {
1017 .v4l_id = V4L2_CID_BRIGHTNESS,
1018 .desc = "Brightness",
1019 .name = "brightness",
1020 .default_value = 128,
1024 .v4l_id = V4L2_CID_CONTRAST,
1027 .default_value = 68,
1031 .v4l_id = V4L2_CID_SATURATION,
1032 .desc = "Saturation",
1033 .name = "saturation",
1034 .default_value = 64,
1038 .v4l_id = V4L2_CID_HUE,
1045 .v4l_id = V4L2_CID_AUDIO_VOLUME,
1048 .default_value = 62000,
1052 .v4l_id = V4L2_CID_AUDIO_BALANCE,
1057 DEFINT(-32768,32767),
1059 .v4l_id = V4L2_CID_AUDIO_BASS,
1064 DEFINT(-32768,32767),
1066 .v4l_id = V4L2_CID_AUDIO_TREBLE,
1071 DEFINT(-32768,32767),
1073 .v4l_id = V4L2_CID_AUDIO_MUTE,
1080 .desc = "Capture crop left margin",
1081 .name = "crop_left",
1082 .internal_id = PVR2_CID_CROPL,
1086 .get_min_value = ctrl_cropl_min_get,
1087 .get_max_value = ctrl_cropl_max_get,
1088 .get_def_value = ctrl_get_cropcapdl,
1090 .desc = "Capture crop top margin",
1092 .internal_id = PVR2_CID_CROPT,
1096 .get_min_value = ctrl_cropt_min_get,
1097 .get_max_value = ctrl_cropt_max_get,
1098 .get_def_value = ctrl_get_cropcapdt,
1100 .desc = "Capture crop width",
1101 .name = "crop_width",
1102 .internal_id = PVR2_CID_CROPW,
1103 .default_value = 720,
1105 .get_max_value = ctrl_cropw_max_get,
1106 .get_def_value = ctrl_get_cropcapdw,
1108 .desc = "Capture crop height",
1109 .name = "crop_height",
1110 .internal_id = PVR2_CID_CROPH,
1111 .default_value = 480,
1113 .get_max_value = ctrl_croph_max_get,
1114 .get_def_value = ctrl_get_cropcapdh,
1116 .desc = "Capture capability pixel aspect numerator",
1117 .name = "cropcap_pixel_numerator",
1118 .internal_id = PVR2_CID_CROPCAPPAN,
1119 .get_value = ctrl_get_cropcappan,
1121 .desc = "Capture capability pixel aspect denominator",
1122 .name = "cropcap_pixel_denominator",
1123 .internal_id = PVR2_CID_CROPCAPPAD,
1124 .get_value = ctrl_get_cropcappad,
1126 .desc = "Capture capability bounds top",
1127 .name = "cropcap_bounds_top",
1128 .internal_id = PVR2_CID_CROPCAPBT,
1129 .get_value = ctrl_get_cropcapbt,
1131 .desc = "Capture capability bounds left",
1132 .name = "cropcap_bounds_left",
1133 .internal_id = PVR2_CID_CROPCAPBL,
1134 .get_value = ctrl_get_cropcapbl,
1136 .desc = "Capture capability bounds width",
1137 .name = "cropcap_bounds_width",
1138 .internal_id = PVR2_CID_CROPCAPBW,
1139 .get_value = ctrl_get_cropcapbw,
1141 .desc = "Capture capability bounds height",
1142 .name = "cropcap_bounds_height",
1143 .internal_id = PVR2_CID_CROPCAPBH,
1144 .get_value = ctrl_get_cropcapbh,
1146 .desc = "Video Source",
1148 .internal_id = PVR2_CID_INPUT,
1149 .default_value = PVR2_CVAL_INPUT_TV,
1150 .check_value = ctrl_check_input,
1152 DEFENUM(control_values_input),
1154 .desc = "Audio Mode",
1155 .name = "audio_mode",
1156 .internal_id = PVR2_CID_AUDIOMODE,
1157 .default_value = V4L2_TUNER_MODE_STEREO,
1159 DEFENUM(control_values_audiomode),
1161 .desc = "Horizontal capture resolution",
1162 .name = "resolution_hor",
1163 .internal_id = PVR2_CID_HRES,
1164 .default_value = 720,
1168 .desc = "Vertical capture resolution",
1169 .name = "resolution_ver",
1170 .internal_id = PVR2_CID_VRES,
1171 .default_value = 480,
1174 /* Hook in check for video standard and adjust maximum
1175 depending on the standard. */
1176 .get_max_value = ctrl_vres_max_get,
1177 .get_min_value = ctrl_vres_min_get,
1179 .v4l_id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ,
1180 .default_value = V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000,
1181 .desc = "Audio Sampling Frequency",
1184 DEFENUM(control_values_srate),
1186 .desc = "Tuner Frequency (Hz)",
1187 .name = "frequency",
1188 .internal_id = PVR2_CID_FREQUENCY,
1190 .set_value = ctrl_freq_set,
1191 .get_value = ctrl_freq_get,
1192 .is_dirty = ctrl_freq_is_dirty,
1193 .clear_dirty = ctrl_freq_clear_dirty,
1195 /* Hook in check for input value (tv/radio) and adjust
1196 max/min values accordingly */
1197 .get_max_value = ctrl_freq_max_get,
1198 .get_min_value = ctrl_freq_min_get,
1202 .set_value = ctrl_channel_set,
1203 .get_value = ctrl_channel_get,
1204 DEFINT(0,FREQTABLE_SIZE),
1206 .desc = "Channel Program Frequency",
1207 .name = "freq_table_value",
1208 .set_value = ctrl_channelfreq_set,
1209 .get_value = ctrl_channelfreq_get,
1211 /* Hook in check for input value (tv/radio) and adjust
1212 max/min values accordingly */
1213 .get_max_value = ctrl_freq_max_get,
1214 .get_min_value = ctrl_freq_min_get,
1216 .desc = "Channel Program ID",
1217 .name = "freq_table_channel",
1218 .set_value = ctrl_channelprog_set,
1219 .get_value = ctrl_channelprog_get,
1220 DEFINT(0,FREQTABLE_SIZE),
1222 .desc = "Streaming Enabled",
1223 .name = "streaming_enabled",
1224 .get_value = ctrl_streamingenabled_get,
1227 .desc = "USB Speed",
1228 .name = "usb_speed",
1229 .get_value = ctrl_hsm_get,
1230 DEFENUM(control_values_hsm),
1232 .desc = "Master State",
1233 .name = "master_state",
1234 .get_value = ctrl_masterstate_get,
1235 DEFENUM(pvr2_state_names),
1237 .desc = "Signal Present",
1238 .name = "signal_present",
1239 .get_value = ctrl_signal_get,
1242 .desc = "Audio Modes Present",
1243 .name = "audio_modes_present",
1244 .get_value = ctrl_audio_modes_present_get,
1245 /* For this type we "borrow" the V4L2_TUNER_MODE enum from
1246 v4l. Nothing outside of this module cares about this,
1247 but I reuse it in order to also reuse the
1248 control_values_audiomode string table. */
1249 DEFMASK(((1 << V4L2_TUNER_MODE_MONO)|
1250 (1 << V4L2_TUNER_MODE_STEREO)|
1251 (1 << V4L2_TUNER_MODE_LANG1)|
1252 (1 << V4L2_TUNER_MODE_LANG2)),
1253 control_values_audiomode),
1255 .desc = "Video Standards Available Mask",
1256 .name = "video_standard_mask_available",
1257 .internal_id = PVR2_CID_STDAVAIL,
1259 .get_value = ctrl_stdavail_get,
1260 .set_value = ctrl_stdavail_set,
1261 .val_to_sym = ctrl_std_val_to_sym,
1262 .sym_to_val = ctrl_std_sym_to_val,
1263 .type = pvr2_ctl_bitmask,
1265 .desc = "Video Standards In Use Mask",
1266 .name = "video_standard_mask_active",
1267 .internal_id = PVR2_CID_STDCUR,
1269 .get_value = ctrl_stdcur_get,
1270 .set_value = ctrl_stdcur_set,
1271 .is_dirty = ctrl_stdcur_is_dirty,
1272 .clear_dirty = ctrl_stdcur_clear_dirty,
1273 .val_to_sym = ctrl_std_val_to_sym,
1274 .sym_to_val = ctrl_std_sym_to_val,
1275 .type = pvr2_ctl_bitmask,
1277 .desc = "Video Standard Name",
1278 .name = "video_standard",
1279 .internal_id = PVR2_CID_STDENUM,
1281 .get_value = ctrl_stdenumcur_get,
1282 .set_value = ctrl_stdenumcur_set,
1283 .is_dirty = ctrl_stdenumcur_is_dirty,
1284 .clear_dirty = ctrl_stdenumcur_clear_dirty,
1285 .type = pvr2_ctl_enum,
1289 #define CTRLDEF_COUNT ARRAY_SIZE(control_defs)
1292 const char *pvr2_config_get_name(enum pvr2_config cfg)
1295 case pvr2_config_empty: return "empty";
1296 case pvr2_config_mpeg: return "mpeg";
1297 case pvr2_config_vbi: return "vbi";
1298 case pvr2_config_pcm: return "pcm";
1299 case pvr2_config_rawvideo: return "raw video";
1305 struct usb_device *pvr2_hdw_get_dev(struct pvr2_hdw *hdw)
1307 return hdw->usb_dev;
1311 unsigned long pvr2_hdw_get_sn(struct pvr2_hdw *hdw)
1313 return hdw->serial_number;
1317 const char *pvr2_hdw_get_bus_info(struct pvr2_hdw *hdw)
1319 return hdw->bus_info;
1323 const char *pvr2_hdw_get_device_identifier(struct pvr2_hdw *hdw)
1325 return hdw->identifier;
1329 unsigned long pvr2_hdw_get_cur_freq(struct pvr2_hdw *hdw)
1331 return hdw->freqSelector ? hdw->freqValTelevision : hdw->freqValRadio;
1334 /* Set the currently tuned frequency and account for all possible
1335 driver-core side effects of this action. */
1336 static void pvr2_hdw_set_cur_freq(struct pvr2_hdw *hdw,unsigned long val)
1338 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
1339 if (hdw->freqSelector) {
1340 /* Swing over to radio frequency selection */
1341 hdw->freqSelector = 0;
1342 hdw->freqDirty = !0;
1344 if (hdw->freqValRadio != val) {
1345 hdw->freqValRadio = val;
1346 hdw->freqSlotRadio = 0;
1347 hdw->freqDirty = !0;
1350 if (!(hdw->freqSelector)) {
1351 /* Swing over to television frequency selection */
1352 hdw->freqSelector = 1;
1353 hdw->freqDirty = !0;
1355 if (hdw->freqValTelevision != val) {
1356 hdw->freqValTelevision = val;
1357 hdw->freqSlotTelevision = 0;
1358 hdw->freqDirty = !0;
1363 int pvr2_hdw_get_unit_number(struct pvr2_hdw *hdw)
1365 return hdw->unit_number;
1369 /* Attempt to locate one of the given set of files. Messages are logged
1370 appropriate to what has been found. The return value will be 0 or
1371 greater on success (it will be the index of the file name found) and
1372 fw_entry will be filled in. Otherwise a negative error is returned on
1373 failure. If the return value is -ENOENT then no viable firmware file
1374 could be located. */
1375 static int pvr2_locate_firmware(struct pvr2_hdw *hdw,
1376 const struct firmware **fw_entry,
1377 const char *fwtypename,
1378 unsigned int fwcount,
1379 const char *fwnames[])
1383 for (idx = 0; idx < fwcount; idx++) {
1384 ret = request_firmware(fw_entry,
1386 &hdw->usb_dev->dev);
1388 trace_firmware("Located %s firmware: %s;"
1394 if (ret == -ENOENT) continue;
1395 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1396 "request_firmware fatal error with code=%d",ret);
1399 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1401 " Device %s firmware"
1402 " seems to be missing.",
1404 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1405 "Did you install the pvrusb2 firmware files"
1406 " in their proper location?");
1408 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1409 "request_firmware unable to locate %s file %s",
1410 fwtypename,fwnames[0]);
1412 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1413 "request_firmware unable to locate"
1414 " one of the following %s files:",
1416 for (idx = 0; idx < fwcount; idx++) {
1417 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1418 "request_firmware: Failed to find %s",
1427 * pvr2_upload_firmware1().
1429 * Send the 8051 firmware to the device. After the upload, arrange for
1430 * device to re-enumerate.
1432 * NOTE : the pointer to the firmware data given by request_firmware()
1433 * is not suitable for an usb transaction.
1436 static int pvr2_upload_firmware1(struct pvr2_hdw *hdw)
1438 const struct firmware *fw_entry = NULL;
1444 if (!hdw->hdw_desc->fx2_firmware.cnt) {
1445 hdw->fw1_state = FW1_STATE_OK;
1446 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1447 "Connected device type defines"
1448 " no firmware to upload; ignoring firmware");
1452 hdw->fw1_state = FW1_STATE_FAILED; // default result
1454 trace_firmware("pvr2_upload_firmware1");
1456 ret = pvr2_locate_firmware(hdw,&fw_entry,"fx2 controller",
1457 hdw->hdw_desc->fx2_firmware.cnt,
1458 hdw->hdw_desc->fx2_firmware.lst);
1460 if (ret == -ENOENT) hdw->fw1_state = FW1_STATE_MISSING;
1464 usb_settoggle(hdw->usb_dev, 0 & 0xf, !(0 & USB_DIR_IN), 0);
1465 usb_clear_halt(hdw->usb_dev, usb_sndbulkpipe(hdw->usb_dev, 0 & 0x7f));
1467 pipe = usb_sndctrlpipe(hdw->usb_dev, 0);
1469 if (fw_entry->size != 0x2000){
1470 pvr2_trace(PVR2_TRACE_ERROR_LEGS,"wrong fx2 firmware size");
1471 release_firmware(fw_entry);
1475 fw_ptr = kmalloc(0x800, GFP_KERNEL);
1476 if (fw_ptr == NULL){
1477 release_firmware(fw_entry);
1481 /* We have to hold the CPU during firmware upload. */
1482 pvr2_hdw_cpureset_assert(hdw,1);
1484 /* upload the firmware to address 0000-1fff in 2048 (=0x800) bytes
1488 for(address = 0; address < fw_entry->size; address += 0x800) {
1489 memcpy(fw_ptr, fw_entry->data + address, 0x800);
1490 ret += usb_control_msg(hdw->usb_dev, pipe, 0xa0, 0x40, address,
1491 0, fw_ptr, 0x800, HZ);
1494 trace_firmware("Upload done, releasing device's CPU");
1496 /* Now release the CPU. It will disconnect and reconnect later. */
1497 pvr2_hdw_cpureset_assert(hdw,0);
1500 release_firmware(fw_entry);
1502 trace_firmware("Upload done (%d bytes sent)",ret);
1504 /* We should have written 8192 bytes */
1506 hdw->fw1_state = FW1_STATE_RELOAD;
1515 * pvr2_upload_firmware2()
1517 * This uploads encoder firmware on endpoint 2.
1521 int pvr2_upload_firmware2(struct pvr2_hdw *hdw)
1523 const struct firmware *fw_entry = NULL;
1525 unsigned int pipe, fw_len, fw_done, bcnt, icnt;
1529 static const char *fw_files[] = {
1530 CX2341X_FIRM_ENC_FILENAME,
1533 if (hdw->hdw_desc->flag_skip_cx23416_firmware) {
1537 trace_firmware("pvr2_upload_firmware2");
1539 ret = pvr2_locate_firmware(hdw,&fw_entry,"encoder",
1540 ARRAY_SIZE(fw_files), fw_files);
1541 if (ret < 0) return ret;
1544 /* Since we're about to completely reinitialize the encoder,
1545 invalidate our cached copy of its configuration state. Next
1546 time we configure the encoder, then we'll fully configure it. */
1547 hdw->enc_cur_valid = 0;
1549 /* Encoder is about to be reset so note that as far as we're
1550 concerned now, the encoder has never been run. */
1551 del_timer_sync(&hdw->encoder_run_timer);
1552 if (hdw->state_encoder_runok) {
1553 hdw->state_encoder_runok = 0;
1554 trace_stbit("state_encoder_runok",hdw->state_encoder_runok);
1557 /* First prepare firmware loading */
1558 ret |= pvr2_write_register(hdw, 0x0048, 0xffffffff); /*interrupt mask*/
1559 ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000088); /*gpio dir*/
1560 ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/
1561 ret |= pvr2_hdw_cmd_deep_reset(hdw);
1562 ret |= pvr2_write_register(hdw, 0xa064, 0x00000000); /*APU command*/
1563 ret |= pvr2_hdw_gpio_chg_dir(hdw,0xffffffff,0x00000408); /*gpio dir*/
1564 ret |= pvr2_hdw_gpio_chg_out(hdw,0xffffffff,0x00000008); /*gpio output state*/
1565 ret |= pvr2_write_register(hdw, 0x9058, 0xffffffed); /*VPU ctrl*/
1566 ret |= pvr2_write_register(hdw, 0x9054, 0xfffffffd); /*reset hw blocks*/
1567 ret |= pvr2_write_register(hdw, 0x07f8, 0x80000800); /*encoder SDRAM refresh*/
1568 ret |= pvr2_write_register(hdw, 0x07fc, 0x0000001a); /*encoder SDRAM pre-charge*/
1569 ret |= pvr2_write_register(hdw, 0x0700, 0x00000000); /*I2C clock*/
1570 ret |= pvr2_write_register(hdw, 0xaa00, 0x00000000); /*unknown*/
1571 ret |= pvr2_write_register(hdw, 0xaa04, 0x00057810); /*unknown*/
1572 ret |= pvr2_write_register(hdw, 0xaa10, 0x00148500); /*unknown*/
1573 ret |= pvr2_write_register(hdw, 0xaa18, 0x00840000); /*unknown*/
1574 ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_FWPOST1);
1575 ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_MEMSEL | (1 << 8) | (0 << 16));
1578 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1579 "firmware2 upload prep failed, ret=%d",ret);
1580 release_firmware(fw_entry);
1584 /* Now send firmware */
1586 fw_len = fw_entry->size;
1588 if (fw_len % sizeof(u32)) {
1589 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1590 "size of %s firmware"
1591 " must be a multiple of %zu bytes",
1592 fw_files[fwidx],sizeof(u32));
1593 release_firmware(fw_entry);
1598 fw_ptr = kmalloc(FIRMWARE_CHUNK_SIZE, GFP_KERNEL);
1599 if (fw_ptr == NULL){
1600 release_firmware(fw_entry);
1601 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1602 "failed to allocate memory for firmware2 upload");
1607 pipe = usb_sndbulkpipe(hdw->usb_dev, PVR2_FIRMWARE_ENDPOINT);
1610 for (fw_done = 0; fw_done < fw_len;) {
1611 bcnt = fw_len - fw_done;
1612 if (bcnt > FIRMWARE_CHUNK_SIZE) bcnt = FIRMWARE_CHUNK_SIZE;
1613 memcpy(fw_ptr, fw_entry->data + fw_done, bcnt);
1614 /* Usbsnoop log shows that we must swap bytes... */
1615 /* Some background info: The data being swapped here is a
1616 firmware image destined for the mpeg encoder chip that
1617 lives at the other end of a USB endpoint. The encoder
1618 chip always talks in 32 bit chunks and its storage is
1619 organized into 32 bit words. However from the file
1620 system to the encoder chip everything is purely a byte
1621 stream. The firmware file's contents are always 32 bit
1622 swapped from what the encoder expects. Thus the need
1623 always exists to swap the bytes regardless of the endian
1624 type of the host processor and therefore swab32() makes
1626 for (icnt = 0; icnt < bcnt/4 ; icnt++)
1627 ((u32 *)fw_ptr)[icnt] = swab32(((u32 *)fw_ptr)[icnt]);
1629 ret |= usb_bulk_msg(hdw->usb_dev, pipe, fw_ptr,bcnt,
1630 &actual_length, HZ);
1631 ret |= (actual_length != bcnt);
1636 trace_firmware("upload of %s : %i / %i ",
1637 fw_files[fwidx],fw_done,fw_len);
1640 release_firmware(fw_entry);
1643 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1644 "firmware2 upload transfer failure");
1650 ret |= pvr2_write_register(hdw, 0x9054, 0xffffffff); /*reset hw blocks*/
1651 ret |= pvr2_write_register(hdw, 0x9058, 0xffffffe8); /*VPU ctrl*/
1652 ret |= pvr2_issue_simple_cmd(hdw,FX2CMD_MEMSEL | (1 << 8) | (0 << 16));
1655 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1656 "firmware2 upload post-proc failure");
1660 if (hdw->hdw_desc->signal_routing_scheme ==
1661 PVR2_ROUTING_SCHEME_GOTVIEW) {
1662 /* Ensure that GPIO 11 is set to output for GOTVIEW
1664 pvr2_hdw_gpio_chg_dir(hdw,(1 << 11),~0);
1670 static const char *pvr2_get_state_name(unsigned int st)
1672 if (st < ARRAY_SIZE(pvr2_state_names)) {
1673 return pvr2_state_names[st];
1678 static int pvr2_decoder_enable(struct pvr2_hdw *hdw,int enablefl)
1680 /* Even though we really only care about the video decoder chip at
1681 this point, we'll broadcast stream on/off to all sub-devices
1682 anyway, just in case somebody else wants to hear the
1684 pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 stream=%s",
1685 (enablefl ? "on" : "off"));
1686 v4l2_device_call_all(&hdw->v4l2_dev, 0, video, s_stream, enablefl);
1687 if (hdw->decoder_client_id) {
1688 /* We get here if the encoder has been noticed. Otherwise
1689 we'll issue a warning to the user (which should
1690 normally never happen). */
1693 if (!hdw->flag_decoder_missed) {
1694 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1695 "WARNING: No decoder present");
1696 hdw->flag_decoder_missed = !0;
1697 trace_stbit("flag_decoder_missed",
1698 hdw->flag_decoder_missed);
1704 int pvr2_hdw_get_state(struct pvr2_hdw *hdw)
1706 return hdw->master_state;
1710 static int pvr2_hdw_untrip_unlocked(struct pvr2_hdw *hdw)
1712 if (!hdw->flag_tripped) return 0;
1713 hdw->flag_tripped = 0;
1714 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1715 "Clearing driver error statuss");
1720 int pvr2_hdw_untrip(struct pvr2_hdw *hdw)
1723 LOCK_TAKE(hdw->big_lock); do {
1724 fl = pvr2_hdw_untrip_unlocked(hdw);
1725 } while (0); LOCK_GIVE(hdw->big_lock);
1726 if (fl) pvr2_hdw_state_sched(hdw);
1733 int pvr2_hdw_get_streaming(struct pvr2_hdw *hdw)
1735 return hdw->state_pipeline_req != 0;
1739 int pvr2_hdw_set_streaming(struct pvr2_hdw *hdw,int enable_flag)
1742 LOCK_TAKE(hdw->big_lock); do {
1743 pvr2_hdw_untrip_unlocked(hdw);
1744 if ((!enable_flag) != !(hdw->state_pipeline_req)) {
1745 hdw->state_pipeline_req = enable_flag != 0;
1746 pvr2_trace(PVR2_TRACE_START_STOP,
1747 "/*--TRACE_STREAM--*/ %s",
1748 enable_flag ? "enable" : "disable");
1750 pvr2_hdw_state_sched(hdw);
1751 } while (0); LOCK_GIVE(hdw->big_lock);
1752 if ((ret = pvr2_hdw_wait(hdw,0)) < 0) return ret;
1754 while ((st = hdw->master_state) != PVR2_STATE_RUN) {
1755 if (st != PVR2_STATE_READY) return -EIO;
1756 if ((ret = pvr2_hdw_wait(hdw,st)) < 0) return ret;
1763 int pvr2_hdw_set_stream_type(struct pvr2_hdw *hdw,enum pvr2_config config)
1766 LOCK_TAKE(hdw->big_lock);
1767 if ((fl = (hdw->desired_stream_type != config)) != 0) {
1768 hdw->desired_stream_type = config;
1769 hdw->state_pipeline_config = 0;
1770 trace_stbit("state_pipeline_config",
1771 hdw->state_pipeline_config);
1772 pvr2_hdw_state_sched(hdw);
1774 LOCK_GIVE(hdw->big_lock);
1776 return pvr2_hdw_wait(hdw,0);
1780 static int get_default_tuner_type(struct pvr2_hdw *hdw)
1782 int unit_number = hdw->unit_number;
1784 if ((unit_number >= 0) && (unit_number < PVR_NUM)) {
1785 tp = tuner[unit_number];
1787 if (tp < 0) return -EINVAL;
1788 hdw->tuner_type = tp;
1789 hdw->tuner_updated = !0;
1794 static v4l2_std_id get_default_standard(struct pvr2_hdw *hdw)
1796 int unit_number = hdw->unit_number;
1798 if ((unit_number >= 0) && (unit_number < PVR_NUM)) {
1799 tp = video_std[unit_number];
1806 static unsigned int get_default_error_tolerance(struct pvr2_hdw *hdw)
1808 int unit_number = hdw->unit_number;
1810 if ((unit_number >= 0) && (unit_number < PVR_NUM)) {
1811 tp = tolerance[unit_number];
1817 static int pvr2_hdw_check_firmware(struct pvr2_hdw *hdw)
1819 /* Try a harmless request to fetch the eeprom's address over
1820 endpoint 1. See what happens. Only the full FX2 image can
1821 respond to this. If this probe fails then likely the FX2
1822 firmware needs be loaded. */
1824 LOCK_TAKE(hdw->ctl_lock); do {
1825 hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR;
1826 result = pvr2_send_request_ex(hdw,HZ*1,!0,
1829 if (result < 0) break;
1830 } while(0); LOCK_GIVE(hdw->ctl_lock);
1832 pvr2_trace(PVR2_TRACE_INIT,
1833 "Probe of device endpoint 1 result status %d",
1836 pvr2_trace(PVR2_TRACE_INIT,
1837 "Probe of device endpoint 1 succeeded");
1842 struct pvr2_std_hack {
1843 v4l2_std_id pat; /* Pattern to match */
1844 v4l2_std_id msk; /* Which bits we care about */
1845 v4l2_std_id std; /* What additional standards or default to set */
1848 /* This data structure labels specific combinations of standards from
1849 tveeprom that we'll try to recognize. If we recognize one, then assume
1850 a specified default standard to use. This is here because tveeprom only
1851 tells us about available standards not the intended default standard (if
1852 any) for the device in question. We guess the default based on what has
1853 been reported as available. Note that this is only for guessing a
1854 default - which can always be overridden explicitly - and if the user
1855 has otherwise named a default then that default will always be used in
1856 place of this table. */
1857 static const struct pvr2_std_hack std_eeprom_maps[] = {
1859 .pat = V4L2_STD_B|V4L2_STD_GH,
1860 .std = V4L2_STD_PAL_B|V4L2_STD_PAL_B1|V4L2_STD_PAL_G,
1864 .std = V4L2_STD_NTSC_M,
1867 .pat = V4L2_STD_PAL_I,
1868 .std = V4L2_STD_PAL_I,
1871 .pat = V4L2_STD_SECAM_L|V4L2_STD_SECAM_LC,
1872 .std = V4L2_STD_SECAM_L|V4L2_STD_SECAM_LC,
1876 .std = V4L2_STD_PAL_D|V4L2_STD_PAL_D1|V4L2_STD_PAL_K,
1880 static void pvr2_hdw_setup_std(struct pvr2_hdw *hdw)
1884 v4l2_std_id std1,std2,std3;
1886 std1 = get_default_standard(hdw);
1887 std3 = std1 ? 0 : hdw->hdw_desc->default_std_mask;
1889 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),hdw->std_mask_eeprom);
1890 pvr2_trace(PVR2_TRACE_STD,
1891 "Supported video standard(s) reported available"
1892 " in hardware: %.*s",
1895 hdw->std_mask_avail = hdw->std_mask_eeprom;
1897 std2 = (std1|std3) & ~hdw->std_mask_avail;
1899 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std2);
1900 pvr2_trace(PVR2_TRACE_STD,
1901 "Expanding supported video standards"
1902 " to include: %.*s",
1904 hdw->std_mask_avail |= std2;
1907 pvr2_hdw_internal_set_std_avail(hdw);
1910 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std1);
1911 pvr2_trace(PVR2_TRACE_STD,
1912 "Initial video standard forced to %.*s",
1914 hdw->std_mask_cur = std1;
1915 hdw->std_dirty = !0;
1916 pvr2_hdw_internal_find_stdenum(hdw);
1920 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),std3);
1921 pvr2_trace(PVR2_TRACE_STD,
1922 "Initial video standard"
1923 " (determined by device type): %.*s",bcnt,buf);
1924 hdw->std_mask_cur = std3;
1925 hdw->std_dirty = !0;
1926 pvr2_hdw_internal_find_stdenum(hdw);
1932 for (idx = 0; idx < ARRAY_SIZE(std_eeprom_maps); idx++) {
1933 if (std_eeprom_maps[idx].msk ?
1934 ((std_eeprom_maps[idx].pat ^
1935 hdw->std_mask_eeprom) &
1936 std_eeprom_maps[idx].msk) :
1937 (std_eeprom_maps[idx].pat !=
1938 hdw->std_mask_eeprom)) continue;
1939 bcnt = pvr2_std_id_to_str(buf,sizeof(buf),
1940 std_eeprom_maps[idx].std);
1941 pvr2_trace(PVR2_TRACE_STD,
1942 "Initial video standard guessed as %.*s",
1944 hdw->std_mask_cur = std_eeprom_maps[idx].std;
1945 hdw->std_dirty = !0;
1946 pvr2_hdw_internal_find_stdenum(hdw);
1951 if (hdw->std_enum_cnt > 1) {
1952 // Autoselect the first listed standard
1953 hdw->std_enum_cur = 1;
1954 hdw->std_mask_cur = hdw->std_defs[hdw->std_enum_cur-1].id;
1955 hdw->std_dirty = !0;
1956 pvr2_trace(PVR2_TRACE_STD,
1957 "Initial video standard auto-selected to %s",
1958 hdw->std_defs[hdw->std_enum_cur-1].name);
1962 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1963 "Unable to select a viable initial video standard");
1967 static unsigned int pvr2_copy_i2c_addr_list(
1968 unsigned short *dst, const unsigned char *src,
1969 unsigned int dst_max)
1971 unsigned int cnt = 0;
1973 while (src[cnt] && (cnt + 1) < dst_max) {
1974 dst[cnt] = src[cnt];
1977 dst[cnt] = I2C_CLIENT_END;
1982 static int pvr2_hdw_load_subdev(struct pvr2_hdw *hdw,
1983 const struct pvr2_device_client_desc *cd)
1987 struct v4l2_subdev *sd;
1988 unsigned int i2ccnt;
1989 const unsigned char *p;
1990 /* Arbitrary count - max # i2c addresses we will probe */
1991 unsigned short i2caddr[25];
1993 mid = cd->module_id;
1994 fname = (mid < ARRAY_SIZE(module_names)) ? module_names[mid] : NULL;
1996 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
1997 "Module ID %u for device %s has no name",
1999 hdw->hdw_desc->description);
2002 pvr2_trace(PVR2_TRACE_INIT,
2003 "Module ID %u (%s) for device %s being loaded...",
2005 hdw->hdw_desc->description);
2007 i2ccnt = pvr2_copy_i2c_addr_list(i2caddr, cd->i2c_address_list,
2008 ARRAY_SIZE(i2caddr));
2009 if (!i2ccnt && ((p = (mid < ARRAY_SIZE(module_i2c_addresses)) ?
2010 module_i2c_addresses[mid] : NULL) != NULL)) {
2011 /* Second chance: Try default i2c address list */
2012 i2ccnt = pvr2_copy_i2c_addr_list(i2caddr, p,
2013 ARRAY_SIZE(i2caddr));
2015 pvr2_trace(PVR2_TRACE_INIT,
2017 " Using default i2c address list",
2023 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2024 "Module ID %u (%s) for device %s:"
2025 " No i2c addresses",
2026 mid, fname, hdw->hdw_desc->description);
2030 /* Note how the 2nd and 3rd arguments are the same for both
2031 * v4l2_i2c_new_subdev() and v4l2_i2c_new_probed_subdev(). Why?
2032 * Well the 2nd argument is the module name to load, while the 3rd
2033 * argument is documented in the framework as being the "chipid" -
2034 * and every other place where I can find examples of this, the
2035 * "chipid" appears to just be the module name again. So here we
2036 * just do the same thing. */
2038 pvr2_trace(PVR2_TRACE_INIT,
2040 " Setting up with specified i2c address 0x%x",
2042 sd = v4l2_i2c_new_subdev(&hdw->v4l2_dev, &hdw->i2c_adap,
2046 pvr2_trace(PVR2_TRACE_INIT,
2048 " Setting up with address probe list",
2050 sd = v4l2_i2c_new_probed_subdev(&hdw->v4l2_dev, &hdw->i2c_adap,
2056 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2057 "Module ID %u (%s) for device %s failed to load",
2058 mid, fname, hdw->hdw_desc->description);
2062 /* Tag this sub-device instance with the module ID we know about.
2063 In other places we'll use that tag to determine if the instance
2064 requires special handling. */
2067 pvr2_trace(PVR2_TRACE_INFO, "Attached sub-driver %s", fname);
2070 /* client-specific setup... */
2072 case PVR2_CLIENT_ID_CX25840:
2073 hdw->decoder_client_id = mid;
2076 Mike Isely <isely@pobox.com> 19-Nov-2006 - This
2077 bit of nuttiness for cx25840 causes that module
2078 to correctly set up its video scaling. This is
2079 really a problem in the cx25840 module itself,
2080 but we work around it here. The problem has not
2081 been seen in ivtv because there VBI is supported
2082 and set up. We don't do VBI here (at least not
2083 yet) and thus we never attempted to even set it
2086 struct v4l2_format fmt;
2087 pvr2_trace(PVR2_TRACE_INIT,
2089 " Executing cx25840 VBI hack",
2091 memset(&fmt, 0, sizeof(fmt));
2092 fmt.type = V4L2_BUF_TYPE_SLICED_VBI_CAPTURE;
2093 v4l2_device_call_all(&hdw->v4l2_dev, mid,
2094 video, s_fmt, &fmt);
2097 case PVR2_CLIENT_ID_SAA7115:
2098 hdw->decoder_client_id = mid;
2107 static void pvr2_hdw_load_modules(struct pvr2_hdw *hdw)
2110 const struct pvr2_string_table *cm;
2111 const struct pvr2_device_client_table *ct;
2114 cm = &hdw->hdw_desc->client_modules;
2115 for (idx = 0; idx < cm->cnt; idx++) {
2116 request_module(cm->lst[idx]);
2119 ct = &hdw->hdw_desc->client_table;
2120 for (idx = 0; idx < ct->cnt; idx++) {
2121 if (pvr2_hdw_load_subdev(hdw, &ct->lst[idx]) < 0) okFl = 0;
2123 if (!okFl) pvr2_hdw_render_useless(hdw);
2127 static void pvr2_hdw_setup_low(struct pvr2_hdw *hdw)
2131 struct pvr2_ctrl *cptr;
2133 if (hdw->hdw_desc->fx2_firmware.cnt) {
2136 (hdw->usb_intf->cur_altsetting->desc.bNumEndpoints
2139 pvr2_trace(PVR2_TRACE_INIT,
2140 "USB endpoint config looks strange"
2141 "; possibly firmware needs to be"
2146 reloadFl = !pvr2_hdw_check_firmware(hdw);
2148 pvr2_trace(PVR2_TRACE_INIT,
2149 "Check for FX2 firmware failed"
2150 "; possibly firmware needs to be"
2155 if (pvr2_upload_firmware1(hdw) != 0) {
2156 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2157 "Failure uploading firmware1");
2162 hdw->fw1_state = FW1_STATE_OK;
2164 if (!pvr2_hdw_dev_ok(hdw)) return;
2166 hdw->force_dirty = !0;
2168 if (!hdw->hdw_desc->flag_no_powerup) {
2169 pvr2_hdw_cmd_powerup(hdw);
2170 if (!pvr2_hdw_dev_ok(hdw)) return;
2173 /* Take the IR chip out of reset, if appropriate */
2174 if (hdw->hdw_desc->ir_scheme == PVR2_IR_SCHEME_ZILOG) {
2175 pvr2_issue_simple_cmd(hdw,
2176 FX2CMD_HCW_ZILOG_RESET |
2181 // This step MUST happen after the earlier powerup step.
2182 pvr2_i2c_core_init(hdw);
2183 if (!pvr2_hdw_dev_ok(hdw)) return;
2185 pvr2_hdw_load_modules(hdw);
2186 if (!pvr2_hdw_dev_ok(hdw)) return;
2188 v4l2_device_call_all(&hdw->v4l2_dev, 0, core, load_fw);
2190 for (idx = 0; idx < CTRLDEF_COUNT; idx++) {
2191 cptr = hdw->controls + idx;
2192 if (cptr->info->skip_init) continue;
2193 if (!cptr->info->set_value) continue;
2194 cptr->info->set_value(cptr,~0,cptr->info->default_value);
2197 /* Set up special default values for the television and radio
2198 frequencies here. It's not really important what these defaults
2199 are, but I set them to something usable in the Chicago area just
2200 to make driver testing a little easier. */
2202 hdw->freqValTelevision = default_tv_freq;
2203 hdw->freqValRadio = default_radio_freq;
2205 // Do not use pvr2_reset_ctl_endpoints() here. It is not
2206 // thread-safe against the normal pvr2_send_request() mechanism.
2207 // (We should make it thread safe).
2209 if (hdw->hdw_desc->flag_has_hauppauge_rom) {
2210 ret = pvr2_hdw_get_eeprom_addr(hdw);
2211 if (!pvr2_hdw_dev_ok(hdw)) return;
2213 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2214 "Unable to determine location of eeprom,"
2217 hdw->eeprom_addr = ret;
2218 pvr2_eeprom_analyze(hdw);
2219 if (!pvr2_hdw_dev_ok(hdw)) return;
2222 hdw->tuner_type = hdw->hdw_desc->default_tuner_type;
2223 hdw->tuner_updated = !0;
2224 hdw->std_mask_eeprom = V4L2_STD_ALL;
2227 if (hdw->serial_number) {
2228 idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1,
2229 "sn-%lu", hdw->serial_number);
2230 } else if (hdw->unit_number >= 0) {
2231 idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1,
2233 hdw->unit_number + 'a');
2235 idx = scnprintf(hdw->identifier, sizeof(hdw->identifier) - 1,
2238 hdw->identifier[idx] = 0;
2240 pvr2_hdw_setup_std(hdw);
2242 if (!get_default_tuner_type(hdw)) {
2243 pvr2_trace(PVR2_TRACE_INIT,
2244 "pvr2_hdw_setup: Tuner type overridden to %d",
2249 if (!pvr2_hdw_dev_ok(hdw)) return;
2251 if (hdw->hdw_desc->signal_routing_scheme ==
2252 PVR2_ROUTING_SCHEME_GOTVIEW) {
2253 /* Ensure that GPIO 11 is set to output for GOTVIEW
2255 pvr2_hdw_gpio_chg_dir(hdw,(1 << 11),~0);
2258 pvr2_hdw_commit_setup(hdw);
2260 hdw->vid_stream = pvr2_stream_create();
2261 if (!pvr2_hdw_dev_ok(hdw)) return;
2262 pvr2_trace(PVR2_TRACE_INIT,
2263 "pvr2_hdw_setup: video stream is %p",hdw->vid_stream);
2264 if (hdw->vid_stream) {
2265 idx = get_default_error_tolerance(hdw);
2267 pvr2_trace(PVR2_TRACE_INIT,
2268 "pvr2_hdw_setup: video stream %p"
2269 " setting tolerance %u",
2270 hdw->vid_stream,idx);
2272 pvr2_stream_setup(hdw->vid_stream,hdw->usb_dev,
2273 PVR2_VID_ENDPOINT,idx);
2276 if (!pvr2_hdw_dev_ok(hdw)) return;
2278 hdw->flag_init_ok = !0;
2280 pvr2_hdw_state_sched(hdw);
2284 /* Set up the structure and attempt to put the device into a usable state.
2285 This can be a time-consuming operation, which is why it is not done
2286 internally as part of the create() step. */
2287 static void pvr2_hdw_setup(struct pvr2_hdw *hdw)
2289 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) begin",hdw);
2291 pvr2_hdw_setup_low(hdw);
2292 pvr2_trace(PVR2_TRACE_INIT,
2293 "pvr2_hdw_setup(hdw=%p) done, ok=%d init_ok=%d",
2294 hdw,pvr2_hdw_dev_ok(hdw),hdw->flag_init_ok);
2295 if (pvr2_hdw_dev_ok(hdw)) {
2296 if (hdw->flag_init_ok) {
2299 "Device initialization"
2300 " completed successfully.");
2303 if (hdw->fw1_state == FW1_STATE_RELOAD) {
2306 "Device microcontroller firmware"
2307 " (re)loaded; it should now reset"
2312 PVR2_TRACE_ERROR_LEGS,
2313 "Device initialization was not successful.");
2314 if (hdw->fw1_state == FW1_STATE_MISSING) {
2316 PVR2_TRACE_ERROR_LEGS,
2317 "Giving up since device"
2318 " microcontroller firmware"
2319 " appears to be missing.");
2325 PVR2_TRACE_ERROR_LEGS,
2326 "Attempting pvrusb2 recovery by reloading"
2327 " primary firmware.");
2329 PVR2_TRACE_ERROR_LEGS,
2330 "If this works, device should disconnect"
2331 " and reconnect in a sane state.");
2332 hdw->fw1_state = FW1_STATE_UNKNOWN;
2333 pvr2_upload_firmware1(hdw);
2336 PVR2_TRACE_ERROR_LEGS,
2337 "***WARNING*** pvrusb2 device hardware"
2338 " appears to be jammed"
2339 " and I can't clear it.");
2341 PVR2_TRACE_ERROR_LEGS,
2342 "You might need to power cycle"
2343 " the pvrusb2 device"
2344 " in order to recover.");
2347 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_setup(hdw=%p) end",hdw);
2351 /* Perform second stage initialization. Set callback pointer first so that
2352 we can avoid a possible initialization race (if the kernel thread runs
2353 before the callback has been set). */
2354 int pvr2_hdw_initialize(struct pvr2_hdw *hdw,
2355 void (*callback_func)(void *),
2356 void *callback_data)
2358 LOCK_TAKE(hdw->big_lock); do {
2359 if (hdw->flag_disconnected) {
2360 /* Handle a race here: If we're already
2361 disconnected by this point, then give up. If we
2362 get past this then we'll remain connected for
2363 the duration of initialization since the entire
2364 initialization sequence is now protected by the
2368 hdw->state_data = callback_data;
2369 hdw->state_func = callback_func;
2370 pvr2_hdw_setup(hdw);
2371 } while (0); LOCK_GIVE(hdw->big_lock);
2372 return hdw->flag_init_ok;
2376 /* Create, set up, and return a structure for interacting with the
2377 underlying hardware. */
2378 struct pvr2_hdw *pvr2_hdw_create(struct usb_interface *intf,
2379 const struct usb_device_id *devid)
2381 unsigned int idx,cnt1,cnt2,m;
2382 struct pvr2_hdw *hdw = NULL;
2384 struct pvr2_ctrl *cptr;
2385 struct usb_device *usb_dev;
2386 const struct pvr2_device_desc *hdw_desc;
2388 struct v4l2_queryctrl qctrl;
2389 struct pvr2_ctl_info *ciptr;
2391 usb_dev = interface_to_usbdev(intf);
2393 hdw_desc = (const struct pvr2_device_desc *)(devid->driver_info);
2395 if (hdw_desc == NULL) {
2396 pvr2_trace(PVR2_TRACE_INIT, "pvr2_hdw_create:"
2397 " No device description pointer,"
2398 " unable to continue.");
2399 pvr2_trace(PVR2_TRACE_INIT, "If you have a new device type,"
2400 " please contact Mike Isely <isely@pobox.com>"
2401 " to get it included in the driver\n");
2405 hdw = kzalloc(sizeof(*hdw),GFP_KERNEL);
2406 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_create: hdw=%p, type \"%s\"",
2407 hdw,hdw_desc->description);
2408 if (!hdw) goto fail;
2410 init_timer(&hdw->quiescent_timer);
2411 hdw->quiescent_timer.data = (unsigned long)hdw;
2412 hdw->quiescent_timer.function = pvr2_hdw_quiescent_timeout;
2414 init_timer(&hdw->encoder_wait_timer);
2415 hdw->encoder_wait_timer.data = (unsigned long)hdw;
2416 hdw->encoder_wait_timer.function = pvr2_hdw_encoder_wait_timeout;
2418 init_timer(&hdw->encoder_run_timer);
2419 hdw->encoder_run_timer.data = (unsigned long)hdw;
2420 hdw->encoder_run_timer.function = pvr2_hdw_encoder_run_timeout;
2422 hdw->master_state = PVR2_STATE_DEAD;
2424 init_waitqueue_head(&hdw->state_wait_data);
2426 hdw->tuner_signal_stale = !0;
2427 cx2341x_fill_defaults(&hdw->enc_ctl_state);
2429 /* Calculate which inputs are OK */
2431 if (hdw_desc->flag_has_analogtuner) m |= 1 << PVR2_CVAL_INPUT_TV;
2432 if (hdw_desc->digital_control_scheme != PVR2_DIGITAL_SCHEME_NONE) {
2433 m |= 1 << PVR2_CVAL_INPUT_DTV;
2435 if (hdw_desc->flag_has_svideo) m |= 1 << PVR2_CVAL_INPUT_SVIDEO;
2436 if (hdw_desc->flag_has_composite) m |= 1 << PVR2_CVAL_INPUT_COMPOSITE;
2437 if (hdw_desc->flag_has_fmradio) m |= 1 << PVR2_CVAL_INPUT_RADIO;
2438 hdw->input_avail_mask = m;
2439 hdw->input_allowed_mask = hdw->input_avail_mask;
2441 /* If not a hybrid device, pathway_state never changes. So
2442 initialize it here to what it should forever be. */
2443 if (!(hdw->input_avail_mask & (1 << PVR2_CVAL_INPUT_DTV))) {
2444 hdw->pathway_state = PVR2_PATHWAY_ANALOG;
2445 } else if (!(hdw->input_avail_mask & (1 << PVR2_CVAL_INPUT_TV))) {
2446 hdw->pathway_state = PVR2_PATHWAY_DIGITAL;
2449 hdw->control_cnt = CTRLDEF_COUNT;
2450 hdw->control_cnt += MPEGDEF_COUNT;
2451 hdw->controls = kzalloc(sizeof(struct pvr2_ctrl) * hdw->control_cnt,
2453 if (!hdw->controls) goto fail;
2454 hdw->hdw_desc = hdw_desc;
2455 for (idx = 0; idx < hdw->control_cnt; idx++) {
2456 cptr = hdw->controls + idx;
2459 for (idx = 0; idx < 32; idx++) {
2460 hdw->std_mask_ptrs[idx] = hdw->std_mask_names[idx];
2462 for (idx = 0; idx < CTRLDEF_COUNT; idx++) {
2463 cptr = hdw->controls + idx;
2464 cptr->info = control_defs+idx;
2467 /* Ensure that default input choice is a valid one. */
2468 m = hdw->input_avail_mask;
2469 if (m) for (idx = 0; idx < (sizeof(m) << 3); idx++) {
2470 if (!((1 << idx) & m)) continue;
2471 hdw->input_val = idx;
2475 /* Define and configure additional controls from cx2341x module. */
2476 hdw->mpeg_ctrl_info = kzalloc(
2477 sizeof(*(hdw->mpeg_ctrl_info)) * MPEGDEF_COUNT, GFP_KERNEL);
2478 if (!hdw->mpeg_ctrl_info) goto fail;
2479 for (idx = 0; idx < MPEGDEF_COUNT; idx++) {
2480 cptr = hdw->controls + idx + CTRLDEF_COUNT;
2481 ciptr = &(hdw->mpeg_ctrl_info[idx].info);
2482 ciptr->desc = hdw->mpeg_ctrl_info[idx].desc;
2483 ciptr->name = mpeg_ids[idx].strid;
2484 ciptr->v4l_id = mpeg_ids[idx].id;
2485 ciptr->skip_init = !0;
2486 ciptr->get_value = ctrl_cx2341x_get;
2487 ciptr->get_v4lflags = ctrl_cx2341x_getv4lflags;
2488 ciptr->is_dirty = ctrl_cx2341x_is_dirty;
2489 if (!idx) ciptr->clear_dirty = ctrl_cx2341x_clear_dirty;
2490 qctrl.id = ciptr->v4l_id;
2491 cx2341x_ctrl_query(&hdw->enc_ctl_state,&qctrl);
2492 if (!(qctrl.flags & V4L2_CTRL_FLAG_READ_ONLY)) {
2493 ciptr->set_value = ctrl_cx2341x_set;
2495 strncpy(hdw->mpeg_ctrl_info[idx].desc,qctrl.name,
2496 PVR2_CTLD_INFO_DESC_SIZE);
2497 hdw->mpeg_ctrl_info[idx].desc[PVR2_CTLD_INFO_DESC_SIZE-1] = 0;
2498 ciptr->default_value = qctrl.default_value;
2499 switch (qctrl.type) {
2501 case V4L2_CTRL_TYPE_INTEGER:
2502 ciptr->type = pvr2_ctl_int;
2503 ciptr->def.type_int.min_value = qctrl.minimum;
2504 ciptr->def.type_int.max_value = qctrl.maximum;
2506 case V4L2_CTRL_TYPE_BOOLEAN:
2507 ciptr->type = pvr2_ctl_bool;
2509 case V4L2_CTRL_TYPE_MENU:
2510 ciptr->type = pvr2_ctl_enum;
2511 ciptr->def.type_enum.value_names =
2512 cx2341x_ctrl_get_menu(&hdw->enc_ctl_state,
2515 ciptr->def.type_enum.value_names[cnt1] != NULL;
2517 ciptr->def.type_enum.count = cnt1;
2523 // Initialize video standard enum dynamic control
2524 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDENUM);
2526 memcpy(&hdw->std_info_enum,cptr->info,
2527 sizeof(hdw->std_info_enum));
2528 cptr->info = &hdw->std_info_enum;
2531 // Initialize control data regarding video standard masks
2532 valid_std_mask = pvr2_std_get_usable();
2533 for (idx = 0; idx < 32; idx++) {
2534 if (!(valid_std_mask & (1 << idx))) continue;
2535 cnt1 = pvr2_std_id_to_str(
2536 hdw->std_mask_names[idx],
2537 sizeof(hdw->std_mask_names[idx])-1,
2539 hdw->std_mask_names[idx][cnt1] = 0;
2541 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDAVAIL);
2543 memcpy(&hdw->std_info_avail,cptr->info,
2544 sizeof(hdw->std_info_avail));
2545 cptr->info = &hdw->std_info_avail;
2546 hdw->std_info_avail.def.type_bitmask.bit_names =
2548 hdw->std_info_avail.def.type_bitmask.valid_bits =
2551 cptr = pvr2_hdw_get_ctrl_by_id(hdw,PVR2_CID_STDCUR);
2553 memcpy(&hdw->std_info_cur,cptr->info,
2554 sizeof(hdw->std_info_cur));
2555 cptr->info = &hdw->std_info_cur;
2556 hdw->std_info_cur.def.type_bitmask.bit_names =
2558 hdw->std_info_avail.def.type_bitmask.valid_bits =
2562 hdw->cropcap_stale = !0;
2563 hdw->eeprom_addr = -1;
2564 hdw->unit_number = -1;
2565 hdw->v4l_minor_number_video = -1;
2566 hdw->v4l_minor_number_vbi = -1;
2567 hdw->v4l_minor_number_radio = -1;
2568 hdw->ctl_write_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL);
2569 if (!hdw->ctl_write_buffer) goto fail;
2570 hdw->ctl_read_buffer = kmalloc(PVR2_CTL_BUFFSIZE,GFP_KERNEL);
2571 if (!hdw->ctl_read_buffer) goto fail;
2572 hdw->ctl_write_urb = usb_alloc_urb(0,GFP_KERNEL);
2573 if (!hdw->ctl_write_urb) goto fail;
2574 hdw->ctl_read_urb = usb_alloc_urb(0,GFP_KERNEL);
2575 if (!hdw->ctl_read_urb) goto fail;
2577 if (v4l2_device_register(&intf->dev, &hdw->v4l2_dev) != 0) {
2578 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
2579 "Error registering with v4l core, giving up");
2582 mutex_lock(&pvr2_unit_mtx); do {
2583 for (idx = 0; idx < PVR_NUM; idx++) {
2584 if (unit_pointers[idx]) continue;
2585 hdw->unit_number = idx;
2586 unit_pointers[idx] = hdw;
2589 } while (0); mutex_unlock(&pvr2_unit_mtx);
2592 cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"pvrusb2");
2594 if (hdw->unit_number >= 0) {
2595 cnt2 = scnprintf(hdw->name+cnt1,sizeof(hdw->name)-cnt1,"_%c",
2596 ('a' + hdw->unit_number));
2599 if (cnt1 >= sizeof(hdw->name)) cnt1 = sizeof(hdw->name)-1;
2600 hdw->name[cnt1] = 0;
2602 hdw->workqueue = create_singlethread_workqueue(hdw->name);
2603 INIT_WORK(&hdw->workpoll,pvr2_hdw_worker_poll);
2605 pvr2_trace(PVR2_TRACE_INIT,"Driver unit number is %d, name is %s",
2606 hdw->unit_number,hdw->name);
2608 hdw->tuner_type = -1;
2611 hdw->usb_intf = intf;
2612 hdw->usb_dev = usb_dev;
2614 usb_make_path(hdw->usb_dev, hdw->bus_info, sizeof(hdw->bus_info));
2616 ifnum = hdw->usb_intf->cur_altsetting->desc.bInterfaceNumber;
2617 usb_set_interface(hdw->usb_dev,ifnum,0);
2619 mutex_init(&hdw->ctl_lock_mutex);
2620 mutex_init(&hdw->big_lock_mutex);
2625 del_timer_sync(&hdw->quiescent_timer);
2626 del_timer_sync(&hdw->encoder_run_timer);
2627 del_timer_sync(&hdw->encoder_wait_timer);
2628 if (hdw->workqueue) {
2629 flush_workqueue(hdw->workqueue);
2630 destroy_workqueue(hdw->workqueue);
2631 hdw->workqueue = NULL;
2633 usb_free_urb(hdw->ctl_read_urb);
2634 usb_free_urb(hdw->ctl_write_urb);
2635 kfree(hdw->ctl_read_buffer);
2636 kfree(hdw->ctl_write_buffer);
2637 kfree(hdw->controls);
2638 kfree(hdw->mpeg_ctrl_info);
2639 kfree(hdw->std_defs);
2640 kfree(hdw->std_enum_names);
2647 /* Remove _all_ associations between this driver and the underlying USB
2649 static void pvr2_hdw_remove_usb_stuff(struct pvr2_hdw *hdw)
2651 if (hdw->flag_disconnected) return;
2652 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_remove_usb_stuff: hdw=%p",hdw);
2653 if (hdw->ctl_read_urb) {
2654 usb_kill_urb(hdw->ctl_read_urb);
2655 usb_free_urb(hdw->ctl_read_urb);
2656 hdw->ctl_read_urb = NULL;
2658 if (hdw->ctl_write_urb) {
2659 usb_kill_urb(hdw->ctl_write_urb);
2660 usb_free_urb(hdw->ctl_write_urb);
2661 hdw->ctl_write_urb = NULL;
2663 if (hdw->ctl_read_buffer) {
2664 kfree(hdw->ctl_read_buffer);
2665 hdw->ctl_read_buffer = NULL;
2667 if (hdw->ctl_write_buffer) {
2668 kfree(hdw->ctl_write_buffer);
2669 hdw->ctl_write_buffer = NULL;
2671 hdw->flag_disconnected = !0;
2672 /* If we don't do this, then there will be a dangling struct device
2673 reference to our disappearing device persisting inside the V4L
2675 v4l2_device_disconnect(&hdw->v4l2_dev);
2676 hdw->usb_dev = NULL;
2677 hdw->usb_intf = NULL;
2678 pvr2_hdw_render_useless(hdw);
2682 /* Destroy hardware interaction structure */
2683 void pvr2_hdw_destroy(struct pvr2_hdw *hdw)
2686 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_destroy: hdw=%p",hdw);
2687 if (hdw->workqueue) {
2688 flush_workqueue(hdw->workqueue);
2689 destroy_workqueue(hdw->workqueue);
2690 hdw->workqueue = NULL;
2692 del_timer_sync(&hdw->quiescent_timer);
2693 del_timer_sync(&hdw->encoder_run_timer);
2694 del_timer_sync(&hdw->encoder_wait_timer);
2695 if (hdw->fw_buffer) {
2696 kfree(hdw->fw_buffer);
2697 hdw->fw_buffer = NULL;
2699 if (hdw->vid_stream) {
2700 pvr2_stream_destroy(hdw->vid_stream);
2701 hdw->vid_stream = NULL;
2703 pvr2_i2c_core_done(hdw);
2704 v4l2_device_unregister(&hdw->v4l2_dev);
2705 pvr2_hdw_remove_usb_stuff(hdw);
2706 mutex_lock(&pvr2_unit_mtx); do {
2707 if ((hdw->unit_number >= 0) &&
2708 (hdw->unit_number < PVR_NUM) &&
2709 (unit_pointers[hdw->unit_number] == hdw)) {
2710 unit_pointers[hdw->unit_number] = NULL;
2712 } while (0); mutex_unlock(&pvr2_unit_mtx);
2713 kfree(hdw->controls);
2714 kfree(hdw->mpeg_ctrl_info);
2715 kfree(hdw->std_defs);
2716 kfree(hdw->std_enum_names);
2721 int pvr2_hdw_dev_ok(struct pvr2_hdw *hdw)
2723 return (hdw && hdw->flag_ok);
2727 /* Called when hardware has been unplugged */
2728 void pvr2_hdw_disconnect(struct pvr2_hdw *hdw)
2730 pvr2_trace(PVR2_TRACE_INIT,"pvr2_hdw_disconnect(hdw=%p)",hdw);
2731 LOCK_TAKE(hdw->big_lock);
2732 LOCK_TAKE(hdw->ctl_lock);
2733 pvr2_hdw_remove_usb_stuff(hdw);
2734 LOCK_GIVE(hdw->ctl_lock);
2735 LOCK_GIVE(hdw->big_lock);
2739 // Attempt to autoselect an appropriate value for std_enum_cur given
2740 // whatever is currently in std_mask_cur
2741 static void pvr2_hdw_internal_find_stdenum(struct pvr2_hdw *hdw)
2744 for (idx = 1; idx < hdw->std_enum_cnt; idx++) {
2745 if (hdw->std_defs[idx-1].id == hdw->std_mask_cur) {
2746 hdw->std_enum_cur = idx;
2750 hdw->std_enum_cur = 0;
2754 // Calculate correct set of enumerated standards based on currently known
2755 // set of available standards bits.
2756 static void pvr2_hdw_internal_set_std_avail(struct pvr2_hdw *hdw)
2758 struct v4l2_standard *newstd;
2759 unsigned int std_cnt;
2762 newstd = pvr2_std_create_enum(&std_cnt,hdw->std_mask_avail);
2764 if (hdw->std_defs) {
2765 kfree(hdw->std_defs);
2766 hdw->std_defs = NULL;
2768 hdw->std_enum_cnt = 0;
2769 if (hdw->std_enum_names) {
2770 kfree(hdw->std_enum_names);
2771 hdw->std_enum_names = NULL;
2776 PVR2_TRACE_ERROR_LEGS,
2777 "WARNING: Failed to identify any viable standards");
2779 hdw->std_enum_names = kmalloc(sizeof(char *)*(std_cnt+1),GFP_KERNEL);
2780 hdw->std_enum_names[0] = "none";
2781 for (idx = 0; idx < std_cnt; idx++) {
2782 hdw->std_enum_names[idx+1] =
2785 // Set up the dynamic control for this standard
2786 hdw->std_info_enum.def.type_enum.value_names = hdw->std_enum_names;
2787 hdw->std_info_enum.def.type_enum.count = std_cnt+1;
2788 hdw->std_defs = newstd;
2789 hdw->std_enum_cnt = std_cnt+1;
2790 hdw->std_enum_cur = 0;
2791 hdw->std_info_cur.def.type_bitmask.valid_bits = hdw->std_mask_avail;
2795 int pvr2_hdw_get_stdenum_value(struct pvr2_hdw *hdw,
2796 struct v4l2_standard *std,
2800 if (!idx) return ret;
2801 LOCK_TAKE(hdw->big_lock); do {
2802 if (idx >= hdw->std_enum_cnt) break;
2804 memcpy(std,hdw->std_defs+idx,sizeof(*std));
2806 } while (0); LOCK_GIVE(hdw->big_lock);
2811 /* Get the number of defined controls */
2812 unsigned int pvr2_hdw_get_ctrl_count(struct pvr2_hdw *hdw)
2814 return hdw->control_cnt;
2818 /* Retrieve a control handle given its index (0..count-1) */
2819 struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_index(struct pvr2_hdw *hdw,
2822 if (idx >= hdw->control_cnt) return NULL;
2823 return hdw->controls + idx;
2827 /* Retrieve a control handle given its index (0..count-1) */
2828 struct pvr2_ctrl *pvr2_hdw_get_ctrl_by_id(struct pvr2_hdw *hdw,
2829 unsigned int ctl_id)
2831 struct pvr2_ctrl *cptr;
2835 /* This could be made a lot more efficient, but for now... */
2836 for (idx = 0; idx < hdw->control_cnt; idx++) {
2837 cptr = hdw->controls + idx;
2838 i = cptr->info->internal_id;
2839 if (i && (i == ctl_id)) return cptr;
2845 /* Given a V4L ID, retrieve the control structure associated with it. */
2846 struct pvr2_ctrl *pvr2_hdw_get_ctrl_v4l(struct pvr2_hdw *hdw,unsigned int ctl_id)
2848 struct pvr2_ctrl *cptr;
2852 /* This could be made a lot more efficient, but for now... */
2853 for (idx = 0; idx < hdw->control_cnt; idx++) {
2854 cptr = hdw->controls + idx;
2855 i = cptr->info->v4l_id;
2856 if (i && (i == ctl_id)) return cptr;
2862 /* Given a V4L ID for its immediate predecessor, retrieve the control
2863 structure associated with it. */
2864 struct pvr2_ctrl *pvr2_hdw_get_ctrl_nextv4l(struct pvr2_hdw *hdw,
2865 unsigned int ctl_id)
2867 struct pvr2_ctrl *cptr,*cp2;
2871 /* This could be made a lot more efficient, but for now... */
2873 for (idx = 0; idx < hdw->control_cnt; idx++) {
2874 cptr = hdw->controls + idx;
2875 i = cptr->info->v4l_id;
2877 if (i <= ctl_id) continue;
2878 if (cp2 && (cp2->info->v4l_id < i)) continue;
2886 static const char *get_ctrl_typename(enum pvr2_ctl_type tp)
2889 case pvr2_ctl_int: return "integer";
2890 case pvr2_ctl_enum: return "enum";
2891 case pvr2_ctl_bool: return "boolean";
2892 case pvr2_ctl_bitmask: return "bitmask";
2898 static void pvr2_subdev_set_control(struct pvr2_hdw *hdw, int id,
2899 const char *name, int val)
2901 struct v4l2_control ctrl;
2902 pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 %s=%d", name, val);
2903 memset(&ctrl, 0, sizeof(ctrl));
2906 v4l2_device_call_all(&hdw->v4l2_dev, 0, core, s_ctrl, &ctrl);
2909 #define PVR2_SUBDEV_SET_CONTROL(hdw, id, lab) \
2910 if ((hdw)->lab##_dirty || (hdw)->force_dirty) { \
2911 pvr2_subdev_set_control(hdw, id, #lab, (hdw)->lab##_val); \
2914 /* Execute whatever commands are required to update the state of all the
2915 sub-devices so that they match our current control values. */
2916 static void pvr2_subdev_update(struct pvr2_hdw *hdw)
2918 struct v4l2_subdev *sd;
2920 pvr2_subdev_update_func fp;
2922 pvr2_trace(PVR2_TRACE_CHIPS, "subdev update...");
2924 if (hdw->tuner_updated || hdw->force_dirty) {
2925 struct tuner_setup setup;
2926 pvr2_trace(PVR2_TRACE_CHIPS, "subdev tuner set_type(%d)",
2928 if (((int)(hdw->tuner_type)) >= 0) {
2929 memset(&setup, 0, sizeof(setup));
2930 setup.addr = ADDR_UNSET;
2931 setup.type = hdw->tuner_type;
2932 setup.mode_mask = T_RADIO | T_ANALOG_TV;
2933 v4l2_device_call_all(&hdw->v4l2_dev, 0,
2934 tuner, s_type_addr, &setup);
2938 if (hdw->input_dirty || hdw->std_dirty || hdw->force_dirty) {
2939 pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 set_standard");
2940 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
2941 v4l2_device_call_all(&hdw->v4l2_dev, 0,
2945 vs = hdw->std_mask_cur;
2946 v4l2_device_call_all(&hdw->v4l2_dev, 0,
2949 hdw->tuner_signal_stale = !0;
2950 hdw->cropcap_stale = !0;
2953 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_BRIGHTNESS, brightness);
2954 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_CONTRAST, contrast);
2955 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_SATURATION, saturation);
2956 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_HUE, hue);
2957 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_MUTE, mute);
2958 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_VOLUME, volume);
2959 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_BALANCE, balance);
2960 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_BASS, bass);
2961 PVR2_SUBDEV_SET_CONTROL(hdw, V4L2_CID_AUDIO_TREBLE, treble);
2963 if (hdw->input_dirty || hdw->audiomode_dirty || hdw->force_dirty) {
2964 struct v4l2_tuner vt;
2965 memset(&vt, 0, sizeof(vt));
2966 vt.audmode = hdw->audiomode_val;
2967 v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, s_tuner, &vt);
2970 if (hdw->freqDirty || hdw->force_dirty) {
2972 struct v4l2_frequency freq;
2973 fv = pvr2_hdw_get_cur_freq(hdw);
2974 pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 set_freq(%lu)", fv);
2975 if (hdw->tuner_signal_stale) pvr2_hdw_status_poll(hdw);
2976 memset(&freq, 0, sizeof(freq));
2977 if (hdw->tuner_signal_info.capability & V4L2_TUNER_CAP_LOW) {
2978 /* ((fv * 1000) / 62500) */
2979 freq.frequency = (fv * 2) / 125;
2981 freq.frequency = fv / 62500;
2983 /* tuner-core currently doesn't seem to care about this, but
2984 let's set it anyway for completeness. */
2985 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
2986 freq.type = V4L2_TUNER_RADIO;
2988 freq.type = V4L2_TUNER_ANALOG_TV;
2991 v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner,
2992 s_frequency, &freq);
2995 if (hdw->res_hor_dirty || hdw->res_ver_dirty || hdw->force_dirty) {
2996 struct v4l2_format fmt;
2997 memset(&fmt, 0, sizeof(fmt));
2998 fmt.type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
2999 fmt.fmt.pix.width = hdw->res_hor_val;
3000 fmt.fmt.pix.height = hdw->res_ver_val;
3001 pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 set_size(%dx%d)",
3002 fmt.fmt.pix.width, fmt.fmt.pix.height);
3003 v4l2_device_call_all(&hdw->v4l2_dev, 0, video, s_fmt, &fmt);
3006 if (hdw->srate_dirty || hdw->force_dirty) {
3008 pvr2_trace(PVR2_TRACE_CHIPS, "subdev v4l2 set_audio %d",
3010 switch (hdw->srate_val) {
3012 case V4L2_MPEG_AUDIO_SAMPLING_FREQ_48000:
3015 case V4L2_MPEG_AUDIO_SAMPLING_FREQ_44100:
3018 case V4L2_MPEG_AUDIO_SAMPLING_FREQ_32000:
3022 v4l2_device_call_all(&hdw->v4l2_dev, 0,
3023 audio, s_clock_freq, val);
3026 /* Unable to set crop parameters; there is apparently no equivalent
3027 for VIDIOC_S_CROP */
3029 v4l2_device_for_each_subdev(sd, &hdw->v4l2_dev) {
3031 if (id >= ARRAY_SIZE(pvr2_module_update_functions)) continue;
3032 fp = pvr2_module_update_functions[id];
3037 if (hdw->tuner_signal_stale || hdw->cropcap_stale) {
3038 pvr2_hdw_status_poll(hdw);
3043 /* Figure out if we need to commit control changes. If so, mark internal
3044 state flags to indicate this fact and return true. Otherwise do nothing
3045 else and return false. */
3046 static int pvr2_hdw_commit_setup(struct pvr2_hdw *hdw)
3049 struct pvr2_ctrl *cptr;
3051 int commit_flag = hdw->force_dirty;
3053 unsigned int bcnt,ccnt;
3055 for (idx = 0; idx < hdw->control_cnt; idx++) {
3056 cptr = hdw->controls + idx;
3057 if (!cptr->info->is_dirty) continue;
3058 if (!cptr->info->is_dirty(cptr)) continue;
3061 if (!(pvrusb2_debug & PVR2_TRACE_CTL)) continue;
3062 bcnt = scnprintf(buf,sizeof(buf),"\"%s\" <-- ",
3065 cptr->info->get_value(cptr,&value);
3066 pvr2_ctrl_value_to_sym_internal(cptr,~0,value,
3068 sizeof(buf)-bcnt,&ccnt);
3070 bcnt += scnprintf(buf+bcnt,sizeof(buf)-bcnt," <%s>",
3071 get_ctrl_typename(cptr->info->type));
3072 pvr2_trace(PVR2_TRACE_CTL,
3073 "/*--TRACE_COMMIT--*/ %.*s",
3078 /* Nothing has changed */
3082 hdw->state_pipeline_config = 0;
3083 trace_stbit("state_pipeline_config",hdw->state_pipeline_config);
3084 pvr2_hdw_state_sched(hdw);
3090 /* Perform all operations needed to commit all control changes. This must
3091 be performed in synchronization with the pipeline state and is thus
3092 expected to be called as part of the driver's worker thread. Return
3093 true if commit successful, otherwise return false to indicate that
3094 commit isn't possible at this time. */
3095 static int pvr2_hdw_commit_execute(struct pvr2_hdw *hdw)
3098 struct pvr2_ctrl *cptr;
3099 int disruptive_change;
3101 /* Handle some required side effects when the video standard is
3103 if (hdw->std_dirty) {
3106 if (hdw->std_mask_cur & V4L2_STD_525_60) {
3113 /* Rewrite the vertical resolution to be appropriate to the
3114 video standard that has been selected. */
3115 if (nvres != hdw->res_ver_val) {
3116 hdw->res_ver_val = nvres;
3117 hdw->res_ver_dirty = !0;
3119 /* Rewrite the GOP size to be appropriate to the video
3120 standard that has been selected. */
3121 if (gop_size != hdw->enc_ctl_state.video_gop_size) {
3122 struct v4l2_ext_controls cs;
3123 struct v4l2_ext_control c1;
3124 memset(&cs, 0, sizeof(cs));
3125 memset(&c1, 0, sizeof(c1));
3128 c1.id = V4L2_CID_MPEG_VIDEO_GOP_SIZE;
3129 c1.value = gop_size;
3130 cx2341x_ext_ctrls(&hdw->enc_ctl_state, 0, &cs,
3131 VIDIOC_S_EXT_CTRLS);
3135 if (hdw->input_dirty && hdw->state_pathway_ok &&
3136 (((hdw->input_val == PVR2_CVAL_INPUT_DTV) ?
3137 PVR2_PATHWAY_DIGITAL : PVR2_PATHWAY_ANALOG) !=
3138 hdw->pathway_state)) {
3139 /* Change of mode being asked for... */
3140 hdw->state_pathway_ok = 0;
3141 trace_stbit("state_pathway_ok",hdw->state_pathway_ok);
3143 if (!hdw->state_pathway_ok) {
3144 /* Can't commit anything until pathway is ok. */
3147 /* The broadcast decoder can only scale down, so if
3148 * res_*_dirty && crop window < output format ==> enlarge crop.
3150 * The mpeg encoder receives fields of res_hor_val dots and
3151 * res_ver_val halflines. Limits: hor<=720, ver<=576.
3153 if (hdw->res_hor_dirty && hdw->cropw_val < hdw->res_hor_val) {
3154 hdw->cropw_val = hdw->res_hor_val;
3155 hdw->cropw_dirty = !0;
3156 } else if (hdw->cropw_dirty) {
3157 hdw->res_hor_dirty = !0; /* must rescale */
3158 hdw->res_hor_val = min(720, hdw->cropw_val);
3160 if (hdw->res_ver_dirty && hdw->croph_val < hdw->res_ver_val) {
3161 hdw->croph_val = hdw->res_ver_val;
3162 hdw->croph_dirty = !0;
3163 } else if (hdw->croph_dirty) {
3164 int nvres = hdw->std_mask_cur & V4L2_STD_525_60 ? 480 : 576;
3165 hdw->res_ver_dirty = !0;
3166 hdw->res_ver_val = min(nvres, hdw->croph_val);
3169 /* If any of the below has changed, then we can't do the update
3170 while the pipeline is running. Pipeline must be paused first
3171 and decoder -> encoder connection be made quiescent before we
3175 hdw->enc_unsafe_stale ||
3177 hdw->res_ver_dirty ||
3178 hdw->res_hor_dirty ||
3182 (hdw->active_stream_type != hdw->desired_stream_type));
3183 if (disruptive_change && !hdw->state_pipeline_idle) {
3184 /* Pipeline is not idle; we can't proceed. Arrange to
3185 cause pipeline to stop so that we can try this again
3187 hdw->state_pipeline_pause = !0;
3191 if (hdw->srate_dirty) {
3192 /* Write new sample rate into control structure since
3193 * the master copy is stale. We must track srate
3194 * separate from the mpeg control structure because
3195 * other logic also uses this value. */
3196 struct v4l2_ext_controls cs;
3197 struct v4l2_ext_control c1;
3198 memset(&cs,0,sizeof(cs));
3199 memset(&c1,0,sizeof(c1));
3202 c1.id = V4L2_CID_MPEG_AUDIO_SAMPLING_FREQ;
3203 c1.value = hdw->srate_val;
3204 cx2341x_ext_ctrls(&hdw->enc_ctl_state, 0, &cs,VIDIOC_S_EXT_CTRLS);
3207 if (hdw->active_stream_type != hdw->desired_stream_type) {
3208 /* Handle any side effects of stream config here */
3209 hdw->active_stream_type = hdw->desired_stream_type;
3212 if (hdw->hdw_desc->signal_routing_scheme ==
3213 PVR2_ROUTING_SCHEME_GOTVIEW) {
3215 /* Handle GOTVIEW audio switching */
3216 pvr2_hdw_gpio_get_out(hdw,&b);
3217 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
3219 pvr2_hdw_gpio_chg_out(hdw,(1 << 11),~0);
3222 pvr2_hdw_gpio_chg_out(hdw,(1 << 11),0);
3226 /* Check and update state for all sub-devices. */
3227 pvr2_subdev_update(hdw);
3229 hdw->tuner_updated = 0;
3230 hdw->force_dirty = 0;
3231 for (idx = 0; idx < hdw->control_cnt; idx++) {
3232 cptr = hdw->controls + idx;
3233 if (!cptr->info->clear_dirty) continue;
3234 cptr->info->clear_dirty(cptr);
3237 if ((hdw->pathway_state == PVR2_PATHWAY_ANALOG) &&
3238 hdw->state_encoder_run) {
3239 /* If encoder isn't running or it can't be touched, then
3240 this will get worked out later when we start the
3242 if (pvr2_encoder_adjust(hdw) < 0) return !0;
3245 hdw->state_pipeline_config = !0;
3246 /* Hardware state may have changed in a way to cause the cropping
3247 capabilities to have changed. So mark it stale, which will
3248 cause a later re-fetch. */
3249 trace_stbit("state_pipeline_config",hdw->state_pipeline_config);
3254 int pvr2_hdw_commit_ctl(struct pvr2_hdw *hdw)
3257 LOCK_TAKE(hdw->big_lock);
3258 fl = pvr2_hdw_commit_setup(hdw);
3259 LOCK_GIVE(hdw->big_lock);
3261 return pvr2_hdw_wait(hdw,0);
3265 static void pvr2_hdw_worker_poll(struct work_struct *work)
3268 struct pvr2_hdw *hdw = container_of(work,struct pvr2_hdw,workpoll);
3269 LOCK_TAKE(hdw->big_lock); do {
3270 fl = pvr2_hdw_state_eval(hdw);
3271 } while (0); LOCK_GIVE(hdw->big_lock);
3272 if (fl && hdw->state_func) {
3273 hdw->state_func(hdw->state_data);
3278 static int pvr2_hdw_wait(struct pvr2_hdw *hdw,int state)
3280 return wait_event_interruptible(
3281 hdw->state_wait_data,
3282 (hdw->state_stale == 0) &&
3283 (!state || (hdw->master_state != state)));
3287 /* Return name for this driver instance */
3288 const char *pvr2_hdw_get_driver_name(struct pvr2_hdw *hdw)
3294 const char *pvr2_hdw_get_desc(struct pvr2_hdw *hdw)
3296 return hdw->hdw_desc->description;
3300 const char *pvr2_hdw_get_type(struct pvr2_hdw *hdw)
3302 return hdw->hdw_desc->shortname;
3306 int pvr2_hdw_is_hsm(struct pvr2_hdw *hdw)
3309 LOCK_TAKE(hdw->ctl_lock); do {
3310 hdw->cmd_buffer[0] = FX2CMD_GET_USB_SPEED;
3311 result = pvr2_send_request(hdw,
3314 if (result < 0) break;
3315 result = (hdw->cmd_buffer[0] != 0);
3316 } while(0); LOCK_GIVE(hdw->ctl_lock);
3321 /* Execute poll of tuner status */
3322 void pvr2_hdw_execute_tuner_poll(struct pvr2_hdw *hdw)
3324 LOCK_TAKE(hdw->big_lock); do {
3325 pvr2_hdw_status_poll(hdw);
3326 } while (0); LOCK_GIVE(hdw->big_lock);
3330 static int pvr2_hdw_check_cropcap(struct pvr2_hdw *hdw)
3332 if (!hdw->cropcap_stale) {
3335 pvr2_hdw_status_poll(hdw);
3336 if (hdw->cropcap_stale) {
3343 /* Return information about cropping capabilities */
3344 int pvr2_hdw_get_cropcap(struct pvr2_hdw *hdw, struct v4l2_cropcap *pp)
3347 LOCK_TAKE(hdw->big_lock);
3348 stat = pvr2_hdw_check_cropcap(hdw);
3350 memcpy(pp, &hdw->cropcap_info, sizeof(hdw->cropcap_info));
3352 LOCK_GIVE(hdw->big_lock);
3357 /* Return information about the tuner */
3358 int pvr2_hdw_get_tuner_status(struct pvr2_hdw *hdw,struct v4l2_tuner *vtp)
3360 LOCK_TAKE(hdw->big_lock); do {
3361 if (hdw->tuner_signal_stale) {
3362 pvr2_hdw_status_poll(hdw);
3364 memcpy(vtp,&hdw->tuner_signal_info,sizeof(struct v4l2_tuner));
3365 } while (0); LOCK_GIVE(hdw->big_lock);
3370 /* Get handle to video output stream */
3371 struct pvr2_stream *pvr2_hdw_get_video_stream(struct pvr2_hdw *hp)
3373 return hp->vid_stream;
3377 void pvr2_hdw_trigger_module_log(struct pvr2_hdw *hdw)
3379 int nr = pvr2_hdw_get_unit_number(hdw);
3380 LOCK_TAKE(hdw->big_lock); do {
3381 printk(KERN_INFO "pvrusb2: ================= START STATUS CARD #%d =================\n", nr);
3382 v4l2_device_call_all(&hdw->v4l2_dev, 0, core, log_status);
3383 pvr2_trace(PVR2_TRACE_INFO,"cx2341x config:");
3384 cx2341x_log_status(&hdw->enc_ctl_state, "pvrusb2");
3385 pvr2_hdw_state_log_state(hdw);
3386 printk(KERN_INFO "pvrusb2: ================== END STATUS CARD #%d ==================\n", nr);
3387 } while (0); LOCK_GIVE(hdw->big_lock);
3391 /* Grab EEPROM contents, needed for direct method. */
3392 #define EEPROM_SIZE 8192
3393 #define trace_eeprom(...) pvr2_trace(PVR2_TRACE_EEPROM,__VA_ARGS__)
3394 static u8 *pvr2_full_eeprom_fetch(struct pvr2_hdw *hdw)
3396 struct i2c_msg msg[2];
3405 eeprom = kmalloc(EEPROM_SIZE,GFP_KERNEL);
3407 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3408 "Failed to allocate memory"
3409 " required to read eeprom");
3413 trace_eeprom("Value for eeprom addr from controller was 0x%x",
3415 addr = hdw->eeprom_addr;
3416 /* Seems that if the high bit is set, then the *real* eeprom
3417 address is shifted right now bit position (noticed this in
3418 newer PVR USB2 hardware) */
3419 if (addr & 0x80) addr >>= 1;
3421 /* FX2 documentation states that a 16bit-addressed eeprom is
3422 expected if the I2C address is an odd number (yeah, this is
3423 strange but it's what they do) */
3424 mode16 = (addr & 1);
3425 eepromSize = (mode16 ? EEPROM_SIZE : 256);
3426 trace_eeprom("Examining %d byte eeprom at location 0x%x"
3427 " using %d bit addressing",eepromSize,addr,
3432 msg[0].len = mode16 ? 2 : 1;
3435 msg[1].flags = I2C_M_RD;
3437 /* We have to do the actual eeprom data fetch ourselves, because
3438 (1) we're only fetching part of the eeprom, and (2) if we were
3439 getting the whole thing our I2C driver can't grab it in one
3440 pass - which is what tveeprom is otherwise going to attempt */
3441 memset(eeprom,0,EEPROM_SIZE);
3442 for (tcnt = 0; tcnt < EEPROM_SIZE; tcnt += pcnt) {
3444 if (pcnt + tcnt > EEPROM_SIZE) pcnt = EEPROM_SIZE-tcnt;
3445 offs = tcnt + (eepromSize - EEPROM_SIZE);
3447 iadd[0] = offs >> 8;
3453 msg[1].buf = eeprom+tcnt;
3454 if ((ret = i2c_transfer(&hdw->i2c_adap,
3455 msg,ARRAY_SIZE(msg))) != 2) {
3456 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3457 "eeprom fetch set offs err=%d",ret);
3466 void pvr2_hdw_cpufw_set_enabled(struct pvr2_hdw *hdw,
3473 LOCK_TAKE(hdw->big_lock); do {
3474 if ((hdw->fw_buffer == NULL) == !enable_flag) break;
3477 pvr2_trace(PVR2_TRACE_FIRMWARE,
3478 "Cleaning up after CPU firmware fetch");
3479 kfree(hdw->fw_buffer);
3480 hdw->fw_buffer = NULL;
3482 if (hdw->fw_cpu_flag) {
3483 /* Now release the CPU. It will disconnect
3484 and reconnect later. */
3485 pvr2_hdw_cpureset_assert(hdw,0);
3490 hdw->fw_cpu_flag = (prom_flag == 0);
3491 if (hdw->fw_cpu_flag) {
3492 pvr2_trace(PVR2_TRACE_FIRMWARE,
3493 "Preparing to suck out CPU firmware");
3494 hdw->fw_size = 0x2000;
3495 hdw->fw_buffer = kzalloc(hdw->fw_size,GFP_KERNEL);
3496 if (!hdw->fw_buffer) {
3501 /* We have to hold the CPU during firmware upload. */
3502 pvr2_hdw_cpureset_assert(hdw,1);
3504 /* download the firmware from address 0000-1fff in 2048
3505 (=0x800) bytes chunk. */
3507 pvr2_trace(PVR2_TRACE_FIRMWARE,
3508 "Grabbing CPU firmware");
3509 pipe = usb_rcvctrlpipe(hdw->usb_dev, 0);
3510 for(address = 0; address < hdw->fw_size;
3512 ret = usb_control_msg(hdw->usb_dev,pipe,
3515 hdw->fw_buffer+address,
3520 pvr2_trace(PVR2_TRACE_FIRMWARE,
3521 "Done grabbing CPU firmware");
3523 pvr2_trace(PVR2_TRACE_FIRMWARE,
3524 "Sucking down EEPROM contents");
3525 hdw->fw_buffer = pvr2_full_eeprom_fetch(hdw);
3526 if (!hdw->fw_buffer) {
3527 pvr2_trace(PVR2_TRACE_FIRMWARE,
3528 "EEPROM content suck failed.");
3531 hdw->fw_size = EEPROM_SIZE;
3532 pvr2_trace(PVR2_TRACE_FIRMWARE,
3533 "Done sucking down EEPROM contents");
3536 } while (0); LOCK_GIVE(hdw->big_lock);
3540 /* Return true if we're in a mode for retrieval CPU firmware */
3541 int pvr2_hdw_cpufw_get_enabled(struct pvr2_hdw *hdw)
3543 return hdw->fw_buffer != NULL;
3547 int pvr2_hdw_cpufw_get(struct pvr2_hdw *hdw,unsigned int offs,
3548 char *buf,unsigned int cnt)
3551 LOCK_TAKE(hdw->big_lock); do {
3555 if (!hdw->fw_buffer) {
3560 if (offs >= hdw->fw_size) {
3561 pvr2_trace(PVR2_TRACE_FIRMWARE,
3562 "Read firmware data offs=%d EOF",
3568 if (offs + cnt > hdw->fw_size) cnt = hdw->fw_size - offs;
3570 memcpy(buf,hdw->fw_buffer+offs,cnt);
3572 pvr2_trace(PVR2_TRACE_FIRMWARE,
3573 "Read firmware data offs=%d cnt=%d",
3576 } while (0); LOCK_GIVE(hdw->big_lock);
3582 int pvr2_hdw_v4l_get_minor_number(struct pvr2_hdw *hdw,
3583 enum pvr2_v4l_type index)
3586 case pvr2_v4l_type_video: return hdw->v4l_minor_number_video;
3587 case pvr2_v4l_type_vbi: return hdw->v4l_minor_number_vbi;
3588 case pvr2_v4l_type_radio: return hdw->v4l_minor_number_radio;
3594 /* Store a v4l minor device number */
3595 void pvr2_hdw_v4l_store_minor_number(struct pvr2_hdw *hdw,
3596 enum pvr2_v4l_type index,int v)
3599 case pvr2_v4l_type_video: hdw->v4l_minor_number_video = v;
3600 case pvr2_v4l_type_vbi: hdw->v4l_minor_number_vbi = v;
3601 case pvr2_v4l_type_radio: hdw->v4l_minor_number_radio = v;
3607 static void pvr2_ctl_write_complete(struct urb *urb)
3609 struct pvr2_hdw *hdw = urb->context;
3610 hdw->ctl_write_pend_flag = 0;
3611 if (hdw->ctl_read_pend_flag) return;
3612 complete(&hdw->ctl_done);
3616 static void pvr2_ctl_read_complete(struct urb *urb)
3618 struct pvr2_hdw *hdw = urb->context;
3619 hdw->ctl_read_pend_flag = 0;
3620 if (hdw->ctl_write_pend_flag) return;
3621 complete(&hdw->ctl_done);
3625 static void pvr2_ctl_timeout(unsigned long data)
3627 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
3628 if (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) {
3629 hdw->ctl_timeout_flag = !0;
3630 if (hdw->ctl_write_pend_flag)
3631 usb_unlink_urb(hdw->ctl_write_urb);
3632 if (hdw->ctl_read_pend_flag)
3633 usb_unlink_urb(hdw->ctl_read_urb);
3638 /* Issue a command and get a response from the device. This extended
3639 version includes a probe flag (which if set means that device errors
3640 should not be logged or treated as fatal) and a timeout in jiffies.
3641 This can be used to non-lethally probe the health of endpoint 1. */
3642 static int pvr2_send_request_ex(struct pvr2_hdw *hdw,
3643 unsigned int timeout,int probe_fl,
3644 void *write_data,unsigned int write_len,
3645 void *read_data,unsigned int read_len)
3649 struct timer_list timer;
3650 if (!hdw->ctl_lock_held) {
3651 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3652 "Attempted to execute control transfer"
3656 if (!hdw->flag_ok && !probe_fl) {
3657 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3658 "Attempted to execute control transfer"
3659 " when device not ok");
3662 if (!(hdw->ctl_read_urb && hdw->ctl_write_urb)) {
3664 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3665 "Attempted to execute control transfer"
3666 " when USB is disconnected");
3671 /* Ensure that we have sane parameters */
3672 if (!write_data) write_len = 0;
3673 if (!read_data) read_len = 0;
3674 if (write_len > PVR2_CTL_BUFFSIZE) {
3676 PVR2_TRACE_ERROR_LEGS,
3677 "Attempted to execute %d byte"
3678 " control-write transfer (limit=%d)",
3679 write_len,PVR2_CTL_BUFFSIZE);
3682 if (read_len > PVR2_CTL_BUFFSIZE) {
3684 PVR2_TRACE_ERROR_LEGS,
3685 "Attempted to execute %d byte"
3686 " control-read transfer (limit=%d)",
3687 write_len,PVR2_CTL_BUFFSIZE);
3690 if ((!write_len) && (!read_len)) {
3692 PVR2_TRACE_ERROR_LEGS,
3693 "Attempted to execute null control transfer?");
3698 hdw->cmd_debug_state = 1;
3700 hdw->cmd_debug_code = ((unsigned char *)write_data)[0];
3702 hdw->cmd_debug_code = 0;
3704 hdw->cmd_debug_write_len = write_len;
3705 hdw->cmd_debug_read_len = read_len;
3707 /* Initialize common stuff */
3708 init_completion(&hdw->ctl_done);
3709 hdw->ctl_timeout_flag = 0;
3710 hdw->ctl_write_pend_flag = 0;
3711 hdw->ctl_read_pend_flag = 0;
3713 timer.expires = jiffies + timeout;
3714 timer.data = (unsigned long)hdw;
3715 timer.function = pvr2_ctl_timeout;
3718 hdw->cmd_debug_state = 2;
3719 /* Transfer write data to internal buffer */
3720 for (idx = 0; idx < write_len; idx++) {
3721 hdw->ctl_write_buffer[idx] =
3722 ((unsigned char *)write_data)[idx];
3724 /* Initiate a write request */
3725 usb_fill_bulk_urb(hdw->ctl_write_urb,
3727 usb_sndbulkpipe(hdw->usb_dev,
3728 PVR2_CTL_WRITE_ENDPOINT),
3729 hdw->ctl_write_buffer,
3731 pvr2_ctl_write_complete,
3733 hdw->ctl_write_urb->actual_length = 0;
3734 hdw->ctl_write_pend_flag = !0;
3735 status = usb_submit_urb(hdw->ctl_write_urb,GFP_KERNEL);
3737 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3738 "Failed to submit write-control"
3739 " URB status=%d",status);
3740 hdw->ctl_write_pend_flag = 0;
3746 hdw->cmd_debug_state = 3;
3747 memset(hdw->ctl_read_buffer,0x43,read_len);
3748 /* Initiate a read request */
3749 usb_fill_bulk_urb(hdw->ctl_read_urb,
3751 usb_rcvbulkpipe(hdw->usb_dev,
3752 PVR2_CTL_READ_ENDPOINT),
3753 hdw->ctl_read_buffer,
3755 pvr2_ctl_read_complete,
3757 hdw->ctl_read_urb->actual_length = 0;
3758 hdw->ctl_read_pend_flag = !0;
3759 status = usb_submit_urb(hdw->ctl_read_urb,GFP_KERNEL);
3761 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3762 "Failed to submit read-control"
3763 " URB status=%d",status);
3764 hdw->ctl_read_pend_flag = 0;
3772 /* Now wait for all I/O to complete */
3773 hdw->cmd_debug_state = 4;
3774 while (hdw->ctl_write_pend_flag || hdw->ctl_read_pend_flag) {
3775 wait_for_completion(&hdw->ctl_done);
3777 hdw->cmd_debug_state = 5;
3780 del_timer_sync(&timer);
3782 hdw->cmd_debug_state = 6;
3785 if (hdw->ctl_timeout_flag) {
3786 status = -ETIMEDOUT;
3788 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3789 "Timed out control-write");
3795 /* Validate results of write request */
3796 if ((hdw->ctl_write_urb->status != 0) &&
3797 (hdw->ctl_write_urb->status != -ENOENT) &&
3798 (hdw->ctl_write_urb->status != -ESHUTDOWN) &&
3799 (hdw->ctl_write_urb->status != -ECONNRESET)) {
3800 /* USB subsystem is reporting some kind of failure
3802 status = hdw->ctl_write_urb->status;
3804 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3805 "control-write URB failure,"
3811 if (hdw->ctl_write_urb->actual_length < write_len) {
3812 /* Failed to write enough data */
3815 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3816 "control-write URB short,"
3817 " expected=%d got=%d",
3819 hdw->ctl_write_urb->actual_length);
3825 /* Validate results of read request */
3826 if ((hdw->ctl_read_urb->status != 0) &&
3827 (hdw->ctl_read_urb->status != -ENOENT) &&
3828 (hdw->ctl_read_urb->status != -ESHUTDOWN) &&
3829 (hdw->ctl_read_urb->status != -ECONNRESET)) {
3830 /* USB subsystem is reporting some kind of failure
3832 status = hdw->ctl_read_urb->status;
3834 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3835 "control-read URB failure,"
3841 if (hdw->ctl_read_urb->actual_length < read_len) {
3842 /* Failed to read enough data */
3845 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3846 "control-read URB short,"
3847 " expected=%d got=%d",
3849 hdw->ctl_read_urb->actual_length);
3853 /* Transfer retrieved data out from internal buffer */
3854 for (idx = 0; idx < read_len; idx++) {
3855 ((unsigned char *)read_data)[idx] =
3856 hdw->ctl_read_buffer[idx];
3862 hdw->cmd_debug_state = 0;
3863 if ((status < 0) && (!probe_fl)) {
3864 pvr2_hdw_render_useless(hdw);
3870 int pvr2_send_request(struct pvr2_hdw *hdw,
3871 void *write_data,unsigned int write_len,
3872 void *read_data,unsigned int read_len)
3874 return pvr2_send_request_ex(hdw,HZ*4,0,
3875 write_data,write_len,
3876 read_data,read_len);
3880 static int pvr2_issue_simple_cmd(struct pvr2_hdw *hdw,u32 cmdcode)
3883 unsigned int cnt = 1;
3884 unsigned int args = 0;
3885 LOCK_TAKE(hdw->ctl_lock);
3886 hdw->cmd_buffer[0] = cmdcode & 0xffu;
3887 args = (cmdcode >> 8) & 0xffu;
3888 args = (args > 2) ? 2 : args;
3891 hdw->cmd_buffer[1] = (cmdcode >> 16) & 0xffu;
3893 hdw->cmd_buffer[2] = (cmdcode >> 24) & 0xffu;
3896 if (pvrusb2_debug & PVR2_TRACE_INIT) {
3898 unsigned int ccnt,bcnt;
3902 ccnt = scnprintf(tbuf+bcnt,
3904 "Sending FX2 command 0x%x",cmdcode);
3906 for (idx = 0; idx < ARRAY_SIZE(pvr2_fx2cmd_desc); idx++) {
3907 if (pvr2_fx2cmd_desc[idx].id == cmdcode) {
3908 ccnt = scnprintf(tbuf+bcnt,
3911 pvr2_fx2cmd_desc[idx].desc);
3917 ccnt = scnprintf(tbuf+bcnt,
3919 " (%u",hdw->cmd_buffer[1]);
3922 ccnt = scnprintf(tbuf+bcnt,
3924 ",%u",hdw->cmd_buffer[2]);
3927 ccnt = scnprintf(tbuf+bcnt,
3932 pvr2_trace(PVR2_TRACE_INIT,"%.*s",bcnt,tbuf);
3934 ret = pvr2_send_request(hdw,hdw->cmd_buffer,cnt,NULL,0);
3935 LOCK_GIVE(hdw->ctl_lock);
3940 int pvr2_write_register(struct pvr2_hdw *hdw, u16 reg, u32 data)
3944 LOCK_TAKE(hdw->ctl_lock);
3946 hdw->cmd_buffer[0] = FX2CMD_REG_WRITE; /* write register prefix */
3947 PVR2_DECOMPOSE_LE(hdw->cmd_buffer,1,data);
3948 hdw->cmd_buffer[5] = 0;
3949 hdw->cmd_buffer[6] = (reg >> 8) & 0xff;
3950 hdw->cmd_buffer[7] = reg & 0xff;
3953 ret = pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 0);
3955 LOCK_GIVE(hdw->ctl_lock);
3961 static int pvr2_read_register(struct pvr2_hdw *hdw, u16 reg, u32 *data)
3965 LOCK_TAKE(hdw->ctl_lock);
3967 hdw->cmd_buffer[0] = FX2CMD_REG_READ; /* read register prefix */
3968 hdw->cmd_buffer[1] = 0;
3969 hdw->cmd_buffer[2] = 0;
3970 hdw->cmd_buffer[3] = 0;
3971 hdw->cmd_buffer[4] = 0;
3972 hdw->cmd_buffer[5] = 0;
3973 hdw->cmd_buffer[6] = (reg >> 8) & 0xff;
3974 hdw->cmd_buffer[7] = reg & 0xff;
3976 ret |= pvr2_send_request(hdw, hdw->cmd_buffer, 8, hdw->cmd_buffer, 4);
3977 *data = PVR2_COMPOSE_LE(hdw->cmd_buffer,0);
3979 LOCK_GIVE(hdw->ctl_lock);
3985 void pvr2_hdw_render_useless(struct pvr2_hdw *hdw)
3987 if (!hdw->flag_ok) return;
3988 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
3989 "Device being rendered inoperable");
3990 if (hdw->vid_stream) {
3991 pvr2_stream_setup(hdw->vid_stream,NULL,0,0);
3994 trace_stbit("flag_ok",hdw->flag_ok);
3995 pvr2_hdw_state_sched(hdw);
3999 void pvr2_hdw_device_reset(struct pvr2_hdw *hdw)
4002 pvr2_trace(PVR2_TRACE_INIT,"Performing a device reset...");
4003 ret = usb_lock_device_for_reset(hdw->usb_dev,NULL);
4005 ret = usb_reset_device(hdw->usb_dev);
4006 usb_unlock_device(hdw->usb_dev);
4008 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
4009 "Failed to lock USB device ret=%d",ret);
4011 if (init_pause_msec) {
4012 pvr2_trace(PVR2_TRACE_INFO,
4013 "Waiting %u msec for hardware to settle",
4015 msleep(init_pause_msec);
4021 void pvr2_hdw_cpureset_assert(struct pvr2_hdw *hdw,int val)
4027 if (!hdw->usb_dev) return;
4029 pvr2_trace(PVR2_TRACE_INIT,"cpureset_assert(%d)",val);
4031 da[0] = val ? 0x01 : 0x00;
4033 /* Write the CPUCS register on the 8051. The lsb of the register
4034 is the reset bit; a 1 asserts reset while a 0 clears it. */
4035 pipe = usb_sndctrlpipe(hdw->usb_dev, 0);
4036 ret = usb_control_msg(hdw->usb_dev,pipe,0xa0,0x40,0xe600,0,da,1,HZ);
4038 pvr2_trace(PVR2_TRACE_ERROR_LEGS,
4039 "cpureset_assert(%d) error=%d",val,ret);
4040 pvr2_hdw_render_useless(hdw);
4045 int pvr2_hdw_cmd_deep_reset(struct pvr2_hdw *hdw)
4047 return pvr2_issue_simple_cmd(hdw,FX2CMD_DEEP_RESET);
4051 int pvr2_hdw_cmd_powerup(struct pvr2_hdw *hdw)
4053 return pvr2_issue_simple_cmd(hdw,FX2CMD_POWER_ON);
4057 int pvr2_hdw_cmd_powerdown(struct pvr2_hdw *hdw)
4059 return pvr2_issue_simple_cmd(hdw,FX2CMD_POWER_OFF);
4063 int pvr2_hdw_cmd_decoder_reset(struct pvr2_hdw *hdw)
4065 pvr2_trace(PVR2_TRACE_INIT,
4066 "Requesting decoder reset");
4067 if (hdw->decoder_client_id) {
4068 v4l2_device_call_all(&hdw->v4l2_dev, hdw->decoder_client_id,
4072 pvr2_trace(PVR2_TRACE_INIT,
4073 "Unable to reset decoder: nothing attached");
4078 static int pvr2_hdw_cmd_hcw_demod_reset(struct pvr2_hdw *hdw, int onoff)
4081 return pvr2_issue_simple_cmd(hdw,
4082 FX2CMD_HCW_DEMOD_RESETIN |
4084 ((onoff ? 1 : 0) << 16));
4088 static int pvr2_hdw_cmd_onair_fe_power_ctrl(struct pvr2_hdw *hdw, int onoff)
4091 return pvr2_issue_simple_cmd(hdw,(onoff ?
4092 FX2CMD_ONAIR_DTV_POWER_ON :
4093 FX2CMD_ONAIR_DTV_POWER_OFF));
4097 static int pvr2_hdw_cmd_onair_digital_path_ctrl(struct pvr2_hdw *hdw,
4100 return pvr2_issue_simple_cmd(hdw,(onoff ?
4101 FX2CMD_ONAIR_DTV_STREAMING_ON :
4102 FX2CMD_ONAIR_DTV_STREAMING_OFF));
4106 static void pvr2_hdw_cmd_modeswitch(struct pvr2_hdw *hdw,int digitalFl)
4109 /* Compare digital/analog desired setting with current setting. If
4110 they don't match, fix it... */
4111 cmode = (digitalFl ? PVR2_PATHWAY_DIGITAL : PVR2_PATHWAY_ANALOG);
4112 if (cmode == hdw->pathway_state) {
4113 /* They match; nothing to do */
4117 switch (hdw->hdw_desc->digital_control_scheme) {
4118 case PVR2_DIGITAL_SCHEME_HAUPPAUGE:
4119 pvr2_hdw_cmd_hcw_demod_reset(hdw,digitalFl);
4120 if (cmode == PVR2_PATHWAY_ANALOG) {
4121 /* If moving to analog mode, also force the decoder
4122 to reset. If no decoder is attached, then it's
4123 ok to ignore this because if/when the decoder
4124 attaches, it will reset itself at that time. */
4125 pvr2_hdw_cmd_decoder_reset(hdw);
4128 case PVR2_DIGITAL_SCHEME_ONAIR:
4129 /* Supposedly we should always have the power on whether in
4130 digital or analog mode. But for now do what appears to
4132 pvr2_hdw_cmd_onair_fe_power_ctrl(hdw,digitalFl);
4137 pvr2_hdw_untrip_unlocked(hdw);
4138 hdw->pathway_state = cmode;
4142 static void pvr2_led_ctrl_hauppauge(struct pvr2_hdw *hdw, int onoff)
4144 /* change some GPIO data
4146 * note: bit d7 of dir appears to control the LED,
4147 * so we shut it off here.
4151 pvr2_hdw_gpio_chg_dir(hdw, 0xffffffff, 0x00000481);
4153 pvr2_hdw_gpio_chg_dir(hdw, 0xffffffff, 0x00000401);
4155 pvr2_hdw_gpio_chg_out(hdw, 0xffffffff, 0x00000000);
4159 typedef void (*led_method_func)(struct pvr2_hdw *,int);
4161 static led_method_func led_methods[] = {
4162 [PVR2_LED_SCHEME_HAUPPAUGE] = pvr2_led_ctrl_hauppauge,
4167 static void pvr2_led_ctrl(struct pvr2_hdw *hdw,int onoff)
4169 unsigned int scheme_id;
4172 if ((!onoff) == (!hdw->led_on)) return;
4174 hdw->led_on = onoff != 0;
4176 scheme_id = hdw->hdw_desc->led_scheme;
4177 if (scheme_id < ARRAY_SIZE(led_methods)) {
4178 fp = led_methods[scheme_id];
4183 if (fp) (*fp)(hdw,onoff);
4187 /* Stop / start video stream transport */
4188 static int pvr2_hdw_cmd_usbstream(struct pvr2_hdw *hdw,int runFl)
4192 /* If we're in analog mode, then just issue the usual analog
4194 if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) {
4195 return pvr2_issue_simple_cmd(hdw,
4197 FX2CMD_STREAMING_ON :
4198 FX2CMD_STREAMING_OFF));
4199 /*Note: Not reached */
4202 if (hdw->pathway_state != PVR2_PATHWAY_DIGITAL) {
4203 /* Whoops, we don't know what mode we're in... */
4207 /* To get here we have to be in digital mode. The mechanism here
4208 is unfortunately different for different vendors. So we switch
4209 on the device's digital scheme attribute in order to figure out
4211 switch (hdw->hdw_desc->digital_control_scheme) {
4212 case PVR2_DIGITAL_SCHEME_HAUPPAUGE:
4213 return pvr2_issue_simple_cmd(hdw,
4215 FX2CMD_HCW_DTV_STREAMING_ON :
4216 FX2CMD_HCW_DTV_STREAMING_OFF));
4217 case PVR2_DIGITAL_SCHEME_ONAIR:
4218 ret = pvr2_issue_simple_cmd(hdw,
4220 FX2CMD_STREAMING_ON :
4221 FX2CMD_STREAMING_OFF));
4222 if (ret) return ret;
4223 return pvr2_hdw_cmd_onair_digital_path_ctrl(hdw,runFl);
4230 /* Evaluate whether or not state_pathway_ok can change */
4231 static int state_eval_pathway_ok(struct pvr2_hdw *hdw)
4233 if (hdw->state_pathway_ok) {
4234 /* Nothing to do if pathway is already ok */
4237 if (!hdw->state_pipeline_idle) {
4238 /* Not allowed to change anything if pipeline is not idle */
4241 pvr2_hdw_cmd_modeswitch(hdw,hdw->input_val == PVR2_CVAL_INPUT_DTV);
4242 hdw->state_pathway_ok = !0;
4243 trace_stbit("state_pathway_ok",hdw->state_pathway_ok);
4248 /* Evaluate whether or not state_encoder_ok can change */
4249 static int state_eval_encoder_ok(struct pvr2_hdw *hdw)
4251 if (hdw->state_encoder_ok) return 0;
4252 if (hdw->flag_tripped) return 0;
4253 if (hdw->state_encoder_run) return 0;
4254 if (hdw->state_encoder_config) return 0;
4255 if (hdw->state_decoder_run) return 0;
4256 if (hdw->state_usbstream_run) return 0;
4257 if (hdw->pathway_state == PVR2_PATHWAY_DIGITAL) {
4258 if (!hdw->hdw_desc->flag_digital_requires_cx23416) return 0;
4259 } else if (hdw->pathway_state != PVR2_PATHWAY_ANALOG) {
4263 if (pvr2_upload_firmware2(hdw) < 0) {
4264 hdw->flag_tripped = !0;
4265 trace_stbit("flag_tripped",hdw->flag_tripped);
4268 hdw->state_encoder_ok = !0;
4269 trace_stbit("state_encoder_ok",hdw->state_encoder_ok);
4274 /* Evaluate whether or not state_encoder_config can change */
4275 static int state_eval_encoder_config(struct pvr2_hdw *hdw)
4277 if (hdw->state_encoder_config) {
4278 if (hdw->state_encoder_ok) {
4279 if (hdw->state_pipeline_req &&
4280 !hdw->state_pipeline_pause) return 0;
4282 hdw->state_encoder_config = 0;
4283 hdw->state_encoder_waitok = 0;
4284 trace_stbit("state_encoder_waitok",hdw->state_encoder_waitok);
4285 /* paranoia - solve race if timer just completed */
4286 del_timer_sync(&hdw->encoder_wait_timer);
4288 if (!hdw->state_pathway_ok ||
4289 (hdw->pathway_state != PVR2_PATHWAY_ANALOG) ||
4290 !hdw->state_encoder_ok ||
4291 !hdw->state_pipeline_idle ||
4292 hdw->state_pipeline_pause ||
4293 !hdw->state_pipeline_req ||
4294 !hdw->state_pipeline_config) {
4295 /* We must reset the enforced wait interval if
4296 anything has happened that might have disturbed
4297 the encoder. This should be a rare case. */
4298 if (timer_pending(&hdw->encoder_wait_timer)) {
4299 del_timer_sync(&hdw->encoder_wait_timer);
4301 if (hdw->state_encoder_waitok) {
4302 /* Must clear the state - therefore we did
4303 something to a state bit and must also
4305 hdw->state_encoder_waitok = 0;
4306 trace_stbit("state_encoder_waitok",
4307 hdw->state_encoder_waitok);
4312 if (!hdw->state_encoder_waitok) {
4313 if (!timer_pending(&hdw->encoder_wait_timer)) {
4314 /* waitok flag wasn't set and timer isn't
4315 running. Check flag once more to avoid
4316 a race then start the timer. This is
4317 the point when we measure out a minimal
4318 quiet interval before doing something to
4320 if (!hdw->state_encoder_waitok) {
4321 hdw->encoder_wait_timer.expires =
4323 (HZ * TIME_MSEC_ENCODER_WAIT
4325 add_timer(&hdw->encoder_wait_timer);
4328 /* We can't continue until we know we have been
4329 quiet for the interval measured by this
4333 pvr2_encoder_configure(hdw);
4334 if (hdw->state_encoder_ok) hdw->state_encoder_config = !0;
4336 trace_stbit("state_encoder_config",hdw->state_encoder_config);
4341 /* Return true if the encoder should not be running. */
4342 static int state_check_disable_encoder_run(struct pvr2_hdw *hdw)
4344 if (!hdw->state_encoder_ok) {
4345 /* Encoder isn't healthy at the moment, so stop it. */
4348 if (!hdw->state_pathway_ok) {
4349 /* Mode is not understood at the moment (i.e. it wants to
4350 change), so encoder must be stopped. */
4354 switch (hdw->pathway_state) {
4355 case PVR2_PATHWAY_ANALOG:
4356 if (!hdw->state_decoder_run) {
4357 /* We're in analog mode and the decoder is not
4358 running; thus the encoder should be stopped as
4363 case PVR2_PATHWAY_DIGITAL:
4364 if (hdw->state_encoder_runok) {
4365 /* This is a funny case. We're in digital mode so
4366 really the encoder should be stopped. However
4367 if it really is running, only kill it after
4368 runok has been set. This gives a chance for the
4369 onair quirk to function (encoder must run
4370 briefly first, at least once, before onair
4371 digital streaming can work). */
4376 /* Unknown mode; so encoder should be stopped. */
4380 /* If we get here, we haven't found a reason to stop the
4386 /* Return true if the encoder should be running. */
4387 static int state_check_enable_encoder_run(struct pvr2_hdw *hdw)
4389 if (!hdw->state_encoder_ok) {
4390 /* Don't run the encoder if it isn't healthy... */
4393 if (!hdw->state_pathway_ok) {
4394 /* Don't run the encoder if we don't (yet) know what mode
4395 we need to be in... */
4399 switch (hdw->pathway_state) {
4400 case PVR2_PATHWAY_ANALOG:
4401 if (hdw->state_decoder_run) {
4402 /* In analog mode, if the decoder is running, then
4407 case PVR2_PATHWAY_DIGITAL:
4408 if ((hdw->hdw_desc->digital_control_scheme ==
4409 PVR2_DIGITAL_SCHEME_ONAIR) &&
4410 !hdw->state_encoder_runok) {
4411 /* This is a quirk. OnAir hardware won't stream
4412 digital until the encoder has been run at least
4413 once, for a minimal period of time (empiricially
4414 measured to be 1/4 second). So if we're on
4415 OnAir hardware and the encoder has never been
4416 run at all, then start the encoder. Normal
4417 state machine logic in the driver will
4418 automatically handle the remaining bits. */
4423 /* For completeness (unknown mode; encoder won't run ever) */
4426 /* If we get here, then we haven't found any reason to run the
4427 encoder, so don't run it. */
4432 /* Evaluate whether or not state_encoder_run can change */
4433 static int state_eval_encoder_run(struct pvr2_hdw *hdw)
4435 if (hdw->state_encoder_run) {
4436 if (!state_check_disable_encoder_run(hdw)) return 0;
4437 if (hdw->state_encoder_ok) {
4438 del_timer_sync(&hdw->encoder_run_timer);
4439 if (pvr2_encoder_stop(hdw) < 0) return !0;
4441 hdw->state_encoder_run = 0;
4443 if (!state_check_enable_encoder_run(hdw)) return 0;
4444 if (pvr2_encoder_start(hdw) < 0) return !0;
4445 hdw->state_encoder_run = !0;
4446 if (!hdw->state_encoder_runok) {
4447 hdw->encoder_run_timer.expires =
4448 jiffies + (HZ * TIME_MSEC_ENCODER_OK / 1000);
4449 add_timer(&hdw->encoder_run_timer);
4452 trace_stbit("state_encoder_run",hdw->state_encoder_run);
4457 /* Timeout function for quiescent timer. */
4458 static void pvr2_hdw_quiescent_timeout(unsigned long data)
4460 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
4461 hdw->state_decoder_quiescent = !0;
4462 trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent);
4463 hdw->state_stale = !0;
4464 queue_work(hdw->workqueue,&hdw->workpoll);
4468 /* Timeout function for encoder wait timer. */
4469 static void pvr2_hdw_encoder_wait_timeout(unsigned long data)
4471 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
4472 hdw->state_encoder_waitok = !0;
4473 trace_stbit("state_encoder_waitok",hdw->state_encoder_waitok);
4474 hdw->state_stale = !0;
4475 queue_work(hdw->workqueue,&hdw->workpoll);
4479 /* Timeout function for encoder run timer. */
4480 static void pvr2_hdw_encoder_run_timeout(unsigned long data)
4482 struct pvr2_hdw *hdw = (struct pvr2_hdw *)data;
4483 if (!hdw->state_encoder_runok) {
4484 hdw->state_encoder_runok = !0;
4485 trace_stbit("state_encoder_runok",hdw->state_encoder_runok);
4486 hdw->state_stale = !0;
4487 queue_work(hdw->workqueue,&hdw->workpoll);
4492 /* Evaluate whether or not state_decoder_run can change */
4493 static int state_eval_decoder_run(struct pvr2_hdw *hdw)
4495 if (hdw->state_decoder_run) {
4496 if (hdw->state_encoder_ok) {
4497 if (hdw->state_pipeline_req &&
4498 !hdw->state_pipeline_pause &&
4499 hdw->state_pathway_ok) return 0;
4501 if (!hdw->flag_decoder_missed) {
4502 pvr2_decoder_enable(hdw,0);
4504 hdw->state_decoder_quiescent = 0;
4505 hdw->state_decoder_run = 0;
4506 /* paranoia - solve race if timer just completed */
4507 del_timer_sync(&hdw->quiescent_timer);
4509 if (!hdw->state_decoder_quiescent) {
4510 if (!timer_pending(&hdw->quiescent_timer)) {
4511 /* We don't do something about the
4512 quiescent timer until right here because
4513 we also want to catch cases where the
4514 decoder was already not running (like
4515 after initialization) as opposed to
4516 knowing that we had just stopped it.
4517 The second flag check is here to cover a
4518 race - the timer could have run and set
4519 this flag just after the previous check
4520 but before we did the pending check. */
4521 if (!hdw->state_decoder_quiescent) {
4522 hdw->quiescent_timer.expires =
4524 (HZ * TIME_MSEC_DECODER_WAIT
4526 add_timer(&hdw->quiescent_timer);
4529 /* Don't allow decoder to start again until it has
4530 been quiesced first. This little detail should
4531 hopefully further stabilize the encoder. */
4534 if (!hdw->state_pathway_ok ||
4535 (hdw->pathway_state != PVR2_PATHWAY_ANALOG) ||
4536 !hdw->state_pipeline_req ||
4537 hdw->state_pipeline_pause ||
4538 !hdw->state_pipeline_config ||
4539 !hdw->state_encoder_config ||
4540 !hdw->state_encoder_ok) return 0;
4541 del_timer_sync(&hdw->quiescent_timer);
4542 if (hdw->flag_decoder_missed) return 0;
4543 if (pvr2_decoder_enable(hdw,!0) < 0) return 0;
4544 hdw->state_decoder_quiescent = 0;
4545 hdw->state_decoder_run = !0;
4547 trace_stbit("state_decoder_quiescent",hdw->state_decoder_quiescent);
4548 trace_stbit("state_decoder_run",hdw->state_decoder_run);
4553 /* Evaluate whether or not state_usbstream_run can change */
4554 static int state_eval_usbstream_run(struct pvr2_hdw *hdw)
4556 if (hdw->state_usbstream_run) {
4558 if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) {
4559 fl = (hdw->state_encoder_ok &&
4560 hdw->state_encoder_run);
4561 } else if ((hdw->pathway_state == PVR2_PATHWAY_DIGITAL) &&
4562 (hdw->hdw_desc->flag_digital_requires_cx23416)) {
4563 fl = hdw->state_encoder_ok;
4566 hdw->state_pipeline_req &&
4567 !hdw->state_pipeline_pause &&
4568 hdw->state_pathway_ok) {
4571 pvr2_hdw_cmd_usbstream(hdw,0);
4572 hdw->state_usbstream_run = 0;
4574 if (!hdw->state_pipeline_req ||
4575 hdw->state_pipeline_pause ||
4576 !hdw->state_pathway_ok) return 0;
4577 if (hdw->pathway_state == PVR2_PATHWAY_ANALOG) {
4578 if (!hdw->state_encoder_ok ||
4579 !hdw->state_encoder_run) return 0;
4580 } else if ((hdw->pathway_state == PVR2_PATHWAY_DIGITAL) &&
4581 (hdw->hdw_desc->flag_digital_requires_cx23416)) {
4582 if (!hdw->state_encoder_ok) return 0;
4583 if (hdw->state_encoder_run) return 0;
4584 if (hdw->hdw_desc->digital_control_scheme ==
4585 PVR2_DIGITAL_SCHEME_ONAIR) {
4586 /* OnAir digital receivers won't stream
4587 unless the analog encoder has run first.
4588 Why? I have no idea. But don't even
4589 try until we know the analog side is
4590 known to have run. */
4591 if (!hdw->state_encoder_runok) return 0;
4594 if (pvr2_hdw_cmd_usbstream(hdw,!0) < 0) return 0;
4595 hdw->state_usbstream_run = !0;
4597 trace_stbit("state_usbstream_run",hdw->state_usbstream_run);
4602 /* Attempt to configure pipeline, if needed */
4603 static int state_eval_pipeline_config(struct pvr2_hdw *hdw)
4605 if (hdw->state_pipeline_config ||
4606 hdw->state_pipeline_pause) return 0;
4607 pvr2_hdw_commit_execute(hdw);
4612 /* Update pipeline idle and pipeline pause tracking states based on other
4613 inputs. This must be called whenever the other relevant inputs have
4615 static int state_update_pipeline_state(struct pvr2_hdw *hdw)
4619 /* Update pipeline state */
4620 st = !(hdw->state_encoder_run ||
4621 hdw->state_decoder_run ||
4622 hdw->state_usbstream_run ||
4623 (!hdw->state_decoder_quiescent));
4624 if (!st != !hdw->state_pipeline_idle) {
4625 hdw->state_pipeline_idle = st;
4628 if (hdw->state_pipeline_idle && hdw->state_pipeline_pause) {
4629 hdw->state_pipeline_pause = 0;
4636 typedef int (*state_eval_func)(struct pvr2_hdw *);
4638 /* Set of functions to be run to evaluate various states in the driver. */
4639 static const state_eval_func eval_funcs[] = {
4640 state_eval_pathway_ok,
4641 state_eval_pipeline_config,
4642 state_eval_encoder_ok,
4643 state_eval_encoder_config,
4644 state_eval_decoder_run,
4645 state_eval_encoder_run,
4646 state_eval_usbstream_run,
4650 /* Process various states and return true if we did anything interesting. */
4651 static int pvr2_hdw_state_update(struct pvr2_hdw *hdw)
4654 int state_updated = 0;
4657 if (!hdw->state_stale) return 0;
4658 if ((hdw->fw1_state != FW1_STATE_OK) ||
4660 hdw->state_stale = 0;
4663 /* This loop is the heart of the entire driver. It keeps trying to
4664 evaluate various bits of driver state until nothing changes for
4665 one full iteration. Each "bit of state" tracks some global
4666 aspect of the driver, e.g. whether decoder should run, if
4667 pipeline is configured, usb streaming is on, etc. We separately
4668 evaluate each of those questions based on other driver state to
4669 arrive at the correct running configuration. */
4672 state_update_pipeline_state(hdw);
4673 /* Iterate over each bit of state */
4674 for (i = 0; (i<ARRAY_SIZE(eval_funcs)) && hdw->flag_ok; i++) {
4675 if ((*eval_funcs[i])(hdw)) {
4678 state_update_pipeline_state(hdw);
4681 } while (check_flag && hdw->flag_ok);
4682 hdw->state_stale = 0;
4683 trace_stbit("state_stale",hdw->state_stale);
4684 return state_updated;
4688 static unsigned int print_input_mask(unsigned int msk,
4689 char *buf,unsigned int acnt)
4691 unsigned int idx,ccnt;
4692 unsigned int tcnt = 0;
4693 for (idx = 0; idx < ARRAY_SIZE(control_values_input); idx++) {
4694 if (!((1 << idx) & msk)) continue;
4695 ccnt = scnprintf(buf+tcnt,
4699 control_values_input[idx]);
4706 static const char *pvr2_pathway_state_name(int id)
4709 case PVR2_PATHWAY_ANALOG: return "analog";
4710 case PVR2_PATHWAY_DIGITAL: return "digital";
4711 default: return "unknown";
4716 static unsigned int pvr2_hdw_report_unlocked(struct pvr2_hdw *hdw,int which,
4717 char *buf,unsigned int acnt)
4723 "driver:%s%s%s%s%s <mode=%s>",
4724 (hdw->flag_ok ? " <ok>" : " <fail>"),
4725 (hdw->flag_init_ok ? " <init>" : " <uninitialized>"),
4726 (hdw->flag_disconnected ? " <disconnected>" :
4728 (hdw->flag_tripped ? " <tripped>" : ""),
4729 (hdw->flag_decoder_missed ? " <no decoder>" : ""),
4730 pvr2_pathway_state_name(hdw->pathway_state));
4735 "pipeline:%s%s%s%s",
4736 (hdw->state_pipeline_idle ? " <idle>" : ""),
4737 (hdw->state_pipeline_config ?
4738 " <configok>" : " <stale>"),
4739 (hdw->state_pipeline_req ? " <req>" : ""),
4740 (hdw->state_pipeline_pause ? " <pause>" : ""));
4744 "worker:%s%s%s%s%s%s%s",
4745 (hdw->state_decoder_run ?
4747 (hdw->state_decoder_quiescent ?
4748 "" : " <decode:stop>")),
4749 (hdw->state_decoder_quiescent ?
4750 " <decode:quiescent>" : ""),
4751 (hdw->state_encoder_ok ?
4752 "" : " <encode:init>"),
4753 (hdw->state_encoder_run ?
4754 (hdw->state_encoder_runok ?
4756 " <encode:firstrun>") :
4757 (hdw->state_encoder_runok ?
4759 " <encode:virgin>")),
4760 (hdw->state_encoder_config ?
4761 " <encode:configok>" :
4762 (hdw->state_encoder_waitok ?
4763 "" : " <encode:waitok>")),
4764 (hdw->state_usbstream_run ?
4765 " <usb:run>" : " <usb:stop>"),
4766 (hdw->state_pathway_ok ?
4767 " <pathway:ok>" : ""));
4772 pvr2_get_state_name(hdw->master_state));
4774 unsigned int tcnt = 0;
4777 ccnt = scnprintf(buf,
4779 "Hardware supported inputs: ");
4781 tcnt += print_input_mask(hdw->input_avail_mask,
4784 if (hdw->input_avail_mask != hdw->input_allowed_mask) {
4785 ccnt = scnprintf(buf+tcnt,
4787 "; allowed inputs: ");
4789 tcnt += print_input_mask(hdw->input_allowed_mask,
4796 struct pvr2_stream_stats stats;
4797 if (!hdw->vid_stream) break;
4798 pvr2_stream_get_stats(hdw->vid_stream,
4804 " URBs: queued=%u idle=%u ready=%u"
4805 " processed=%u failed=%u",
4806 stats.bytes_processed,
4807 stats.buffers_in_queue,
4808 stats.buffers_in_idle,
4809 stats.buffers_in_ready,
4810 stats.buffers_processed,
4811 stats.buffers_failed);
4819 /* Generate report containing info about attached sub-devices and attached
4820 i2c clients, including an indication of which attached i2c clients are
4821 actually sub-devices. */
4822 static unsigned int pvr2_hdw_report_clients(struct pvr2_hdw *hdw,
4823 char *buf, unsigned int acnt)
4825 struct v4l2_subdev *sd;
4826 unsigned int tcnt = 0;
4828 struct i2c_client *client;
4829 struct list_head *item;
4834 ccnt = scnprintf(buf, acnt, "Associated v4l2-subdev drivers:");
4836 v4l2_device_for_each_subdev(sd, &hdw->v4l2_dev) {
4839 if (id < ARRAY_SIZE(module_names)) p = module_names[id];
4841 ccnt = scnprintf(buf + tcnt, acnt - tcnt, " %s", p);
4844 ccnt = scnprintf(buf + tcnt, acnt - tcnt,
4845 " (unknown id=%u)", id);
4849 ccnt = scnprintf(buf + tcnt, acnt - tcnt, "\n");
4852 ccnt = scnprintf(buf + tcnt, acnt - tcnt, "I2C clients:\n");
4855 mutex_lock(&hdw->i2c_adap.clist_lock);
4856 list_for_each(item, &hdw->i2c_adap.clients) {
4857 client = list_entry(item, struct i2c_client, list);
4858 ccnt = scnprintf(buf + tcnt, acnt - tcnt,
4859 " %s: i2c=%02x", client->name, client->addr);
4861 cd = i2c_get_clientdata(client);
4862 v4l2_device_for_each_subdev(sd, &hdw->v4l2_dev) {
4866 if (id < ARRAY_SIZE(module_names)) {
4867 p = module_names[id];
4870 ccnt = scnprintf(buf + tcnt,
4875 ccnt = scnprintf(buf + tcnt,
4884 ccnt = scnprintf(buf + tcnt, acnt - tcnt, "\n");
4887 mutex_unlock(&hdw->i2c_adap.clist_lock);
4892 unsigned int pvr2_hdw_state_report(struct pvr2_hdw *hdw,
4893 char *buf,unsigned int acnt)
4895 unsigned int bcnt,ccnt,idx;
4897 LOCK_TAKE(hdw->big_lock);
4898 for (idx = 0; ; idx++) {
4899 ccnt = pvr2_hdw_report_unlocked(hdw,idx,buf,acnt);
4901 bcnt += ccnt; acnt -= ccnt; buf += ccnt;
4903 buf[0] = '\n'; ccnt = 1;
4904 bcnt += ccnt; acnt -= ccnt; buf += ccnt;
4906 ccnt = pvr2_hdw_report_clients(hdw, buf, acnt);
4907 bcnt += ccnt; acnt -= ccnt; buf += ccnt;
4908 LOCK_GIVE(hdw->big_lock);
4913 static void pvr2_hdw_state_log_state(struct pvr2_hdw *hdw)
4916 unsigned int idx, ccnt;
4917 unsigned int lcnt, ucnt;
4919 for (idx = 0; ; idx++) {
4920 ccnt = pvr2_hdw_report_unlocked(hdw,idx,buf,sizeof(buf));
4922 printk(KERN_INFO "%s %.*s\n",hdw->name,ccnt,buf);
4924 ccnt = pvr2_hdw_report_clients(hdw, buf, sizeof(buf));
4926 while (ucnt < ccnt) {
4928 while ((lcnt + ucnt < ccnt) && (buf[lcnt + ucnt] != '\n')) {
4931 printk(KERN_INFO "%s %.*s\n", hdw->name, lcnt, buf + ucnt);
4937 /* Evaluate and update the driver's current state, taking various actions
4938 as appropriate for the update. */
4939 static int pvr2_hdw_state_eval(struct pvr2_hdw *hdw)
4942 int state_updated = 0;
4943 int callback_flag = 0;
4946 pvr2_trace(PVR2_TRACE_STBITS,
4947 "Drive state check START");
4948 if (pvrusb2_debug & PVR2_TRACE_STBITS) {
4949 pvr2_hdw_state_log_state(hdw);
4952 /* Process all state and get back over disposition */
4953 state_updated = pvr2_hdw_state_update(hdw);
4955 analog_mode = (hdw->pathway_state != PVR2_PATHWAY_DIGITAL);
4957 /* Update master state based upon all other states. */
4958 if (!hdw->flag_ok) {
4959 st = PVR2_STATE_DEAD;
4960 } else if (hdw->fw1_state != FW1_STATE_OK) {
4961 st = PVR2_STATE_COLD;
4962 } else if ((analog_mode ||
4963 hdw->hdw_desc->flag_digital_requires_cx23416) &&
4964 !hdw->state_encoder_ok) {
4965 st = PVR2_STATE_WARM;
4966 } else if (hdw->flag_tripped ||
4967 (analog_mode && hdw->flag_decoder_missed)) {
4968 st = PVR2_STATE_ERROR;
4969 } else if (hdw->state_usbstream_run &&
4971 (hdw->state_encoder_run && hdw->state_decoder_run))) {
4972 st = PVR2_STATE_RUN;
4974 st = PVR2_STATE_READY;
4976 if (hdw->master_state != st) {
4977 pvr2_trace(PVR2_TRACE_STATE,
4978 "Device state change from %s to %s",
4979 pvr2_get_state_name(hdw->master_state),
4980 pvr2_get_state_name(st));
4981 pvr2_led_ctrl(hdw,st == PVR2_STATE_RUN);
4982 hdw->master_state = st;
4986 if (state_updated) {
4987 /* Trigger anyone waiting on any state changes here. */
4988 wake_up(&hdw->state_wait_data);
4991 if (pvrusb2_debug & PVR2_TRACE_STBITS) {
4992 pvr2_hdw_state_log_state(hdw);
4994 pvr2_trace(PVR2_TRACE_STBITS,
4995 "Drive state check DONE callback=%d",callback_flag);
4997 return callback_flag;
5001 /* Cause kernel thread to check / update driver state */
5002 static void pvr2_hdw_state_sched(struct pvr2_hdw *hdw)
5004 if (hdw->state_stale) return;
5005 hdw->state_stale = !0;
5006 trace_stbit("state_stale",hdw->state_stale);
5007 queue_work(hdw->workqueue,&hdw->workpoll);
5011 int pvr2_hdw_gpio_get_dir(struct pvr2_hdw *hdw,u32 *dp)
5013 return pvr2_read_register(hdw,PVR2_GPIO_DIR,dp);
5017 int pvr2_hdw_gpio_get_out(struct pvr2_hdw *hdw,u32 *dp)
5019 return pvr2_read_register(hdw,PVR2_GPIO_OUT,dp);
5023 int pvr2_hdw_gpio_get_in(struct pvr2_hdw *hdw,u32 *dp)
5025 return pvr2_read_register(hdw,PVR2_GPIO_IN,dp);
5029 int pvr2_hdw_gpio_chg_dir(struct pvr2_hdw *hdw,u32 msk,u32 val)
5034 ret = pvr2_read_register(hdw,PVR2_GPIO_DIR,&cval);
5035 if (ret) return ret;
5036 nval = (cval & ~msk) | (val & msk);
5037 pvr2_trace(PVR2_TRACE_GPIO,
5038 "GPIO direction changing 0x%x:0x%x"
5039 " from 0x%x to 0x%x",
5043 pvr2_trace(PVR2_TRACE_GPIO,
5044 "GPIO direction changing to 0x%x",nval);
5046 return pvr2_write_register(hdw,PVR2_GPIO_DIR,nval);
5050 int pvr2_hdw_gpio_chg_out(struct pvr2_hdw *hdw,u32 msk,u32 val)
5055 ret = pvr2_read_register(hdw,PVR2_GPIO_OUT,&cval);
5056 if (ret) return ret;
5057 nval = (cval & ~msk) | (val & msk);
5058 pvr2_trace(PVR2_TRACE_GPIO,
5059 "GPIO output changing 0x%x:0x%x from 0x%x to 0x%x",
5063 pvr2_trace(PVR2_TRACE_GPIO,
5064 "GPIO output changing to 0x%x",nval);
5066 return pvr2_write_register(hdw,PVR2_GPIO_OUT,nval);
5070 void pvr2_hdw_status_poll(struct pvr2_hdw *hdw)
5072 struct v4l2_tuner *vtp = &hdw->tuner_signal_info;
5073 memset(vtp, 0, sizeof(*vtp));
5074 hdw->tuner_signal_stale = 0;
5075 /* Note: There apparently is no replacement for VIDIOC_CROPCAP
5076 using v4l2-subdev - therefore we can't support that AT ALL right
5077 now. (Of course, no sub-drivers seem to implement it either.
5078 But now it's a a chicken and egg problem...) */
5079 v4l2_device_call_all(&hdw->v4l2_dev, 0, tuner, g_tuner,
5080 &hdw->tuner_signal_info);
5081 pvr2_trace(PVR2_TRACE_CHIPS, "subdev status poll"
5082 " type=%u strength=%u audio=0x%x cap=0x%x"
5085 vtp->signal, vtp->rxsubchans, vtp->capability,
5086 vtp->rangelow, vtp->rangehigh);
5088 /* We have to do this to avoid getting into constant polling if
5089 there's nobody to answer a poll of cropcap info. */
5090 hdw->cropcap_stale = 0;
5094 unsigned int pvr2_hdw_get_input_available(struct pvr2_hdw *hdw)
5096 return hdw->input_avail_mask;
5100 unsigned int pvr2_hdw_get_input_allowed(struct pvr2_hdw *hdw)
5102 return hdw->input_allowed_mask;
5106 static int pvr2_hdw_set_input(struct pvr2_hdw *hdw,int v)
5108 if (hdw->input_val != v) {
5110 hdw->input_dirty = !0;
5113 /* Handle side effects - if we switch to a mode that needs the RF
5114 tuner, then select the right frequency choice as well and mark
5116 if (hdw->input_val == PVR2_CVAL_INPUT_RADIO) {
5117 hdw->freqSelector = 0;
5118 hdw->freqDirty = !0;
5119 } else if ((hdw->input_val == PVR2_CVAL_INPUT_TV) ||
5120 (hdw->input_val == PVR2_CVAL_INPUT_DTV)) {
5121 hdw->freqSelector = 1;
5122 hdw->freqDirty = !0;
5128 int pvr2_hdw_set_input_allowed(struct pvr2_hdw *hdw,
5129 unsigned int change_mask,
5130 unsigned int change_val)
5133 unsigned int nv,m,idx;
5134 LOCK_TAKE(hdw->big_lock);
5136 nv = hdw->input_allowed_mask & ~change_mask;
5137 nv |= (change_val & change_mask);
5138 nv &= hdw->input_avail_mask;
5140 /* No legal modes left; return error instead. */
5144 hdw->input_allowed_mask = nv;
5145 if ((1 << hdw->input_val) & hdw->input_allowed_mask) {
5146 /* Current mode is still in the allowed mask, so
5150 /* Select and switch to a mode that is still in the allowed
5152 if (!hdw->input_allowed_mask) {
5153 /* Nothing legal; give up */
5156 m = hdw->input_allowed_mask;
5157 for (idx = 0; idx < (sizeof(m) << 3); idx++) {
5158 if (!((1 << idx) & m)) continue;
5159 pvr2_hdw_set_input(hdw,idx);
5163 LOCK_GIVE(hdw->big_lock);
5168 /* Find I2C address of eeprom */
5169 static int pvr2_hdw_get_eeprom_addr(struct pvr2_hdw *hdw)
5172 LOCK_TAKE(hdw->ctl_lock); do {
5173 hdw->cmd_buffer[0] = FX2CMD_GET_EEPROM_ADDR;
5174 result = pvr2_send_request(hdw,
5177 if (result < 0) break;
5178 result = hdw->cmd_buffer[0];
5179 } while(0); LOCK_GIVE(hdw->ctl_lock);
5184 int pvr2_hdw_register_access(struct pvr2_hdw *hdw,
5185 struct v4l2_dbg_match *match, u64 reg_id,
5186 int setFl, u64 *val_ptr)
5188 #ifdef CONFIG_VIDEO_ADV_DEBUG
5189 struct v4l2_dbg_register req;
5193 if (!capable(CAP_SYS_ADMIN)) return -EPERM;
5197 if (setFl) req.val = *val_ptr;
5198 /* It would be nice to know if a sub-device answered the request */
5199 v4l2_device_call_all(&hdw->v4l2_dev, 0, core, g_register, &req);
5200 if (!setFl) *val_ptr = req.val;
5212 Stuff for Emacs to see, in order to encourage consistent editing style:
5213 *** Local Variables: ***
5215 *** fill-column: 75 ***
5216 *** tab-width: 8 ***
5217 *** c-basic-offset: 8 ***