2 * S5P camera interface (video postprocessor) driver
4 * Copyright (c) 2010 Samsung Electronics Co., Ltd
6 * Sylwester Nawrocki, <s.nawrocki@samsung.com>
8 * This program is free software; you can redistribute it and/or modify
9 * it under the terms of the GNU General Public License as published
10 * by the Free Software Foundation, either version 2 of the License,
11 * or (at your option) any later version.
14 #include <linux/module.h>
15 #include <linux/kernel.h>
16 #include <linux/version.h>
17 #include <linux/types.h>
18 #include <linux/errno.h>
19 #include <linux/bug.h>
20 #include <linux/interrupt.h>
21 #include <linux/device.h>
22 #include <linux/platform_device.h>
23 #include <linux/list.h>
25 #include <linux/slab.h>
26 #include <linux/clk.h>
27 #include <media/v4l2-ioctl.h>
28 #include <media/videobuf-dma-contig.h>
30 #include "fimc-core.h"
32 static char *fimc_clock_name[NUM_FIMC_CLOCKS] = { "sclk_fimc", "fimc" };
34 static struct fimc_fmt fimc_formats[] = {
37 .fourcc = V4L2_PIX_FMT_RGB565X,
39 .color = S5P_FIMC_RGB565,
42 .mbus_code = V4L2_MBUS_FMT_RGB565_2X8_BE,
43 .flags = FMT_FLAGS_M2M,
46 .fourcc = V4L2_PIX_FMT_BGR666,
48 .color = S5P_FIMC_RGB666,
51 .flags = FMT_FLAGS_M2M,
53 .name = "XRGB-8-8-8-8, 24 bpp",
54 .fourcc = V4L2_PIX_FMT_RGB24,
56 .color = S5P_FIMC_RGB888,
59 .flags = FMT_FLAGS_M2M,
61 .name = "YUV 4:2:2 packed, YCbYCr",
62 .fourcc = V4L2_PIX_FMT_YUYV,
64 .color = S5P_FIMC_YCBYCR422,
67 .mbus_code = V4L2_MBUS_FMT_YUYV8_2X8,
68 .flags = FMT_FLAGS_M2M | FMT_FLAGS_CAM,
70 .name = "YUV 4:2:2 packed, CbYCrY",
71 .fourcc = V4L2_PIX_FMT_UYVY,
73 .color = S5P_FIMC_CBYCRY422,
76 .mbus_code = V4L2_MBUS_FMT_UYVY8_2X8,
77 .flags = FMT_FLAGS_M2M | FMT_FLAGS_CAM,
79 .name = "YUV 4:2:2 packed, CrYCbY",
80 .fourcc = V4L2_PIX_FMT_VYUY,
82 .color = S5P_FIMC_CRYCBY422,
85 .mbus_code = V4L2_MBUS_FMT_VYUY8_2X8,
86 .flags = FMT_FLAGS_M2M | FMT_FLAGS_CAM,
88 .name = "YUV 4:2:2 packed, YCrYCb",
89 .fourcc = V4L2_PIX_FMT_YVYU,
91 .color = S5P_FIMC_YCRYCB422,
94 .mbus_code = V4L2_MBUS_FMT_YVYU8_2X8,
95 .flags = FMT_FLAGS_M2M | FMT_FLAGS_CAM,
97 .name = "YUV 4:2:2 planar, Y/Cb/Cr",
98 .fourcc = V4L2_PIX_FMT_YUV422P,
100 .color = S5P_FIMC_YCBCR422,
103 .flags = FMT_FLAGS_M2M,
105 .name = "YUV 4:2:2 planar, Y/CbCr",
106 .fourcc = V4L2_PIX_FMT_NV16,
108 .color = S5P_FIMC_YCBCR422,
111 .flags = FMT_FLAGS_M2M,
113 .name = "YUV 4:2:2 planar, Y/CrCb",
114 .fourcc = V4L2_PIX_FMT_NV61,
116 .color = S5P_FIMC_RGB565,
119 .flags = FMT_FLAGS_M2M,
121 .name = "YUV 4:2:0 planar, YCbCr",
122 .fourcc = V4L2_PIX_FMT_YUV420,
124 .color = S5P_FIMC_YCBCR420,
127 .flags = FMT_FLAGS_M2M,
129 .name = "YUV 4:2:0 planar, Y/CbCr",
130 .fourcc = V4L2_PIX_FMT_NV12,
132 .color = S5P_FIMC_YCBCR420,
135 .flags = FMT_FLAGS_M2M,
139 static struct v4l2_queryctrl fimc_ctrls[] = {
141 .id = V4L2_CID_HFLIP,
142 .type = V4L2_CTRL_TYPE_BOOLEAN,
143 .name = "Horizontal flip",
148 .id = V4L2_CID_VFLIP,
149 .type = V4L2_CTRL_TYPE_BOOLEAN,
150 .name = "Vertical flip",
155 .id = V4L2_CID_ROTATE,
156 .type = V4L2_CTRL_TYPE_INTEGER,
157 .name = "Rotation (CCW)",
166 static struct v4l2_queryctrl *get_ctrl(int id)
170 for (i = 0; i < ARRAY_SIZE(fimc_ctrls); ++i)
171 if (id == fimc_ctrls[i].id)
172 return &fimc_ctrls[i];
176 int fimc_check_scaler_ratio(struct v4l2_rect *r, struct fimc_frame *f)
178 if (r->width > f->width) {
179 if (f->width > (r->width * SCALER_MAX_HRATIO))
182 if ((f->width * SCALER_MAX_HRATIO) < r->width)
186 if (r->height > f->height) {
187 if (f->height > (r->height * SCALER_MAX_VRATIO))
190 if ((f->height * SCALER_MAX_VRATIO) < r->height)
197 static int fimc_get_scaler_factor(u32 src, u32 tar, u32 *ratio, u32 *shift)
206 if (src >= tar * tmp) {
207 *shift = sh, *ratio = tmp;
212 *shift = 0, *ratio = 1;
214 dbg("s: %d, t: %d, shift: %d, ratio: %d",
215 src, tar, *shift, *ratio);
219 int fimc_set_scaler_info(struct fimc_ctx *ctx)
221 struct fimc_scaler *sc = &ctx->scaler;
222 struct fimc_frame *s_frame = &ctx->s_frame;
223 struct fimc_frame *d_frame = &ctx->d_frame;
227 if (ctx->rotation == 90 || ctx->rotation == 270) {
229 tx = d_frame->height;
232 ty = d_frame->height;
234 if (tx <= 0 || ty <= 0) {
235 v4l2_err(&ctx->fimc_dev->m2m.v4l2_dev,
236 "invalid target size: %d x %d", tx, ty);
241 sy = s_frame->height;
242 if (sx <= 0 || sy <= 0) {
243 err("invalid source size: %d x %d", sx, sy);
248 sc->real_height = sy;
249 dbg("sx= %d, sy= %d, tx= %d, ty= %d", sx, sy, tx, ty);
251 ret = fimc_get_scaler_factor(sx, tx, &sc->pre_hratio, &sc->hfactor);
255 ret = fimc_get_scaler_factor(sy, ty, &sc->pre_vratio, &sc->vfactor);
259 sc->pre_dst_width = sx / sc->pre_hratio;
260 sc->pre_dst_height = sy / sc->pre_vratio;
262 sc->main_hratio = (sx << 8) / (tx << sc->hfactor);
263 sc->main_vratio = (sy << 8) / (ty << sc->vfactor);
265 sc->scaleup_h = (tx >= sx) ? 1 : 0;
266 sc->scaleup_v = (ty >= sy) ? 1 : 0;
268 /* check to see if input and output size/format differ */
269 if (s_frame->fmt->color == d_frame->fmt->color
270 && s_frame->width == d_frame->width
271 && s_frame->height == d_frame->height)
279 static void fimc_capture_handler(struct fimc_dev *fimc)
281 struct fimc_vid_cap *cap = &fimc->vid_cap;
282 struct fimc_vid_buffer *v_buf = NULL;
284 if (!list_empty(&cap->active_buf_q)) {
285 v_buf = active_queue_pop(cap);
286 fimc_buf_finish(fimc, v_buf);
289 if (test_and_clear_bit(ST_CAPT_SHUT, &fimc->state)) {
290 wake_up(&fimc->irq_queue);
294 if (!list_empty(&cap->pending_buf_q)) {
296 v_buf = pending_queue_pop(cap);
297 fimc_hw_set_output_addr(fimc, &v_buf->paddr, cap->buf_index);
298 v_buf->index = cap->buf_index;
300 dbg("hw ptr: %d, sw ptr: %d",
301 fimc_hw_get_frame_index(fimc), cap->buf_index);
303 spin_lock(&fimc->irqlock);
304 v_buf->vb.state = VIDEOBUF_ACTIVE;
305 spin_unlock(&fimc->irqlock);
307 /* Move the buffer to the capture active queue */
308 active_queue_add(cap, v_buf);
310 dbg("next frame: %d, done frame: %d",
311 fimc_hw_get_frame_index(fimc), v_buf->index);
313 if (++cap->buf_index >= FIMC_MAX_OUT_BUFS)
316 } else if (test_and_clear_bit(ST_CAPT_STREAM, &fimc->state) &&
317 cap->active_buf_cnt <= 1) {
318 fimc_deactivate_capture(fimc);
321 dbg("frame: %d, active_buf_cnt= %d",
322 fimc_hw_get_frame_index(fimc), cap->active_buf_cnt);
325 static irqreturn_t fimc_isr(int irq, void *priv)
327 struct fimc_vid_buffer *src_buf, *dst_buf;
328 struct fimc_ctx *ctx;
329 struct fimc_dev *fimc = priv;
332 fimc_hw_clear_irq(fimc);
334 spin_lock(&fimc->slock);
336 if (test_and_clear_bit(ST_M2M_PEND, &fimc->state)) {
337 ctx = v4l2_m2m_get_curr_priv(fimc->m2m.m2m_dev);
338 if (!ctx || !ctx->m2m_ctx)
340 src_buf = v4l2_m2m_src_buf_remove(ctx->m2m_ctx);
341 dst_buf = v4l2_m2m_dst_buf_remove(ctx->m2m_ctx);
342 if (src_buf && dst_buf) {
343 spin_lock(&fimc->irqlock);
344 src_buf->vb.state = dst_buf->vb.state = VIDEOBUF_DONE;
345 wake_up(&src_buf->vb.done);
346 wake_up(&dst_buf->vb.done);
347 spin_unlock(&fimc->irqlock);
348 v4l2_m2m_job_finish(fimc->m2m.m2m_dev, ctx->m2m_ctx);
354 if (test_bit(ST_CAPT_RUN, &fimc->state))
355 fimc_capture_handler(fimc);
357 if (test_and_clear_bit(ST_CAPT_PEND, &fimc->state)) {
358 set_bit(ST_CAPT_RUN, &fimc->state);
359 wake_up(&fimc->irq_queue);
363 spin_unlock(&fimc->slock);
367 /* The color format (planes_cnt, buff_cnt) must be already configured. */
368 int fimc_prepare_addr(struct fimc_ctx *ctx, struct fimc_vid_buffer *buf,
369 struct fimc_frame *frame, struct fimc_addr *paddr)
374 if (buf == NULL || frame == NULL)
377 pix_size = frame->width * frame->height;
379 dbg("buff_cnt= %d, planes_cnt= %d, frame->size= %d, pix_size= %d",
380 frame->fmt->buff_cnt, frame->fmt->planes_cnt,
381 frame->size, pix_size);
383 if (frame->fmt->buff_cnt == 1) {
384 paddr->y = videobuf_to_dma_contig(&buf->vb);
385 switch (frame->fmt->planes_cnt) {
391 /* decompose Y into Y/Cb */
392 paddr->cb = (u32)(paddr->y + pix_size);
396 paddr->cb = (u32)(paddr->y + pix_size);
397 /* decompose Y into Y/Cb/Cr */
398 if (S5P_FIMC_YCBCR420 == frame->fmt->color)
399 paddr->cr = (u32)(paddr->cb
402 paddr->cr = (u32)(paddr->cb
410 dbg("PHYS_ADDR: y= 0x%X cb= 0x%X cr= 0x%X ret= %d",
411 paddr->y, paddr->cb, paddr->cr, ret);
416 /* Set order for 1 and 2 plane YCBCR 4:2:2 formats. */
417 static void fimc_set_yuv_order(struct fimc_ctx *ctx)
419 /* The one only mode supported in SoC. */
420 ctx->in_order_2p = S5P_FIMC_LSB_CRCB;
421 ctx->out_order_2p = S5P_FIMC_LSB_CRCB;
423 /* Set order for 1 plane input formats. */
424 switch (ctx->s_frame.fmt->color) {
425 case S5P_FIMC_YCRYCB422:
426 ctx->in_order_1p = S5P_FIMC_IN_YCRYCB;
428 case S5P_FIMC_CBYCRY422:
429 ctx->in_order_1p = S5P_FIMC_IN_CBYCRY;
431 case S5P_FIMC_CRYCBY422:
432 ctx->in_order_1p = S5P_FIMC_IN_CRYCBY;
434 case S5P_FIMC_YCBYCR422:
436 ctx->in_order_1p = S5P_FIMC_IN_YCBYCR;
439 dbg("ctx->in_order_1p= %d", ctx->in_order_1p);
441 switch (ctx->d_frame.fmt->color) {
442 case S5P_FIMC_YCRYCB422:
443 ctx->out_order_1p = S5P_FIMC_OUT_YCRYCB;
445 case S5P_FIMC_CBYCRY422:
446 ctx->out_order_1p = S5P_FIMC_OUT_CBYCRY;
448 case S5P_FIMC_CRYCBY422:
449 ctx->out_order_1p = S5P_FIMC_OUT_CRYCBY;
451 case S5P_FIMC_YCBYCR422:
453 ctx->out_order_1p = S5P_FIMC_OUT_YCBYCR;
456 dbg("ctx->out_order_1p= %d", ctx->out_order_1p);
459 static void fimc_prepare_dma_offset(struct fimc_ctx *ctx, struct fimc_frame *f)
461 struct samsung_fimc_variant *variant = ctx->fimc_dev->variant;
463 f->dma_offset.y_h = f->offs_h;
464 if (!variant->pix_hoff)
465 f->dma_offset.y_h *= (f->fmt->depth >> 3);
467 f->dma_offset.y_v = f->offs_v;
469 f->dma_offset.cb_h = f->offs_h;
470 f->dma_offset.cb_v = f->offs_v;
472 f->dma_offset.cr_h = f->offs_h;
473 f->dma_offset.cr_v = f->offs_v;
475 if (!variant->pix_hoff) {
476 if (f->fmt->planes_cnt == 3) {
477 f->dma_offset.cb_h >>= 1;
478 f->dma_offset.cr_h >>= 1;
480 if (f->fmt->color == S5P_FIMC_YCBCR420) {
481 f->dma_offset.cb_v >>= 1;
482 f->dma_offset.cr_v >>= 1;
486 dbg("in_offset: color= %d, y_h= %d, y_v= %d",
487 f->fmt->color, f->dma_offset.y_h, f->dma_offset.y_v);
491 * fimc_prepare_config - check dimensions, operation and color mode
492 * and pre-calculate offset and the scaling coefficients.
494 * @ctx: hardware context information
495 * @flags: flags indicating which parameters to check/update
497 * Return: 0 if dimensions are valid or non zero otherwise.
499 int fimc_prepare_config(struct fimc_ctx *ctx, u32 flags)
501 struct fimc_frame *s_frame, *d_frame;
502 struct fimc_vid_buffer *buf = NULL;
505 s_frame = &ctx->s_frame;
506 d_frame = &ctx->d_frame;
508 if (flags & FIMC_PARAMS) {
509 /* Prepare the DMA offset ratios for scaler. */
510 fimc_prepare_dma_offset(ctx, &ctx->s_frame);
511 fimc_prepare_dma_offset(ctx, &ctx->d_frame);
513 if (s_frame->height > (SCALER_MAX_VRATIO * d_frame->height) ||
514 s_frame->width > (SCALER_MAX_HRATIO * d_frame->width)) {
515 err("out of scaler range");
518 fimc_set_yuv_order(ctx);
521 /* Input DMA mode is not allowed when the scaler is disabled. */
522 ctx->scaler.enabled = 1;
524 if (flags & FIMC_SRC_ADDR) {
525 buf = v4l2_m2m_next_src_buf(ctx->m2m_ctx);
526 ret = fimc_prepare_addr(ctx, buf, s_frame, &s_frame->paddr);
531 if (flags & FIMC_DST_ADDR) {
532 buf = v4l2_m2m_next_dst_buf(ctx->m2m_ctx);
533 ret = fimc_prepare_addr(ctx, buf, d_frame, &d_frame->paddr);
539 static void fimc_dma_run(void *priv)
541 struct fimc_ctx *ctx = priv;
542 struct fimc_dev *fimc;
546 if (WARN(!ctx, "null hardware context"))
549 fimc = ctx->fimc_dev;
551 spin_lock_irqsave(&ctx->slock, flags);
552 set_bit(ST_M2M_PEND, &fimc->state);
554 ctx->state |= (FIMC_SRC_ADDR | FIMC_DST_ADDR);
555 ret = fimc_prepare_config(ctx, ctx->state);
557 err("Wrong parameters");
560 /* Reconfigure hardware if the context has changed. */
561 if (fimc->m2m.ctx != ctx) {
562 ctx->state |= FIMC_PARAMS;
566 fimc_hw_set_input_addr(fimc, &ctx->s_frame.paddr);
568 if (ctx->state & FIMC_PARAMS) {
569 fimc_hw_set_input_path(ctx);
570 fimc_hw_set_in_dma(ctx);
571 if (fimc_set_scaler_info(ctx)) {
572 err("Scaler setup error");
575 fimc_hw_set_scaler(ctx);
576 fimc_hw_set_target_format(ctx);
577 fimc_hw_set_rotation(ctx);
578 fimc_hw_set_effect(ctx);
581 fimc_hw_set_output_path(ctx);
582 if (ctx->state & (FIMC_DST_ADDR | FIMC_PARAMS))
583 fimc_hw_set_output_addr(fimc, &ctx->d_frame.paddr, -1);
585 if (ctx->state & FIMC_PARAMS)
586 fimc_hw_set_out_dma(ctx);
588 fimc_activate_capture(ctx);
590 ctx->state &= (FIMC_CTX_M2M | FIMC_CTX_CAP);
591 fimc_hw_activate_input_dma(fimc, true);
594 spin_unlock_irqrestore(&ctx->slock, flags);
597 static void fimc_job_abort(void *priv)
599 /* Nothing done in job_abort. */
602 static void fimc_buf_release(struct videobuf_queue *vq,
603 struct videobuf_buffer *vb)
605 videobuf_dma_contig_free(vq, vb);
606 vb->state = VIDEOBUF_NEEDS_INIT;
609 static int fimc_buf_setup(struct videobuf_queue *vq, unsigned int *count,
612 struct fimc_ctx *ctx = vq->priv_data;
613 struct fimc_frame *frame;
615 frame = ctx_get_frame(ctx, vq->type);
617 return PTR_ERR(frame);
619 *size = (frame->width * frame->height * frame->fmt->depth) >> 3;
625 static int fimc_buf_prepare(struct videobuf_queue *vq,
626 struct videobuf_buffer *vb, enum v4l2_field field)
628 struct fimc_ctx *ctx = vq->priv_data;
629 struct v4l2_device *v4l2_dev = &ctx->fimc_dev->m2m.v4l2_dev;
630 struct fimc_frame *frame;
633 frame = ctx_get_frame(ctx, vq->type);
635 return PTR_ERR(frame);
638 if (vb->bsize < frame->size) {
640 "User-provided buffer too small (%d < %d)\n",
641 vb->bsize, frame->size);
645 } else if (vb->state != VIDEOBUF_NEEDS_INIT
646 && vb->bsize < frame->size) {
650 vb->width = frame->width;
651 vb->height = frame->height;
652 vb->bytesperline = (frame->width * frame->fmt->depth) >> 3;
653 vb->size = frame->size;
656 if (VIDEOBUF_NEEDS_INIT == vb->state) {
657 ret = videobuf_iolock(vq, vb, NULL);
659 v4l2_err(v4l2_dev, "Iolock failed\n");
660 fimc_buf_release(vq, vb);
664 vb->state = VIDEOBUF_PREPARED;
669 static void fimc_buf_queue(struct videobuf_queue *vq,
670 struct videobuf_buffer *vb)
672 struct fimc_ctx *ctx = vq->priv_data;
673 struct fimc_dev *fimc = ctx->fimc_dev;
674 struct fimc_vid_cap *cap = &fimc->vid_cap;
677 dbg("ctx: %p, ctx->state: 0x%x", ctx, ctx->state);
679 if ((ctx->state & FIMC_CTX_M2M) && ctx->m2m_ctx) {
680 v4l2_m2m_buf_queue(ctx->m2m_ctx, vq, vb);
681 } else if (ctx->state & FIMC_CTX_CAP) {
682 spin_lock_irqsave(&fimc->slock, flags);
683 fimc_vid_cap_buf_queue(fimc, (struct fimc_vid_buffer *)vb);
685 dbg("fimc->cap.active_buf_cnt: %d",
686 fimc->vid_cap.active_buf_cnt);
688 if (cap->active_buf_cnt >= cap->reqbufs_count ||
689 cap->active_buf_cnt >= FIMC_MAX_OUT_BUFS) {
690 if (!test_and_set_bit(ST_CAPT_STREAM, &fimc->state))
691 fimc_activate_capture(ctx);
693 spin_unlock_irqrestore(&fimc->slock, flags);
697 struct videobuf_queue_ops fimc_qops = {
698 .buf_setup = fimc_buf_setup,
699 .buf_prepare = fimc_buf_prepare,
700 .buf_queue = fimc_buf_queue,
701 .buf_release = fimc_buf_release,
704 static int fimc_m2m_querycap(struct file *file, void *priv,
705 struct v4l2_capability *cap)
707 struct fimc_ctx *ctx = file->private_data;
708 struct fimc_dev *fimc = ctx->fimc_dev;
710 strncpy(cap->driver, fimc->pdev->name, sizeof(cap->driver) - 1);
711 strncpy(cap->card, fimc->pdev->name, sizeof(cap->card) - 1);
712 cap->bus_info[0] = 0;
713 cap->version = KERNEL_VERSION(1, 0, 0);
714 cap->capabilities = V4L2_CAP_STREAMING |
715 V4L2_CAP_VIDEO_CAPTURE | V4L2_CAP_VIDEO_OUTPUT;
720 int fimc_vidioc_enum_fmt(struct file *file, void *priv,
721 struct v4l2_fmtdesc *f)
723 struct fimc_fmt *fmt;
725 if (f->index >= ARRAY_SIZE(fimc_formats))
728 fmt = &fimc_formats[f->index];
729 strncpy(f->description, fmt->name, sizeof(f->description) - 1);
730 f->pixelformat = fmt->fourcc;
735 int fimc_vidioc_g_fmt(struct file *file, void *priv, struct v4l2_format *f)
737 struct fimc_ctx *ctx = priv;
738 struct fimc_dev *fimc = ctx->fimc_dev;
739 struct fimc_frame *frame;
741 frame = ctx_get_frame(ctx, f->type);
743 return PTR_ERR(frame);
745 if (mutex_lock_interruptible(&fimc->lock))
748 f->fmt.pix.width = frame->width;
749 f->fmt.pix.height = frame->height;
750 f->fmt.pix.field = V4L2_FIELD_NONE;
751 f->fmt.pix.pixelformat = frame->fmt->fourcc;
753 mutex_unlock(&fimc->lock);
757 struct fimc_fmt *find_format(struct v4l2_format *f, unsigned int mask)
759 struct fimc_fmt *fmt;
762 for (i = 0; i < ARRAY_SIZE(fimc_formats); ++i) {
763 fmt = &fimc_formats[i];
764 if (fmt->fourcc == f->fmt.pix.pixelformat &&
769 return (i == ARRAY_SIZE(fimc_formats)) ? NULL : fmt;
772 struct fimc_fmt *find_mbus_format(struct v4l2_mbus_framefmt *f,
775 struct fimc_fmt *fmt;
778 for (i = 0; i < ARRAY_SIZE(fimc_formats); ++i) {
779 fmt = &fimc_formats[i];
780 if (fmt->mbus_code == f->code && (fmt->flags & mask))
784 return (i == ARRAY_SIZE(fimc_formats)) ? NULL : fmt;
788 int fimc_vidioc_try_fmt(struct file *file, void *priv, struct v4l2_format *f)
790 struct fimc_ctx *ctx = priv;
791 struct fimc_dev *fimc = ctx->fimc_dev;
792 struct samsung_fimc_variant *variant = fimc->variant;
793 struct v4l2_pix_format *pix = &f->fmt.pix;
794 struct fimc_fmt *fmt;
795 u32 max_width, mod_x, mod_y, mask;
796 int ret = -EINVAL, is_output = 0;
798 if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
799 if (ctx->state & FIMC_CTX_CAP)
802 } else if (f->type != V4L2_BUF_TYPE_VIDEO_CAPTURE) {
806 dbg("w: %d, h: %d, bpl: %d",
807 pix->width, pix->height, pix->bytesperline);
809 if (mutex_lock_interruptible(&fimc->lock))
812 mask = is_output ? FMT_FLAGS_M2M : FMT_FLAGS_M2M | FMT_FLAGS_CAM;
813 fmt = find_format(f, mask);
815 v4l2_err(&fimc->m2m.v4l2_dev, "Fourcc format (0x%X) invalid.\n",
820 if (pix->field == V4L2_FIELD_ANY)
821 pix->field = V4L2_FIELD_NONE;
822 else if (V4L2_FIELD_NONE != pix->field)
826 max_width = variant->pix_limit->scaler_dis_w;
827 mod_x = ffs(variant->min_inp_pixsize) - 1;
829 max_width = variant->pix_limit->out_rot_dis_w;
830 mod_x = ffs(variant->min_out_pixsize) - 1;
833 if (tiled_fmt(fmt)) {
834 mod_x = 6; /* 64 x 32 pixels tile */
837 if (fimc->id == 1 && fimc->variant->pix_hoff)
838 mod_y = fimc_fmt_is_rgb(fmt->color) ? 0 : 1;
843 dbg("mod_x: %d, mod_y: %d, max_w: %d", mod_x, mod_y, max_width);
845 v4l_bound_align_image(&pix->width, 16, max_width, mod_x,
846 &pix->height, 8, variant->pix_limit->scaler_dis_w, mod_y, 0);
848 if (pix->bytesperline == 0 ||
849 (pix->bytesperline * 8 / fmt->depth) > pix->width)
850 pix->bytesperline = (pix->width * fmt->depth) >> 3;
852 if (pix->sizeimage == 0)
853 pix->sizeimage = pix->height * pix->bytesperline;
855 dbg("w: %d, h: %d, bpl: %d, depth: %d",
856 pix->width, pix->height, pix->bytesperline, fmt->depth);
861 mutex_unlock(&fimc->lock);
865 static int fimc_m2m_s_fmt(struct file *file, void *priv, struct v4l2_format *f)
867 struct fimc_ctx *ctx = priv;
868 struct fimc_dev *fimc = ctx->fimc_dev;
869 struct v4l2_device *v4l2_dev = &fimc->m2m.v4l2_dev;
870 struct videobuf_queue *vq;
871 struct fimc_frame *frame;
872 struct v4l2_pix_format *pix;
876 ret = fimc_vidioc_try_fmt(file, priv, f);
880 if (mutex_lock_interruptible(&fimc->lock))
883 vq = v4l2_m2m_get_vq(ctx->m2m_ctx, f->type);
884 mutex_lock(&vq->vb_lock);
886 if (videobuf_queue_is_busy(vq)) {
887 v4l2_err(v4l2_dev, "%s: queue (%d) busy\n", __func__, f->type);
892 spin_lock_irqsave(&ctx->slock, flags);
893 if (f->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) {
894 frame = &ctx->s_frame;
895 ctx->state |= FIMC_SRC_FMT;
896 } else if (f->type == V4L2_BUF_TYPE_VIDEO_CAPTURE) {
897 frame = &ctx->d_frame;
898 ctx->state |= FIMC_DST_FMT;
900 spin_unlock_irqrestore(&ctx->slock, flags);
901 v4l2_err(&ctx->fimc_dev->m2m.v4l2_dev,
902 "Wrong buffer/video queue type (%d)\n", f->type);
906 spin_unlock_irqrestore(&ctx->slock, flags);
909 frame->fmt = find_format(f, FMT_FLAGS_M2M);
915 frame->f_width = pix->bytesperline * 8 / frame->fmt->depth;
916 frame->f_height = pix->height;
917 frame->width = pix->width;
918 frame->height = pix->height;
919 frame->o_width = pix->width;
920 frame->o_height = pix->height;
923 frame->size = (pix->width * pix->height * frame->fmt->depth) >> 3;
924 vq->field = pix->field;
926 spin_lock_irqsave(&ctx->slock, flags);
927 ctx->state |= FIMC_PARAMS;
928 spin_unlock_irqrestore(&ctx->slock, flags);
930 dbg("f_w: %d, f_h: %d", frame->f_width, frame->f_height);
933 mutex_unlock(&vq->vb_lock);
934 mutex_unlock(&fimc->lock);
938 static int fimc_m2m_reqbufs(struct file *file, void *priv,
939 struct v4l2_requestbuffers *reqbufs)
941 struct fimc_ctx *ctx = priv;
942 return v4l2_m2m_reqbufs(file, ctx->m2m_ctx, reqbufs);
945 static int fimc_m2m_querybuf(struct file *file, void *priv,
946 struct v4l2_buffer *buf)
948 struct fimc_ctx *ctx = priv;
949 return v4l2_m2m_querybuf(file, ctx->m2m_ctx, buf);
952 static int fimc_m2m_qbuf(struct file *file, void *priv,
953 struct v4l2_buffer *buf)
955 struct fimc_ctx *ctx = priv;
957 return v4l2_m2m_qbuf(file, ctx->m2m_ctx, buf);
960 static int fimc_m2m_dqbuf(struct file *file, void *priv,
961 struct v4l2_buffer *buf)
963 struct fimc_ctx *ctx = priv;
964 return v4l2_m2m_dqbuf(file, ctx->m2m_ctx, buf);
967 static int fimc_m2m_streamon(struct file *file, void *priv,
968 enum v4l2_buf_type type)
970 struct fimc_ctx *ctx = priv;
971 return v4l2_m2m_streamon(file, ctx->m2m_ctx, type);
974 static int fimc_m2m_streamoff(struct file *file, void *priv,
975 enum v4l2_buf_type type)
977 struct fimc_ctx *ctx = priv;
978 return v4l2_m2m_streamoff(file, ctx->m2m_ctx, type);
981 int fimc_vidioc_queryctrl(struct file *file, void *priv,
982 struct v4l2_queryctrl *qc)
984 struct fimc_ctx *ctx = priv;
985 struct v4l2_queryctrl *c;
987 c = get_ctrl(qc->id);
993 if (ctx->state & FIMC_CTX_CAP)
994 return v4l2_subdev_call(ctx->fimc_dev->vid_cap.sd,
995 core, queryctrl, qc);
999 int fimc_vidioc_g_ctrl(struct file *file, void *priv,
1000 struct v4l2_control *ctrl)
1002 struct fimc_ctx *ctx = priv;
1003 struct fimc_dev *fimc = ctx->fimc_dev;
1006 if (mutex_lock_interruptible(&fimc->lock))
1007 return -ERESTARTSYS;
1010 case V4L2_CID_HFLIP:
1011 ctrl->value = (FLIP_X_AXIS & ctx->flip) ? 1 : 0;
1013 case V4L2_CID_VFLIP:
1014 ctrl->value = (FLIP_Y_AXIS & ctx->flip) ? 1 : 0;
1016 case V4L2_CID_ROTATE:
1017 ctrl->value = ctx->rotation;
1020 if (ctx->state & FIMC_CTX_CAP) {
1021 ret = v4l2_subdev_call(fimc->vid_cap.sd, core,
1024 v4l2_err(&fimc->m2m.v4l2_dev,
1025 "Invalid control\n");
1029 dbg("ctrl->value= %d", ctrl->value);
1031 mutex_unlock(&fimc->lock);
1035 int check_ctrl_val(struct fimc_ctx *ctx, struct v4l2_control *ctrl)
1037 struct v4l2_queryctrl *c;
1038 c = get_ctrl(ctrl->id);
1042 if (ctrl->value < c->minimum || ctrl->value > c->maximum
1043 || (c->step != 0 && ctrl->value % c->step != 0)) {
1044 v4l2_err(&ctx->fimc_dev->m2m.v4l2_dev,
1045 "Invalid control value\n");
1052 int fimc_s_ctrl(struct fimc_ctx *ctx, struct v4l2_control *ctrl)
1054 struct samsung_fimc_variant *variant = ctx->fimc_dev->variant;
1055 struct fimc_dev *fimc = ctx->fimc_dev;
1056 unsigned long flags;
1058 if (ctx->rotation != 0 &&
1059 (ctrl->id == V4L2_CID_HFLIP || ctrl->id == V4L2_CID_VFLIP)) {
1060 v4l2_err(&fimc->m2m.v4l2_dev,
1061 "Simultaneous flip and rotation is not supported\n");
1065 spin_lock_irqsave(&ctx->slock, flags);
1068 case V4L2_CID_HFLIP:
1070 ctx->flip |= FLIP_X_AXIS;
1072 ctx->flip &= ~FLIP_X_AXIS;
1075 case V4L2_CID_VFLIP:
1077 ctx->flip |= FLIP_Y_AXIS;
1079 ctx->flip &= ~FLIP_Y_AXIS;
1082 case V4L2_CID_ROTATE:
1083 /* Check for the output rotator availability */
1084 if ((ctrl->value == 90 || ctrl->value == 270) &&
1085 (ctx->in_path == FIMC_DMA && !variant->has_out_rot)) {
1086 spin_unlock_irqrestore(&ctx->slock, flags);
1089 ctx->rotation = ctrl->value;
1094 spin_unlock_irqrestore(&ctx->slock, flags);
1095 v4l2_err(&fimc->m2m.v4l2_dev, "Invalid control\n");
1098 ctx->state |= FIMC_PARAMS;
1099 spin_unlock_irqrestore(&ctx->slock, flags);
1104 static int fimc_m2m_s_ctrl(struct file *file, void *priv,
1105 struct v4l2_control *ctrl)
1107 struct fimc_ctx *ctx = priv;
1110 ret = check_ctrl_val(ctx, ctrl);
1114 ret = fimc_s_ctrl(ctx, ctrl);
1118 int fimc_vidioc_cropcap(struct file *file, void *fh,
1119 struct v4l2_cropcap *cr)
1121 struct fimc_frame *frame;
1122 struct fimc_ctx *ctx = fh;
1123 struct fimc_dev *fimc = ctx->fimc_dev;
1125 frame = ctx_get_frame(ctx, cr->type);
1127 return PTR_ERR(frame);
1129 if (mutex_lock_interruptible(&fimc->lock))
1130 return -ERESTARTSYS;
1132 cr->bounds.left = 0;
1134 cr->bounds.width = frame->f_width;
1135 cr->bounds.height = frame->f_height;
1136 cr->defrect = cr->bounds;
1138 mutex_unlock(&fimc->lock);
1142 int fimc_vidioc_g_crop(struct file *file, void *fh, struct v4l2_crop *cr)
1144 struct fimc_frame *frame;
1145 struct fimc_ctx *ctx = file->private_data;
1146 struct fimc_dev *fimc = ctx->fimc_dev;
1148 frame = ctx_get_frame(ctx, cr->type);
1150 return PTR_ERR(frame);
1152 if (mutex_lock_interruptible(&fimc->lock))
1153 return -ERESTARTSYS;
1155 cr->c.left = frame->offs_h;
1156 cr->c.top = frame->offs_v;
1157 cr->c.width = frame->width;
1158 cr->c.height = frame->height;
1160 mutex_unlock(&fimc->lock);
1164 int fimc_try_crop(struct fimc_ctx *ctx, struct v4l2_crop *cr)
1166 struct fimc_dev *fimc = ctx->fimc_dev;
1167 struct fimc_frame *f;
1168 u32 min_size, halign;
1170 f = (cr->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) ?
1171 &ctx->s_frame : &ctx->d_frame;
1173 if (cr->c.top < 0 || cr->c.left < 0) {
1174 v4l2_err(&fimc->m2m.v4l2_dev,
1175 "doesn't support negative values for top & left\n");
1179 f = ctx_get_frame(ctx, cr->type);
1183 min_size = (cr->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
1184 ? fimc->variant->min_inp_pixsize
1185 : fimc->variant->min_out_pixsize;
1187 if (ctx->state & FIMC_CTX_M2M) {
1188 if (fimc->id == 1 && fimc->variant->pix_hoff)
1189 halign = fimc_fmt_is_rgb(f->fmt->color) ? 0 : 1;
1191 halign = ffs(min_size) - 1;
1192 /* there are more strict aligment requirements at camera interface */
1198 v4l_bound_align_image(&cr->c.width, min_size, f->o_width,
1200 &cr->c.height, min_size, f->o_height,
1201 halign, 64/(ALIGN(f->fmt->depth, 8)));
1203 /* adjust left/top if cropping rectangle is out of bounds */
1204 if (cr->c.left + cr->c.width > f->o_width)
1205 cr->c.left = f->o_width - cr->c.width;
1206 if (cr->c.top + cr->c.height > f->o_height)
1207 cr->c.top = f->o_height - cr->c.height;
1209 cr->c.left = round_down(cr->c.left, min_size);
1210 cr->c.top = round_down(cr->c.top,
1211 ctx->state & FIMC_CTX_M2M ? 8 : 16);
1213 dbg("l:%d, t:%d, w:%d, h:%d, f_w: %d, f_h: %d",
1214 cr->c.left, cr->c.top, cr->c.width, cr->c.height,
1215 f->f_width, f->f_height);
1221 static int fimc_m2m_s_crop(struct file *file, void *fh, struct v4l2_crop *cr)
1223 struct fimc_ctx *ctx = file->private_data;
1224 struct fimc_dev *fimc = ctx->fimc_dev;
1225 unsigned long flags;
1226 struct fimc_frame *f;
1229 ret = fimc_try_crop(ctx, cr);
1233 f = (cr->type == V4L2_BUF_TYPE_VIDEO_OUTPUT) ?
1234 &ctx->s_frame : &ctx->d_frame;
1236 spin_lock_irqsave(&ctx->slock, flags);
1237 if (~ctx->state & (FIMC_SRC_FMT | FIMC_DST_FMT)) {
1238 /* Check to see if scaling ratio is within supported range */
1239 if (cr->type == V4L2_BUF_TYPE_VIDEO_OUTPUT)
1240 ret = fimc_check_scaler_ratio(&cr->c, &ctx->d_frame);
1242 ret = fimc_check_scaler_ratio(&cr->c, &ctx->s_frame);
1244 spin_unlock_irqrestore(&ctx->slock, flags);
1245 v4l2_err(&fimc->m2m.v4l2_dev, "Out of scaler range");
1249 ctx->state |= FIMC_PARAMS;
1251 f->offs_h = cr->c.left;
1252 f->offs_v = cr->c.top;
1253 f->width = cr->c.width;
1254 f->height = cr->c.height;
1256 spin_unlock_irqrestore(&ctx->slock, flags);
1260 static const struct v4l2_ioctl_ops fimc_m2m_ioctl_ops = {
1261 .vidioc_querycap = fimc_m2m_querycap,
1263 .vidioc_enum_fmt_vid_cap = fimc_vidioc_enum_fmt,
1264 .vidioc_enum_fmt_vid_out = fimc_vidioc_enum_fmt,
1266 .vidioc_g_fmt_vid_cap = fimc_vidioc_g_fmt,
1267 .vidioc_g_fmt_vid_out = fimc_vidioc_g_fmt,
1269 .vidioc_try_fmt_vid_cap = fimc_vidioc_try_fmt,
1270 .vidioc_try_fmt_vid_out = fimc_vidioc_try_fmt,
1272 .vidioc_s_fmt_vid_cap = fimc_m2m_s_fmt,
1273 .vidioc_s_fmt_vid_out = fimc_m2m_s_fmt,
1275 .vidioc_reqbufs = fimc_m2m_reqbufs,
1276 .vidioc_querybuf = fimc_m2m_querybuf,
1278 .vidioc_qbuf = fimc_m2m_qbuf,
1279 .vidioc_dqbuf = fimc_m2m_dqbuf,
1281 .vidioc_streamon = fimc_m2m_streamon,
1282 .vidioc_streamoff = fimc_m2m_streamoff,
1284 .vidioc_queryctrl = fimc_vidioc_queryctrl,
1285 .vidioc_g_ctrl = fimc_vidioc_g_ctrl,
1286 .vidioc_s_ctrl = fimc_m2m_s_ctrl,
1288 .vidioc_g_crop = fimc_vidioc_g_crop,
1289 .vidioc_s_crop = fimc_m2m_s_crop,
1290 .vidioc_cropcap = fimc_vidioc_cropcap
1294 static void queue_init(void *priv, struct videobuf_queue *vq,
1295 enum v4l2_buf_type type)
1297 struct fimc_ctx *ctx = priv;
1298 struct fimc_dev *fimc = ctx->fimc_dev;
1300 videobuf_queue_dma_contig_init(vq, &fimc_qops,
1302 &fimc->irqlock, type, V4L2_FIELD_NONE,
1303 sizeof(struct fimc_vid_buffer), priv, NULL);
1306 static int fimc_m2m_open(struct file *file)
1308 struct fimc_dev *fimc = video_drvdata(file);
1309 struct fimc_ctx *ctx = NULL;
1312 if (mutex_lock_interruptible(&fimc->lock))
1313 return -ERESTARTSYS;
1315 dbg("pid: %d, state: 0x%lx, refcnt: %d",
1316 task_pid_nr(current), fimc->state, fimc->vid_cap.refcnt);
1319 * Return if the corresponding video capture node
1320 * is already opened.
1322 if (fimc->vid_cap.refcnt > 0) {
1328 set_bit(ST_OUTDMA_RUN, &fimc->state);
1330 ctx = kzalloc(sizeof *ctx, GFP_KERNEL);
1336 file->private_data = ctx;
1337 ctx->fimc_dev = fimc;
1338 /* Default color format */
1339 ctx->s_frame.fmt = &fimc_formats[0];
1340 ctx->d_frame.fmt = &fimc_formats[0];
1341 /* Setup the device context for mem2mem mode. */
1342 ctx->state = FIMC_CTX_M2M;
1344 ctx->in_path = FIMC_DMA;
1345 ctx->out_path = FIMC_DMA;
1346 spin_lock_init(&ctx->slock);
1348 ctx->m2m_ctx = v4l2_m2m_ctx_init(ctx, fimc->m2m.m2m_dev, queue_init);
1349 if (IS_ERR(ctx->m2m_ctx)) {
1350 err = PTR_ERR(ctx->m2m_ctx);
1355 mutex_unlock(&fimc->lock);
1359 static int fimc_m2m_release(struct file *file)
1361 struct fimc_ctx *ctx = file->private_data;
1362 struct fimc_dev *fimc = ctx->fimc_dev;
1364 mutex_lock(&fimc->lock);
1366 dbg("pid: %d, state: 0x%lx, refcnt= %d",
1367 task_pid_nr(current), fimc->state, fimc->m2m.refcnt);
1369 v4l2_m2m_ctx_release(ctx->m2m_ctx);
1371 if (--fimc->m2m.refcnt <= 0)
1372 clear_bit(ST_OUTDMA_RUN, &fimc->state);
1374 mutex_unlock(&fimc->lock);
1378 static unsigned int fimc_m2m_poll(struct file *file,
1379 struct poll_table_struct *wait)
1381 struct fimc_ctx *ctx = file->private_data;
1383 return v4l2_m2m_poll(file, ctx->m2m_ctx, wait);
1387 static int fimc_m2m_mmap(struct file *file, struct vm_area_struct *vma)
1389 struct fimc_ctx *ctx = file->private_data;
1391 return v4l2_m2m_mmap(file, ctx->m2m_ctx, vma);
1394 static const struct v4l2_file_operations fimc_m2m_fops = {
1395 .owner = THIS_MODULE,
1396 .open = fimc_m2m_open,
1397 .release = fimc_m2m_release,
1398 .poll = fimc_m2m_poll,
1399 .ioctl = video_ioctl2,
1400 .mmap = fimc_m2m_mmap,
1403 static struct v4l2_m2m_ops m2m_ops = {
1404 .device_run = fimc_dma_run,
1405 .job_abort = fimc_job_abort,
1409 static int fimc_register_m2m_device(struct fimc_dev *fimc)
1411 struct video_device *vfd;
1412 struct platform_device *pdev;
1413 struct v4l2_device *v4l2_dev;
1420 v4l2_dev = &fimc->m2m.v4l2_dev;
1422 /* set name if it is empty */
1423 if (!v4l2_dev->name[0])
1424 snprintf(v4l2_dev->name, sizeof(v4l2_dev->name),
1425 "%s.m2m", dev_name(&pdev->dev));
1427 ret = v4l2_device_register(&pdev->dev, v4l2_dev);
1431 vfd = video_device_alloc();
1433 v4l2_err(v4l2_dev, "Failed to allocate video device\n");
1437 vfd->fops = &fimc_m2m_fops;
1438 vfd->ioctl_ops = &fimc_m2m_ioctl_ops;
1440 vfd->release = video_device_release;
1442 snprintf(vfd->name, sizeof(vfd->name), "%s:m2m", dev_name(&pdev->dev));
1444 video_set_drvdata(vfd, fimc);
1445 platform_set_drvdata(pdev, fimc);
1447 fimc->m2m.vfd = vfd;
1448 fimc->m2m.m2m_dev = v4l2_m2m_init(&m2m_ops);
1449 if (IS_ERR(fimc->m2m.m2m_dev)) {
1450 v4l2_err(v4l2_dev, "failed to initialize v4l2-m2m device\n");
1451 ret = PTR_ERR(fimc->m2m.m2m_dev);
1455 ret = video_register_device(vfd, VFL_TYPE_GRABBER, -1);
1458 "%s(): failed to register video device\n", __func__);
1462 "FIMC m2m driver registered as /dev/video%d\n", vfd->num);
1467 v4l2_m2m_release(fimc->m2m.m2m_dev);
1469 video_device_release(fimc->m2m.vfd);
1471 v4l2_device_unregister(v4l2_dev);
1476 static void fimc_unregister_m2m_device(struct fimc_dev *fimc)
1479 v4l2_m2m_release(fimc->m2m.m2m_dev);
1480 video_unregister_device(fimc->m2m.vfd);
1482 v4l2_device_unregister(&fimc->m2m.v4l2_dev);
1486 static void fimc_clk_release(struct fimc_dev *fimc)
1489 for (i = 0; i < NUM_FIMC_CLOCKS; i++) {
1490 if (fimc->clock[i]) {
1491 clk_disable(fimc->clock[i]);
1492 clk_put(fimc->clock[i]);
1497 static int fimc_clk_get(struct fimc_dev *fimc)
1500 for (i = 0; i < NUM_FIMC_CLOCKS; i++) {
1501 fimc->clock[i] = clk_get(&fimc->pdev->dev, fimc_clock_name[i]);
1502 if (IS_ERR(fimc->clock[i])) {
1503 dev_err(&fimc->pdev->dev,
1504 "failed to get fimc clock: %s\n",
1505 fimc_clock_name[i]);
1508 clk_enable(fimc->clock[i]);
1513 static int fimc_probe(struct platform_device *pdev)
1515 struct fimc_dev *fimc;
1516 struct resource *res;
1517 struct samsung_fimc_driverdata *drv_data;
1520 dev_dbg(&pdev->dev, "%s():\n", __func__);
1522 drv_data = (struct samsung_fimc_driverdata *)
1523 platform_get_device_id(pdev)->driver_data;
1525 if (pdev->id >= drv_data->num_entities) {
1526 dev_err(&pdev->dev, "Invalid platform device id: %d\n",
1531 fimc = kzalloc(sizeof(struct fimc_dev), GFP_KERNEL);
1535 fimc->id = pdev->id;
1536 fimc->variant = drv_data->variant[fimc->id];
1538 fimc->pdata = pdev->dev.platform_data;
1539 fimc->state = ST_IDLE;
1541 spin_lock_init(&fimc->irqlock);
1542 init_waitqueue_head(&fimc->irq_queue);
1543 spin_lock_init(&fimc->slock);
1545 mutex_init(&fimc->lock);
1547 res = platform_get_resource(pdev, IORESOURCE_MEM, 0);
1549 dev_err(&pdev->dev, "failed to find the registers\n");
1554 fimc->regs_res = request_mem_region(res->start, resource_size(res),
1555 dev_name(&pdev->dev));
1556 if (!fimc->regs_res) {
1557 dev_err(&pdev->dev, "failed to obtain register region\n");
1562 fimc->regs = ioremap(res->start, resource_size(res));
1564 dev_err(&pdev->dev, "failed to map registers\n");
1566 goto err_req_region;
1569 ret = fimc_clk_get(fimc);
1571 goto err_regs_unmap;
1572 clk_set_rate(fimc->clock[0], drv_data->lclk_frequency);
1574 res = platform_get_resource(pdev, IORESOURCE_IRQ, 0);
1576 dev_err(&pdev->dev, "failed to get IRQ resource\n");
1580 fimc->irq = res->start;
1582 fimc_hw_reset(fimc);
1584 ret = request_irq(fimc->irq, fimc_isr, 0, pdev->name, fimc);
1586 dev_err(&pdev->dev, "failed to install irq (%d)\n", ret);
1590 ret = fimc_register_m2m_device(fimc);
1594 /* At least one camera sensor is required to register capture node */
1597 for (i = 0; i < FIMC_MAX_CAMIF_CLIENTS; ++i)
1598 if (fimc->pdata->isp_info[i])
1601 if (i < FIMC_MAX_CAMIF_CLIENTS) {
1602 ret = fimc_register_capture_device(fimc);
1609 * Exclude the additional output DMA address registers by masking
1610 * them out on HW revisions that provide extended capabilites.
1612 if (fimc->variant->out_buf_count > 4)
1613 fimc_hw_set_dma_seq(fimc, 0xF);
1615 dev_dbg(&pdev->dev, "%s(): fimc-%d registered successfully\n",
1616 __func__, fimc->id);
1621 fimc_unregister_m2m_device(fimc);
1623 free_irq(fimc->irq, fimc);
1625 fimc_clk_release(fimc);
1627 iounmap(fimc->regs);
1629 release_resource(fimc->regs_res);
1630 kfree(fimc->regs_res);
1637 static int __devexit fimc_remove(struct platform_device *pdev)
1639 struct fimc_dev *fimc =
1640 (struct fimc_dev *)platform_get_drvdata(pdev);
1642 free_irq(fimc->irq, fimc);
1643 fimc_hw_reset(fimc);
1645 fimc_unregister_m2m_device(fimc);
1646 fimc_unregister_capture_device(fimc);
1648 fimc_clk_release(fimc);
1649 iounmap(fimc->regs);
1650 release_resource(fimc->regs_res);
1651 kfree(fimc->regs_res);
1654 dev_info(&pdev->dev, "%s driver unloaded\n", pdev->name);
1658 /* Image pixel limits, similar across several FIMC HW revisions. */
1659 static struct fimc_pix_limit s5p_pix_limit[3] = {
1661 .scaler_en_w = 3264,
1662 .scaler_dis_w = 8192,
1663 .in_rot_en_h = 1920,
1664 .in_rot_dis_w = 8192,
1665 .out_rot_en_w = 1920,
1666 .out_rot_dis_w = 4224,
1669 .scaler_en_w = 4224,
1670 .scaler_dis_w = 8192,
1671 .in_rot_en_h = 1920,
1672 .in_rot_dis_w = 8192,
1673 .out_rot_en_w = 1920,
1674 .out_rot_dis_w = 4224,
1677 .scaler_en_w = 1920,
1678 .scaler_dis_w = 8192,
1679 .in_rot_en_h = 1280,
1680 .in_rot_dis_w = 8192,
1681 .out_rot_en_w = 1280,
1682 .out_rot_dis_w = 1920,
1686 static struct samsung_fimc_variant fimc0_variant_s5p = {
1689 .min_inp_pixsize = 16,
1690 .min_out_pixsize = 16,
1691 .hor_offs_align = 8,
1693 .pix_limit = &s5p_pix_limit[0],
1696 static struct samsung_fimc_variant fimc2_variant_s5p = {
1697 .min_inp_pixsize = 16,
1698 .min_out_pixsize = 16,
1699 .hor_offs_align = 8,
1701 .pix_limit = &s5p_pix_limit[1],
1704 static struct samsung_fimc_variant fimc0_variant_s5pv210 = {
1708 .min_inp_pixsize = 16,
1709 .min_out_pixsize = 16,
1710 .hor_offs_align = 8,
1712 .pix_limit = &s5p_pix_limit[1],
1715 static struct samsung_fimc_variant fimc1_variant_s5pv210 = {
1719 .min_inp_pixsize = 16,
1720 .min_out_pixsize = 16,
1721 .hor_offs_align = 1,
1723 .pix_limit = &s5p_pix_limit[2],
1726 static struct samsung_fimc_variant fimc2_variant_s5pv210 = {
1728 .min_inp_pixsize = 16,
1729 .min_out_pixsize = 16,
1730 .hor_offs_align = 8,
1732 .pix_limit = &s5p_pix_limit[2],
1735 static struct samsung_fimc_variant fimc0_variant_s5pv310 = {
1739 .min_inp_pixsize = 16,
1740 .min_out_pixsize = 16,
1741 .hor_offs_align = 1,
1742 .out_buf_count = 32,
1743 .pix_limit = &s5p_pix_limit[1],
1746 static struct samsung_fimc_variant fimc2_variant_s5pv310 = {
1748 .min_inp_pixsize = 16,
1749 .min_out_pixsize = 16,
1750 .hor_offs_align = 1,
1751 .out_buf_count = 32,
1752 .pix_limit = &s5p_pix_limit[2],
1756 static struct samsung_fimc_driverdata fimc_drvdata_s5p = {
1758 [0] = &fimc0_variant_s5p,
1759 [1] = &fimc0_variant_s5p,
1760 [2] = &fimc2_variant_s5p,
1763 .lclk_frequency = 133000000UL,
1766 /* S5PV210, S5PC110 */
1767 static struct samsung_fimc_driverdata fimc_drvdata_s5pv210 = {
1769 [0] = &fimc0_variant_s5pv210,
1770 [1] = &fimc1_variant_s5pv210,
1771 [2] = &fimc2_variant_s5pv210,
1774 .lclk_frequency = 166000000UL,
1777 /* S5PV310, S5PC210 */
1778 static struct samsung_fimc_driverdata fimc_drvdata_s5pv310 = {
1780 [0] = &fimc0_variant_s5pv310,
1781 [1] = &fimc0_variant_s5pv310,
1782 [2] = &fimc0_variant_s5pv310,
1783 [3] = &fimc2_variant_s5pv310,
1786 .lclk_frequency = 166000000UL,
1789 static struct platform_device_id fimc_driver_ids[] = {
1792 .driver_data = (unsigned long)&fimc_drvdata_s5p,
1794 .name = "s5pv210-fimc",
1795 .driver_data = (unsigned long)&fimc_drvdata_s5pv210,
1797 .name = "s5pv310-fimc",
1798 .driver_data = (unsigned long)&fimc_drvdata_s5pv310,
1802 MODULE_DEVICE_TABLE(platform, fimc_driver_ids);
1804 static struct platform_driver fimc_driver = {
1805 .probe = fimc_probe,
1806 .remove = __devexit_p(fimc_remove),
1807 .id_table = fimc_driver_ids,
1809 .name = MODULE_NAME,
1810 .owner = THIS_MODULE,
1814 static int __init fimc_init(void)
1816 int ret = platform_driver_register(&fimc_driver);
1818 err("platform_driver_register failed: %d\n", ret);
1822 static void __exit fimc_exit(void)
1824 platform_driver_unregister(&fimc_driver);
1827 module_init(fimc_init);
1828 module_exit(fimc_exit);
1830 MODULE_AUTHOR("Sylwester Nawrocki <s.nawrocki@samsung.com>");
1831 MODULE_DESCRIPTION("S5P FIMC camera host interface/video postprocessor driver");
1832 MODULE_LICENSE("GPL");