2 * saa7191.c - Philips SAA7191 video decoder driver
4 * Copyright (C) 2003 Ladislav Michl <ladis@linux-mips.org>
5 * Copyright (C) 2004,2005 Mikael Nousiainen <tmnousia@cc.hut.fi>
7 * This program is free software; you can redistribute it and/or modify
8 * it under the terms of the GNU General Public License version 2 as
9 * published by the Free Software Foundation.
12 #include <linux/delay.h>
13 #include <linux/errno.h>
15 #include <linux/init.h>
16 #include <linux/kernel.h>
17 #include <linux/major.h>
18 #include <linux/module.h>
20 #include <linux/slab.h>
22 #include <linux/videodev2.h>
23 #include <linux/i2c.h>
24 #include <media/v4l2-device.h>
25 #include <media/v4l2-chip-ident.h>
29 #define SAA7191_MODULE_VERSION "0.0.5"
31 MODULE_DESCRIPTION("Philips SAA7191 video decoder driver");
32 MODULE_VERSION(SAA7191_MODULE_VERSION);
33 MODULE_AUTHOR("Mikael Nousiainen <tmnousia@cc.hut.fi>");
34 MODULE_LICENSE("GPL");
37 // #define SAA7191_DEBUG
40 #define dprintk(x...) printk("SAA7191: " x);
45 #define SAA7191_SYNC_COUNT 30
46 #define SAA7191_SYNC_DELAY 100 /* milliseconds */
49 struct v4l2_subdev sd;
51 /* the register values are stored here as the actual
52 * I2C-registers are write-only */
59 static inline struct saa7191 *to_saa7191(struct v4l2_subdev *sd)
61 return container_of(sd, struct saa7191, sd);
64 static const u8 initseq[] = {
67 0x50, /* (0x50) SAA7191_REG_IDEL */
69 /* 50 Hz signal timing */
70 0x30, /* (0x30) SAA7191_REG_HSYB */
71 0x00, /* (0x00) SAA7191_REG_HSYS */
72 0xe8, /* (0xe8) SAA7191_REG_HCLB */
73 0xb6, /* (0xb6) SAA7191_REG_HCLS */
74 0xf4, /* (0xf4) SAA7191_REG_HPHI */
77 SAA7191_LUMA_APER_1, /* (0x01) SAA7191_REG_LUMA - CVBS mode */
78 0x00, /* (0x00) SAA7191_REG_HUEC */
79 0xf8, /* (0xf8) SAA7191_REG_CKTQ */
80 0xf8, /* (0xf8) SAA7191_REG_CKTS */
81 0x90, /* (0x90) SAA7191_REG_PLSE */
82 0x90, /* (0x90) SAA7191_REG_SESE */
83 0x00, /* (0x00) SAA7191_REG_GAIN */
84 SAA7191_STDC_NFEN | SAA7191_STDC_HRMV, /* (0x0c) SAA7191_REG_STDC
86 * slow time constant */
87 SAA7191_IOCK_OEDC | SAA7191_IOCK_OEHS | SAA7191_IOCK_OEVS
88 | SAA7191_IOCK_OEDY, /* (0x78) SAA7191_REG_IOCK
89 * - chroma from CVBS, GPSW1 & 2 off */
90 SAA7191_CTL3_AUFD | SAA7191_CTL3_SCEN | SAA7191_CTL3_OFTS
91 | SAA7191_CTL3_YDEL0, /* (0x99) SAA7191_REG_CTL3
92 * - automatic field detection */
93 0x00, /* (0x00) SAA7191_REG_CTL4 */
94 0x2c, /* (0x2c) SAA7191_REG_CHCV - PAL nominal value */
98 /* 60 Hz signal timing */
99 0x34, /* (0x34) SAA7191_REG_HS6B */
100 0x0a, /* (0x0a) SAA7191_REG_HS6S */
101 0xf4, /* (0xf4) SAA7191_REG_HC6B */
102 0xce, /* (0xce) SAA7191_REG_HC6S */
103 0xf4, /* (0xf4) SAA7191_REG_HP6I */
106 /* SAA7191 register handling */
108 static u8 saa7191_read_reg(struct v4l2_subdev *sd, u8 reg)
110 return to_saa7191(sd)->reg[reg];
113 static int saa7191_read_status(struct v4l2_subdev *sd, u8 *value)
115 struct i2c_client *client = v4l2_get_subdevdata(sd);
118 ret = i2c_master_recv(client, value, 1);
120 printk(KERN_ERR "SAA7191: saa7191_read_status(): read failed\n");
128 static int saa7191_write_reg(struct v4l2_subdev *sd, u8 reg, u8 value)
130 struct i2c_client *client = v4l2_get_subdevdata(sd);
132 to_saa7191(sd)->reg[reg] = value;
133 return i2c_smbus_write_byte_data(client, reg, value);
136 /* the first byte of data must be the first subaddress number (register) */
137 static int saa7191_write_block(struct v4l2_subdev *sd,
138 u8 length, const u8 *data)
140 struct i2c_client *client = v4l2_get_subdevdata(sd);
141 struct saa7191 *decoder = to_saa7191(sd);
145 for (i = 0; i < (length - 1); i++) {
146 decoder->reg[data[0] + i] = data[i + 1];
149 ret = i2c_master_send(client, data, length);
151 printk(KERN_ERR "SAA7191: saa7191_write_block(): "
159 /* Helper functions */
161 static int saa7191_s_routing(struct v4l2_subdev *sd,
162 u32 input, u32 output, u32 config)
164 struct saa7191 *decoder = to_saa7191(sd);
165 u8 luma = saa7191_read_reg(sd, SAA7191_REG_LUMA);
166 u8 iock = saa7191_read_reg(sd, SAA7191_REG_IOCK);
170 case SAA7191_INPUT_COMPOSITE: /* Set Composite input */
171 iock &= ~(SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW1
172 | SAA7191_IOCK_GPSW2);
173 /* Chrominance trap active */
174 luma &= ~SAA7191_LUMA_BYPS;
176 case SAA7191_INPUT_SVIDEO: /* Set S-Video input */
177 iock |= SAA7191_IOCK_CHRS | SAA7191_IOCK_GPSW2;
178 /* Chrominance trap bypassed */
179 luma |= SAA7191_LUMA_BYPS;
185 err = saa7191_write_reg(sd, SAA7191_REG_LUMA, luma);
188 err = saa7191_write_reg(sd, SAA7191_REG_IOCK, iock);
192 decoder->input = input;
197 static int saa7191_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
199 struct saa7191 *decoder = to_saa7191(sd);
200 u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
201 u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
202 u8 chcv = saa7191_read_reg(sd, SAA7191_REG_CHCV);
205 if (norm & V4L2_STD_PAL) {
206 stdc &= ~SAA7191_STDC_SECS;
207 ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
208 chcv = SAA7191_CHCV_PAL;
209 } else if (norm & V4L2_STD_NTSC) {
210 stdc &= ~SAA7191_STDC_SECS;
211 ctl3 &= ~SAA7191_CTL3_AUFD;
212 ctl3 |= SAA7191_CTL3_FSEL;
213 chcv = SAA7191_CHCV_NTSC;
214 } else if (norm & V4L2_STD_SECAM) {
215 stdc |= SAA7191_STDC_SECS;
216 ctl3 &= ~(SAA7191_CTL3_AUFD | SAA7191_CTL3_FSEL);
217 chcv = SAA7191_CHCV_PAL;
222 err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
225 err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
228 err = saa7191_write_reg(sd, SAA7191_REG_CHCV, chcv);
232 decoder->norm = norm;
234 dprintk("ctl3: %02x stdc: %02x chcv: %02x\n", ctl3,
236 dprintk("norm: %llx\n", norm);
241 static int saa7191_wait_for_signal(struct v4l2_subdev *sd, u8 *status)
245 dprintk("Checking for signal...\n");
247 for (i = 0; i < SAA7191_SYNC_COUNT; i++) {
248 if (saa7191_read_status(sd, status))
251 if (((*status) & SAA7191_STATUS_HLCK) == 0) {
252 dprintk("Signal found\n");
256 msleep(SAA7191_SYNC_DELAY);
259 dprintk("No signal\n");
264 static int saa7191_querystd(struct v4l2_subdev *sd, v4l2_std_id *norm)
266 struct saa7191 *decoder = to_saa7191(sd);
267 u8 stdc = saa7191_read_reg(sd, SAA7191_REG_STDC);
268 u8 ctl3 = saa7191_read_reg(sd, SAA7191_REG_CTL3);
270 v4l2_std_id old_norm = decoder->norm;
273 dprintk("SAA7191 extended signal auto-detection...\n");
275 *norm = V4L2_STD_NTSC | V4L2_STD_PAL | V4L2_STD_SECAM;
276 stdc &= ~SAA7191_STDC_SECS;
277 ctl3 &= ~(SAA7191_CTL3_FSEL);
279 err = saa7191_write_reg(sd, SAA7191_REG_STDC, stdc);
284 err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
290 ctl3 |= SAA7191_CTL3_AUFD;
291 err = saa7191_write_reg(sd, SAA7191_REG_CTL3, ctl3);
297 msleep(SAA7191_SYNC_DELAY);
299 err = saa7191_wait_for_signal(sd, &status);
303 if (status & SAA7191_STATUS_FIDT) {
304 /* 60Hz signal -> NTSC */
305 dprintk("60Hz signal: NTSC\n");
306 *norm = V4L2_STD_NTSC;
311 dprintk("50Hz signal: Trying PAL...\n");
314 err = saa7191_s_std(sd, V4L2_STD_PAL);
318 msleep(SAA7191_SYNC_DELAY);
320 err = saa7191_wait_for_signal(sd, &status);
325 if (status & SAA7191_STATUS_FIDT) {
326 dprintk("No 50Hz signal\n");
327 saa7191_s_std(sd, old_norm);
331 if (status & SAA7191_STATUS_CODE) {
333 *norm = V4L2_STD_PAL;
334 return saa7191_s_std(sd, old_norm);
337 dprintk("No color detected with PAL - Trying SECAM...\n");
339 /* no color detected ? -> try SECAM */
340 err = saa7191_s_std(sd, V4L2_STD_SECAM);
344 msleep(SAA7191_SYNC_DELAY);
346 err = saa7191_wait_for_signal(sd, &status);
351 if (status & SAA7191_STATUS_FIDT) {
352 dprintk("No 50Hz signal\n");
357 if (status & SAA7191_STATUS_CODE) {
358 /* Color detected -> SECAM */
360 *norm = V4L2_STD_SECAM;
361 return saa7191_s_std(sd, old_norm);
364 dprintk("No color detected with SECAM - Going back to PAL.\n");
367 return saa7191_s_std(sd, old_norm);
370 static int saa7191_autodetect_norm(struct v4l2_subdev *sd)
374 dprintk("SAA7191 signal auto-detection...\n");
376 dprintk("Reading status...\n");
378 if (saa7191_read_status(sd, &status))
381 dprintk("Checking for signal...\n");
384 if (status & SAA7191_STATUS_HLCK) {
385 dprintk("No signal\n");
389 dprintk("Signal found\n");
391 if (status & SAA7191_STATUS_FIDT) {
392 /* 60hz signal -> NTSC */
394 return saa7191_s_std(sd, V4L2_STD_NTSC);
396 /* 50hz signal -> PAL */
398 return saa7191_s_std(sd, V4L2_STD_PAL);
402 static int saa7191_g_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
408 case SAA7191_CONTROL_BANDPASS:
409 case SAA7191_CONTROL_BANDPASS_WEIGHT:
410 case SAA7191_CONTROL_CORING:
411 reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
413 case SAA7191_CONTROL_BANDPASS:
414 ctrl->value = ((s32)reg & SAA7191_LUMA_BPSS_MASK)
415 >> SAA7191_LUMA_BPSS_SHIFT;
417 case SAA7191_CONTROL_BANDPASS_WEIGHT:
418 ctrl->value = ((s32)reg & SAA7191_LUMA_APER_MASK)
419 >> SAA7191_LUMA_APER_SHIFT;
421 case SAA7191_CONTROL_CORING:
422 ctrl->value = ((s32)reg & SAA7191_LUMA_CORI_MASK)
423 >> SAA7191_LUMA_CORI_SHIFT;
427 case SAA7191_CONTROL_FORCE_COLOUR:
428 case SAA7191_CONTROL_CHROMA_GAIN:
429 reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
430 if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR)
431 ctrl->value = ((s32)reg & SAA7191_GAIN_COLO) ? 1 : 0;
433 ctrl->value = ((s32)reg & SAA7191_GAIN_LFIS_MASK)
434 >> SAA7191_GAIN_LFIS_SHIFT;
437 reg = saa7191_read_reg(sd, SAA7191_REG_HUEC);
442 ctrl->value = (s32)reg;
444 case SAA7191_CONTROL_VTRC:
445 reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
446 ctrl->value = ((s32)reg & SAA7191_STDC_VTRC) ? 1 : 0;
448 case SAA7191_CONTROL_LUMA_DELAY:
449 reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
450 ctrl->value = ((s32)reg & SAA7191_CTL3_YDEL_MASK)
451 >> SAA7191_CTL3_YDEL_SHIFT;
452 if (ctrl->value >= 4)
455 case SAA7191_CONTROL_VNR:
456 reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
457 ctrl->value = ((s32)reg & SAA7191_CTL4_VNOI_MASK)
458 >> SAA7191_CTL4_VNOI_SHIFT;
467 static int saa7191_s_ctrl(struct v4l2_subdev *sd, struct v4l2_control *ctrl)
473 case SAA7191_CONTROL_BANDPASS:
474 case SAA7191_CONTROL_BANDPASS_WEIGHT:
475 case SAA7191_CONTROL_CORING:
476 reg = saa7191_read_reg(sd, SAA7191_REG_LUMA);
478 case SAA7191_CONTROL_BANDPASS:
479 reg &= ~SAA7191_LUMA_BPSS_MASK;
480 reg |= (ctrl->value << SAA7191_LUMA_BPSS_SHIFT)
481 & SAA7191_LUMA_BPSS_MASK;
483 case SAA7191_CONTROL_BANDPASS_WEIGHT:
484 reg &= ~SAA7191_LUMA_APER_MASK;
485 reg |= (ctrl->value << SAA7191_LUMA_APER_SHIFT)
486 & SAA7191_LUMA_APER_MASK;
488 case SAA7191_CONTROL_CORING:
489 reg &= ~SAA7191_LUMA_CORI_MASK;
490 reg |= (ctrl->value << SAA7191_LUMA_CORI_SHIFT)
491 & SAA7191_LUMA_CORI_MASK;
494 ret = saa7191_write_reg(sd, SAA7191_REG_LUMA, reg);
496 case SAA7191_CONTROL_FORCE_COLOUR:
497 case SAA7191_CONTROL_CHROMA_GAIN:
498 reg = saa7191_read_reg(sd, SAA7191_REG_GAIN);
499 if (ctrl->id == SAA7191_CONTROL_FORCE_COLOUR) {
501 reg |= SAA7191_GAIN_COLO;
503 reg &= ~SAA7191_GAIN_COLO;
505 reg &= ~SAA7191_GAIN_LFIS_MASK;
506 reg |= (ctrl->value << SAA7191_GAIN_LFIS_SHIFT)
507 & SAA7191_GAIN_LFIS_MASK;
509 ret = saa7191_write_reg(sd, SAA7191_REG_GAIN, reg);
512 reg = ctrl->value & 0xff;
517 ret = saa7191_write_reg(sd, SAA7191_REG_HUEC, reg);
519 case SAA7191_CONTROL_VTRC:
520 reg = saa7191_read_reg(sd, SAA7191_REG_STDC);
522 reg |= SAA7191_STDC_VTRC;
524 reg &= ~SAA7191_STDC_VTRC;
525 ret = saa7191_write_reg(sd, SAA7191_REG_STDC, reg);
527 case SAA7191_CONTROL_LUMA_DELAY: {
528 s32 value = ctrl->value;
531 reg = saa7191_read_reg(sd, SAA7191_REG_CTL3);
532 reg &= ~SAA7191_CTL3_YDEL_MASK;
533 reg |= (value << SAA7191_CTL3_YDEL_SHIFT)
534 & SAA7191_CTL3_YDEL_MASK;
535 ret = saa7191_write_reg(sd, SAA7191_REG_CTL3, reg);
538 case SAA7191_CONTROL_VNR:
539 reg = saa7191_read_reg(sd, SAA7191_REG_CTL4);
540 reg &= ~SAA7191_CTL4_VNOI_MASK;
541 reg |= (ctrl->value << SAA7191_CTL4_VNOI_SHIFT)
542 & SAA7191_CTL4_VNOI_MASK;
543 ret = saa7191_write_reg(sd, SAA7191_REG_CTL4, reg);
554 static int saa7191_g_input_status(struct v4l2_subdev *sd, u32 *status)
557 int res = V4L2_IN_ST_NO_SIGNAL;
559 if (saa7191_read_status(sd, &status_reg))
561 if ((status_reg & SAA7191_STATUS_HLCK) == 0)
563 if (!(status_reg & SAA7191_STATUS_CODE))
564 res |= V4L2_IN_ST_NO_COLOR;
570 static int saa7191_g_chip_ident(struct v4l2_subdev *sd,
571 struct v4l2_dbg_chip_ident *chip)
573 struct i2c_client *client = v4l2_get_subdevdata(sd);
575 return v4l2_chip_ident_i2c_client(client, chip, V4L2_IDENT_SAA7191, 0);
578 /* ----------------------------------------------------------------------- */
580 static const struct v4l2_subdev_core_ops saa7191_core_ops = {
581 .g_chip_ident = saa7191_g_chip_ident,
582 .g_ctrl = saa7191_g_ctrl,
583 .s_ctrl = saa7191_s_ctrl,
584 .s_std = saa7191_s_std,
587 static const struct v4l2_subdev_video_ops saa7191_video_ops = {
588 .s_routing = saa7191_s_routing,
589 .querystd = saa7191_querystd,
590 .g_input_status = saa7191_g_input_status,
593 static const struct v4l2_subdev_ops saa7191_ops = {
594 .core = &saa7191_core_ops,
595 .video = &saa7191_video_ops,
598 static int saa7191_probe(struct i2c_client *client,
599 const struct i2c_device_id *id)
602 struct saa7191 *decoder;
603 struct v4l2_subdev *sd;
605 v4l_info(client, "chip found @ 0x%x (%s)\n",
606 client->addr << 1, client->adapter->name);
608 decoder = kzalloc(sizeof(*decoder), GFP_KERNEL);
613 v4l2_i2c_subdev_init(sd, client, &saa7191_ops);
615 err = saa7191_write_block(sd, sizeof(initseq), initseq);
617 printk(KERN_ERR "SAA7191 initialization failed\n");
622 printk(KERN_INFO "SAA7191 initialized\n");
624 decoder->input = SAA7191_INPUT_COMPOSITE;
625 decoder->norm = V4L2_STD_PAL;
627 err = saa7191_autodetect_norm(sd);
628 if (err && (err != -EBUSY))
629 printk(KERN_ERR "SAA7191: Signal auto-detection failed\n");
634 static int saa7191_remove(struct i2c_client *client)
636 struct v4l2_subdev *sd = i2c_get_clientdata(client);
638 v4l2_device_unregister_subdev(sd);
639 kfree(to_saa7191(sd));
643 static const struct i2c_device_id saa7191_id[] = {
647 MODULE_DEVICE_TABLE(i2c, saa7191_id);
649 static struct i2c_driver saa7191_driver = {
651 .owner = THIS_MODULE,
654 .probe = saa7191_probe,
655 .remove = saa7191_remove,
656 .id_table = saa7191_id,
659 static __init int init_saa7191(void)
661 return i2c_add_driver(&saa7191_driver);
664 static __exit void exit_saa7191(void)
666 i2c_del_driver(&saa7191_driver);
669 module_init(init_saa7191);
670 module_exit(exit_saa7191);