2 * experimental driver for simple i2c audio chips.
4 * Copyright (c) 2000 Gerd Knorr
6 * Eric Sandeen (eric_sandeen@bigfoot.com)
7 * Steve VanDeBogart (vandebo@uclink.berkeley.edu)
8 * Greg Alexander (galexand@acm.org)
10 * This code is placed under the terms of the GNU General Public License
13 * debug - set to 1 if you'd like to see debug messages
17 #include <linux/module.h>
18 #include <linux/kernel.h>
19 #include <linux/sched.h>
20 #include <linux/string.h>
21 #include <linux/timer.h>
22 #include <linux/delay.h>
23 #include <linux/errno.h>
24 #include <linux/slab.h>
25 #include <linux/videodev.h>
26 #include <linux/i2c.h>
27 #include <linux/init.h>
28 #include <linux/kthread.h>
29 #include <linux/freezer.h>
31 #include <media/tvaudio.h>
32 #include <media/v4l2-common.h>
33 #include <media/v4l2-chip-ident.h>
34 #include <media/v4l2-i2c-drv-legacy.h>
36 #include <media/i2c-addr.h>
38 /* ---------------------------------------------------------------------- */
41 static int debug; /* insmod parameter */
42 module_param(debug, int, 0644);
44 MODULE_DESCRIPTION("device driver for various i2c TV sound decoder / audiomux chips");
45 MODULE_AUTHOR("Eric Sandeen, Steve VanDeBogart, Greg Alexander, Gerd Knorr");
46 MODULE_LICENSE("GPL");
50 /* ---------------------------------------------------------------------- */
56 typedef int (*getvalue)(int);
57 typedef int (*checkit)(struct CHIPSTATE*);
58 typedef int (*initialize)(struct CHIPSTATE*);
59 typedef int (*getmode)(struct CHIPSTATE*);
60 typedef void (*setmode)(struct CHIPSTATE*, int mode);
61 typedef void (*checkmode)(struct CHIPSTATE*);
64 typedef struct AUDIOCMD {
65 int count; /* # of bytes to send */
66 unsigned char bytes[MAXREGS+1]; /* addr, data, data, ... */
69 /* chip description */
71 char *name; /* chip name */
72 int addr_lo, addr_hi; /* i2c address range */
73 int registers; /* # of registers */
77 initialize initialize;
79 #define CHIP_HAS_VOLUME 1
80 #define CHIP_HAS_BASSTREBLE 2
81 #define CHIP_HAS_INPUTSEL 4
83 /* various i2c command sequences */
86 /* which register has which value */
87 int leftreg,rightreg,treblereg,bassreg;
89 /* initialize with (defaults to 65535/65535/32768/32768 */
90 int leftinit,rightinit,trebleinit,bassinit;
92 /* functions to convert the values (v4l -> chip) */
93 getvalue volfunc,treblefunc,bassfunc;
99 /* check / autoswitch audio after channel switches */
102 /* input switch register + values for v4l inputs */
108 static struct CHIPDESC chiplist[];
110 /* current state of the chip */
112 struct i2c_client *c;
114 /* index into CHIPDESC array */
117 /* shadow register set */
120 /* current settings */
121 __u16 left,right,treble,bass,muted,mode;
127 struct task_struct *thread;
128 struct timer_list wt;
133 /* ---------------------------------------------------------------------- */
136 static unsigned short normal_i2c[] = {
137 I2C_ADDR_TDA8425 >> 1,
138 I2C_ADDR_TEA6300 >> 1,
139 I2C_ADDR_TEA6420 >> 1,
140 I2C_ADDR_TDA9840 >> 1,
141 I2C_ADDR_TDA985x_L >> 1,
142 I2C_ADDR_TDA985x_H >> 1,
143 I2C_ADDR_TDA9874 >> 1,
144 I2C_ADDR_PIC16C54 >> 1,
148 /* ---------------------------------------------------------------------- */
149 /* i2c I/O functions */
151 static int chip_write(struct CHIPSTATE *chip, int subaddr, int val)
153 unsigned char buffer[2];
156 v4l_dbg(1, debug, chip->c, "%s: chip_write: 0x%x\n",
158 chip->shadow.bytes[1] = val;
160 if (1 != i2c_master_send(chip->c,buffer,1)) {
161 v4l_warn(chip->c, "%s: I/O error (write 0x%x)\n",
166 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
168 "Tried to access a non-existent register: %d\n",
173 v4l_dbg(1, debug, chip->c, "%s: chip_write: reg%d=0x%x\n",
174 chip->c->name, subaddr, val);
175 chip->shadow.bytes[subaddr+1] = val;
178 if (2 != i2c_master_send(chip->c,buffer,2)) {
179 v4l_warn(chip->c, "%s: I/O error (write reg%d=0x%x)\n",
180 chip->c->name, subaddr, val);
187 static int chip_write_masked(struct CHIPSTATE *chip,
188 int subaddr, int val, int mask)
192 val = (chip->shadow.bytes[1] & ~mask) | (val & mask);
194 if (subaddr + 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
196 "Tried to access a non-existent register: %d\n",
201 val = (chip->shadow.bytes[subaddr+1] & ~mask) | (val & mask);
204 return chip_write(chip, subaddr, val);
207 static int chip_read(struct CHIPSTATE *chip)
209 unsigned char buffer;
211 if (1 != i2c_master_recv(chip->c,&buffer,1)) {
212 v4l_warn(chip->c, "%s: I/O error (read)\n",
216 v4l_dbg(1, debug, chip->c, "%s: chip_read: 0x%x\n",chip->c->name, buffer);
220 static int chip_read2(struct CHIPSTATE *chip, int subaddr)
222 unsigned char write[1];
223 unsigned char read[1];
224 struct i2c_msg msgs[2] = {
225 { chip->c->addr, 0, 1, write },
226 { chip->c->addr, I2C_M_RD, 1, read }
230 if (2 != i2c_transfer(chip->c->adapter,msgs,2)) {
231 v4l_warn(chip->c, "%s: I/O error (read2)\n", chip->c->name);
234 v4l_dbg(1, debug, chip->c, "%s: chip_read2: reg%d=0x%x\n",
235 chip->c->name, subaddr,read[0]);
239 static int chip_cmd(struct CHIPSTATE *chip, char *name, audiocmd *cmd)
246 if (cmd->count + cmd->bytes[0] - 1 >= ARRAY_SIZE(chip->shadow.bytes)) {
248 "Tried to access a non-existent register range: %d to %d\n",
249 cmd->bytes[0] + 1, cmd->bytes[0] + cmd->count - 1);
253 /* FIXME: it seems that the shadow bytes are wrong bellow !*/
255 /* update our shadow register set; print bytes if (debug > 0) */
256 v4l_dbg(1, debug, chip->c, "%s: chip_cmd(%s): reg=%d, data:",
257 chip->c->name, name,cmd->bytes[0]);
258 for (i = 1; i < cmd->count; i++) {
260 printk(" 0x%x",cmd->bytes[i]);
261 chip->shadow.bytes[i+cmd->bytes[0]] = cmd->bytes[i];
266 /* send data to the chip */
267 if (cmd->count != i2c_master_send(chip->c,cmd->bytes,cmd->count)) {
268 v4l_warn(chip->c, "%s: I/O error (%s)\n", chip->c->name, name);
274 /* ---------------------------------------------------------------------- */
275 /* kernel thread for doing i2c stuff asyncronly
276 * right now it is used only to check the audio mode (mono/stereo/whatever)
277 * some time after switching to another TV channel, then turn on stereo
281 static void chip_thread_wake(unsigned long data)
283 struct CHIPSTATE *chip = (struct CHIPSTATE*)data;
284 wake_up_process(chip->thread);
287 static int chip_thread(void *data)
289 struct CHIPSTATE *chip = data;
290 struct CHIPDESC *desc = chiplist + chip->type;
292 v4l_dbg(1, debug, chip->c, "%s: thread started\n", chip->c->name);
295 set_current_state(TASK_INTERRUPTIBLE);
296 if (!kthread_should_stop())
298 set_current_state(TASK_RUNNING);
300 if (kthread_should_stop())
302 v4l_dbg(1, debug, chip->c, "%s: thread wakeup\n", chip->c->name);
304 /* don't do anything for radio or if mode != auto */
305 if (chip->radio || chip->mode != 0)
308 /* have a look what's going on */
309 desc->checkmode(chip);
311 /* schedule next check */
312 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
315 v4l_dbg(1, debug, chip->c, "%s: thread exiting\n", chip->c->name);
319 static void generic_checkmode(struct CHIPSTATE *chip)
321 struct CHIPDESC *desc = chiplist + chip->type;
322 int mode = desc->getmode(chip);
324 if (mode == chip->prevmode)
327 v4l_dbg(1, debug, chip->c, "%s: thread checkmode\n", chip->c->name);
328 chip->prevmode = mode;
330 if (mode & V4L2_TUNER_MODE_STEREO)
331 desc->setmode(chip,V4L2_TUNER_MODE_STEREO);
332 if (mode & V4L2_TUNER_MODE_LANG1_LANG2)
333 desc->setmode(chip,V4L2_TUNER_MODE_STEREO);
334 else if (mode & V4L2_TUNER_MODE_LANG1)
335 desc->setmode(chip,V4L2_TUNER_MODE_LANG1);
336 else if (mode & V4L2_TUNER_MODE_LANG2)
337 desc->setmode(chip,V4L2_TUNER_MODE_LANG2);
339 desc->setmode(chip,V4L2_TUNER_MODE_MONO);
342 /* ---------------------------------------------------------------------- */
343 /* audio chip descriptions - defines+functions for tda9840 */
345 #define TDA9840_SW 0x00
346 #define TDA9840_LVADJ 0x02
347 #define TDA9840_STADJ 0x03
348 #define TDA9840_TEST 0x04
350 #define TDA9840_MONO 0x10
351 #define TDA9840_STEREO 0x2a
352 #define TDA9840_DUALA 0x12
353 #define TDA9840_DUALB 0x1e
354 #define TDA9840_DUALAB 0x1a
355 #define TDA9840_DUALBA 0x16
356 #define TDA9840_EXTERNAL 0x7a
358 #define TDA9840_DS_DUAL 0x20 /* Dual sound identified */
359 #define TDA9840_ST_STEREO 0x40 /* Stereo sound identified */
360 #define TDA9840_PONRES 0x80 /* Power-on reset detected if = 1 */
362 #define TDA9840_TEST_INT1SN 0x1 /* Integration time 0.5s when set */
363 #define TDA9840_TEST_INTFU 0x02 /* Disables integrator function */
365 static int tda9840_getmode(struct CHIPSTATE *chip)
369 val = chip_read(chip);
370 mode = V4L2_TUNER_MODE_MONO;
371 if (val & TDA9840_DS_DUAL)
372 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
373 if (val & TDA9840_ST_STEREO)
374 mode |= V4L2_TUNER_MODE_STEREO;
376 v4l_dbg(1, debug, chip->c, "tda9840_getmode(): raw chip read: %d, return: %d\n",
381 static void tda9840_setmode(struct CHIPSTATE *chip, int mode)
384 int t = chip->shadow.bytes[TDA9840_SW + 1] & ~0x7e;
387 case V4L2_TUNER_MODE_MONO:
390 case V4L2_TUNER_MODE_STEREO:
393 case V4L2_TUNER_MODE_LANG1:
396 case V4L2_TUNER_MODE_LANG2:
404 chip_write(chip, TDA9840_SW, t);
407 static int tda9840_checkit(struct CHIPSTATE *chip)
410 rc = chip_read(chip);
411 /* lower 5 bits should be 0 */
412 return ((rc & 0x1f) == 0) ? 1 : 0;
415 /* ---------------------------------------------------------------------- */
416 /* audio chip descriptions - defines+functions for tda985x */
418 /* subaddresses for TDA9855 */
419 #define TDA9855_VR 0x00 /* Volume, right */
420 #define TDA9855_VL 0x01 /* Volume, left */
421 #define TDA9855_BA 0x02 /* Bass */
422 #define TDA9855_TR 0x03 /* Treble */
423 #define TDA9855_SW 0x04 /* Subwoofer - not connected on DTV2000 */
425 /* subaddresses for TDA9850 */
426 #define TDA9850_C4 0x04 /* Control 1 for TDA9850 */
428 /* subaddesses for both chips */
429 #define TDA985x_C5 0x05 /* Control 2 for TDA9850, Control 1 for TDA9855 */
430 #define TDA985x_C6 0x06 /* Control 3 for TDA9850, Control 2 for TDA9855 */
431 #define TDA985x_C7 0x07 /* Control 4 for TDA9850, Control 3 for TDA9855 */
432 #define TDA985x_A1 0x08 /* Alignment 1 for both chips */
433 #define TDA985x_A2 0x09 /* Alignment 2 for both chips */
434 #define TDA985x_A3 0x0a /* Alignment 3 for both chips */
436 /* Masks for bits in TDA9855 subaddresses */
437 /* 0x00 - VR in TDA9855 */
438 /* 0x01 - VL in TDA9855 */
439 /* lower 7 bits control gain from -71dB (0x28) to 16dB (0x7f)
440 * in 1dB steps - mute is 0x27 */
443 /* 0x02 - BA in TDA9855 */
444 /* lower 5 bits control bass gain from -12dB (0x06) to 16.5dB (0x19)
445 * in .5dB steps - 0 is 0x0E */
448 /* 0x03 - TR in TDA9855 */
449 /* 4 bits << 1 control treble gain from -12dB (0x3) to 12dB (0xb)
450 * in 3dB steps - 0 is 0x7 */
452 /* Masks for bits in both chips' subaddresses */
453 /* 0x04 - SW in TDA9855, C4/Control 1 in TDA9850 */
454 /* Unique to TDA9855: */
455 /* 4 bits << 2 control subwoofer/surround gain from -14db (0x1) to 14db (0xf)
456 * in 3dB steps - mute is 0x0 */
458 /* Unique to TDA9850: */
459 /* lower 4 bits control stereo noise threshold, over which stereo turns off
460 * set to values of 0x00 through 0x0f for Ster1 through Ster16 */
463 /* 0x05 - C5 - Control 1 in TDA9855 , Control 2 in TDA9850*/
464 /* Unique to TDA9855: */
465 #define TDA9855_MUTE 1<<7 /* GMU, Mute at outputs */
466 #define TDA9855_AVL 1<<6 /* AVL, Automatic Volume Level */
467 #define TDA9855_LOUD 1<<5 /* Loudness, 1==off */
468 #define TDA9855_SUR 1<<3 /* Surround / Subwoofer 1==.5(L-R) 0==.5(L+R) */
469 /* Bits 0 to 3 select various combinations
470 * of line in and line out, only the
471 * interesting ones are defined */
472 #define TDA9855_EXT 1<<2 /* Selects inputs LIR and LIL. Pins 41 & 12 */
473 #define TDA9855_INT 0 /* Selects inputs LOR and LOL. (internal) */
475 /* Unique to TDA9850: */
476 /* lower 4 bits contol SAP noise threshold, over which SAP turns off
477 * set to values of 0x00 through 0x0f for SAP1 through SAP16 */
480 /* 0x06 - C6 - Control 2 in TDA9855, Control 3 in TDA9850 */
481 /* Common to TDA9855 and TDA9850: */
482 #define TDA985x_SAP 3<<6 /* Selects SAP output, mute if not received */
483 #define TDA985x_STEREO 1<<6 /* Selects Stereo ouput, mono if not received */
484 #define TDA985x_MONO 0 /* Forces Mono output */
485 #define TDA985x_LMU 1<<3 /* Mute (LOR/LOL for 9855, OUTL/OUTR for 9850) */
487 /* Unique to TDA9855: */
488 #define TDA9855_TZCM 1<<5 /* If set, don't mute till zero crossing */
489 #define TDA9855_VZCM 1<<4 /* If set, don't change volume till zero crossing*/
490 #define TDA9855_LINEAR 0 /* Linear Stereo */
491 #define TDA9855_PSEUDO 1 /* Pseudo Stereo */
492 #define TDA9855_SPAT_30 2 /* Spatial Stereo, 30% anti-phase crosstalk */
493 #define TDA9855_SPAT_50 3 /* Spatial Stereo, 52% anti-phase crosstalk */
494 #define TDA9855_E_MONO 7 /* Forced mono - mono select elseware, so useless*/
496 /* 0x07 - C7 - Control 3 in TDA9855, Control 4 in TDA9850 */
497 /* Common to both TDA9855 and TDA9850: */
498 /* lower 4 bits control input gain from -3.5dB (0x0) to 4dB (0xF)
499 * in .5dB steps - 0dB is 0x7 */
501 /* 0x08, 0x09 - A1 and A2 (read/write) */
502 /* Common to both TDA9855 and TDA9850: */
503 /* lower 5 bites are wideband and spectral expander alignment
504 * from 0x00 to 0x1f - nominal at 0x0f and 0x10 (read/write) */
505 #define TDA985x_STP 1<<5 /* Stereo Pilot/detect (read-only) */
506 #define TDA985x_SAPP 1<<6 /* SAP Pilot/detect (read-only) */
507 #define TDA985x_STS 1<<7 /* Stereo trigger 1= <35mV 0= <30mV (write-only)*/
510 /* Common to both TDA9855 and TDA9850: */
511 /* lower 3 bits control timing current for alignment: -30% (0x0), -20% (0x1),
512 * -10% (0x2), nominal (0x3), +10% (0x6), +20% (0x5), +30% (0x4) */
513 #define TDA985x_ADJ 1<<7 /* Stereo adjust on/off (wideband and spectral */
515 static int tda9855_volume(int val) { return val/0x2e8+0x27; }
516 static int tda9855_bass(int val) { return val/0xccc+0x06; }
517 static int tda9855_treble(int val) { return (val/0x1c71+0x3)<<1; }
519 static int tda985x_getmode(struct CHIPSTATE *chip)
523 mode = ((TDA985x_STP | TDA985x_SAPP) &
524 chip_read(chip)) >> 4;
525 /* Add mono mode regardless of SAP and stereo */
526 /* Allows forced mono */
527 return mode | V4L2_TUNER_MODE_MONO;
530 static void tda985x_setmode(struct CHIPSTATE *chip, int mode)
533 int c6 = chip->shadow.bytes[TDA985x_C6+1] & 0x3f;
536 case V4L2_TUNER_MODE_MONO:
539 case V4L2_TUNER_MODE_STEREO:
540 c6 |= TDA985x_STEREO;
542 case V4L2_TUNER_MODE_LANG1:
549 chip_write(chip,TDA985x_C6,c6);
553 /* ---------------------------------------------------------------------- */
554 /* audio chip descriptions - defines+functions for tda9873h */
556 /* Subaddresses for TDA9873H */
558 #define TDA9873_SW 0x00 /* Switching */
559 #define TDA9873_AD 0x01 /* Adjust */
560 #define TDA9873_PT 0x02 /* Port */
562 /* Subaddress 0x00: Switching Data
565 * B1, B0: Input source selection
567 * 1, 0 external stereo
570 #define TDA9873_INP_MASK 3
571 #define TDA9873_INTERNAL 0
572 #define TDA9873_EXT_STEREO 2
573 #define TDA9873_EXT_MONO 1
575 /* B3, B2: output signal select
576 * B4 : transmission mode
579 * 1, 1, 1 Stereo (reversed channel)
586 #define TDA9873_TR_MASK (7 << 2)
587 #define TDA9873_TR_MONO 4
588 #define TDA9873_TR_STEREO 1 << 4
589 #define TDA9873_TR_REVERSE (1 << 3) & (1 << 2)
590 #define TDA9873_TR_DUALA 1 << 2
591 #define TDA9873_TR_DUALB 1 << 3
593 /* output level controls
594 * B5: output level switch (0 = reduced gain, 1 = normal gain)
595 * B6: mute (1 = muted)
596 * B7: auto-mute (1 = auto-mute enabled)
599 #define TDA9873_GAIN_NORMAL 1 << 5
600 #define TDA9873_MUTE 1 << 6
601 #define TDA9873_AUTOMUTE 1 << 7
603 /* Subaddress 0x01: Adjust/standard */
605 /* Lower 4 bits (C3..C0) control stereo adjustment on R channel (-0.6 - +0.7 dB)
606 * Recommended value is +0 dB
609 #define TDA9873_STEREO_ADJ 0x06 /* 0dB gain */
611 /* Bits C6..C4 control FM stantard
613 * 0, 0, 0 B/G (PAL FM)
622 #define TDA9873_DK1 2
623 #define TDA9873_DK2 3
624 #define TDA9873_DK3 4
627 /* C7 controls identification response time (1=fast/0=normal)
629 #define TDA9873_IDR_NORM 0
630 #define TDA9873_IDR_FAST 1 << 7
633 /* Subaddress 0x02: Port data */
635 /* E1, E0 free programmable ports P1/P2
642 #define TDA9873_PORTS 3
645 #define TDA9873_TST_PORT 1 << 2
647 /* E5..E3 control mono output channel (together with transmission mode bit B4)
652 * 0 1 0 1 mono (from stereo decoder)
654 #define TDA9873_MOUT_MONO 0
655 #define TDA9873_MOUT_FMONO 0
656 #define TDA9873_MOUT_DUALA 0
657 #define TDA9873_MOUT_DUALB 1 << 3
658 #define TDA9873_MOUT_ST 1 << 4
659 #define TDA9873_MOUT_EXTM (1 << 4 ) & (1 << 3)
660 #define TDA9873_MOUT_EXTL 1 << 5
661 #define TDA9873_MOUT_EXTR (1 << 5 ) & (1 << 3)
662 #define TDA9873_MOUT_EXTLR (1 << 5 ) & (1 << 4)
663 #define TDA9873_MOUT_MUTE (1 << 5 ) & (1 << 4) & (1 << 3)
665 /* Status bits: (chip read) */
666 #define TDA9873_PONR 0 /* Power-on reset detected if = 1 */
667 #define TDA9873_STEREO 2 /* Stereo sound is identified */
668 #define TDA9873_DUAL 4 /* Dual sound is identified */
670 static int tda9873_getmode(struct CHIPSTATE *chip)
674 val = chip_read(chip);
675 mode = V4L2_TUNER_MODE_MONO;
676 if (val & TDA9873_STEREO)
677 mode |= V4L2_TUNER_MODE_STEREO;
678 if (val & TDA9873_DUAL)
679 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
680 v4l_dbg(1, debug, chip->c, "tda9873_getmode(): raw chip read: %d, return: %d\n",
685 static void tda9873_setmode(struct CHIPSTATE *chip, int mode)
687 int sw_data = chip->shadow.bytes[TDA9873_SW+1] & ~ TDA9873_TR_MASK;
688 /* int adj_data = chip->shadow.bytes[TDA9873_AD+1] ; */
690 if ((sw_data & TDA9873_INP_MASK) != TDA9873_INTERNAL) {
691 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): external input\n");
695 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): chip->shadow.bytes[%d] = %d\n", TDA9873_SW+1, chip->shadow.bytes[TDA9873_SW+1]);
696 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): sw_data = %d\n", sw_data);
699 case V4L2_TUNER_MODE_MONO:
700 sw_data |= TDA9873_TR_MONO;
702 case V4L2_TUNER_MODE_STEREO:
703 sw_data |= TDA9873_TR_STEREO;
705 case V4L2_TUNER_MODE_LANG1:
706 sw_data |= TDA9873_TR_DUALA;
708 case V4L2_TUNER_MODE_LANG2:
709 sw_data |= TDA9873_TR_DUALB;
716 chip_write(chip, TDA9873_SW, sw_data);
717 v4l_dbg(1, debug, chip->c, "tda9873_setmode(): req. mode %d; chip_write: %d\n",
721 static int tda9873_checkit(struct CHIPSTATE *chip)
725 if (-1 == (rc = chip_read2(chip,254)))
727 return (rc & ~0x1f) == 0x80;
731 /* ---------------------------------------------------------------------- */
732 /* audio chip description - defines+functions for tda9874h and tda9874a */
733 /* Dariusz Kowalewski <darekk@automex.pl> */
735 /* Subaddresses for TDA9874H and TDA9874A (slave rx) */
736 #define TDA9874A_AGCGR 0x00 /* AGC gain */
737 #define TDA9874A_GCONR 0x01 /* general config */
738 #define TDA9874A_MSR 0x02 /* monitor select */
739 #define TDA9874A_C1FRA 0x03 /* carrier 1 freq. */
740 #define TDA9874A_C1FRB 0x04 /* carrier 1 freq. */
741 #define TDA9874A_C1FRC 0x05 /* carrier 1 freq. */
742 #define TDA9874A_C2FRA 0x06 /* carrier 2 freq. */
743 #define TDA9874A_C2FRB 0x07 /* carrier 2 freq. */
744 #define TDA9874A_C2FRC 0x08 /* carrier 2 freq. */
745 #define TDA9874A_DCR 0x09 /* demodulator config */
746 #define TDA9874A_FMER 0x0a /* FM de-emphasis */
747 #define TDA9874A_FMMR 0x0b /* FM dematrix */
748 #define TDA9874A_C1OLAR 0x0c /* ch.1 output level adj. */
749 #define TDA9874A_C2OLAR 0x0d /* ch.2 output level adj. */
750 #define TDA9874A_NCONR 0x0e /* NICAM config */
751 #define TDA9874A_NOLAR 0x0f /* NICAM output level adj. */
752 #define TDA9874A_NLELR 0x10 /* NICAM lower error limit */
753 #define TDA9874A_NUELR 0x11 /* NICAM upper error limit */
754 #define TDA9874A_AMCONR 0x12 /* audio mute control */
755 #define TDA9874A_SDACOSR 0x13 /* stereo DAC output select */
756 #define TDA9874A_AOSR 0x14 /* analog output select */
757 #define TDA9874A_DAICONR 0x15 /* digital audio interface config */
758 #define TDA9874A_I2SOSR 0x16 /* I2S-bus output select */
759 #define TDA9874A_I2SOLAR 0x17 /* I2S-bus output level adj. */
760 #define TDA9874A_MDACOSR 0x18 /* mono DAC output select (tda9874a) */
761 #define TDA9874A_ESP 0xFF /* easy standard progr. (tda9874a) */
763 /* Subaddresses for TDA9874H and TDA9874A (slave tx) */
764 #define TDA9874A_DSR 0x00 /* device status */
765 #define TDA9874A_NSR 0x01 /* NICAM status */
766 #define TDA9874A_NECR 0x02 /* NICAM error count */
767 #define TDA9874A_DR1 0x03 /* add. data LSB */
768 #define TDA9874A_DR2 0x04 /* add. data MSB */
769 #define TDA9874A_LLRA 0x05 /* monitor level read-out LSB */
770 #define TDA9874A_LLRB 0x06 /* monitor level read-out MSB */
771 #define TDA9874A_SIFLR 0x07 /* SIF level */
772 #define TDA9874A_TR2 252 /* test reg. 2 */
773 #define TDA9874A_TR1 253 /* test reg. 1 */
774 #define TDA9874A_DIC 254 /* device id. code */
775 #define TDA9874A_SIC 255 /* software id. code */
778 static int tda9874a_mode = 1; /* 0: A2, 1: NICAM */
779 static int tda9874a_GCONR = 0xc0; /* default config. input pin: SIFSEL=0 */
780 static int tda9874a_NCONR = 0x01; /* default NICAM config.: AMSEL=0,AMUTE=1 */
781 static int tda9874a_ESP = 0x07; /* default standard: NICAM D/K */
782 static int tda9874a_dic = -1; /* device id. code */
784 /* insmod options for tda9874a */
785 static unsigned int tda9874a_SIF = UNSET;
786 static unsigned int tda9874a_AMSEL = UNSET;
787 static unsigned int tda9874a_STD = UNSET;
788 module_param(tda9874a_SIF, int, 0444);
789 module_param(tda9874a_AMSEL, int, 0444);
790 module_param(tda9874a_STD, int, 0444);
793 * initialization table for tda9874 decoder:
794 * - carrier 1 freq. registers (3 bytes)
795 * - carrier 2 freq. registers (3 bytes)
796 * - demudulator config register
797 * - FM de-emphasis register (slow identification mode)
798 * Note: frequency registers must be written in single i2c transfer.
800 static struct tda9874a_MODES {
803 } tda9874a_modelist[9] = {
805 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x77,0xA0,0x00, 0x00,0x00 }} },
807 { 9, { TDA9874A_C1FRA, 0x5D,0xC0,0x00, 0x62,0x6A,0xAA, 0x20,0x22 }} },
809 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x82,0x60,0x00, 0x00,0x00 }} },
811 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x8C,0x75,0x55, 0x00,0x00 }} },
813 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x77,0xA0,0x00, 0x00,0x00 }} },
815 { 9, { TDA9874A_C1FRA, 0x7D,0x00,0x00, 0x88,0x8A,0xAA, 0x08,0x33 }} },
817 { 9, { TDA9874A_C1FRA, 0x72,0x95,0x55, 0x79,0xEA,0xAA, 0x08,0x33 }} },
818 { "NICAM, D/K", /* default */
819 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x08,0x33 }} },
821 { 9, { TDA9874A_C1FRA, 0x87,0x6A,0xAA, 0x79,0xEA,0xAA, 0x09,0x33 }} }
824 static int tda9874a_setup(struct CHIPSTATE *chip)
826 chip_write(chip, TDA9874A_AGCGR, 0x00); /* 0 dB */
827 chip_write(chip, TDA9874A_GCONR, tda9874a_GCONR);
828 chip_write(chip, TDA9874A_MSR, (tda9874a_mode) ? 0x03:0x02);
829 if(tda9874a_dic == 0x11) {
830 chip_write(chip, TDA9874A_FMMR, 0x80);
831 } else { /* dic == 0x07 */
832 chip_cmd(chip,"tda9874_modelist",&tda9874a_modelist[tda9874a_STD].cmd);
833 chip_write(chip, TDA9874A_FMMR, 0x00);
835 chip_write(chip, TDA9874A_C1OLAR, 0x00); /* 0 dB */
836 chip_write(chip, TDA9874A_C2OLAR, 0x00); /* 0 dB */
837 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
838 chip_write(chip, TDA9874A_NOLAR, 0x00); /* 0 dB */
839 /* Note: If signal quality is poor you may want to change NICAM */
840 /* error limit registers (NLELR and NUELR) to some greater values. */
841 /* Then the sound would remain stereo, but won't be so clear. */
842 chip_write(chip, TDA9874A_NLELR, 0x14); /* default */
843 chip_write(chip, TDA9874A_NUELR, 0x50); /* default */
845 if(tda9874a_dic == 0x11) {
846 chip_write(chip, TDA9874A_AMCONR, 0xf9);
847 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
848 chip_write(chip, TDA9874A_AOSR, 0x80);
849 chip_write(chip, TDA9874A_MDACOSR, (tda9874a_mode) ? 0x82:0x80);
850 chip_write(chip, TDA9874A_ESP, tda9874a_ESP);
851 } else { /* dic == 0x07 */
852 chip_write(chip, TDA9874A_AMCONR, 0xfb);
853 chip_write(chip, TDA9874A_SDACOSR, (tda9874a_mode) ? 0x81:0x80);
854 chip_write(chip, TDA9874A_AOSR, 0x00); /* or 0x10 */
856 v4l_dbg(1, debug, chip->c, "tda9874a_setup(): %s [0x%02X].\n",
857 tda9874a_modelist[tda9874a_STD].name,tda9874a_STD);
861 static int tda9874a_getmode(struct CHIPSTATE *chip)
864 int necr; /* just for debugging */
866 mode = V4L2_TUNER_MODE_MONO;
868 if(-1 == (dsr = chip_read2(chip,TDA9874A_DSR)))
870 if(-1 == (nsr = chip_read2(chip,TDA9874A_NSR)))
872 if(-1 == (necr = chip_read2(chip,TDA9874A_NECR)))
875 /* need to store dsr/nsr somewhere */
876 chip->shadow.bytes[MAXREGS-2] = dsr;
877 chip->shadow.bytes[MAXREGS-1] = nsr;
880 /* Note: DSR.RSSF and DSR.AMSTAT bits are also checked.
881 * If NICAM auto-muting is enabled, DSR.AMSTAT=1 indicates
882 * that sound has (temporarily) switched from NICAM to
883 * mono FM (or AM) on 1st sound carrier due to high NICAM bit
884 * error count. So in fact there is no stereo in this case :-(
885 * But changing the mode to V4L2_TUNER_MODE_MONO would switch
886 * external 4052 multiplexer in audio_hook().
888 if(nsr & 0x02) /* NSR.S/MB=1 */
889 mode |= V4L2_TUNER_MODE_STEREO;
890 if(nsr & 0x01) /* NSR.D/SB=1 */
891 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
893 if(dsr & 0x02) /* DSR.IDSTE=1 */
894 mode |= V4L2_TUNER_MODE_STEREO;
895 if(dsr & 0x04) /* DSR.IDDUA=1 */
896 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
899 v4l_dbg(1, debug, chip->c, "tda9874a_getmode(): DSR=0x%X, NSR=0x%X, NECR=0x%X, return: %d.\n",
900 dsr, nsr, necr, mode);
904 static void tda9874a_setmode(struct CHIPSTATE *chip, int mode)
906 /* Disable/enable NICAM auto-muting (based on DSR.RSSF status bit). */
907 /* If auto-muting is disabled, we can hear a signal of degrading quality. */
909 if(chip->shadow.bytes[MAXREGS-2] & 0x20) /* DSR.RSSF=1 */
910 tda9874a_NCONR &= 0xfe; /* enable */
912 tda9874a_NCONR |= 0x01; /* disable */
913 chip_write(chip, TDA9874A_NCONR, tda9874a_NCONR);
916 /* Note: TDA9874A supports automatic FM dematrixing (FMMR register)
917 * and has auto-select function for audio output (AOSR register).
918 * Old TDA9874H doesn't support these features.
919 * TDA9874A also has additional mono output pin (OUTM), which
920 * on same (all?) tv-cards is not used, anyway (as well as MONOIN).
922 if(tda9874a_dic == 0x11) {
924 int mdacosr = (tda9874a_mode) ? 0x82:0x80;
927 case V4L2_TUNER_MODE_MONO:
928 case V4L2_TUNER_MODE_STEREO:
930 case V4L2_TUNER_MODE_LANG1:
931 aosr = 0x80; /* auto-select, dual A/A */
932 mdacosr = (tda9874a_mode) ? 0x82:0x80;
934 case V4L2_TUNER_MODE_LANG2:
935 aosr = 0xa0; /* auto-select, dual B/B */
936 mdacosr = (tda9874a_mode) ? 0x83:0x81;
942 chip_write(chip, TDA9874A_AOSR, aosr);
943 chip_write(chip, TDA9874A_MDACOSR, mdacosr);
945 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; AOSR=0x%X, MDACOSR=0x%X.\n",
946 mode, aosr, mdacosr);
948 } else { /* dic == 0x07 */
952 case V4L2_TUNER_MODE_MONO:
953 fmmr = 0x00; /* mono */
954 aosr = 0x10; /* A/A */
956 case V4L2_TUNER_MODE_STEREO:
959 aosr = 0x00; /* handled by NICAM auto-mute */
961 fmmr = (tda9874a_ESP == 1) ? 0x05 : 0x04; /* stereo */
965 case V4L2_TUNER_MODE_LANG1:
966 fmmr = 0x02; /* dual */
967 aosr = 0x10; /* dual A/A */
969 case V4L2_TUNER_MODE_LANG2:
970 fmmr = 0x02; /* dual */
971 aosr = 0x20; /* dual B/B */
977 chip_write(chip, TDA9874A_FMMR, fmmr);
978 chip_write(chip, TDA9874A_AOSR, aosr);
980 v4l_dbg(1, debug, chip->c, "tda9874a_setmode(): req. mode %d; FMMR=0x%X, AOSR=0x%X.\n",
985 static int tda9874a_checkit(struct CHIPSTATE *chip)
987 int dic,sic; /* device id. and software id. codes */
989 if(-1 == (dic = chip_read2(chip,TDA9874A_DIC)))
991 if(-1 == (sic = chip_read2(chip,TDA9874A_SIC)))
994 v4l_dbg(1, debug, chip->c, "tda9874a_checkit(): DIC=0x%X, SIC=0x%X.\n", dic, sic);
996 if((dic == 0x11)||(dic == 0x07)) {
997 v4l_info(chip->c, "found tda9874%s.\n", (dic == 0x11) ? "a":"h");
998 tda9874a_dic = dic; /* remember device id. */
1001 return 0; /* not found */
1004 static int tda9874a_initialize(struct CHIPSTATE *chip)
1006 if (tda9874a_SIF > 2)
1008 if (tda9874a_STD > 8)
1010 if(tda9874a_AMSEL > 1)
1013 if(tda9874a_SIF == 1)
1014 tda9874a_GCONR = 0xc0; /* sound IF input 1 */
1016 tda9874a_GCONR = 0xc1; /* sound IF input 2 */
1018 tda9874a_ESP = tda9874a_STD;
1019 tda9874a_mode = (tda9874a_STD < 5) ? 0 : 1;
1021 if(tda9874a_AMSEL == 0)
1022 tda9874a_NCONR = 0x01; /* auto-mute: analog mono input */
1024 tda9874a_NCONR = 0x05; /* auto-mute: 1st carrier FM or AM */
1026 tda9874a_setup(chip);
1031 /* ---------------------------------------------------------------------- */
1032 /* audio chip descriptions - defines+functions for tea6420 */
1034 #define TEA6300_VL 0x00 /* volume left */
1035 #define TEA6300_VR 0x01 /* volume right */
1036 #define TEA6300_BA 0x02 /* bass */
1037 #define TEA6300_TR 0x03 /* treble */
1038 #define TEA6300_FA 0x04 /* fader control */
1039 #define TEA6300_S 0x05 /* switch register */
1040 /* values for those registers: */
1041 #define TEA6300_S_SA 0x01 /* stereo A input */
1042 #define TEA6300_S_SB 0x02 /* stereo B */
1043 #define TEA6300_S_SC 0x04 /* stereo C */
1044 #define TEA6300_S_GMU 0x80 /* general mute */
1046 #define TEA6320_V 0x00 /* volume (0-5)/loudness off (6)/zero crossing mute(7) */
1047 #define TEA6320_FFR 0x01 /* fader front right (0-5) */
1048 #define TEA6320_FFL 0x02 /* fader front left (0-5) */
1049 #define TEA6320_FRR 0x03 /* fader rear right (0-5) */
1050 #define TEA6320_FRL 0x04 /* fader rear left (0-5) */
1051 #define TEA6320_BA 0x05 /* bass (0-4) */
1052 #define TEA6320_TR 0x06 /* treble (0-4) */
1053 #define TEA6320_S 0x07 /* switch register */
1054 /* values for those registers: */
1055 #define TEA6320_S_SA 0x07 /* stereo A input */
1056 #define TEA6320_S_SB 0x06 /* stereo B */
1057 #define TEA6320_S_SC 0x05 /* stereo C */
1058 #define TEA6320_S_SD 0x04 /* stereo D */
1059 #define TEA6320_S_GMU 0x80 /* general mute */
1061 #define TEA6420_S_SA 0x00 /* stereo A input */
1062 #define TEA6420_S_SB 0x01 /* stereo B */
1063 #define TEA6420_S_SC 0x02 /* stereo C */
1064 #define TEA6420_S_SD 0x03 /* stereo D */
1065 #define TEA6420_S_SE 0x04 /* stereo E */
1066 #define TEA6420_S_GMU 0x05 /* general mute */
1068 static int tea6300_shift10(int val) { return val >> 10; }
1069 static int tea6300_shift12(int val) { return val >> 12; }
1071 /* Assumes 16bit input (values 0x3f to 0x0c are unique, values less than */
1072 /* 0x0c mirror those immediately higher) */
1073 static int tea6320_volume(int val) { return (val / (65535/(63-12)) + 12) & 0x3f; }
1074 static int tea6320_shift11(int val) { return val >> 11; }
1075 static int tea6320_initialize(struct CHIPSTATE * chip)
1077 chip_write(chip, TEA6320_FFR, 0x3f);
1078 chip_write(chip, TEA6320_FFL, 0x3f);
1079 chip_write(chip, TEA6320_FRR, 0x3f);
1080 chip_write(chip, TEA6320_FRL, 0x3f);
1086 /* ---------------------------------------------------------------------- */
1087 /* audio chip descriptions - defines+functions for tda8425 */
1089 #define TDA8425_VL 0x00 /* volume left */
1090 #define TDA8425_VR 0x01 /* volume right */
1091 #define TDA8425_BA 0x02 /* bass */
1092 #define TDA8425_TR 0x03 /* treble */
1093 #define TDA8425_S1 0x08 /* switch functions */
1094 /* values for those registers: */
1095 #define TDA8425_S1_OFF 0xEE /* audio off (mute on) */
1096 #define TDA8425_S1_CH1 0xCE /* audio channel 1 (mute off) - "linear stereo" mode */
1097 #define TDA8425_S1_CH2 0xCF /* audio channel 2 (mute off) - "linear stereo" mode */
1098 #define TDA8425_S1_MU 0x20 /* mute bit */
1099 #define TDA8425_S1_STEREO 0x18 /* stereo bits */
1100 #define TDA8425_S1_STEREO_SPATIAL 0x18 /* spatial stereo */
1101 #define TDA8425_S1_STEREO_LINEAR 0x08 /* linear stereo */
1102 #define TDA8425_S1_STEREO_PSEUDO 0x10 /* pseudo stereo */
1103 #define TDA8425_S1_STEREO_MONO 0x00 /* forced mono */
1104 #define TDA8425_S1_ML 0x06 /* language selector */
1105 #define TDA8425_S1_ML_SOUND_A 0x02 /* sound a */
1106 #define TDA8425_S1_ML_SOUND_B 0x04 /* sound b */
1107 #define TDA8425_S1_ML_STEREO 0x06 /* stereo */
1108 #define TDA8425_S1_IS 0x01 /* channel selector */
1111 static int tda8425_shift10(int val) { return (val >> 10) | 0xc0; }
1112 static int tda8425_shift12(int val) { return (val >> 12) | 0xf0; }
1114 static int tda8425_initialize(struct CHIPSTATE *chip)
1116 struct CHIPDESC *desc = chiplist + chip->type;
1117 int inputmap[4] = { /* tuner */ TDA8425_S1_CH2, /* radio */ TDA8425_S1_CH1,
1118 /* extern */ TDA8425_S1_CH1, /* intern */ TDA8425_S1_OFF};
1120 if (chip->c->adapter->id == I2C_HW_B_RIVA) {
1121 memcpy (desc->inputmap, inputmap, sizeof (inputmap));
1126 static void tda8425_setmode(struct CHIPSTATE *chip, int mode)
1128 int s1 = chip->shadow.bytes[TDA8425_S1+1] & 0xe1;
1130 if (mode & V4L2_TUNER_MODE_LANG1) {
1131 s1 |= TDA8425_S1_ML_SOUND_A;
1132 s1 |= TDA8425_S1_STEREO_PSEUDO;
1134 } else if (mode & V4L2_TUNER_MODE_LANG2) {
1135 s1 |= TDA8425_S1_ML_SOUND_B;
1136 s1 |= TDA8425_S1_STEREO_PSEUDO;
1139 s1 |= TDA8425_S1_ML_STEREO;
1141 if (mode & V4L2_TUNER_MODE_MONO)
1142 s1 |= TDA8425_S1_STEREO_MONO;
1143 if (mode & V4L2_TUNER_MODE_STEREO)
1144 s1 |= TDA8425_S1_STEREO_SPATIAL;
1146 chip_write(chip,TDA8425_S1,s1);
1150 /* ---------------------------------------------------------------------- */
1151 /* audio chip descriptions - defines+functions for pic16c54 (PV951) */
1153 /* the registers of 16C54, I2C sub address. */
1154 #define PIC16C54_REG_KEY_CODE 0x01 /* Not use. */
1155 #define PIC16C54_REG_MISC 0x02
1157 /* bit definition of the RESET register, I2C data. */
1158 #define PIC16C54_MISC_RESET_REMOTE_CTL 0x01 /* bit 0, Reset to receive the key */
1159 /* code of remote controller */
1160 #define PIC16C54_MISC_MTS_MAIN 0x02 /* bit 1 */
1161 #define PIC16C54_MISC_MTS_SAP 0x04 /* bit 2 */
1162 #define PIC16C54_MISC_MTS_BOTH 0x08 /* bit 3 */
1163 #define PIC16C54_MISC_SND_MUTE 0x10 /* bit 4, Mute Audio(Line-in and Tuner) */
1164 #define PIC16C54_MISC_SND_NOTMUTE 0x20 /* bit 5 */
1165 #define PIC16C54_MISC_SWITCH_TUNER 0x40 /* bit 6 , Switch to Line-in */
1166 #define PIC16C54_MISC_SWITCH_LINE 0x80 /* bit 7 , Switch to Tuner */
1168 /* ---------------------------------------------------------------------- */
1169 /* audio chip descriptions - defines+functions for TA8874Z */
1171 /* write 1st byte */
1172 #define TA8874Z_LED_STE 0x80
1173 #define TA8874Z_LED_BIL 0x40
1174 #define TA8874Z_LED_EXT 0x20
1175 #define TA8874Z_MONO_SET 0x10
1176 #define TA8874Z_MUTE 0x08
1177 #define TA8874Z_F_MONO 0x04
1178 #define TA8874Z_MODE_SUB 0x02
1179 #define TA8874Z_MODE_MAIN 0x01
1181 /* write 2nd byte */
1182 /*#define TA8874Z_TI 0x80 */ /* test mode */
1183 #define TA8874Z_SEPARATION 0x3f
1184 #define TA8874Z_SEPARATION_DEFAULT 0x10
1187 #define TA8874Z_B1 0x80
1188 #define TA8874Z_B0 0x40
1189 #define TA8874Z_CHAG_FLAG 0x20
1197 static int ta8874z_getmode(struct CHIPSTATE *chip)
1201 val = chip_read(chip);
1202 mode = V4L2_TUNER_MODE_MONO;
1203 if (val & TA8874Z_B1){
1204 mode |= V4L2_TUNER_MODE_LANG1 | V4L2_TUNER_MODE_LANG2;
1205 }else if (!(val & TA8874Z_B0)){
1206 mode |= V4L2_TUNER_MODE_STEREO;
1208 /* v4l_dbg(1, debug, chip->c, "ta8874z_getmode(): raw chip read: 0x%02x, return: 0x%02x\n", val, mode); */
1212 static audiocmd ta8874z_stereo = { 2, {0, TA8874Z_SEPARATION_DEFAULT}};
1213 static audiocmd ta8874z_mono = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}};
1214 static audiocmd ta8874z_main = {2, { 0, TA8874Z_SEPARATION_DEFAULT}};
1215 static audiocmd ta8874z_sub = {2, { TA8874Z_MODE_SUB, TA8874Z_SEPARATION_DEFAULT}};
1217 static void ta8874z_setmode(struct CHIPSTATE *chip, int mode)
1221 v4l_dbg(1, debug, chip->c, "ta8874z_setmode(): mode: 0x%02x\n", mode);
1224 case V4L2_TUNER_MODE_MONO:
1227 case V4L2_TUNER_MODE_STEREO:
1228 t = &ta8874z_stereo;
1230 case V4L2_TUNER_MODE_LANG1:
1233 case V4L2_TUNER_MODE_LANG2:
1241 chip_cmd(chip, "TA8874Z", t);
1244 static int ta8874z_checkit(struct CHIPSTATE *chip)
1247 rc = chip_read(chip);
1248 return ((rc & 0x1f) == 0x1f) ? 1 : 0;
1251 /* ---------------------------------------------------------------------- */
1252 /* audio chip descriptions - struct CHIPDESC */
1254 /* insmod options to enable/disable individual audio chips */
1255 static int tda8425 = 1;
1256 static int tda9840 = 1;
1257 static int tda9850 = 1;
1258 static int tda9855 = 1;
1259 static int tda9873 = 1;
1260 static int tda9874a = 1;
1261 static int tea6300; /* default 0 - address clash with msp34xx */
1262 static int tea6320; /* default 0 - address clash with msp34xx */
1263 static int tea6420 = 1;
1264 static int pic16c54 = 1;
1265 static int ta8874z; /* default 0 - address clash with tda9840 */
1267 module_param(tda8425, int, 0444);
1268 module_param(tda9840, int, 0444);
1269 module_param(tda9850, int, 0444);
1270 module_param(tda9855, int, 0444);
1271 module_param(tda9873, int, 0444);
1272 module_param(tda9874a, int, 0444);
1273 module_param(tea6300, int, 0444);
1274 module_param(tea6320, int, 0444);
1275 module_param(tea6420, int, 0444);
1276 module_param(pic16c54, int, 0444);
1277 module_param(ta8874z, int, 0444);
1279 static struct CHIPDESC chiplist[] = {
1282 .insmodopt = &tda9840,
1283 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1284 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1287 .checkit = tda9840_checkit,
1288 .getmode = tda9840_getmode,
1289 .setmode = tda9840_setmode,
1290 .checkmode = generic_checkmode,
1292 .init = { 2, { TDA9840_TEST, TDA9840_TEST_INT1SN
1293 /* ,TDA9840_SW, TDA9840_MONO */} }
1297 .checkit = tda9873_checkit,
1298 .insmodopt = &tda9873,
1299 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1300 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1302 .flags = CHIP_HAS_INPUTSEL,
1304 .getmode = tda9873_getmode,
1305 .setmode = tda9873_setmode,
1306 .checkmode = generic_checkmode,
1308 .init = { 4, { TDA9873_SW, 0xa4, 0x06, 0x03 } },
1309 .inputreg = TDA9873_SW,
1310 .inputmute = TDA9873_MUTE | TDA9873_AUTOMUTE,
1311 .inputmap = {0xa0, 0xa2, 0xa0, 0xa0},
1312 .inputmask = TDA9873_INP_MASK|TDA9873_MUTE|TDA9873_AUTOMUTE,
1316 .name = "tda9874h/a",
1317 .checkit = tda9874a_checkit,
1318 .initialize = tda9874a_initialize,
1319 .insmodopt = &tda9874a,
1320 .addr_lo = I2C_ADDR_TDA9874 >> 1,
1321 .addr_hi = I2C_ADDR_TDA9874 >> 1,
1323 .getmode = tda9874a_getmode,
1324 .setmode = tda9874a_setmode,
1325 .checkmode = generic_checkmode,
1329 .insmodopt = &tda9850,
1330 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1331 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1334 .getmode = tda985x_getmode,
1335 .setmode = tda985x_setmode,
1337 .init = { 8, { TDA9850_C4, 0x08, 0x08, TDA985x_STEREO, 0x07, 0x10, 0x10, 0x03 } }
1341 .insmodopt = &tda9855,
1342 .addr_lo = I2C_ADDR_TDA985x_L >> 1,
1343 .addr_hi = I2C_ADDR_TDA985x_H >> 1,
1345 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE,
1347 .leftreg = TDA9855_VL,
1348 .rightreg = TDA9855_VR,
1349 .bassreg = TDA9855_BA,
1350 .treblereg = TDA9855_TR,
1351 .volfunc = tda9855_volume,
1352 .bassfunc = tda9855_bass,
1353 .treblefunc = tda9855_treble,
1355 .getmode = tda985x_getmode,
1356 .setmode = tda985x_setmode,
1358 .init = { 12, { 0, 0x6f, 0x6f, 0x0e, 0x07<<1, 0x8<<2,
1359 TDA9855_MUTE | TDA9855_AVL | TDA9855_LOUD | TDA9855_INT,
1360 TDA985x_STEREO | TDA9855_LINEAR | TDA9855_TZCM | TDA9855_VZCM,
1361 0x07, 0x10, 0x10, 0x03 }}
1365 .insmodopt = &tea6300,
1366 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1367 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1369 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1371 .leftreg = TEA6300_VR,
1372 .rightreg = TEA6300_VL,
1373 .bassreg = TEA6300_BA,
1374 .treblereg = TEA6300_TR,
1375 .volfunc = tea6300_shift10,
1376 .bassfunc = tea6300_shift12,
1377 .treblefunc = tea6300_shift12,
1379 .inputreg = TEA6300_S,
1380 .inputmap = { TEA6300_S_SA, TEA6300_S_SB, TEA6300_S_SC },
1381 .inputmute = TEA6300_S_GMU,
1385 .initialize = tea6320_initialize,
1386 .insmodopt = &tea6320,
1387 .addr_lo = I2C_ADDR_TEA6300 >> 1,
1388 .addr_hi = I2C_ADDR_TEA6300 >> 1,
1390 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1392 .leftreg = TEA6320_V,
1393 .rightreg = TEA6320_V,
1394 .bassreg = TEA6320_BA,
1395 .treblereg = TEA6320_TR,
1396 .volfunc = tea6320_volume,
1397 .bassfunc = tea6320_shift11,
1398 .treblefunc = tea6320_shift11,
1400 .inputreg = TEA6320_S,
1401 .inputmap = { TEA6320_S_SA, TEA6420_S_SB, TEA6300_S_SC, TEA6320_S_SD },
1402 .inputmute = TEA6300_S_GMU,
1406 .insmodopt = &tea6420,
1407 .addr_lo = I2C_ADDR_TEA6420 >> 1,
1408 .addr_hi = I2C_ADDR_TEA6420 >> 1,
1410 .flags = CHIP_HAS_INPUTSEL,
1413 .inputmap = { TEA6420_S_SA, TEA6420_S_SB, TEA6420_S_SC },
1414 .inputmute = TEA6300_S_GMU,
1418 .insmodopt = &tda8425,
1419 .addr_lo = I2C_ADDR_TDA8425 >> 1,
1420 .addr_hi = I2C_ADDR_TDA8425 >> 1,
1422 .flags = CHIP_HAS_VOLUME | CHIP_HAS_BASSTREBLE | CHIP_HAS_INPUTSEL,
1424 .leftreg = TDA8425_VL,
1425 .rightreg = TDA8425_VR,
1426 .bassreg = TDA8425_BA,
1427 .treblereg = TDA8425_TR,
1428 .volfunc = tda8425_shift10,
1429 .bassfunc = tda8425_shift12,
1430 .treblefunc = tda8425_shift12,
1432 .inputreg = TDA8425_S1,
1433 .inputmap = { TDA8425_S1_CH1, TDA8425_S1_CH1, TDA8425_S1_CH1 },
1434 .inputmute = TDA8425_S1_OFF,
1436 .setmode = tda8425_setmode,
1437 .initialize = tda8425_initialize,
1440 .name = "pic16c54 (PV951)",
1441 .insmodopt = &pic16c54,
1442 .addr_lo = I2C_ADDR_PIC16C54 >> 1,
1443 .addr_hi = I2C_ADDR_PIC16C54>> 1,
1445 .flags = CHIP_HAS_INPUTSEL,
1447 .inputreg = PIC16C54_REG_MISC,
1448 .inputmap = {PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_TUNER,
1449 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1450 PIC16C54_MISC_SND_NOTMUTE|PIC16C54_MISC_SWITCH_LINE,
1451 PIC16C54_MISC_SND_MUTE},
1452 .inputmute = PIC16C54_MISC_SND_MUTE,
1456 .checkit = ta8874z_checkit,
1457 .insmodopt = &ta8874z,
1458 .addr_lo = I2C_ADDR_TDA9840 >> 1,
1459 .addr_hi = I2C_ADDR_TDA9840 >> 1,
1462 .getmode = ta8874z_getmode,
1463 .setmode = ta8874z_setmode,
1464 .checkmode = generic_checkmode,
1466 .init = {2, { TA8874Z_MONO_SET, TA8874Z_SEPARATION_DEFAULT}},
1468 { .name = NULL } /* EOF */
1472 /* ---------------------------------------------------------------------- */
1473 /* i2c registration */
1475 static int chip_probe(struct i2c_client *client, const struct i2c_device_id *id)
1477 struct CHIPSTATE *chip;
1478 struct CHIPDESC *desc;
1481 printk(KERN_INFO "tvaudio: TV audio decoder + audio/video mux driver\n");
1482 printk(KERN_INFO "tvaudio: known chips: ");
1483 for (desc = chiplist; desc->name != NULL; desc++)
1484 printk("%s%s", (desc == chiplist) ? "" : ", ", desc->name);
1488 chip = kzalloc(sizeof(*chip),GFP_KERNEL);
1492 i2c_set_clientdata(client, chip);
1494 /* find description for the chip */
1495 v4l_dbg(1, debug, client, "chip found @ 0x%x\n", client->addr<<1);
1496 for (desc = chiplist; desc->name != NULL; desc++) {
1497 if (0 == *(desc->insmodopt))
1499 if (client->addr < desc->addr_lo ||
1500 client->addr > desc->addr_hi)
1502 if (desc->checkit && !desc->checkit(chip))
1506 if (desc->name == NULL) {
1507 v4l_dbg(1, debug, client, "no matching chip description found\n");
1510 v4l_info(client, "%s found @ 0x%x (%s)\n", desc->name, client->addr<<1, client->adapter->name);
1512 v4l_dbg(1, debug, client, "matches:%s%s%s.\n",
1513 (desc->flags & CHIP_HAS_VOLUME) ? " volume" : "",
1514 (desc->flags & CHIP_HAS_BASSTREBLE) ? " bass/treble" : "",
1515 (desc->flags & CHIP_HAS_INPUTSEL) ? " audiomux" : "");
1518 /* fill required data structures */
1520 strlcpy(client->name, desc->name, I2C_NAME_SIZE);
1521 chip->type = desc-chiplist;
1522 chip->shadow.count = desc->registers+1;
1523 chip->prevmode = -1;
1524 chip->audmode = V4L2_TUNER_MODE_LANG1;
1526 /* initialization */
1527 if (desc->initialize != NULL)
1528 desc->initialize(chip);
1530 chip_cmd(chip,"init",&desc->init);
1532 if (desc->flags & CHIP_HAS_VOLUME) {
1533 chip->left = desc->leftinit ? desc->leftinit : 65535;
1534 chip->right = desc->rightinit ? desc->rightinit : 65535;
1535 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1536 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1538 if (desc->flags & CHIP_HAS_BASSTREBLE) {
1539 chip->treble = desc->trebleinit ? desc->trebleinit : 32768;
1540 chip->bass = desc->bassinit ? desc->bassinit : 32768;
1541 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1542 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1545 chip->thread = NULL;
1546 if (desc->checkmode) {
1547 /* start async thread */
1548 init_timer(&chip->wt);
1549 chip->wt.function = chip_thread_wake;
1550 chip->wt.data = (unsigned long)chip;
1551 chip->thread = kthread_run(chip_thread, chip, chip->c->name);
1552 if (IS_ERR(chip->thread)) {
1553 v4l_warn(chip->c, "%s: failed to create kthread\n",
1555 chip->thread = NULL;
1561 static int chip_remove(struct i2c_client *client)
1563 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1565 del_timer_sync(&chip->wt);
1567 /* shutdown async thread */
1568 kthread_stop(chip->thread);
1569 chip->thread = NULL;
1576 static int tvaudio_get_ctrl(struct CHIPSTATE *chip,
1577 struct v4l2_control *ctrl)
1579 struct CHIPDESC *desc = chiplist + chip->type;
1582 case V4L2_CID_AUDIO_MUTE:
1583 ctrl->value=chip->muted;
1585 case V4L2_CID_AUDIO_VOLUME:
1586 if (!(desc->flags & CHIP_HAS_VOLUME))
1588 ctrl->value = max(chip->left,chip->right);
1590 case V4L2_CID_AUDIO_BALANCE:
1593 if (!(desc->flags & CHIP_HAS_VOLUME))
1595 volume = max(chip->left,chip->right);
1597 ctrl->value=(32768*min(chip->left,chip->right))/volume;
1602 case V4L2_CID_AUDIO_BASS:
1603 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1605 ctrl->value = chip->bass;
1607 case V4L2_CID_AUDIO_TREBLE:
1608 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1610 ctrl->value = chip->treble;
1616 static int tvaudio_set_ctrl(struct CHIPSTATE *chip,
1617 struct v4l2_control *ctrl)
1619 struct CHIPDESC *desc = chiplist + chip->type;
1622 case V4L2_CID_AUDIO_MUTE:
1623 if (ctrl->value < 0 || ctrl->value >= 2)
1625 chip->muted = ctrl->value;
1627 chip_write_masked(chip,desc->inputreg,desc->inputmute,desc->inputmask);
1629 chip_write_masked(chip,desc->inputreg,
1630 desc->inputmap[chip->input],desc->inputmask);
1632 case V4L2_CID_AUDIO_VOLUME:
1636 if (!(desc->flags & CHIP_HAS_VOLUME))
1639 volume = max(chip->left,chip->right);
1641 balance=(32768*min(chip->left,chip->right))/volume;
1646 chip->left = (min(65536 - balance,32768) * volume) / 32768;
1647 chip->right = (min(balance,volume *(__u16)32768)) / 32768;
1649 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1650 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1654 case V4L2_CID_AUDIO_BALANCE:
1656 int volume, balance;
1657 if (!(desc->flags & CHIP_HAS_VOLUME))
1660 volume = max(chip->left,chip->right);
1661 balance = ctrl->value;
1663 chip_write(chip,desc->leftreg,desc->volfunc(chip->left));
1664 chip_write(chip,desc->rightreg,desc->volfunc(chip->right));
1668 case V4L2_CID_AUDIO_BASS:
1669 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1671 chip->bass = ctrl->value;
1672 chip_write(chip,desc->bassreg,desc->bassfunc(chip->bass));
1675 case V4L2_CID_AUDIO_TREBLE:
1676 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1678 chip->treble = ctrl->value;
1679 chip_write(chip,desc->treblereg,desc->treblefunc(chip->treble));
1687 /* ---------------------------------------------------------------------- */
1688 /* video4linux interface */
1690 static int chip_command(struct i2c_client *client,
1691 unsigned int cmd, void *arg)
1693 struct CHIPSTATE *chip = i2c_get_clientdata(client);
1694 struct CHIPDESC *desc = chiplist + chip->type;
1696 v4l_dbg(1, debug, chip->c, "%s: chip_command 0x%x\n", chip->c->name, cmd);
1699 case AUDC_SET_RADIO:
1701 chip->watch_stereo = 0;
1702 /* del_timer(&chip->wt); */
1704 /* --- v4l ioctls --- */
1705 /* take care: bttv does userspace copying, we'll get a
1706 kernel pointer here... */
1707 case VIDIOC_QUERYCTRL:
1709 struct v4l2_queryctrl *qc = arg;
1712 case V4L2_CID_AUDIO_MUTE:
1714 case V4L2_CID_AUDIO_VOLUME:
1715 case V4L2_CID_AUDIO_BALANCE:
1716 if (!(desc->flags & CHIP_HAS_VOLUME))
1719 case V4L2_CID_AUDIO_BASS:
1720 case V4L2_CID_AUDIO_TREBLE:
1721 if (!(desc->flags & CHIP_HAS_BASSTREBLE))
1727 return v4l2_ctrl_query_fill_std(qc);
1730 return tvaudio_set_ctrl(chip, arg);
1733 return tvaudio_get_ctrl(chip, arg);
1734 case VIDIOC_INT_G_AUDIO_ROUTING:
1736 struct v4l2_routing *rt = arg;
1738 rt->input = chip->input;
1742 case VIDIOC_INT_S_AUDIO_ROUTING:
1744 struct v4l2_routing *rt = arg;
1746 if (!(desc->flags & CHIP_HAS_INPUTSEL) || rt->input >= 4)
1748 /* There are four inputs: tuner, radio, extern and intern. */
1749 chip->input = rt->input;
1752 chip_write_masked(chip, desc->inputreg,
1753 desc->inputmap[chip->input], desc->inputmask);
1756 case VIDIOC_S_TUNER:
1758 struct v4l2_tuner *vt = arg;
1763 switch (vt->audmode) {
1764 case V4L2_TUNER_MODE_MONO:
1765 case V4L2_TUNER_MODE_STEREO:
1766 case V4L2_TUNER_MODE_LANG1:
1767 case V4L2_TUNER_MODE_LANG2:
1770 case V4L2_TUNER_MODE_LANG1_LANG2:
1771 mode = V4L2_TUNER_MODE_STEREO;
1776 chip->audmode = vt->audmode;
1778 if (desc->setmode && mode) {
1779 chip->watch_stereo = 0;
1780 /* del_timer(&chip->wt); */
1782 desc->setmode(chip, mode);
1786 case VIDIOC_G_TUNER:
1788 struct v4l2_tuner *vt = arg;
1789 int mode = V4L2_TUNER_MODE_MONO;
1793 vt->audmode = chip->audmode;
1795 vt->capability = V4L2_TUNER_CAP_STEREO |
1796 V4L2_TUNER_CAP_LANG1 | V4L2_TUNER_CAP_LANG2;
1799 mode = desc->getmode(chip);
1801 if (mode & V4L2_TUNER_MODE_MONO)
1802 vt->rxsubchans |= V4L2_TUNER_SUB_MONO;
1803 if (mode & V4L2_TUNER_MODE_STEREO)
1804 vt->rxsubchans |= V4L2_TUNER_SUB_STEREO;
1805 /* Note: for SAP it should be mono/lang2 or stereo/lang2.
1806 When this module is converted fully to v4l2, then this
1807 should change for those chips that can detect SAP. */
1808 if (mode & V4L2_TUNER_MODE_LANG1)
1809 vt->rxsubchans = V4L2_TUNER_SUB_LANG1 |
1810 V4L2_TUNER_SUB_LANG2;
1816 case VIDIOC_S_FREQUENCY:
1817 chip->mode = 0; /* automatic */
1818 if (desc->checkmode && desc->setmode) {
1819 desc->setmode(chip,V4L2_TUNER_MODE_MONO);
1820 if (chip->prevmode != V4L2_TUNER_MODE_MONO)
1821 chip->prevmode = -1; /* reset previous mode */
1822 mod_timer(&chip->wt, jiffies+msecs_to_jiffies(2000));
1823 /* the thread will call checkmode() later */
1827 case VIDIOC_G_CHIP_IDENT:
1828 return v4l2_chip_ident_i2c_client(client, arg, V4L2_IDENT_TVAUDIO, 0);
1833 static int chip_legacy_probe(struct i2c_adapter *adap)
1835 /* don't attach on saa7146 based cards,
1836 because dedicated drivers are used */
1837 if ((adap->id == I2C_HW_SAA7146))
1839 if (adap->class & I2C_CLASS_TV_ANALOG)
1844 /* This driver supports many devices and the idea is to let the driver
1845 detect which device is present. So rather than listing all supported
1846 devices here, we pretend to support a single, fake device type. */
1847 static const struct i2c_device_id chip_id[] = {
1851 MODULE_DEVICE_TABLE(i2c, chip_id);
1853 static struct v4l2_i2c_driver_data v4l2_i2c_data = {
1855 .driverid = I2C_DRIVERID_TVAUDIO,
1856 .command = chip_command,
1857 .probe = chip_probe,
1858 .remove = chip_remove,
1859 .legacy_probe = chip_legacy_probe,
1860 .id_table = chip_id,