4 * Copyright (C) 2008 Renesas Solutions Corp.
5 * Kuninori Morimoto <morimoto.kuninori@renesas.com>
7 * Based on ov772x driver,
9 * Copyright (C) 2008 Kuninori Morimoto <morimoto.kuninori@renesas.com>
10 * Copyright 2006-7 Jonathan Corbet <corbet@lwn.net>
11 * Copyright (C) 2008 Magnus Damm
12 * Copyright (C) 2008, Guennadi Liakhovetski <kernel@pengutronix.de>
14 * This program is free software; you can redistribute it and/or modify
15 * it under the terms of the GNU General Public License version 2 as
16 * published by the Free Software Foundation.
19 #include <linux/init.h>
20 #include <linux/module.h>
21 #include <linux/i2c.h>
22 #include <linux/slab.h>
23 #include <linux/kernel.h>
24 #include <linux/delay.h>
25 #include <linux/videodev2.h>
26 #include <media/v4l2-chip-ident.h>
27 #include <media/v4l2-subdev.h>
28 #include <media/soc_camera.h>
29 #include <media/tw9910.h>
31 #define GET_ID(val) ((val & 0xF8) >> 3)
32 #define GET_REV(val) (val & 0x07)
37 #define ID 0x00 /* Product ID Code Register */
38 #define STATUS1 0x01 /* Chip Status Register I */
39 #define INFORM 0x02 /* Input Format */
40 #define OPFORM 0x03 /* Output Format Control Register */
41 #define DLYCTR 0x04 /* Hysteresis and HSYNC Delay Control */
42 #define OUTCTR1 0x05 /* Output Control I */
43 #define ACNTL1 0x06 /* Analog Control Register 1 */
44 #define CROP_HI 0x07 /* Cropping Register, High */
45 #define VDELAY_LO 0x08 /* Vertical Delay Register, Low */
46 #define VACTIVE_LO 0x09 /* Vertical Active Register, Low */
47 #define HDELAY_LO 0x0A /* Horizontal Delay Register, Low */
48 #define HACTIVE_LO 0x0B /* Horizontal Active Register, Low */
49 #define CNTRL1 0x0C /* Control Register I */
50 #define VSCALE_LO 0x0D /* Vertical Scaling Register, Low */
51 #define SCALE_HI 0x0E /* Scaling Register, High */
52 #define HSCALE_LO 0x0F /* Horizontal Scaling Register, Low */
53 #define BRIGHT 0x10 /* BRIGHTNESS Control Register */
54 #define CONTRAST 0x11 /* CONTRAST Control Register */
55 #define SHARPNESS 0x12 /* SHARPNESS Control Register I */
56 #define SAT_U 0x13 /* Chroma (U) Gain Register */
57 #define SAT_V 0x14 /* Chroma (V) Gain Register */
58 #define HUE 0x15 /* Hue Control Register */
60 #define CORING2 0x18 /* Coring and IF compensation */
61 #define VBICNTL 0x19 /* VBI Control Register */
62 #define ACNTL2 0x1A /* Analog Control 2 */
63 #define OUTCTR2 0x1B /* Output Control 2 */
64 #define SDT 0x1C /* Standard Selection */
65 #define SDTR 0x1D /* Standard Recognition */
66 #define TEST 0x1F /* Test Control Register */
67 #define CLMPG 0x20 /* Clamping Gain */
68 #define IAGC 0x21 /* Individual AGC Gain */
69 #define AGCGAIN 0x22 /* AGC Gain */
70 #define PEAKWT 0x23 /* White Peak Threshold */
71 #define CLMPL 0x24 /* Clamp level */
72 #define SYNCT 0x25 /* Sync Amplitude */
73 #define MISSCNT 0x26 /* Sync Miss Count Register */
74 #define PCLAMP 0x27 /* Clamp Position Register */
75 #define VCNTL1 0x28 /* Vertical Control I */
76 #define VCNTL2 0x29 /* Vertical Control II */
77 #define CKILL 0x2A /* Color Killer Level Control */
78 #define COMB 0x2B /* Comb Filter Control */
79 #define LDLY 0x2C /* Luma Delay and H Filter Control */
80 #define MISC1 0x2D /* Miscellaneous Control I */
81 #define LOOP 0x2E /* LOOP Control Register */
82 #define MISC2 0x2F /* Miscellaneous Control II */
83 #define MVSN 0x30 /* Macrovision Detection */
84 #define STATUS2 0x31 /* Chip STATUS II */
85 #define HFREF 0x32 /* H monitor */
86 #define CLMD 0x33 /* CLAMP MODE */
87 #define IDCNTL 0x34 /* ID Detection Control */
88 #define CLCNTL1 0x35 /* Clamp Control I */
89 #define ANAPLLCTL 0x4C
124 #define VBIDELAY 0x6F
131 #define FC27_ON 0x40 /* 1 : Input crystal clock frequency is 27MHz */
132 #define FC27_FF 0x00 /* 0 : Square pixel mode. */
133 /* Must use 24.54MHz for 60Hz field rate */
134 /* source or 29.5MHz for 50Hz field rate */
135 #define IFSEL_S 0x10 /* 01 : S-video decoding */
136 #define IFSEL_C 0x00 /* 00 : Composite video decoding */
137 /* Y input video selection */
138 #define YSEL_M0 0x00 /* 00 : Mux0 selected */
139 #define YSEL_M1 0x04 /* 01 : Mux1 selected */
140 #define YSEL_M2 0x08 /* 10 : Mux2 selected */
141 #define YSEL_M3 0x10 /* 11 : Mux3 selected */
144 #define MODE 0x80 /* 0 : CCIR601 compatible YCrCb 4:2:2 format */
145 /* 1 : ITU-R-656 compatible data sequence format */
146 #define LEN 0x40 /* 0 : 8-bit YCrCb 4:2:2 output format */
147 /* 1 : 16-bit YCrCb 4:2:2 output format.*/
148 #define LLCMODE 0x20 /* 1 : LLC output mode. */
149 /* 0 : free-run output mode */
150 #define AINC 0x10 /* Serial interface auto-indexing control */
151 /* 0 : auto-increment */
153 #define VSCTL 0x08 /* 1 : Vertical out ctrl by DVALID */
154 /* 0 : Vertical out ctrl by HACTIVE and DVALID */
155 #define OEN_TRI_SEL_MASK 0x07
156 #define OEN_TRI_SEL_ALL_ON 0x00 /* Enable output for Rev0/Rev1 */
157 #define OEN_TRI_SEL_ALL_OFF_r0 0x06 /* All tri-stated for Rev0 */
158 #define OEN_TRI_SEL_ALL_OFF_r1 0x07 /* All tri-stated for Rev1 */
161 #define VSP_LO 0x00 /* 0 : VS pin output polarity is active low */
162 #define VSP_HI 0x80 /* 1 : VS pin output polarity is active high. */
163 /* VS pin output control */
164 #define VSSL_VSYNC 0x00 /* 0 : VSYNC */
165 #define VSSL_VACT 0x10 /* 1 : VACT */
166 #define VSSL_FIELD 0x20 /* 2 : FIELD */
167 #define VSSL_VVALID 0x30 /* 3 : VVALID */
168 #define VSSL_ZERO 0x70 /* 7 : 0 */
169 #define HSP_LOW 0x00 /* 0 : HS pin output polarity is active low */
170 #define HSP_HI 0x08 /* 1 : HS pin output polarity is active high.*/
171 /* HS pin output control */
172 #define HSSL_HACT 0x00 /* 0 : HACT */
173 #define HSSL_HSYNC 0x01 /* 1 : HSYNC */
174 #define HSSL_DVALID 0x02 /* 2 : DVALID */
175 #define HSSL_HLOCK 0x03 /* 3 : HLOCK */
176 #define HSSL_ASYNCW 0x04 /* 4 : ASYNCW */
177 #define HSSL_ZERO 0x07 /* 7 : 0 */
180 #define SRESET 0x80 /* resets the device to its default state
181 * but all register content remain unchanged.
182 * This bit is self-resetting.
184 #define ACNTL1_PDN_MASK 0x0e
185 #define CLK_PDN 0x08 /* system clock power down */
186 #define Y_PDN 0x04 /* Luma ADC power down */
187 #define C_PDN 0x02 /* Chroma ADC power down */
190 #define ACNTL2_PDN_MASK 0x40
191 #define PLL_PDN 0x40 /* PLL power down */
195 /* RTSEL : control the real time signal output from the MPOUT pin */
196 #define RTSEL_MASK 0x07
197 #define RTSEL_VLOSS 0x00 /* 0000 = Video loss */
198 #define RTSEL_HLOCK 0x01 /* 0001 = H-lock */
199 #define RTSEL_SLOCK 0x02 /* 0010 = S-lock */
200 #define RTSEL_VLOCK 0x03 /* 0011 = V-lock */
201 #define RTSEL_MONO 0x04 /* 0100 = MONO */
202 #define RTSEL_DET50 0x05 /* 0101 = DET50 */
203 #define RTSEL_FIELD 0x06 /* 0110 = FIELD */
204 #define RTSEL_RTCO 0x07 /* 0111 = RTCO ( Real Time Control ) */
211 unsigned char reg_num;
215 struct tw9910_scale_ctrl {
217 unsigned short width;
218 unsigned short height;
223 struct tw9910_cropping_ctrl {
230 struct tw9910_hsync_ctrl {
236 struct v4l2_subdev subdev;
237 struct tw9910_video_info *info;
238 const struct tw9910_scale_ctrl *scale;
242 static const struct tw9910_scale_ctrl tw9910_ntsc_scales[] = {
251 .name = "NTSC CCIR601",
258 .name = "NTSC SQ (CIF)",
265 .name = "NTSC CCIR601 (CIF)",
272 .name = "NTSC SQ (QCIF)",
279 .name = "NTSC CCIR601 (QCIF)",
287 static const struct tw9910_scale_ctrl tw9910_pal_scales[] = {
296 .name = "PAL CCIR601",
303 .name = "PAL SQ (CIF)",
310 .name = "PAL CCIR601 (CIF)",
317 .name = "PAL SQ (QCIF)",
324 .name = "PAL CCIR601 (QCIF)",
332 static const struct tw9910_hsync_ctrl tw9910_hsync_ctrl = {
340 static struct tw9910_priv *to_tw9910(const struct i2c_client *client)
342 return container_of(i2c_get_clientdata(client), struct tw9910_priv,
346 static int tw9910_mask_set(struct i2c_client *client, u8 command,
349 s32 val = i2c_smbus_read_byte_data(client, command);
356 return i2c_smbus_write_byte_data(client, command, val);
359 static int tw9910_set_scale(struct i2c_client *client,
360 const struct tw9910_scale_ctrl *scale)
364 ret = i2c_smbus_write_byte_data(client, SCALE_HI,
365 (scale->vscale & 0x0F00) >> 4 |
366 (scale->hscale & 0x0F00) >> 8);
370 ret = i2c_smbus_write_byte_data(client, HSCALE_LO,
371 scale->hscale & 0x00FF);
375 ret = i2c_smbus_write_byte_data(client, VSCALE_LO,
376 scale->vscale & 0x00FF);
381 static int tw9910_set_hsync(struct i2c_client *client,
382 const struct tw9910_hsync_ctrl *hsync)
384 struct tw9910_priv *priv = to_tw9910(client);
388 ret = i2c_smbus_write_byte_data(client, HSBEGIN,
389 (hsync->start & 0x07F8) >> 3);
394 ret = i2c_smbus_write_byte_data(client, HSEND,
395 (hsync->end & 0x07F8) >> 3);
399 /* So far only revisions 0 and 1 have been seen */
401 if (1 == priv->revision)
402 ret = tw9910_mask_set(client, HSLOWCTL, 0x77,
403 (hsync->start & 0x0007) << 4 |
404 (hsync->end & 0x0007));
409 static void tw9910_reset(struct i2c_client *client)
411 tw9910_mask_set(client, ACNTL1, SRESET, SRESET);
415 static int tw9910_power(struct i2c_client *client, int enable)
425 acntl1 = CLK_PDN | Y_PDN | C_PDN;
429 ret = tw9910_mask_set(client, ACNTL1, ACNTL1_PDN_MASK, acntl1);
433 return tw9910_mask_set(client, ACNTL2, ACNTL2_PDN_MASK, acntl2);
436 static const struct tw9910_scale_ctrl*
437 tw9910_select_norm(struct soc_camera_device *icd, u32 width, u32 height)
439 const struct tw9910_scale_ctrl *scale;
440 const struct tw9910_scale_ctrl *ret = NULL;
441 v4l2_std_id norm = icd->vdev->current_norm;
442 __u32 diff = 0xffffffff, tmp;
445 if (norm & V4L2_STD_NTSC) {
446 scale = tw9910_ntsc_scales;
447 size = ARRAY_SIZE(tw9910_ntsc_scales);
448 } else if (norm & V4L2_STD_PAL) {
449 scale = tw9910_pal_scales;
450 size = ARRAY_SIZE(tw9910_pal_scales);
455 for (i = 0; i < size; i++) {
456 tmp = abs(width - scale[i].width) +
457 abs(height - scale[i].height);
468 * soc_camera_ops function
470 static int tw9910_s_stream(struct v4l2_subdev *sd, int enable)
472 struct i2c_client *client = v4l2_get_subdevdata(sd);
473 struct tw9910_priv *priv = to_tw9910(client);
478 switch (priv->revision) {
480 val = OEN_TRI_SEL_ALL_OFF_r0;
483 val = OEN_TRI_SEL_ALL_OFF_r1;
486 dev_err(&client->dev, "un-supported revision\n");
490 val = OEN_TRI_SEL_ALL_ON;
493 dev_err(&client->dev, "norm select error\n");
497 dev_dbg(&client->dev, "%s %dx%d\n",
500 priv->scale->height);
503 ret = tw9910_mask_set(client, OPFORM, OEN_TRI_SEL_MASK, val);
507 return tw9910_power(client, enable);
510 static int tw9910_set_bus_param(struct soc_camera_device *icd,
513 struct v4l2_subdev *sd = soc_camera_to_subdev(icd);
514 struct i2c_client *client = v4l2_get_subdevdata(sd);
515 u8 val = VSSL_VVALID | HSSL_DVALID;
520 * We use VVALID and DVALID signals to control VSYNC and HSYNC
521 * outputs, in this mode their polarity is inverted.
523 if (flags & SOCAM_HSYNC_ACTIVE_LOW)
526 if (flags & SOCAM_VSYNC_ACTIVE_LOW)
529 return i2c_smbus_write_byte_data(client, OUTCTR1, val);
532 static unsigned long tw9910_query_bus_param(struct soc_camera_device *icd)
534 struct i2c_client *client = to_i2c_client(to_soc_camera_control(icd));
535 struct tw9910_priv *priv = to_tw9910(client);
536 struct soc_camera_link *icl = to_soc_camera_link(icd);
537 unsigned long flags = SOCAM_PCLK_SAMPLE_RISING | SOCAM_MASTER |
538 SOCAM_VSYNC_ACTIVE_HIGH | SOCAM_HSYNC_ACTIVE_HIGH |
539 SOCAM_VSYNC_ACTIVE_LOW | SOCAM_HSYNC_ACTIVE_LOW |
540 SOCAM_DATA_ACTIVE_HIGH | priv->info->buswidth;
542 return soc_camera_apply_sensor_flags(icl, flags);
545 static int tw9910_s_std(struct v4l2_subdev *sd, v4l2_std_id norm)
549 if (norm & (V4L2_STD_NTSC | V4L2_STD_PAL))
555 static int tw9910_g_chip_ident(struct v4l2_subdev *sd,
556 struct v4l2_dbg_chip_ident *id)
558 struct i2c_client *client = v4l2_get_subdevdata(sd);
559 struct tw9910_priv *priv = to_tw9910(client);
561 id->ident = V4L2_IDENT_TW9910;
562 id->revision = priv->revision;
567 #ifdef CONFIG_VIDEO_ADV_DEBUG
568 static int tw9910_g_register(struct v4l2_subdev *sd,
569 struct v4l2_dbg_register *reg)
571 struct i2c_client *client = v4l2_get_subdevdata(sd);
577 ret = i2c_smbus_read_byte_data(client, reg->reg);
585 reg->val = (__u64)ret;
590 static int tw9910_s_register(struct v4l2_subdev *sd,
591 struct v4l2_dbg_register *reg)
593 struct i2c_client *client = v4l2_get_subdevdata(sd);
595 if (reg->reg > 0xff ||
599 return i2c_smbus_write_byte_data(client, reg->reg, reg->val);
603 static int tw9910_s_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
605 struct v4l2_rect *rect = &a->c;
606 struct i2c_client *client = v4l2_get_subdevdata(sd);
607 struct tw9910_priv *priv = to_tw9910(client);
608 struct soc_camera_device *icd = client->dev.platform_data;
613 * select suitable norm
615 priv->scale = tw9910_select_norm(icd, rect->width, rect->height);
617 goto tw9910_set_fmt_error;
622 tw9910_reset(client);
628 if (SOCAM_DATAWIDTH_16 == priv->info->buswidth)
631 ret = tw9910_mask_set(client, OPFORM, LEN, val);
633 goto tw9910_set_fmt_error;
636 * select MPOUT behavior
638 switch (priv->info->mpout) {
639 case TW9910_MPO_VLOSS:
640 val = RTSEL_VLOSS; break;
641 case TW9910_MPO_HLOCK:
642 val = RTSEL_HLOCK; break;
643 case TW9910_MPO_SLOCK:
644 val = RTSEL_SLOCK; break;
645 case TW9910_MPO_VLOCK:
646 val = RTSEL_VLOCK; break;
647 case TW9910_MPO_MONO:
648 val = RTSEL_MONO; break;
649 case TW9910_MPO_DET50:
650 val = RTSEL_DET50; break;
651 case TW9910_MPO_FIELD:
652 val = RTSEL_FIELD; break;
653 case TW9910_MPO_RTCO:
654 val = RTSEL_RTCO; break;
659 ret = tw9910_mask_set(client, VBICNTL, RTSEL_MASK, val);
661 goto tw9910_set_fmt_error;
666 ret = tw9910_set_scale(client, priv->scale);
668 goto tw9910_set_fmt_error;
673 ret = tw9910_set_hsync(client, &tw9910_hsync_ctrl);
675 goto tw9910_set_fmt_error;
677 rect->width = priv->scale->width;
678 rect->height = priv->scale->height;
684 tw9910_set_fmt_error:
686 tw9910_reset(client);
692 static int tw9910_g_crop(struct v4l2_subdev *sd, struct v4l2_crop *a)
694 struct i2c_client *client = v4l2_get_subdevdata(sd);
695 struct tw9910_priv *priv = to_tw9910(client);
699 struct v4l2_crop crop = {
707 ret = tw9910_s_crop(sd, &crop);
714 a->c.width = priv->scale->width;
715 a->c.height = priv->scale->height;
716 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
721 static int tw9910_cropcap(struct v4l2_subdev *sd, struct v4l2_cropcap *a)
725 a->bounds.width = 768;
726 a->bounds.height = 576;
729 a->defrect.width = 640;
730 a->defrect.height = 480;
731 a->type = V4L2_BUF_TYPE_VIDEO_CAPTURE;
732 a->pixelaspect.numerator = 1;
733 a->pixelaspect.denominator = 1;
738 static int tw9910_g_fmt(struct v4l2_subdev *sd,
739 struct v4l2_mbus_framefmt *mf)
741 struct i2c_client *client = v4l2_get_subdevdata(sd);
742 struct tw9910_priv *priv = to_tw9910(client);
746 struct v4l2_crop crop = {
754 ret = tw9910_s_crop(sd, &crop);
759 mf->width = priv->scale->width;
760 mf->height = priv->scale->height;
761 mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
762 mf->colorspace = V4L2_COLORSPACE_JPEG;
763 mf->field = V4L2_FIELD_INTERLACED_BT;
768 static int tw9910_s_fmt(struct v4l2_subdev *sd,
769 struct v4l2_mbus_framefmt *mf)
771 struct i2c_client *client = v4l2_get_subdevdata(sd);
772 struct tw9910_priv *priv = to_tw9910(client);
773 /* See tw9910_s_crop() - no proper cropping support */
774 struct v4l2_crop a = {
779 .height = mf->height,
784 WARN_ON(mf->field != V4L2_FIELD_ANY &&
785 mf->field != V4L2_FIELD_INTERLACED_BT);
790 if (mf->code != V4L2_MBUS_FMT_UYVY8_2X8)
793 mf->colorspace = V4L2_COLORSPACE_JPEG;
795 ret = tw9910_s_crop(sd, &a);
797 mf->width = priv->scale->width;
798 mf->height = priv->scale->height;
803 static int tw9910_try_fmt(struct v4l2_subdev *sd,
804 struct v4l2_mbus_framefmt *mf)
806 struct i2c_client *client = v4l2_get_subdevdata(sd);
807 struct soc_camera_device *icd = client->dev.platform_data;
808 const struct tw9910_scale_ctrl *scale;
810 if (V4L2_FIELD_ANY == mf->field) {
811 mf->field = V4L2_FIELD_INTERLACED_BT;
812 } else if (V4L2_FIELD_INTERLACED_BT != mf->field) {
813 dev_err(&client->dev, "Field type %d invalid.\n", mf->field);
817 mf->code = V4L2_MBUS_FMT_UYVY8_2X8;
818 mf->colorspace = V4L2_COLORSPACE_JPEG;
821 * select suitable norm
823 scale = tw9910_select_norm(icd, mf->width, mf->height);
827 mf->width = scale->width;
828 mf->height = scale->height;
833 static int tw9910_video_probe(struct soc_camera_device *icd,
834 struct i2c_client *client)
836 struct tw9910_priv *priv = to_tw9910(client);
839 /* We must have a parent by now. And it cannot be a wrong one. */
840 BUG_ON(!icd->parent ||
841 to_soc_camera_host(icd->parent)->nr != icd->iface);
844 * tw9910 only use 8 or 16 bit bus width
846 if (SOCAM_DATAWIDTH_16 != priv->info->buswidth &&
847 SOCAM_DATAWIDTH_8 != priv->info->buswidth) {
848 dev_err(&client->dev, "bus width error\n");
853 * check and show Product ID
854 * So far only revisions 0 and 1 have been seen
856 id = i2c_smbus_read_byte_data(client, ID);
857 priv->revision = GET_REV(id);
861 0x01 < priv->revision) {
862 dev_err(&client->dev,
863 "Product ID error %x:%x\n",
868 dev_info(&client->dev,
869 "tw9910 Product ID %0x:%0x\n", id, priv->revision);
871 icd->vdev->tvnorms = V4L2_STD_NTSC | V4L2_STD_PAL;
872 icd->vdev->current_norm = V4L2_STD_NTSC;
877 static struct soc_camera_ops tw9910_ops = {
878 .set_bus_param = tw9910_set_bus_param,
879 .query_bus_param = tw9910_query_bus_param,
882 static struct v4l2_subdev_core_ops tw9910_subdev_core_ops = {
883 .g_chip_ident = tw9910_g_chip_ident,
884 .s_std = tw9910_s_std,
885 #ifdef CONFIG_VIDEO_ADV_DEBUG
886 .g_register = tw9910_g_register,
887 .s_register = tw9910_s_register,
891 static int tw9910_enum_fmt(struct v4l2_subdev *sd, unsigned int index,
892 enum v4l2_mbus_pixelcode *code)
897 *code = V4L2_MBUS_FMT_UYVY8_2X8;
901 static struct v4l2_subdev_video_ops tw9910_subdev_video_ops = {
902 .s_stream = tw9910_s_stream,
903 .g_mbus_fmt = tw9910_g_fmt,
904 .s_mbus_fmt = tw9910_s_fmt,
905 .try_mbus_fmt = tw9910_try_fmt,
906 .cropcap = tw9910_cropcap,
907 .g_crop = tw9910_g_crop,
908 .s_crop = tw9910_s_crop,
909 .enum_mbus_fmt = tw9910_enum_fmt,
912 static struct v4l2_subdev_ops tw9910_subdev_ops = {
913 .core = &tw9910_subdev_core_ops,
914 .video = &tw9910_subdev_video_ops,
918 * i2c_driver function
921 static int tw9910_probe(struct i2c_client *client,
922 const struct i2c_device_id *did)
925 struct tw9910_priv *priv;
926 struct tw9910_video_info *info;
927 struct soc_camera_device *icd = client->dev.platform_data;
928 struct i2c_adapter *adapter =
929 to_i2c_adapter(client->dev.parent);
930 struct soc_camera_link *icl;
934 dev_err(&client->dev, "TW9910: missing soc-camera data!\n");
938 icl = to_soc_camera_link(icd);
939 if (!icl || !icl->priv)
944 if (!i2c_check_functionality(adapter, I2C_FUNC_SMBUS_BYTE_DATA)) {
945 dev_err(&client->dev,
946 "I2C-Adapter doesn't support "
947 "I2C_FUNC_SMBUS_BYTE_DATA\n");
951 priv = kzalloc(sizeof(*priv), GFP_KERNEL);
957 v4l2_i2c_subdev_init(&priv->subdev, client, &tw9910_subdev_ops);
959 icd->ops = &tw9910_ops;
960 icd->iface = icl->bus_id;
962 ret = tw9910_video_probe(icd, client);
971 static int tw9910_remove(struct i2c_client *client)
973 struct tw9910_priv *priv = to_tw9910(client);
974 struct soc_camera_device *icd = client->dev.platform_data;
981 static const struct i2c_device_id tw9910_id[] = {
985 MODULE_DEVICE_TABLE(i2c, tw9910_id);
987 static struct i2c_driver tw9910_i2c_driver = {
991 .probe = tw9910_probe,
992 .remove = tw9910_remove,
993 .id_table = tw9910_id,
999 static int __init tw9910_module_init(void)
1001 return i2c_add_driver(&tw9910_i2c_driver);
1004 static void __exit tw9910_module_exit(void)
1006 i2c_del_driver(&tw9910_i2c_driver);
1009 module_init(tw9910_module_init);
1010 module_exit(tw9910_module_exit);
1012 MODULE_DESCRIPTION("SoC Camera driver for tw9910");
1013 MODULE_AUTHOR("Kuninori Morimoto");
1014 MODULE_LICENSE("GPL v2");