2 * Copyright (C) ST-Ericsson SA 2010
4 * License Terms: GNU General Public License v2
5 * Author: Srinidhi Kasagar <srinidhi.kasagar@stericsson.com>
6 * Author: Rabin Vincent <rabin.vincent@stericsson.com>
7 * Changes: Mattias Wallin <mattias.wallin@stericsson.com>
10 #include <linux/kernel.h>
11 #include <linux/slab.h>
12 #include <linux/init.h>
13 #include <linux/irq.h>
14 #include <linux/delay.h>
15 #include <linux/interrupt.h>
16 #include <linux/module.h>
17 #include <linux/platform_device.h>
18 #include <linux/mfd/core.h>
19 #include <linux/mfd/abx500.h>
20 #include <linux/mfd/ab8500.h>
21 #include <linux/regulator/ab8500.h>
24 * Interrupt register offsets
27 #define AB8500_IT_SOURCE1_REG 0x00
28 #define AB8500_IT_SOURCE2_REG 0x01
29 #define AB8500_IT_SOURCE3_REG 0x02
30 #define AB8500_IT_SOURCE4_REG 0x03
31 #define AB8500_IT_SOURCE5_REG 0x04
32 #define AB8500_IT_SOURCE6_REG 0x05
33 #define AB8500_IT_SOURCE7_REG 0x06
34 #define AB8500_IT_SOURCE8_REG 0x07
35 #define AB8500_IT_SOURCE19_REG 0x12
36 #define AB8500_IT_SOURCE20_REG 0x13
37 #define AB8500_IT_SOURCE21_REG 0x14
38 #define AB8500_IT_SOURCE22_REG 0x15
39 #define AB8500_IT_SOURCE23_REG 0x16
40 #define AB8500_IT_SOURCE24_REG 0x17
45 #define AB8500_IT_LATCH1_REG 0x20
46 #define AB8500_IT_LATCH2_REG 0x21
47 #define AB8500_IT_LATCH3_REG 0x22
48 #define AB8500_IT_LATCH4_REG 0x23
49 #define AB8500_IT_LATCH5_REG 0x24
50 #define AB8500_IT_LATCH6_REG 0x25
51 #define AB8500_IT_LATCH7_REG 0x26
52 #define AB8500_IT_LATCH8_REG 0x27
53 #define AB8500_IT_LATCH9_REG 0x28
54 #define AB8500_IT_LATCH10_REG 0x29
55 #define AB8500_IT_LATCH19_REG 0x32
56 #define AB8500_IT_LATCH20_REG 0x33
57 #define AB8500_IT_LATCH21_REG 0x34
58 #define AB8500_IT_LATCH22_REG 0x35
59 #define AB8500_IT_LATCH23_REG 0x36
60 #define AB8500_IT_LATCH24_REG 0x37
66 #define AB8500_IT_MASK1_REG 0x40
67 #define AB8500_IT_MASK2_REG 0x41
68 #define AB8500_IT_MASK3_REG 0x42
69 #define AB8500_IT_MASK4_REG 0x43
70 #define AB8500_IT_MASK5_REG 0x44
71 #define AB8500_IT_MASK6_REG 0x45
72 #define AB8500_IT_MASK7_REG 0x46
73 #define AB8500_IT_MASK8_REG 0x47
74 #define AB8500_IT_MASK9_REG 0x48
75 #define AB8500_IT_MASK10_REG 0x49
76 #define AB8500_IT_MASK11_REG 0x4A
77 #define AB8500_IT_MASK12_REG 0x4B
78 #define AB8500_IT_MASK13_REG 0x4C
79 #define AB8500_IT_MASK14_REG 0x4D
80 #define AB8500_IT_MASK15_REG 0x4E
81 #define AB8500_IT_MASK16_REG 0x4F
82 #define AB8500_IT_MASK17_REG 0x50
83 #define AB8500_IT_MASK18_REG 0x51
84 #define AB8500_IT_MASK19_REG 0x52
85 #define AB8500_IT_MASK20_REG 0x53
86 #define AB8500_IT_MASK21_REG 0x54
87 #define AB8500_IT_MASK22_REG 0x55
88 #define AB8500_IT_MASK23_REG 0x56
89 #define AB8500_IT_MASK24_REG 0x57
91 #define AB8500_REV_REG 0x80
94 * Map interrupt numbers to the LATCH and MASK register offsets, Interrupt
95 * numbers are indexed into this array with (num / 8).
97 * This is one off from the register names, i.e. AB8500_IT_MASK1_REG is at
100 static const int ab8500_irq_regoffset[AB8500_NUM_IRQ_REGS] = {
101 0, 1, 2, 3, 4, 6, 7, 8, 9, 18, 19, 20, 21,
104 static int ab8500_get_chip_id(struct device *dev)
106 struct ab8500 *ab8500;
110 ab8500 = dev_get_drvdata(dev->parent);
111 return ab8500 ? (int)ab8500->chip_id : -EINVAL;
114 static int set_register_interruptible(struct ab8500 *ab8500, u8 bank,
119 * Put the u8 bank and u8 register together into a an u16.
120 * The bank on higher 8 bits and register in lower 8 bits.
122 u16 addr = ((u16)bank) << 8 | reg;
124 dev_vdbg(ab8500->dev, "wr: addr %#x <= %#x\n", addr, data);
126 ret = mutex_lock_interruptible(&ab8500->lock);
130 ret = ab8500->write(ab8500, addr, data);
132 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
134 mutex_unlock(&ab8500->lock);
139 static int ab8500_set_register(struct device *dev, u8 bank,
142 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
144 return set_register_interruptible(ab8500, bank, reg, value);
147 static int get_register_interruptible(struct ab8500 *ab8500, u8 bank,
151 /* put the u8 bank and u8 reg together into a an u16.
152 * bank on higher 8 bits and reg in lower */
153 u16 addr = ((u16)bank) << 8 | reg;
155 ret = mutex_lock_interruptible(&ab8500->lock);
159 ret = ab8500->read(ab8500, addr);
161 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
166 mutex_unlock(&ab8500->lock);
167 dev_vdbg(ab8500->dev, "rd: addr %#x => data %#x\n", addr, ret);
172 static int ab8500_get_register(struct device *dev, u8 bank,
175 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
177 return get_register_interruptible(ab8500, bank, reg, value);
180 static int mask_and_set_register_interruptible(struct ab8500 *ab8500, u8 bank,
181 u8 reg, u8 bitmask, u8 bitvalues)
185 /* put the u8 bank and u8 reg together into a an u16.
186 * bank on higher 8 bits and reg in lower */
187 u16 addr = ((u16)bank) << 8 | reg;
189 ret = mutex_lock_interruptible(&ab8500->lock);
193 ret = ab8500->read(ab8500, addr);
195 dev_err(ab8500->dev, "failed to read reg %#x: %d\n",
201 data = (~bitmask & data) | (bitmask & bitvalues);
203 ret = ab8500->write(ab8500, addr, data);
205 dev_err(ab8500->dev, "failed to write reg %#x: %d\n",
208 dev_vdbg(ab8500->dev, "mask: addr %#x => data %#x\n", addr, data);
210 mutex_unlock(&ab8500->lock);
214 static int ab8500_mask_and_set_register(struct device *dev,
215 u8 bank, u8 reg, u8 bitmask, u8 bitvalues)
217 struct ab8500 *ab8500 = dev_get_drvdata(dev->parent);
219 return mask_and_set_register_interruptible(ab8500, bank, reg,
224 static struct abx500_ops ab8500_ops = {
225 .get_chip_id = ab8500_get_chip_id,
226 .get_register = ab8500_get_register,
227 .set_register = ab8500_set_register,
228 .get_register_page = NULL,
229 .set_register_page = NULL,
230 .mask_and_set_register = ab8500_mask_and_set_register,
231 .event_registers_startup_state_get = NULL,
232 .startup_irq_enabled = NULL,
235 static void ab8500_irq_lock(unsigned int irq)
237 struct ab8500 *ab8500 = get_irq_chip_data(irq);
239 mutex_lock(&ab8500->irq_lock);
242 static void ab8500_irq_sync_unlock(unsigned int irq)
244 struct ab8500 *ab8500 = get_irq_chip_data(irq);
247 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
248 u8 old = ab8500->oldmask[i];
249 u8 new = ab8500->mask[i];
255 ab8500->oldmask[i] = new;
257 reg = AB8500_IT_MASK1_REG + ab8500_irq_regoffset[i];
258 set_register_interruptible(ab8500, AB8500_INTERRUPT, reg, new);
261 mutex_unlock(&ab8500->irq_lock);
264 static void ab8500_irq_mask(unsigned int irq)
266 struct ab8500 *ab8500 = get_irq_chip_data(irq);
267 int offset = irq - ab8500->irq_base;
268 int index = offset / 8;
269 int mask = 1 << (offset % 8);
271 ab8500->mask[index] |= mask;
274 static void ab8500_irq_unmask(unsigned int irq)
276 struct ab8500 *ab8500 = get_irq_chip_data(irq);
277 int offset = irq - ab8500->irq_base;
278 int index = offset / 8;
279 int mask = 1 << (offset % 8);
281 ab8500->mask[index] &= ~mask;
284 static struct irq_chip ab8500_irq_chip = {
286 .bus_lock = ab8500_irq_lock,
287 .bus_sync_unlock = ab8500_irq_sync_unlock,
288 .mask = ab8500_irq_mask,
289 .unmask = ab8500_irq_unmask,
292 static irqreturn_t ab8500_irq(int irq, void *dev)
294 struct ab8500 *ab8500 = dev;
297 dev_vdbg(ab8500->dev, "interrupt\n");
299 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++) {
300 int regoffset = ab8500_irq_regoffset[i];
304 status = get_register_interruptible(ab8500, AB8500_INTERRUPT,
305 AB8500_IT_LATCH1_REG + regoffset, &value);
306 if (status < 0 || value == 0)
310 int bit = __ffs(value);
311 int line = i * 8 + bit;
313 handle_nested_irq(ab8500->irq_base + line);
314 value &= ~(1 << bit);
321 static int ab8500_irq_init(struct ab8500 *ab8500)
323 int base = ab8500->irq_base;
326 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
327 set_irq_chip_data(irq, ab8500);
328 set_irq_chip_and_handler(irq, &ab8500_irq_chip,
330 set_irq_nested_thread(irq, 1);
332 set_irq_flags(irq, IRQF_VALID);
334 set_irq_noprobe(irq);
341 static void ab8500_irq_remove(struct ab8500 *ab8500)
343 int base = ab8500->irq_base;
346 for (irq = base; irq < base + AB8500_NR_IRQS; irq++) {
348 set_irq_flags(irq, 0);
350 set_irq_chip_and_handler(irq, NULL, NULL);
351 set_irq_chip_data(irq, NULL);
355 static struct resource ab8500_gpadc_resources[] = {
357 .name = "HW_CONV_END",
358 .start = AB8500_INT_GP_HW_ADC_CONV_END,
359 .end = AB8500_INT_GP_HW_ADC_CONV_END,
360 .flags = IORESOURCE_IRQ,
363 .name = "SW_CONV_END",
364 .start = AB8500_INT_GP_SW_ADC_CONV_END,
365 .end = AB8500_INT_GP_SW_ADC_CONV_END,
366 .flags = IORESOURCE_IRQ,
370 static struct resource ab8500_rtc_resources[] = {
373 .start = AB8500_INT_RTC_60S,
374 .end = AB8500_INT_RTC_60S,
375 .flags = IORESOURCE_IRQ,
379 .start = AB8500_INT_RTC_ALARM,
380 .end = AB8500_INT_RTC_ALARM,
381 .flags = IORESOURCE_IRQ,
385 static struct resource ab8500_poweronkey_db_resources[] = {
388 .start = AB8500_INT_PON_KEY1DB_F,
389 .end = AB8500_INT_PON_KEY1DB_F,
390 .flags = IORESOURCE_IRQ,
394 .start = AB8500_INT_PON_KEY1DB_R,
395 .end = AB8500_INT_PON_KEY1DB_R,
396 .flags = IORESOURCE_IRQ,
400 static struct mfd_cell ab8500_devs[] = {
401 #ifdef CONFIG_DEBUG_FS
403 .name = "ab8500-debug",
407 .name = "ab8500-gpadc",
408 .num_resources = ARRAY_SIZE(ab8500_gpadc_resources),
409 .resources = ab8500_gpadc_resources,
412 .name = "ab8500-rtc",
413 .num_resources = ARRAY_SIZE(ab8500_rtc_resources),
414 .resources = ab8500_rtc_resources,
417 .name = "ab8500-pwm",
421 .name = "ab8500-pwm",
425 .name = "ab8500-pwm",
428 { .name = "ab8500-charger", },
429 { .name = "ab8500-audio", },
430 { .name = "ab8500-usb", },
431 { .name = "ab8500-regulator", },
433 .name = "ab8500-poweron-key",
434 .num_resources = ARRAY_SIZE(ab8500_poweronkey_db_resources),
435 .resources = ab8500_poweronkey_db_resources,
439 static ssize_t show_chip_id(struct device *dev,
440 struct device_attribute *attr, char *buf)
442 struct ab8500 *ab8500;
444 ab8500 = dev_get_drvdata(dev);
445 return sprintf(buf, "%#x\n", ab8500 ? ab8500->chip_id : -EINVAL);
448 static DEVICE_ATTR(chip_id, S_IRUGO, show_chip_id, NULL);
450 static struct attribute *ab8500_sysfs_entries[] = {
451 &dev_attr_chip_id.attr,
455 static struct attribute_group ab8500_attr_group = {
456 .attrs = ab8500_sysfs_entries,
459 int __devinit ab8500_init(struct ab8500 *ab8500)
461 struct ab8500_platform_data *plat = dev_get_platdata(ab8500->dev);
467 ab8500->irq_base = plat->irq_base;
469 mutex_init(&ab8500->lock);
470 mutex_init(&ab8500->irq_lock);
472 ret = get_register_interruptible(ab8500, AB8500_MISC,
473 AB8500_REV_REG, &value);
482 if (value == 0x0 || value == 0x10 || value == 0x11) {
483 ab8500->revision = value;
484 dev_info(ab8500->dev, "detected chip, revision: %#x\n", value);
486 dev_err(ab8500->dev, "unknown chip, revision: %#x\n", value);
489 ab8500->chip_id = value;
491 if (plat && plat->init)
494 /* Clear and mask all interrupts */
495 for (i = 0; i < 10; i++) {
496 get_register_interruptible(ab8500, AB8500_INTERRUPT,
497 AB8500_IT_LATCH1_REG + i, &value);
498 set_register_interruptible(ab8500, AB8500_INTERRUPT,
499 AB8500_IT_MASK1_REG + i, 0xff);
502 for (i = 18; i < 24; i++) {
503 get_register_interruptible(ab8500, AB8500_INTERRUPT,
504 AB8500_IT_LATCH1_REG + i, &value);
505 set_register_interruptible(ab8500, AB8500_INTERRUPT,
506 AB8500_IT_MASK1_REG + i, 0xff);
509 ret = abx500_register_ops(ab8500->dev, &ab8500_ops);
513 for (i = 0; i < AB8500_NUM_IRQ_REGS; i++)
514 ab8500->mask[i] = ab8500->oldmask[i] = 0xff;
516 if (ab8500->irq_base) {
517 ret = ab8500_irq_init(ab8500);
521 ret = request_threaded_irq(ab8500->irq, NULL, ab8500_irq,
522 IRQF_ONESHOT | IRQF_NO_SUSPEND,
528 ret = mfd_add_devices(ab8500->dev, 0, ab8500_devs,
529 ARRAY_SIZE(ab8500_devs), NULL,
534 ret = sysfs_create_group(&ab8500->dev->kobj, &ab8500_attr_group);
536 dev_err(ab8500->dev, "error creating sysfs entries\n");
541 if (ab8500->irq_base) {
542 free_irq(ab8500->irq, ab8500);
544 ab8500_irq_remove(ab8500);
549 int __devexit ab8500_exit(struct ab8500 *ab8500)
551 sysfs_remove_group(&ab8500->dev->kobj, &ab8500_attr_group);
552 mfd_remove_devices(ab8500->dev);
553 if (ab8500->irq_base) {
554 free_irq(ab8500->irq, ab8500);
555 ab8500_irq_remove(ab8500);
561 MODULE_AUTHOR("Srinidhi Kasagar, Rabin Vincent");
562 MODULE_DESCRIPTION("AB8500 MFD core");
563 MODULE_LICENSE("GPL v2");