drivers/mfd/da9063-irq.c

   1 /* da9063-irq.c: Interrupts support for Dialog DA9063
   2  *
   3  * Copyright 2012 Dialog Semiconductor Ltd.
   4  * Copyright 2013 Philipp Zabel, Pengutronix
   5  *
   6  * Author: Michal Hajduk <michal.hajduk@diasemi.com>
   7  *
   8  *  This program is free software; you can redistribute  it and/or modify it
   9  *  under  the terms of  the GNU General  Public License as published by the
  10  *  Free Software Foundation;  either version 2 of the  License, or (at your
  11  *  option) any later version.
  12  *
  13  */
  14
  15 #include <linux/kernel.h>
  16 #include <linux/module.h>
  17 #include <linux/irq.h>
  18 #include <linux/mfd/core.h>
  19 #include <linux/interrupt.h>
  20 #include <linux/regmap.h>
  21 #include <linux/mfd/da9063/core.h>
  22 #include <linux/mfd/da9063/pdata.h>
  23
  24 #define DA9063_REG_EVENT_A_OFFSET       0
  25 #define DA9063_REG_EVENT_B_OFFSET       1
  26 #define DA9063_REG_EVENT_C_OFFSET       2
  27 #define DA9063_REG_EVENT_D_OFFSET       3
  28 #define EVENTS_BUF_LEN                  4
  29
  30 struct da9063_irq_data {
  31         u16 reg;
  32         u8 mask;
  33 };
  34
  35 static const struct regmap_irq da9063_irqs[] = {
  36         /* DA9063 event A register */
  37         [DA9063_IRQ_ONKEY] = {
  38                 .reg_offset = DA9063_REG_EVENT_A_OFFSET,
  39                 .mask = DA9063_M_ONKEY,
  40         },
  41         [DA9063_IRQ_ALARM] = {
  42                 .reg_offset = DA9063_REG_EVENT_A_OFFSET,
  43                 .mask = DA9063_M_ALARM,
  44         },
  45         [DA9063_IRQ_TICK] = {
  46                 .reg_offset = DA9063_REG_EVENT_A_OFFSET,
  47                 .mask = DA9063_M_TICK,
  48         },
  49         [DA9063_IRQ_ADC_RDY] = {
  50                 .reg_offset = DA9063_REG_EVENT_A_OFFSET,
  51                 .mask = DA9063_M_ADC_RDY,
  52         },
  53         [DA9063_IRQ_SEQ_RDY] = {
  54                 .reg_offset = DA9063_REG_EVENT_A_OFFSET,
  55                 .mask = DA9063_M_SEQ_RDY,
  56         },
  57         /* DA9063 event B register */
  58         [DA9063_IRQ_WAKE] = {
  59                 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  60                 .mask = DA9063_M_WAKE,
  61         },
  62         [DA9063_IRQ_TEMP] = {
  63                 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  64                 .mask = DA9063_M_TEMP,
  65         },
  66         [DA9063_IRQ_COMP_1V2] = {
  67                 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  68                 .mask = DA9063_M_COMP_1V2,
  69         },
  70         [DA9063_IRQ_LDO_LIM] = {
  71                 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  72                 .mask = DA9063_M_LDO_LIM,
  73         },
  74         [DA9063_IRQ_REG_UVOV] = {
  75                 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  76                 .mask = DA9063_M_UVOV,
  77         },
  78         [DA9063_IRQ_DVC_RDY] = {
  79                 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  80                 .mask = DA9063_M_DVC_RDY,
  81         },
  82         [DA9063_IRQ_VDD_MON] = {
  83                 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  84                 .mask = DA9063_M_VDD_MON,
  85         },
  86         [DA9063_IRQ_WARN] = {
  87                 .reg_offset = DA9063_REG_EVENT_B_OFFSET,
  88                 .mask = DA9063_M_VDD_WARN,
  89         },
  90         /* DA9063 event C register */
  91         [DA9063_IRQ_GPI0] = {
  92                 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
  93                 .mask = DA9063_M_GPI0,
  94         },
  95         [DA9063_IRQ_GPI1] = {
  96                 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
  97                 .mask = DA9063_M_GPI1,
  98         },
  99         [DA9063_IRQ_GPI2] = {
 100                 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
 101                 .mask = DA9063_M_GPI2,
 102         },
 103         [DA9063_IRQ_GPI3] = {
 104                 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
 105                 .mask = DA9063_M_GPI3,
 106         },
 107         [DA9063_IRQ_GPI4] = {
 108                 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
 109                 .mask = DA9063_M_GPI4,
 110         },
 111         [DA9063_IRQ_GPI5] = {
 112                 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
 113                 .mask = DA9063_M_GPI5,
 114         },
 115         [DA9063_IRQ_GPI6] = {
 116                 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
 117                 .mask = DA9063_M_GPI6,
 118         },
 119         [DA9063_IRQ_GPI7] = {
 120                 .reg_offset = DA9063_REG_EVENT_C_OFFSET,
 121                 .mask = DA9063_M_GPI7,
 122         },
 123         /* DA9063 event D register */
 124         [DA9063_IRQ_GPI8] = {
 125                 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
 126                 .mask = DA9063_M_GPI8,
 127         },
 128         [DA9063_IRQ_GPI9] = {
 129                 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
 130                 .mask = DA9063_M_GPI9,
 131         },
 132         [DA9063_IRQ_GPI10] = {
 133                 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
 134                 .mask = DA9063_M_GPI10,
 135         },
 136         [DA9063_IRQ_GPI11] = {
 137                 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
 138                 .mask = DA9063_M_GPI11,
 139         },
 140         [DA9063_IRQ_GPI12] = {
 141                 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
 142                 .mask = DA9063_M_GPI12,
 143         },
 144         [DA9063_IRQ_GPI13] = {
 145                 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
 146                 .mask = DA9063_M_GPI13,
 147         },
 148         [DA9063_IRQ_GPI14] = {
 149                 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
 150                 .mask = DA9063_M_GPI14,
 151         },
 152         [DA9063_IRQ_GPI15] = {
 153                 .reg_offset = DA9063_REG_EVENT_D_OFFSET,
 154                 .mask = DA9063_M_GPI15,
 155         },
 156 };
 157
 158 static const struct regmap_irq_chip da9063_irq_chip = {
 159         .name = "da9063-irq",
 160         .irqs = da9063_irqs,
 161         .num_irqs = DA9063_NUM_IRQ,
 162
 163         .num_regs = 4,
 164         .status_base = DA9063_REG_EVENT_A,
 165         .mask_base = DA9063_REG_IRQ_MASK_A,
 166         .ack_base = DA9063_REG_EVENT_A,
 167         .init_ack_masked = true,
 168 };
 169
 170 int da9063_irq_init(struct da9063 *da9063)
 171 {
 172         int ret;
 173
 174         if (!da9063->chip_irq) {
 175                 dev_err(da9063->dev, "No IRQ configured\n");
 176                 return -EINVAL;
 177         }
 178
 179         ret = regmap_add_irq_chip(da9063->regmap, da9063->chip_irq,
 180                         IRQF_TRIGGER_LOW | IRQF_ONESHOT | IRQF_SHARED,
 181                         da9063->irq_base, &da9063_irq_chip,
 182                         &da9063->regmap_irq);
 183         if (ret) {
 184                 dev_err(da9063->dev, "Failed to reguest IRQ %d: %d\n",
 185                                 da9063->chip_irq, ret);
 186                 return ret;
 187         }
 188
 189         return 0;
 190 }
 191
 192 void da9063_irq_exit(struct da9063 *da9063)
 193 {
 194         regmap_del_irq_chip(da9063->chip_irq, da9063->regmap_irq);
 195 }