drivers/mfd/rts5249.c

   1 /* Driver for Realtek PCI-Express card reader
   2  *
   3  * Copyright(c) 2009-2013 Realtek Semiconductor Corp. All rights reserved.
   4  *
   5  * This program is free software; you can redistribute it and/or modify it
   6  * under the terms of the GNU General Public License as published by the
   7  * Free Software Foundation; either version 2, or (at your option) any
   8  * later version.
   9  *
  10  * This program is distributed in the hope that it will be useful, but
  11  * WITHOUT ANY WARRANTY; without even the implied warranty of
  12  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU
  13  * General Public License for more details.
  14  *
  15  * You should have received a copy of the GNU General Public License along
  16  * with this program; if not, see <http://www.gnu.org/licenses/>.
  17  *
  18  * Author:
  19  *   Wei WANG <wei_wang@realsil.com.cn>
  20  *   No. 128, West Shenhu Road, Suzhou Industry Park, Suzhou, China
  21  */
  22
  23 #include <linux/module.h>
  24 #include <linux/delay.h>
  25 #include <linux/mfd/rtsx_pci.h>
  26
  27 #include "rtsx_pcr.h"
  28
  29 static u8 rts5249_get_ic_version(struct rtsx_pcr *pcr)
  30 {
  31         u8 val;
  32
  33         rtsx_pci_read_register(pcr, DUMMY_REG_RESET_0, &val);
  34         return val & 0x0F;
  35 }
  36
  37 static void rts5249_fill_driving(struct rtsx_pcr *pcr, u8 voltage)
  38 {
  39         u8 driving_3v3[4][3] = {
  40                 {0x11, 0x11, 0x11},
  41                 {0x55, 0x55, 0x5C},
  42                 {0x99, 0x99, 0x92},
  43                 {0x99, 0x99, 0x92},
  44         };
  45         u8 driving_1v8[4][3] = {
  46                 {0x3C, 0x3C, 0x3C},
  47                 {0xB3, 0xB3, 0xB3},
  48                 {0xFE, 0xFE, 0xFE},
  49                 {0xC4, 0xC4, 0xC4},
  50         };
  51         u8 (*driving)[3], drive_sel;
  52
  53         if (voltage == OUTPUT_3V3) {
  54                 driving = driving_3v3;
  55                 drive_sel = pcr->sd30_drive_sel_3v3;
  56         } else {
  57                 driving = driving_1v8;
  58                 drive_sel = pcr->sd30_drive_sel_1v8;
  59         }
  60
  61         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CLK_DRIVE_SEL,
  62                         0xFF, driving[drive_sel][0]);
  63         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_CMD_DRIVE_SEL,
  64                         0xFF, driving[drive_sel][1]);
  65         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, SD30_DAT_DRIVE_SEL,
  66                         0xFF, driving[drive_sel][2]);
  67 }
  68
  69 static void rts5249_fetch_vendor_settings(struct rtsx_pcr *pcr)
  70 {
  71         u32 reg;
  72
  73         rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG1, &reg);
  74         dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG1, reg);
  75
  76         if (!rtsx_vendor_setting_valid(reg))
  77                 return;
  78
  79         pcr->aspm_en = rtsx_reg_to_aspm(reg);
  80         pcr->sd30_drive_sel_1v8 = rtsx_reg_to_sd30_drive_sel_1v8(reg);
  81         pcr->card_drive_sel &= 0x3F;
  82         pcr->card_drive_sel |= rtsx_reg_to_card_drive_sel(reg);
  83
  84         rtsx_pci_read_config_dword(pcr, PCR_SETTING_REG2, &reg);
  85         dev_dbg(&(pcr->pci->dev), "Cfg 0x%x: 0x%x\n", PCR_SETTING_REG2, reg);
  86         pcr->sd30_drive_sel_3v3 = rtsx_reg_to_sd30_drive_sel_3v3(reg);
  87         if (rtsx_reg_check_reverse_socket(reg))
  88                 pcr->flags |= PCR_REVERSE_SOCKET;
  89 }
  90
  91 static int rts5249_extra_init_hw(struct rtsx_pcr *pcr)
  92 {
  93         rtsx_pci_init_cmd(pcr);
  94
  95         /* Configure GPIO as output */
  96         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, GPIO_CTL, 0x02, 0x02);
  97         /* Switch LDO3318 source from DV33 to card_3v3 */
  98         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x00);
  99         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, LDO_PWR_SEL, 0x03, 0x01);
 100         /* LED shine disabled, set initial shine cycle period */
 101         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, OLT_LED_CTL, 0x0F, 0x02);
 102         /* Configure driving */
 103         rts5249_fill_driving(pcr, OUTPUT_3V3);
 104         if (pcr->flags & PCR_REVERSE_SOCKET)
 105                 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
 106                                 AUTOLOAD_CFG_BASE + 3, 0xB0, 0xB0);
 107         else
 108                 rtsx_pci_add_cmd(pcr, WRITE_REG_CMD,
 109                                 AUTOLOAD_CFG_BASE + 3, 0xB0, 0x80);
 110
 111         return rtsx_pci_send_cmd(pcr, 100);
 112 }
 113
 114 static int rts5249_optimize_phy(struct rtsx_pcr *pcr)
 115 {
 116         int err;
 117
 118         err = rtsx_pci_write_phy_register(pcr, PHY_REG_REV, 0xFE46);
 119         if (err < 0)
 120                 return err;
 121
 122         msleep(1);
 123
 124         return rtsx_pci_write_phy_register(pcr, PHY_BPCR, 0x05C0);
 125 }
 126
 127 static int rts5249_turn_on_led(struct rtsx_pcr *pcr)
 128 {
 129         return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x02);
 130 }
 131
 132 static int rts5249_turn_off_led(struct rtsx_pcr *pcr)
 133 {
 134         return rtsx_pci_write_register(pcr, GPIO_CTL, 0x02, 0x00);
 135 }
 136
 137 static int rts5249_enable_auto_blink(struct rtsx_pcr *pcr)
 138 {
 139         return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x08);
 140 }
 141
 142 static int rts5249_disable_auto_blink(struct rtsx_pcr *pcr)
 143 {
 144         return rtsx_pci_write_register(pcr, OLT_LED_CTL, 0x08, 0x00);
 145 }
 146
 147 static int rts5249_card_power_on(struct rtsx_pcr *pcr, int card)
 148 {
 149         int err;
 150
 151         rtsx_pci_init_cmd(pcr);
 152         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
 153                         SD_POWER_MASK, SD_VCC_PARTIAL_POWER_ON);
 154         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
 155                         LDO3318_PWR_MASK, 0x02);
 156         err = rtsx_pci_send_cmd(pcr, 100);
 157         if (err < 0)
 158                 return err;
 159
 160         msleep(5);
 161
 162         rtsx_pci_init_cmd(pcr);
 163         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
 164                         SD_POWER_MASK, SD_VCC_POWER_ON);
 165         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
 166                         LDO3318_PWR_MASK, 0x06);
 167         err = rtsx_pci_send_cmd(pcr, 100);
 168         if (err < 0)
 169                 return err;
 170
 171         return 0;
 172 }
 173
 174 static int rts5249_card_power_off(struct rtsx_pcr *pcr, int card)
 175 {
 176         rtsx_pci_init_cmd(pcr);
 177         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, CARD_PWR_CTL,
 178                         SD_POWER_MASK, SD_POWER_OFF);
 179         rtsx_pci_add_cmd(pcr, WRITE_REG_CMD, PWR_GATE_CTRL,
 180                         LDO3318_PWR_MASK, 0x00);
 181         return rtsx_pci_send_cmd(pcr, 100);
 182 }
 183
 184 static int rts5249_switch_output_voltage(struct rtsx_pcr *pcr, u8 voltage)
 185 {
 186         int err;
 187
 188         if (voltage == OUTPUT_3V3) {
 189                 err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, 0x4FC0 | 0x24);
 190                 if (err < 0)
 191                         return err;
 192         } else if (voltage == OUTPUT_1V8) {
 193                 err = rtsx_pci_write_phy_register(pcr, PHY_BACR, 0x3C02);
 194                 if (err < 0)
 195                         return err;
 196                 err = rtsx_pci_write_phy_register(pcr, PHY_TUNE, 0x4C40 | 0x24);
 197                 if (err < 0)
 198                         return err;
 199         } else {
 200                 return -EINVAL;
 201         }
 202
 203         /* set pad drive */
 204         rtsx_pci_init_cmd(pcr);
 205         rts5249_fill_driving(pcr, voltage);
 206         return rtsx_pci_send_cmd(pcr, 100);
 207 }
 208
 209 static const struct pcr_ops rts5249_pcr_ops = {
 210         .fetch_vendor_settings = rts5249_fetch_vendor_settings,
 211         .extra_init_hw = rts5249_extra_init_hw,
 212         .optimize_phy = rts5249_optimize_phy,
 213         .turn_on_led = rts5249_turn_on_led,
 214         .turn_off_led = rts5249_turn_off_led,
 215         .enable_auto_blink = rts5249_enable_auto_blink,
 216         .disable_auto_blink = rts5249_disable_auto_blink,
 217         .card_power_on = rts5249_card_power_on,
 218         .card_power_off = rts5249_card_power_off,
 219         .switch_output_voltage = rts5249_switch_output_voltage,
 220 };
 221
 222 /* SD Pull Control Enable:
 223  *     SD_DAT[3:0] ==> pull up
 224  *     SD_CD       ==> pull up
 225  *     SD_WP       ==> pull up
 226  *     SD_CMD      ==> pull up
 227  *     SD_CLK      ==> pull down
 228  */
 229 static const u32 rts5249_sd_pull_ctl_enable_tbl[] = {
 230         RTSX_REG_PAIR(CARD_PULL_CTL1, 0x66),
 231         RTSX_REG_PAIR(CARD_PULL_CTL2, 0xAA),
 232         RTSX_REG_PAIR(CARD_PULL_CTL3, 0xE9),
 233         RTSX_REG_PAIR(CARD_PULL_CTL4, 0xAA),
 234         0,
 235 };
 236
 237 /* SD Pull Control Disable:
 238  *     SD_DAT[3:0] ==> pull down
 239  *     SD_CD       ==> pull up
 240  *     SD_WP       ==> pull down
 241  *     SD_CMD      ==> pull down
 242  *     SD_CLK      ==> pull down
 243  */
 244 static const u32 rts5249_sd_pull_ctl_disable_tbl[] = {
 245         RTSX_REG_PAIR(CARD_PULL_CTL1, 0x66),
 246         RTSX_REG_PAIR(CARD_PULL_CTL2, 0x55),
 247         RTSX_REG_PAIR(CARD_PULL_CTL3, 0xD5),
 248         RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
 249         0,
 250 };
 251
 252 /* MS Pull Control Enable:
 253  *     MS CD       ==> pull up
 254  *     others      ==> pull down
 255  */
 256 static const u32 rts5249_ms_pull_ctl_enable_tbl[] = {
 257         RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
 258         RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
 259         RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
 260         0,
 261 };
 262
 263 /* MS Pull Control Disable:
 264  *     MS CD       ==> pull up
 265  *     others      ==> pull down
 266  */
 267 static const u32 rts5249_ms_pull_ctl_disable_tbl[] = {
 268         RTSX_REG_PAIR(CARD_PULL_CTL4, 0x55),
 269         RTSX_REG_PAIR(CARD_PULL_CTL5, 0x55),
 270         RTSX_REG_PAIR(CARD_PULL_CTL6, 0x15),
 271         0,
 272 };
 273
 274 void rts5249_init_params(struct rtsx_pcr *pcr)
 275 {
 276         pcr->extra_caps = EXTRA_CAPS_SD_SDR50 | EXTRA_CAPS_SD_SDR104;
 277         pcr->num_slots = 2;
 278         pcr->ops = &rts5249_pcr_ops;
 279
 280         pcr->flags = 0;
 281         pcr->card_drive_sel = RTSX_CARD_DRIVE_DEFAULT;
 282         pcr->sd30_drive_sel_1v8 = CFG_DRIVER_TYPE_C;
 283         pcr->sd30_drive_sel_3v3 = CFG_DRIVER_TYPE_B;
 284         pcr->aspm_en = ASPM_L1_EN;
 285
 286         pcr->ic_version = rts5249_get_ic_version(pcr);
 287         pcr->sd_pull_ctl_enable_tbl = rts5249_sd_pull_ctl_enable_tbl;
 288         pcr->sd_pull_ctl_disable_tbl = rts5249_sd_pull_ctl_disable_tbl;
 289         pcr->ms_pull_ctl_enable_tbl = rts5249_ms_pull_ctl_enable_tbl;
 290         pcr->ms_pull_ctl_disable_tbl = rts5249_ms_pull_ctl_disable_tbl;
 291 }