drivers/mfd/stmpe.c

   1 /*
   2  * ST Microelectronics MFD: stmpe's driver
   3  *
   4  * Copyright (C) ST-Ericsson SA 2010
   5  *
   6  * License Terms: GNU General Public License, version 2
   7  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
   8  */
   9
  10 #include <linux/err.h>
  11 #include <linux/gpio.h>
  12 #include <linux/export.h>
  13 #include <linux/kernel.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/irq.h>
  16 #include <linux/irqdomain.h>
  17 #include <linux/of.h>
  18 #include <linux/of_gpio.h>
  19 #include <linux/pm.h>
  20 #include <linux/slab.h>
  21 #include <linux/mfd/core.h>
  22 #include "stmpe.h"
  23
  24 static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
  25 {
  26         return stmpe->variant->enable(stmpe, blocks, true);
  27 }
  28
  29 static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
  30 {
  31         return stmpe->variant->enable(stmpe, blocks, false);
  32 }
  33
  34 static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
  35 {
  36         int ret;
  37
  38         ret = stmpe->ci->read_byte(stmpe, reg);
  39         if (ret < 0)
  40                 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret);
  41
  42         dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);
  43
  44         return ret;
  45 }
  46
  47 static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
  48 {
  49         int ret;
  50
  51         dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);
  52
  53         ret = stmpe->ci->write_byte(stmpe, reg, val);
  54         if (ret < 0)
  55                 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret);
  56
  57         return ret;
  58 }
  59
  60 static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
  61 {
  62         int ret;
  63
  64         ret = __stmpe_reg_read(stmpe, reg);
  65         if (ret < 0)
  66                 return ret;
  67
  68         ret &= ~mask;
  69         ret |= val;
  70
  71         return __stmpe_reg_write(stmpe, reg, ret);
  72 }
  73
  74 static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
  75                               u8 *values)
  76 {
  77         int ret;
  78
  79         ret = stmpe->ci->read_block(stmpe, reg, length, values);
  80         if (ret < 0)
  81                 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret);
  82
  83         dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
  84         stmpe_dump_bytes("stmpe rd: ", values, length);
  85
  86         return ret;
  87 }
  88
  89 static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
  90                         const u8 *values)
  91 {
  92         int ret;
  93
  94         dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
  95         stmpe_dump_bytes("stmpe wr: ", values, length);
  96
  97         ret = stmpe->ci->write_block(stmpe, reg, length, values);
  98         if (ret < 0)
  99                 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret);
 100
 101         return ret;
 102 }
 103
 104 /**
 105  * stmpe_enable - enable blocks on an STMPE device
 106  * @stmpe:      Device to work on
 107  * @blocks:     Mask of blocks (enum stmpe_block values) to enable
 108  */
 109 int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
 110 {
 111         int ret;
 112
 113         mutex_lock(&stmpe->lock);
 114         ret = __stmpe_enable(stmpe, blocks);
 115         mutex_unlock(&stmpe->lock);
 116
 117         return ret;
 118 }
 119 EXPORT_SYMBOL_GPL(stmpe_enable);
 120
 121 /**
 122  * stmpe_disable - disable blocks on an STMPE device
 123  * @stmpe:      Device to work on
 124  * @blocks:     Mask of blocks (enum stmpe_block values) to enable
 125  */
 126 int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
 127 {
 128         int ret;
 129
 130         mutex_lock(&stmpe->lock);
 131         ret = __stmpe_disable(stmpe, blocks);
 132         mutex_unlock(&stmpe->lock);
 133
 134         return ret;
 135 }
 136 EXPORT_SYMBOL_GPL(stmpe_disable);
 137
 138 /**
 139  * stmpe_reg_read() - read a single STMPE register
 140  * @stmpe:      Device to read from
 141  * @reg:        Register to read
 142  */
 143 int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
 144 {
 145         int ret;
 146
 147         mutex_lock(&stmpe->lock);
 148         ret = __stmpe_reg_read(stmpe, reg);
 149         mutex_unlock(&stmpe->lock);
 150
 151         return ret;
 152 }
 153 EXPORT_SYMBOL_GPL(stmpe_reg_read);
 154
 155 /**
 156  * stmpe_reg_write() - write a single STMPE register
 157  * @stmpe:      Device to write to
 158  * @reg:        Register to write
 159  * @val:        Value to write
 160  */
 161 int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
 162 {
 163         int ret;
 164
 165         mutex_lock(&stmpe->lock);
 166         ret = __stmpe_reg_write(stmpe, reg, val);
 167         mutex_unlock(&stmpe->lock);
 168
 169         return ret;
 170 }
 171 EXPORT_SYMBOL_GPL(stmpe_reg_write);
 172
 173 /**
 174  * stmpe_set_bits() - set the value of a bitfield in a STMPE register
 175  * @stmpe:      Device to write to
 176  * @reg:        Register to write
 177  * @mask:       Mask of bits to set
 178  * @val:        Value to set
 179  */
 180 int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
 181 {
 182         int ret;
 183
 184         mutex_lock(&stmpe->lock);
 185         ret = __stmpe_set_bits(stmpe, reg, mask, val);
 186         mutex_unlock(&stmpe->lock);
 187
 188         return ret;
 189 }
 190 EXPORT_SYMBOL_GPL(stmpe_set_bits);
 191
 192 /**
 193  * stmpe_block_read() - read multiple STMPE registers
 194  * @stmpe:      Device to read from
 195  * @reg:        First register
 196  * @length:     Number of registers
 197  * @values:     Buffer to write to
 198  */
 199 int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
 200 {
 201         int ret;
 202
 203         mutex_lock(&stmpe->lock);
 204         ret = __stmpe_block_read(stmpe, reg, length, values);
 205         mutex_unlock(&stmpe->lock);
 206
 207         return ret;
 208 }
 209 EXPORT_SYMBOL_GPL(stmpe_block_read);
 210
 211 /**
 212  * stmpe_block_write() - write multiple STMPE registers
 213  * @stmpe:      Device to write to
 214  * @reg:        First register
 215  * @length:     Number of registers
 216  * @values:     Values to write
 217  */
 218 int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
 219                       const u8 *values)
 220 {
 221         int ret;
 222
 223         mutex_lock(&stmpe->lock);
 224         ret = __stmpe_block_write(stmpe, reg, length, values);
 225         mutex_unlock(&stmpe->lock);
 226
 227         return ret;
 228 }
 229 EXPORT_SYMBOL_GPL(stmpe_block_write);
 230
 231 /**
 232  * stmpe_set_altfunc()- set the alternate function for STMPE pins
 233  * @stmpe:      Device to configure
 234  * @pins:       Bitmask of pins to affect
 235  * @block:      block to enable alternate functions for
 236  *
 237  * @pins is assumed to have a bit set for each of the bits whose alternate
 238  * function is to be changed, numbered according to the GPIOXY numbers.
 239  *
 240  * If the GPIO module is not enabled, this function automatically enables it in
 241  * order to perform the change.
 242  */
 243 int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
 244 {
 245         struct stmpe_variant_info *variant = stmpe->variant;
 246         u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
 247         int af_bits = variant->af_bits;
 248         int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
 249         int mask = (1 << af_bits) - 1;
 250         u8 regs[numregs];
 251         int af, afperreg, ret;
 252
 253         if (!variant->get_altfunc)
 254                 return 0;
 255
 256         afperreg = 8 / af_bits;
 257         mutex_lock(&stmpe->lock);
 258
 259         ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
 260         if (ret < 0)
 261                 goto out;
 262
 263         ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
 264         if (ret < 0)
 265                 goto out;
 266
 267         af = variant->get_altfunc(stmpe, block);
 268
 269         while (pins) {
 270                 int pin = __ffs(pins);
 271                 int regoffset = numregs - (pin / afperreg) - 1;
 272                 int pos = (pin % afperreg) * (8 / afperreg);
 273
 274                 regs[regoffset] &= ~(mask << pos);
 275                 regs[regoffset] |= af << pos;
 276
 277                 pins &= ~(1 << pin);
 278         }
 279
 280         ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);
 281
 282 out:
 283         mutex_unlock(&stmpe->lock);
 284         return ret;
 285 }
 286 EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
 287
 288 /*
 289  * GPIO (all variants)
 290  */
 291
 292 static struct resource stmpe_gpio_resources[] = {
 293         /* Start and end filled dynamically */
 294         {
 295                 .flags  = IORESOURCE_IRQ,
 296         },
 297 };
 298
 299 static struct mfd_cell stmpe_gpio_cell = {
 300         .name           = "stmpe-gpio",
 301         .of_compatible  = "st,stmpe-gpio",
 302         .resources      = stmpe_gpio_resources,
 303         .num_resources  = ARRAY_SIZE(stmpe_gpio_resources),
 304 };
 305
 306 static struct mfd_cell stmpe_gpio_cell_noirq = {
 307         .name           = "stmpe-gpio",
 308         .of_compatible  = "st,stmpe-gpio",
 309         /* gpio cell resources consist of an irq only so no resources here */
 310 };
 311
 312 /*
 313  * Keypad (1601, 2401, 2403)
 314  */
 315
 316 static struct resource stmpe_keypad_resources[] = {
 317         {
 318                 .name   = "KEYPAD",
 319                 .flags  = IORESOURCE_IRQ,
 320         },
 321         {
 322                 .name   = "KEYPAD_OVER",
 323                 .flags  = IORESOURCE_IRQ,
 324         },
 325 };
 326
 327 static struct mfd_cell stmpe_keypad_cell = {
 328         .name           = "stmpe-keypad",
 329         .resources      = stmpe_keypad_resources,
 330         .num_resources  = ARRAY_SIZE(stmpe_keypad_resources),
 331 };
 332
 333 /*
 334  * STMPE801
 335  */
 336 static const u8 stmpe801_regs[] = {
 337         [STMPE_IDX_CHIP_ID]     = STMPE801_REG_CHIP_ID,
 338         [STMPE_IDX_ICR_LSB]     = STMPE801_REG_SYS_CTRL,
 339         [STMPE_IDX_GPMR_LSB]    = STMPE801_REG_GPIO_MP_STA,
 340         [STMPE_IDX_GPSR_LSB]    = STMPE801_REG_GPIO_SET_PIN,
 341         [STMPE_IDX_GPCR_LSB]    = STMPE801_REG_GPIO_SET_PIN,
 342         [STMPE_IDX_GPDR_LSB]    = STMPE801_REG_GPIO_DIR,
 343         [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN,
 344         [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA,
 345
 346 };
 347
 348 static struct stmpe_variant_block stmpe801_blocks[] = {
 349         {
 350                 .cell   = &stmpe_gpio_cell,
 351                 .irq    = 0,
 352                 .block  = STMPE_BLOCK_GPIO,
 353         },
 354 };
 355
 356 static struct stmpe_variant_block stmpe801_blocks_noirq[] = {
 357         {
 358                 .cell   = &stmpe_gpio_cell_noirq,
 359                 .block  = STMPE_BLOCK_GPIO,
 360         },
 361 };
 362
 363 static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks,
 364                            bool enable)
 365 {
 366         if (blocks & STMPE_BLOCK_GPIO)
 367                 return 0;
 368         else
 369                 return -EINVAL;
 370 }
 371
 372 static struct stmpe_variant_info stmpe801 = {
 373         .name           = "stmpe801",
 374         .id_val         = STMPE801_ID,
 375         .id_mask        = 0xffff,
 376         .num_gpios      = 8,
 377         .regs           = stmpe801_regs,
 378         .blocks         = stmpe801_blocks,
 379         .num_blocks     = ARRAY_SIZE(stmpe801_blocks),
 380         .num_irqs       = STMPE801_NR_INTERNAL_IRQS,
 381         .enable         = stmpe801_enable,
 382 };
 383
 384 static struct stmpe_variant_info stmpe801_noirq = {
 385         .name           = "stmpe801",
 386         .id_val         = STMPE801_ID,
 387         .id_mask        = 0xffff,
 388         .num_gpios      = 8,
 389         .regs           = stmpe801_regs,
 390         .blocks         = stmpe801_blocks_noirq,
 391         .num_blocks     = ARRAY_SIZE(stmpe801_blocks_noirq),
 392         .enable         = stmpe801_enable,
 393 };
 394
 395 /*
 396  * Touchscreen (STMPE811 or STMPE610)
 397  */
 398
 399 static struct resource stmpe_ts_resources[] = {
 400         {
 401                 .name   = "TOUCH_DET",
 402                 .flags  = IORESOURCE_IRQ,
 403         },
 404         {
 405                 .name   = "FIFO_TH",
 406                 .flags  = IORESOURCE_IRQ,
 407         },
 408 };
 409
 410 static struct mfd_cell stmpe_ts_cell = {
 411         .name           = "stmpe-ts",
 412         .resources      = stmpe_ts_resources,
 413         .num_resources  = ARRAY_SIZE(stmpe_ts_resources),
 414 };
 415
 416 /*
 417  * STMPE811 or STMPE610
 418  */
 419
 420 static const u8 stmpe811_regs[] = {
 421         [STMPE_IDX_CHIP_ID]     = STMPE811_REG_CHIP_ID,
 422         [STMPE_IDX_ICR_LSB]     = STMPE811_REG_INT_CTRL,
 423         [STMPE_IDX_IER_LSB]     = STMPE811_REG_INT_EN,
 424         [STMPE_IDX_ISR_MSB]     = STMPE811_REG_INT_STA,
 425         [STMPE_IDX_GPMR_LSB]    = STMPE811_REG_GPIO_MP_STA,
 426         [STMPE_IDX_GPSR_LSB]    = STMPE811_REG_GPIO_SET_PIN,
 427         [STMPE_IDX_GPCR_LSB]    = STMPE811_REG_GPIO_CLR_PIN,
 428         [STMPE_IDX_GPDR_LSB]    = STMPE811_REG_GPIO_DIR,
 429         [STMPE_IDX_GPRER_LSB]   = STMPE811_REG_GPIO_RE,
 430         [STMPE_IDX_GPFER_LSB]   = STMPE811_REG_GPIO_FE,
 431         [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF,
 432         [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN,
 433         [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA,
 434         [STMPE_IDX_GPEDR_MSB]   = STMPE811_REG_GPIO_ED,
 435 };
 436
 437 static struct stmpe_variant_block stmpe811_blocks[] = {
 438         {
 439                 .cell   = &stmpe_gpio_cell,
 440                 .irq    = STMPE811_IRQ_GPIOC,
 441                 .block  = STMPE_BLOCK_GPIO,
 442         },
 443         {
 444                 .cell   = &stmpe_ts_cell,
 445                 .irq    = STMPE811_IRQ_TOUCH_DET,
 446                 .block  = STMPE_BLOCK_TOUCHSCREEN,
 447         },
 448 };
 449
 450 static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
 451                            bool enable)
 452 {
 453         unsigned int mask = 0;
 454
 455         if (blocks & STMPE_BLOCK_GPIO)
 456                 mask |= STMPE811_SYS_CTRL2_GPIO_OFF;
 457
 458         if (blocks & STMPE_BLOCK_ADC)
 459                 mask |= STMPE811_SYS_CTRL2_ADC_OFF;
 460
 461         if (blocks & STMPE_BLOCK_TOUCHSCREEN)
 462                 mask |= STMPE811_SYS_CTRL2_TSC_OFF;
 463
 464         return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask,
 465                                 enable ? 0 : mask);
 466 }
 467
 468 static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 469 {
 470         /* 0 for touchscreen, 1 for GPIO */
 471         return block != STMPE_BLOCK_TOUCHSCREEN;
 472 }
 473
 474 static struct stmpe_variant_info stmpe811 = {
 475         .name           = "stmpe811",
 476         .id_val         = 0x0811,
 477         .id_mask        = 0xffff,
 478         .num_gpios      = 8,
 479         .af_bits        = 1,
 480         .regs           = stmpe811_regs,
 481         .blocks         = stmpe811_blocks,
 482         .num_blocks     = ARRAY_SIZE(stmpe811_blocks),
 483         .num_irqs       = STMPE811_NR_INTERNAL_IRQS,
 484         .enable         = stmpe811_enable,
 485         .get_altfunc    = stmpe811_get_altfunc,
 486 };
 487
 488 /* Similar to 811, except number of gpios */
 489 static struct stmpe_variant_info stmpe610 = {
 490         .name           = "stmpe610",
 491         .id_val         = 0x0811,
 492         .id_mask        = 0xffff,
 493         .num_gpios      = 6,
 494         .af_bits        = 1,
 495         .regs           = stmpe811_regs,
 496         .blocks         = stmpe811_blocks,
 497         .num_blocks     = ARRAY_SIZE(stmpe811_blocks),
 498         .num_irqs       = STMPE811_NR_INTERNAL_IRQS,
 499         .enable         = stmpe811_enable,
 500         .get_altfunc    = stmpe811_get_altfunc,
 501 };
 502
 503 /*
 504  * STMPE1601
 505  */
 506
 507 static const u8 stmpe1601_regs[] = {
 508         [STMPE_IDX_CHIP_ID]     = STMPE1601_REG_CHIP_ID,
 509         [STMPE_IDX_ICR_LSB]     = STMPE1601_REG_ICR_LSB,
 510         [STMPE_IDX_IER_LSB]     = STMPE1601_REG_IER_LSB,
 511         [STMPE_IDX_ISR_MSB]     = STMPE1601_REG_ISR_MSB,
 512         [STMPE_IDX_GPMR_LSB]    = STMPE1601_REG_GPIO_MP_LSB,
 513         [STMPE_IDX_GPSR_LSB]    = STMPE1601_REG_GPIO_SET_LSB,
 514         [STMPE_IDX_GPCR_LSB]    = STMPE1601_REG_GPIO_CLR_LSB,
 515         [STMPE_IDX_GPDR_LSB]    = STMPE1601_REG_GPIO_SET_DIR_LSB,
 516         [STMPE_IDX_GPRER_LSB]   = STMPE1601_REG_GPIO_RE_LSB,
 517         [STMPE_IDX_GPFER_LSB]   = STMPE1601_REG_GPIO_FE_LSB,
 518         [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB,
 519         [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
 520         [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB,
 521         [STMPE_IDX_GPEDR_MSB]   = STMPE1601_REG_GPIO_ED_MSB,
 522 };
 523
 524 static struct stmpe_variant_block stmpe1601_blocks[] = {
 525         {
 526                 .cell   = &stmpe_gpio_cell,
 527                 .irq    = STMPE1601_IRQ_GPIOC,
 528                 .block  = STMPE_BLOCK_GPIO,
 529         },
 530         {
 531                 .cell   = &stmpe_keypad_cell,
 532                 .irq    = STMPE1601_IRQ_KEYPAD,
 533                 .block  = STMPE_BLOCK_KEYPAD,
 534         },
 535 };
 536
 537 /* supported autosleep timeout delay (in msecs) */
 538 static const int stmpe_autosleep_delay[] = {
 539         4, 16, 32, 64, 128, 256, 512, 1024,
 540 };
 541
 542 static int stmpe_round_timeout(int timeout)
 543 {
 544         int i;
 545
 546         for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
 547                 if (stmpe_autosleep_delay[i] >= timeout)
 548                         return i;
 549         }
 550
 551         /*
 552          * requests for delays longer than supported should not return the
 553          * longest supported delay
 554          */
 555         return -EINVAL;
 556 }
 557
 558 static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
 559 {
 560         int ret;
 561
 562         if (!stmpe->variant->enable_autosleep)
 563                 return -ENOSYS;
 564
 565         mutex_lock(&stmpe->lock);
 566         ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
 567         mutex_unlock(&stmpe->lock);
 568
 569         return ret;
 570 }
 571
 572 /*
 573  * Both stmpe 1601/2403 support same layout for autosleep
 574  */
 575 static int stmpe1601_autosleep(struct stmpe *stmpe,
 576                 int autosleep_timeout)
 577 {
 578         int ret, timeout;
 579
 580         /* choose the best available timeout */
 581         timeout = stmpe_round_timeout(autosleep_timeout);
 582         if (timeout < 0) {
 583                 dev_err(stmpe->dev, "invalid timeout\n");
 584                 return timeout;
 585         }
 586
 587         ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
 588                         STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
 589                         timeout);
 590         if (ret < 0)
 591                 return ret;
 592
 593         return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
 594                         STPME1601_AUTOSLEEP_ENABLE,
 595                         STPME1601_AUTOSLEEP_ENABLE);
 596 }
 597
 598 static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
 599                             bool enable)
 600 {
 601         unsigned int mask = 0;
 602
 603         if (blocks & STMPE_BLOCK_GPIO)
 604                 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
 605
 606         if (blocks & STMPE_BLOCK_KEYPAD)
 607                 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
 608
 609         return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask,
 610                                 enable ? mask : 0);
 611 }
 612
 613 static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 614 {
 615         switch (block) {
 616         case STMPE_BLOCK_PWM:
 617                 return 2;
 618
 619         case STMPE_BLOCK_KEYPAD:
 620                 return 1;
 621
 622         case STMPE_BLOCK_GPIO:
 623         default:
 624                 return 0;
 625         }
 626 }
 627
 628 static struct stmpe_variant_info stmpe1601 = {
 629         .name           = "stmpe1601",
 630         .id_val         = 0x0210,
 631         .id_mask        = 0xfff0,       /* at least 0x0210 and 0x0212 */
 632         .num_gpios      = 16,
 633         .af_bits        = 2,
 634         .regs           = stmpe1601_regs,
 635         .blocks         = stmpe1601_blocks,
 636         .num_blocks     = ARRAY_SIZE(stmpe1601_blocks),
 637         .num_irqs       = STMPE1601_NR_INTERNAL_IRQS,
 638         .enable         = stmpe1601_enable,
 639         .get_altfunc    = stmpe1601_get_altfunc,
 640         .enable_autosleep       = stmpe1601_autosleep,
 641 };
 642
 643 /*
 644  * STMPE24XX
 645  */
 646
 647 static const u8 stmpe24xx_regs[] = {
 648         [STMPE_IDX_CHIP_ID]     = STMPE24XX_REG_CHIP_ID,
 649         [STMPE_IDX_ICR_LSB]     = STMPE24XX_REG_ICR_LSB,
 650         [STMPE_IDX_IER_LSB]     = STMPE24XX_REG_IER_LSB,
 651         [STMPE_IDX_ISR_MSB]     = STMPE24XX_REG_ISR_MSB,
 652         [STMPE_IDX_GPMR_LSB]    = STMPE24XX_REG_GPMR_LSB,
 653         [STMPE_IDX_GPSR_LSB]    = STMPE24XX_REG_GPSR_LSB,
 654         [STMPE_IDX_GPCR_LSB]    = STMPE24XX_REG_GPCR_LSB,
 655         [STMPE_IDX_GPDR_LSB]    = STMPE24XX_REG_GPDR_LSB,
 656         [STMPE_IDX_GPRER_LSB]   = STMPE24XX_REG_GPRER_LSB,
 657         [STMPE_IDX_GPFER_LSB]   = STMPE24XX_REG_GPFER_LSB,
 658         [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB,
 659         [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB,
 660         [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB,
 661         [STMPE_IDX_GPEDR_MSB]   = STMPE24XX_REG_GPEDR_MSB,
 662 };
 663
 664 static struct stmpe_variant_block stmpe24xx_blocks[] = {
 665         {
 666                 .cell   = &stmpe_gpio_cell,
 667                 .irq    = STMPE24XX_IRQ_GPIOC,
 668                 .block  = STMPE_BLOCK_GPIO,
 669         },
 670         {
 671                 .cell   = &stmpe_keypad_cell,
 672                 .irq    = STMPE24XX_IRQ_KEYPAD,
 673                 .block  = STMPE_BLOCK_KEYPAD,
 674         },
 675 };
 676
 677 static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
 678                             bool enable)
 679 {
 680         unsigned int mask = 0;
 681
 682         if (blocks & STMPE_BLOCK_GPIO)
 683                 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;
 684
 685         if (blocks & STMPE_BLOCK_KEYPAD)
 686                 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;
 687
 688         return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask,
 689                                 enable ? mask : 0);
 690 }
 691
 692 static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 693 {
 694         switch (block) {
 695         case STMPE_BLOCK_ROTATOR:
 696                 return 2;
 697
 698         case STMPE_BLOCK_KEYPAD:
 699                 return 1;
 700
 701         case STMPE_BLOCK_GPIO:
 702         default:
 703                 return 0;
 704         }
 705 }
 706
 707 static struct stmpe_variant_info stmpe2401 = {
 708         .name           = "stmpe2401",
 709         .id_val         = 0x0101,
 710         .id_mask        = 0xffff,
 711         .num_gpios      = 24,
 712         .af_bits        = 2,
 713         .regs           = stmpe24xx_regs,
 714         .blocks         = stmpe24xx_blocks,
 715         .num_blocks     = ARRAY_SIZE(stmpe24xx_blocks),
 716         .num_irqs       = STMPE24XX_NR_INTERNAL_IRQS,
 717         .enable         = stmpe24xx_enable,
 718         .get_altfunc    = stmpe24xx_get_altfunc,
 719 };
 720
 721 static struct stmpe_variant_info stmpe2403 = {
 722         .name           = "stmpe2403",
 723         .id_val         = 0x0120,
 724         .id_mask        = 0xffff,
 725         .num_gpios      = 24,
 726         .af_bits        = 2,
 727         .regs           = stmpe24xx_regs,
 728         .blocks         = stmpe24xx_blocks,
 729         .num_blocks     = ARRAY_SIZE(stmpe24xx_blocks),
 730         .num_irqs       = STMPE24XX_NR_INTERNAL_IRQS,
 731         .enable         = stmpe24xx_enable,
 732         .get_altfunc    = stmpe24xx_get_altfunc,
 733         .enable_autosleep       = stmpe1601_autosleep, /* same as stmpe1601 */
 734 };
 735
 736 static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = {
 737         [STMPE610]      = &stmpe610,
 738         [STMPE801]      = &stmpe801,
 739         [STMPE811]      = &stmpe811,
 740         [STMPE1601]     = &stmpe1601,
 741         [STMPE2401]     = &stmpe2401,
 742         [STMPE2403]     = &stmpe2403,
 743 };
 744
 745 /*
 746  * These devices can be connected in a 'no-irq' configuration - the irq pin
 747  * is not used and the device cannot interrupt the CPU. Here we only list
 748  * devices which support this configuration - the driver will fail probing
 749  * for any devices not listed here which are configured in this way.
 750  */
 751 static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = {
 752         [STMPE801]      = &stmpe801_noirq,
 753 };
 754
 755 static irqreturn_t stmpe_irq(int irq, void *data)
 756 {
 757         struct stmpe *stmpe = data;
 758         struct stmpe_variant_info *variant = stmpe->variant;
 759         int num = DIV_ROUND_UP(variant->num_irqs, 8);
 760         u8 israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
 761         u8 isr[num];
 762         int ret;
 763         int i;
 764
 765         if (variant->id_val == STMPE801_ID) {
 766                 int base = irq_create_mapping(stmpe->domain, 0);
 767
 768                 handle_nested_irq(base);
 769                 return IRQ_HANDLED;
 770         }
 771
 772         ret = stmpe_block_read(stmpe, israddr, num, isr);
 773         if (ret < 0)
 774                 return IRQ_NONE;
 775
 776         for (i = 0; i < num; i++) {
 777                 int bank = num - i - 1;
 778                 u8 status = isr[i];
 779                 u8 clear;
 780
 781                 status &= stmpe->ier[bank];
 782                 if (!status)
 783                         continue;
 784
 785                 clear = status;
 786                 while (status) {
 787                         int bit = __ffs(status);
 788                         int line = bank * 8 + bit;
 789                         int nestedirq = irq_create_mapping(stmpe->domain, line);
 790
 791                         handle_nested_irq(nestedirq);
 792                         status &= ~(1 << bit);
 793                 }
 794
 795                 stmpe_reg_write(stmpe, israddr + i, clear);
 796         }
 797
 798         return IRQ_HANDLED;
 799 }
 800
 801 static void stmpe_irq_lock(struct irq_data *data)
 802 {
 803         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 804
 805         mutex_lock(&stmpe->irq_lock);
 806 }
 807
 808 static void stmpe_irq_sync_unlock(struct irq_data *data)
 809 {
 810         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 811         struct stmpe_variant_info *variant = stmpe->variant;
 812         int num = DIV_ROUND_UP(variant->num_irqs, 8);
 813         int i;
 814
 815         for (i = 0; i < num; i++) {
 816                 u8 new = stmpe->ier[i];
 817                 u8 old = stmpe->oldier[i];
 818
 819                 if (new == old)
 820                         continue;
 821
 822                 stmpe->oldier[i] = new;
 823                 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
 824         }
 825
 826         mutex_unlock(&stmpe->irq_lock);
 827 }
 828
 829 static void stmpe_irq_mask(struct irq_data *data)
 830 {
 831         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 832         int offset = data->hwirq;
 833         int regoffset = offset / 8;
 834         int mask = 1 << (offset % 8);
 835
 836         stmpe->ier[regoffset] &= ~mask;
 837 }
 838
 839 static void stmpe_irq_unmask(struct irq_data *data)
 840 {
 841         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 842         int offset = data->hwirq;
 843         int regoffset = offset / 8;
 844         int mask = 1 << (offset % 8);
 845
 846         stmpe->ier[regoffset] |= mask;
 847 }
 848
 849 static struct irq_chip stmpe_irq_chip = {
 850         .name                   = "stmpe",
 851         .irq_bus_lock           = stmpe_irq_lock,
 852         .irq_bus_sync_unlock    = stmpe_irq_sync_unlock,
 853         .irq_mask               = stmpe_irq_mask,
 854         .irq_unmask             = stmpe_irq_unmask,
 855 };
 856
 857 static int stmpe_irq_map(struct irq_domain *d, unsigned int virq,
 858                                 irq_hw_number_t hwirq)
 859 {
 860         struct stmpe *stmpe = d->host_data;
 861         struct irq_chip *chip = NULL;
 862
 863         if (stmpe->variant->id_val != STMPE801_ID)
 864                 chip = &stmpe_irq_chip;
 865
 866         irq_set_chip_data(virq, stmpe);
 867         irq_set_chip_and_handler(virq, chip, handle_edge_irq);
 868         irq_set_nested_thread(virq, 1);
 869 #ifdef CONFIG_ARM
 870         set_irq_flags(virq, IRQF_VALID);
 871 #else
 872         irq_set_noprobe(virq);
 873 #endif
 874
 875         return 0;
 876 }
 877
 878 static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq)
 879 {
 880 #ifdef CONFIG_ARM
 881                 set_irq_flags(virq, 0);
 882 #endif
 883                 irq_set_chip_and_handler(virq, NULL, NULL);
 884                 irq_set_chip_data(virq, NULL);
 885 }
 886
 887 static struct irq_domain_ops stmpe_irq_ops = {
 888         .map    = stmpe_irq_map,
 889         .unmap  = stmpe_irq_unmap,
 890         .xlate  = irq_domain_xlate_twocell,
 891 };
 892
 893 static int __devinit stmpe_irq_init(struct stmpe *stmpe,
 894                                 struct device_node *np)
 895 {
 896         int base = 0;
 897         int num_irqs = stmpe->variant->num_irqs;
 898
 899         if (!np)
 900                 base = stmpe->irq_base;
 901
 902         stmpe->domain = irq_domain_add_simple(np, num_irqs, base,
 903                                               &stmpe_irq_ops, stmpe);
 904         if (!stmpe->domain) {
 905                 dev_err(stmpe->dev, "Failed to create irqdomain\n");
 906                 return -ENOSYS;
 907         }
 908
 909         return 0;
 910 }
 911
 912 static int __devinit stmpe_chip_init(struct stmpe *stmpe)
 913 {
 914         unsigned int irq_trigger = stmpe->pdata->irq_trigger;
 915         int autosleep_timeout = stmpe->pdata->autosleep_timeout;
 916         struct stmpe_variant_info *variant = stmpe->variant;
 917         u8 icr = 0;
 918         unsigned int id;
 919         u8 data[2];
 920         int ret;
 921
 922         ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
 923                                ARRAY_SIZE(data), data);
 924         if (ret < 0)
 925                 return ret;
 926
 927         id = (data[0] << 8) | data[1];
 928         if ((id & variant->id_mask) != variant->id_val) {
 929                 dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
 930                 return -EINVAL;
 931         }
 932
 933         dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);
 934
 935         /* Disable all modules -- subdrivers should enable what they need. */
 936         ret = stmpe_disable(stmpe, ~0);
 937         if (ret)
 938                 return ret;
 939
 940         if (stmpe->irq >= 0) {
 941                 if (id == STMPE801_ID)
 942                         icr = STMPE801_REG_SYS_CTRL_INT_EN;
 943                 else
 944                         icr = STMPE_ICR_LSB_GIM;
 945
 946                 /* STMPE801 doesn't support Edge interrupts */
 947                 if (id != STMPE801_ID) {
 948                         if (irq_trigger == IRQF_TRIGGER_FALLING ||
 949                                         irq_trigger == IRQF_TRIGGER_RISING)
 950                                 icr |= STMPE_ICR_LSB_EDGE;
 951                 }
 952
 953                 if (irq_trigger == IRQF_TRIGGER_RISING ||
 954                                 irq_trigger == IRQF_TRIGGER_HIGH) {
 955                         if (id == STMPE801_ID)
 956                                 icr |= STMPE801_REG_SYS_CTRL_INT_HI;
 957                         else
 958                                 icr |= STMPE_ICR_LSB_HIGH;
 959                 }
 960         }
 961
 962         if (stmpe->pdata->autosleep) {
 963                 ret = stmpe_autosleep(stmpe, autosleep_timeout);
 964                 if (ret)
 965                         return ret;
 966         }
 967
 968         return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
 969 }
 970
 971 static int __devinit stmpe_add_device(struct stmpe *stmpe,
 972                                       struct mfd_cell *cell)
 973 {
 974         return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
 975                                NULL, stmpe->irq_base, stmpe->domain);
 976 }
 977
 978 static int __devinit stmpe_devices_init(struct stmpe *stmpe)
 979 {
 980         struct stmpe_variant_info *variant = stmpe->variant;
 981         unsigned int platform_blocks = stmpe->pdata->blocks;
 982         int ret = -EINVAL;
 983         int i, j;
 984
 985         for (i = 0; i < variant->num_blocks; i++) {
 986                 struct stmpe_variant_block *block = &variant->blocks[i];
 987
 988                 if (!(platform_blocks & block->block))
 989                         continue;
 990
 991                 for (j = 0; j < block->cell->num_resources; j++) {
 992                         struct resource *res =
 993                                 (struct resource *) &block->cell->resources[j];
 994
 995                         /* Dynamically fill in a variant's IRQ. */
 996                         if (res->flags & IORESOURCE_IRQ)
 997                                 res->start = res->end = block->irq + j;
 998                 }
 999
1000                 platform_blocks &= ~block->block;
1001                 ret = stmpe_add_device(stmpe, block->cell);
1002                 if (ret)
1003                         return ret;
1004         }
1005
1006         if (platform_blocks)
1007                 dev_warn(stmpe->dev,
1008                          "platform wants blocks (%#x) not present on variant",
1009                          platform_blocks);
1010
1011         return ret;
1012 }
1013
1014 void __devinit stmpe_of_probe(struct stmpe_platform_data *pdata,
1015                         struct device_node *np)
1016 {
1017         struct device_node *child;
1018
1019         pdata->id = -1;
1020         pdata->irq_trigger = IRQF_TRIGGER_NONE;
1021
1022         of_property_read_u32(np, "st,autosleep-timeout",
1023                         &pdata->autosleep_timeout);
1024
1025         pdata->autosleep = (pdata->autosleep_timeout) ? true : false;
1026
1027         for_each_child_of_node(np, child) {
1028                 if (!strcmp(child->name, "stmpe_gpio")) {
1029                         pdata->blocks |= STMPE_BLOCK_GPIO;
1030                 } else if (!strcmp(child->name, "stmpe_keypad")) {
1031                         pdata->blocks |= STMPE_BLOCK_KEYPAD;
1032                 } else if (!strcmp(child->name, "stmpe_touchscreen")) {
1033                         pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN;
1034                 } else if (!strcmp(child->name, "stmpe_adc")) {
1035                         pdata->blocks |= STMPE_BLOCK_ADC;
1036                 } else if (!strcmp(child->name, "stmpe_pwm")) {
1037                         pdata->blocks |= STMPE_BLOCK_PWM;
1038                 } else if (!strcmp(child->name, "stmpe_rotator")) {
1039                         pdata->blocks |= STMPE_BLOCK_ROTATOR;
1040                 }
1041         }
1042 }
1043
1044 /* Called from client specific probe routines */
1045 int __devinit stmpe_probe(struct stmpe_client_info *ci, int partnum)
1046 {
1047         struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev);
1048         struct device_node *np = ci->dev->of_node;
1049         struct stmpe *stmpe;
1050         int ret;
1051
1052         if (!pdata) {
1053                 if (!np)
1054                         return -EINVAL;
1055
1056                 pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL);
1057                 if (!pdata)
1058                         return -ENOMEM;
1059
1060                 stmpe_of_probe(pdata, np);
1061         }
1062
1063         stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL);
1064         if (!stmpe)
1065                 return -ENOMEM;
1066
1067         mutex_init(&stmpe->irq_lock);
1068         mutex_init(&stmpe->lock);
1069
1070         stmpe->dev = ci->dev;
1071         stmpe->client = ci->client;
1072         stmpe->pdata = pdata;
1073         stmpe->irq_base = pdata->irq_base;
1074         stmpe->ci = ci;
1075         stmpe->partnum = partnum;
1076         stmpe->variant = stmpe_variant_info[partnum];
1077         stmpe->regs = stmpe->variant->regs;
1078         stmpe->num_gpios = stmpe->variant->num_gpios;
1079         dev_set_drvdata(stmpe->dev, stmpe);
1080
1081         if (ci->init)
1082                 ci->init(stmpe);
1083
1084         if (pdata->irq_over_gpio) {
1085                 ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio,
1086                                 GPIOF_DIR_IN, "stmpe");
1087                 if (ret) {
1088                         dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
1089                                         ret);
1090                         return ret;
1091                 }
1092
1093                 stmpe->irq = gpio_to_irq(pdata->irq_gpio);
1094         } else {
1095                 stmpe->irq = ci->irq;
1096         }
1097
1098         if (stmpe->irq < 0) {
1099                 /* use alternate variant info for no-irq mode, if supported */
1100                 dev_info(stmpe->dev,
1101                         "%s configured in no-irq mode by platform data\n",
1102                         stmpe->variant->name);
1103                 if (!stmpe_noirq_variant_info[stmpe->partnum]) {
1104                         dev_err(stmpe->dev,
1105                                 "%s does not support no-irq mode!\n",
1106                                 stmpe->variant->name);
1107                         return -ENODEV;
1108                 }
1109                 stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum];
1110         } else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) {
1111                 pdata->irq_trigger =
1112                         irqd_get_trigger_type(irq_get_irq_data(stmpe->irq));
1113         }
1114
1115         ret = stmpe_chip_init(stmpe);
1116         if (ret)
1117                 return ret;
1118
1119         if (stmpe->irq >= 0) {
1120                 ret = stmpe_irq_init(stmpe, np);
1121                 if (ret)
1122                         return ret;
1123
1124                 ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL,
1125                                 stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT,
1126                                 "stmpe", stmpe);
1127                 if (ret) {
1128                         dev_err(stmpe->dev, "failed to request IRQ: %d\n",
1129                                         ret);
1130                         return ret;
1131                 }
1132         }
1133
1134         ret = stmpe_devices_init(stmpe);
1135         if (!ret)
1136                 return 0;
1137
1138         dev_err(stmpe->dev, "failed to add children\n");
1139         mfd_remove_devices(stmpe->dev);
1140
1141         return ret;
1142 }
1143
1144 int stmpe_remove(struct stmpe *stmpe)
1145 {
1146         mfd_remove_devices(stmpe->dev);
1147
1148         return 0;
1149 }
1150
1151 #ifdef CONFIG_PM
1152 static int stmpe_suspend(struct device *dev)
1153 {
1154         struct stmpe *stmpe = dev_get_drvdata(dev);
1155
1156         if (stmpe->irq >= 0 && device_may_wakeup(dev))
1157                 enable_irq_wake(stmpe->irq);
1158
1159         return 0;
1160 }
1161
1162 static int stmpe_resume(struct device *dev)
1163 {
1164         struct stmpe *stmpe = dev_get_drvdata(dev);
1165
1166         if (stmpe->irq >= 0 && device_may_wakeup(dev))
1167                 disable_irq_wake(stmpe->irq);
1168
1169         return 0;
1170 }
1171
1172 const struct dev_pm_ops stmpe_dev_pm_ops = {
1173         .suspend        = stmpe_suspend,
1174         .resume         = stmpe_resume,
1175 };
1176 #endif