drivers/mfd/stmpe.c

   1 /*
   2  * ST Microelectronics MFD: stmpe's driver
   3  *
   4  * Copyright (C) ST-Ericsson SA 2010
   5  *
   6  * License Terms: GNU General Public License, version 2
   7  * Author: Rabin Vincent <rabin.vincent@stericsson.com> for ST-Ericsson
   8  */
   9
  10 #include <linux/err.h>
  11 #include <linux/gpio.h>
  12 #include <linux/export.h>
  13 #include <linux/kernel.h>
  14 #include <linux/interrupt.h>
  15 #include <linux/irq.h>
  16 #include <linux/irqdomain.h>
  17 #include <linux/of.h>
  18 #include <linux/of_gpio.h>
  19 #include <linux/pm.h>
  20 #include <linux/slab.h>
  21 #include <linux/mfd/core.h>
  22 #include <linux/delay.h>
  23 #include "stmpe.h"
  24
  25 static int __stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
  26 {
  27         return stmpe->variant->enable(stmpe, blocks, true);
  28 }
  29
  30 static int __stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
  31 {
  32         return stmpe->variant->enable(stmpe, blocks, false);
  33 }
  34
  35 static int __stmpe_reg_read(struct stmpe *stmpe, u8 reg)
  36 {
  37         int ret;
  38
  39         ret = stmpe->ci->read_byte(stmpe, reg);
  40         if (ret < 0)
  41                 dev_err(stmpe->dev, "failed to read reg %#x: %d\n", reg, ret);
  42
  43         dev_vdbg(stmpe->dev, "rd: reg %#x => data %#x\n", reg, ret);
  44
  45         return ret;
  46 }
  47
  48 static int __stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
  49 {
  50         int ret;
  51
  52         dev_vdbg(stmpe->dev, "wr: reg %#x <= %#x\n", reg, val);
  53
  54         ret = stmpe->ci->write_byte(stmpe, reg, val);
  55         if (ret < 0)
  56                 dev_err(stmpe->dev, "failed to write reg %#x: %d\n", reg, ret);
  57
  58         return ret;
  59 }
  60
  61 static int __stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
  62 {
  63         int ret;
  64
  65         ret = __stmpe_reg_read(stmpe, reg);
  66         if (ret < 0)
  67                 return ret;
  68
  69         ret &= ~mask;
  70         ret |= val;
  71
  72         return __stmpe_reg_write(stmpe, reg, ret);
  73 }
  74
  75 static int __stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length,
  76                               u8 *values)
  77 {
  78         int ret;
  79
  80         ret = stmpe->ci->read_block(stmpe, reg, length, values);
  81         if (ret < 0)
  82                 dev_err(stmpe->dev, "failed to read regs %#x: %d\n", reg, ret);
  83
  84         dev_vdbg(stmpe->dev, "rd: reg %#x (%d) => ret %#x\n", reg, length, ret);
  85         stmpe_dump_bytes("stmpe rd: ", values, length);
  86
  87         return ret;
  88 }
  89
  90 static int __stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
  91                         const u8 *values)
  92 {
  93         int ret;
  94
  95         dev_vdbg(stmpe->dev, "wr: regs %#x (%d)\n", reg, length);
  96         stmpe_dump_bytes("stmpe wr: ", values, length);
  97
  98         ret = stmpe->ci->write_block(stmpe, reg, length, values);
  99         if (ret < 0)
 100                 dev_err(stmpe->dev, "failed to write regs %#x: %d\n", reg, ret);
 101
 102         return ret;
 103 }
 104
 105 /**
 106  * stmpe_enable - enable blocks on an STMPE device
 107  * @stmpe:      Device to work on
 108  * @blocks:     Mask of blocks (enum stmpe_block values) to enable
 109  */
 110 int stmpe_enable(struct stmpe *stmpe, unsigned int blocks)
 111 {
 112         int ret;
 113
 114         mutex_lock(&stmpe->lock);
 115         ret = __stmpe_enable(stmpe, blocks);
 116         mutex_unlock(&stmpe->lock);
 117
 118         return ret;
 119 }
 120 EXPORT_SYMBOL_GPL(stmpe_enable);
 121
 122 /**
 123  * stmpe_disable - disable blocks on an STMPE device
 124  * @stmpe:      Device to work on
 125  * @blocks:     Mask of blocks (enum stmpe_block values) to enable
 126  */
 127 int stmpe_disable(struct stmpe *stmpe, unsigned int blocks)
 128 {
 129         int ret;
 130
 131         mutex_lock(&stmpe->lock);
 132         ret = __stmpe_disable(stmpe, blocks);
 133         mutex_unlock(&stmpe->lock);
 134
 135         return ret;
 136 }
 137 EXPORT_SYMBOL_GPL(stmpe_disable);
 138
 139 /**
 140  * stmpe_reg_read() - read a single STMPE register
 141  * @stmpe:      Device to read from
 142  * @reg:        Register to read
 143  */
 144 int stmpe_reg_read(struct stmpe *stmpe, u8 reg)
 145 {
 146         int ret;
 147
 148         mutex_lock(&stmpe->lock);
 149         ret = __stmpe_reg_read(stmpe, reg);
 150         mutex_unlock(&stmpe->lock);
 151
 152         return ret;
 153 }
 154 EXPORT_SYMBOL_GPL(stmpe_reg_read);
 155
 156 /**
 157  * stmpe_reg_write() - write a single STMPE register
 158  * @stmpe:      Device to write to
 159  * @reg:        Register to write
 160  * @val:        Value to write
 161  */
 162 int stmpe_reg_write(struct stmpe *stmpe, u8 reg, u8 val)
 163 {
 164         int ret;
 165
 166         mutex_lock(&stmpe->lock);
 167         ret = __stmpe_reg_write(stmpe, reg, val);
 168         mutex_unlock(&stmpe->lock);
 169
 170         return ret;
 171 }
 172 EXPORT_SYMBOL_GPL(stmpe_reg_write);
 173
 174 /**
 175  * stmpe_set_bits() - set the value of a bitfield in a STMPE register
 176  * @stmpe:      Device to write to
 177  * @reg:        Register to write
 178  * @mask:       Mask of bits to set
 179  * @val:        Value to set
 180  */
 181 int stmpe_set_bits(struct stmpe *stmpe, u8 reg, u8 mask, u8 val)
 182 {
 183         int ret;
 184
 185         mutex_lock(&stmpe->lock);
 186         ret = __stmpe_set_bits(stmpe, reg, mask, val);
 187         mutex_unlock(&stmpe->lock);
 188
 189         return ret;
 190 }
 191 EXPORT_SYMBOL_GPL(stmpe_set_bits);
 192
 193 /**
 194  * stmpe_block_read() - read multiple STMPE registers
 195  * @stmpe:      Device to read from
 196  * @reg:        First register
 197  * @length:     Number of registers
 198  * @values:     Buffer to write to
 199  */
 200 int stmpe_block_read(struct stmpe *stmpe, u8 reg, u8 length, u8 *values)
 201 {
 202         int ret;
 203
 204         mutex_lock(&stmpe->lock);
 205         ret = __stmpe_block_read(stmpe, reg, length, values);
 206         mutex_unlock(&stmpe->lock);
 207
 208         return ret;
 209 }
 210 EXPORT_SYMBOL_GPL(stmpe_block_read);
 211
 212 /**
 213  * stmpe_block_write() - write multiple STMPE registers
 214  * @stmpe:      Device to write to
 215  * @reg:        First register
 216  * @length:     Number of registers
 217  * @values:     Values to write
 218  */
 219 int stmpe_block_write(struct stmpe *stmpe, u8 reg, u8 length,
 220                       const u8 *values)
 221 {
 222         int ret;
 223
 224         mutex_lock(&stmpe->lock);
 225         ret = __stmpe_block_write(stmpe, reg, length, values);
 226         mutex_unlock(&stmpe->lock);
 227
 228         return ret;
 229 }
 230 EXPORT_SYMBOL_GPL(stmpe_block_write);
 231
 232 /**
 233  * stmpe_set_altfunc()- set the alternate function for STMPE pins
 234  * @stmpe:      Device to configure
 235  * @pins:       Bitmask of pins to affect
 236  * @block:      block to enable alternate functions for
 237  *
 238  * @pins is assumed to have a bit set for each of the bits whose alternate
 239  * function is to be changed, numbered according to the GPIOXY numbers.
 240  *
 241  * If the GPIO module is not enabled, this function automatically enables it in
 242  * order to perform the change.
 243  */
 244 int stmpe_set_altfunc(struct stmpe *stmpe, u32 pins, enum stmpe_block block)
 245 {
 246         struct stmpe_variant_info *variant = stmpe->variant;
 247         u8 regaddr = stmpe->regs[STMPE_IDX_GPAFR_U_MSB];
 248         int af_bits = variant->af_bits;
 249         int numregs = DIV_ROUND_UP(stmpe->num_gpios * af_bits, 8);
 250         int mask = (1 << af_bits) - 1;
 251         u8 regs[numregs];
 252         int af, afperreg, ret;
 253
 254         if (!variant->get_altfunc)
 255                 return 0;
 256
 257         afperreg = 8 / af_bits;
 258         mutex_lock(&stmpe->lock);
 259
 260         ret = __stmpe_enable(stmpe, STMPE_BLOCK_GPIO);
 261         if (ret < 0)
 262                 goto out;
 263
 264         ret = __stmpe_block_read(stmpe, regaddr, numregs, regs);
 265         if (ret < 0)
 266                 goto out;
 267
 268         af = variant->get_altfunc(stmpe, block);
 269
 270         while (pins) {
 271                 int pin = __ffs(pins);
 272                 int regoffset = numregs - (pin / afperreg) - 1;
 273                 int pos = (pin % afperreg) * (8 / afperreg);
 274
 275                 regs[regoffset] &= ~(mask << pos);
 276                 regs[regoffset] |= af << pos;
 277
 278                 pins &= ~(1 << pin);
 279         }
 280
 281         ret = __stmpe_block_write(stmpe, regaddr, numregs, regs);
 282
 283 out:
 284         mutex_unlock(&stmpe->lock);
 285         return ret;
 286 }
 287 EXPORT_SYMBOL_GPL(stmpe_set_altfunc);
 288
 289 /*
 290  * GPIO (all variants)
 291  */
 292
 293 static struct resource stmpe_gpio_resources[] = {
 294         /* Start and end filled dynamically */
 295         {
 296                 .flags  = IORESOURCE_IRQ,
 297         },
 298 };
 299
 300 static const struct mfd_cell stmpe_gpio_cell = {
 301         .name           = "stmpe-gpio",
 302         .of_compatible  = "st,stmpe-gpio",
 303         .resources      = stmpe_gpio_resources,
 304         .num_resources  = ARRAY_SIZE(stmpe_gpio_resources),
 305 };
 306
 307 static const struct mfd_cell stmpe_gpio_cell_noirq = {
 308         .name           = "stmpe-gpio",
 309         .of_compatible  = "st,stmpe-gpio",
 310         /* gpio cell resources consist of an irq only so no resources here */
 311 };
 312
 313 /*
 314  * Keypad (1601, 2401, 2403)
 315  */
 316
 317 static struct resource stmpe_keypad_resources[] = {
 318         {
 319                 .name   = "KEYPAD",
 320                 .flags  = IORESOURCE_IRQ,
 321         },
 322         {
 323                 .name   = "KEYPAD_OVER",
 324                 .flags  = IORESOURCE_IRQ,
 325         },
 326 };
 327
 328 static const struct mfd_cell stmpe_keypad_cell = {
 329         .name           = "stmpe-keypad",
 330         .of_compatible  = "st,stmpe-keypad",
 331         .resources      = stmpe_keypad_resources,
 332         .num_resources  = ARRAY_SIZE(stmpe_keypad_resources),
 333 };
 334
 335 /*
 336  * STMPE801
 337  */
 338 static const u8 stmpe801_regs[] = {
 339         [STMPE_IDX_CHIP_ID]     = STMPE801_REG_CHIP_ID,
 340         [STMPE_IDX_ICR_LSB]     = STMPE801_REG_SYS_CTRL,
 341         [STMPE_IDX_GPMR_LSB]    = STMPE801_REG_GPIO_MP_STA,
 342         [STMPE_IDX_GPSR_LSB]    = STMPE801_REG_GPIO_SET_PIN,
 343         [STMPE_IDX_GPCR_LSB]    = STMPE801_REG_GPIO_SET_PIN,
 344         [STMPE_IDX_GPDR_LSB]    = STMPE801_REG_GPIO_DIR,
 345         [STMPE_IDX_IEGPIOR_LSB] = STMPE801_REG_GPIO_INT_EN,
 346         [STMPE_IDX_ISGPIOR_MSB] = STMPE801_REG_GPIO_INT_STA,
 347
 348 };
 349
 350 static struct stmpe_variant_block stmpe801_blocks[] = {
 351         {
 352                 .cell   = &stmpe_gpio_cell,
 353                 .irq    = 0,
 354                 .block  = STMPE_BLOCK_GPIO,
 355         },
 356 };
 357
 358 static struct stmpe_variant_block stmpe801_blocks_noirq[] = {
 359         {
 360                 .cell   = &stmpe_gpio_cell_noirq,
 361                 .block  = STMPE_BLOCK_GPIO,
 362         },
 363 };
 364
 365 static int stmpe801_enable(struct stmpe *stmpe, unsigned int blocks,
 366                            bool enable)
 367 {
 368         if (blocks & STMPE_BLOCK_GPIO)
 369                 return 0;
 370         else
 371                 return -EINVAL;
 372 }
 373
 374 static struct stmpe_variant_info stmpe801 = {
 375         .name           = "stmpe801",
 376         .id_val         = STMPE801_ID,
 377         .id_mask        = 0xffff,
 378         .num_gpios      = 8,
 379         .regs           = stmpe801_regs,
 380         .blocks         = stmpe801_blocks,
 381         .num_blocks     = ARRAY_SIZE(stmpe801_blocks),
 382         .num_irqs       = STMPE801_NR_INTERNAL_IRQS,
 383         .enable         = stmpe801_enable,
 384 };
 385
 386 static struct stmpe_variant_info stmpe801_noirq = {
 387         .name           = "stmpe801",
 388         .id_val         = STMPE801_ID,
 389         .id_mask        = 0xffff,
 390         .num_gpios      = 8,
 391         .regs           = stmpe801_regs,
 392         .blocks         = stmpe801_blocks_noirq,
 393         .num_blocks     = ARRAY_SIZE(stmpe801_blocks_noirq),
 394         .enable         = stmpe801_enable,
 395 };
 396
 397 /*
 398  * Touchscreen (STMPE811 or STMPE610)
 399  */
 400
 401 static struct resource stmpe_ts_resources[] = {
 402         {
 403                 .name   = "TOUCH_DET",
 404                 .flags  = IORESOURCE_IRQ,
 405         },
 406         {
 407                 .name   = "FIFO_TH",
 408                 .flags  = IORESOURCE_IRQ,
 409         },
 410 };
 411
 412 static const struct mfd_cell stmpe_ts_cell = {
 413         .name           = "stmpe-ts",
 414         .of_compatible  = "st,stmpe-ts",
 415         .resources      = stmpe_ts_resources,
 416         .num_resources  = ARRAY_SIZE(stmpe_ts_resources),
 417 };
 418
 419 /*
 420  * STMPE811 or STMPE610
 421  */
 422
 423 static const u8 stmpe811_regs[] = {
 424         [STMPE_IDX_CHIP_ID]     = STMPE811_REG_CHIP_ID,
 425         [STMPE_IDX_ICR_LSB]     = STMPE811_REG_INT_CTRL,
 426         [STMPE_IDX_IER_LSB]     = STMPE811_REG_INT_EN,
 427         [STMPE_IDX_ISR_MSB]     = STMPE811_REG_INT_STA,
 428         [STMPE_IDX_GPMR_LSB]    = STMPE811_REG_GPIO_MP_STA,
 429         [STMPE_IDX_GPSR_LSB]    = STMPE811_REG_GPIO_SET_PIN,
 430         [STMPE_IDX_GPCR_LSB]    = STMPE811_REG_GPIO_CLR_PIN,
 431         [STMPE_IDX_GPDR_LSB]    = STMPE811_REG_GPIO_DIR,
 432         [STMPE_IDX_GPRER_LSB]   = STMPE811_REG_GPIO_RE,
 433         [STMPE_IDX_GPFER_LSB]   = STMPE811_REG_GPIO_FE,
 434         [STMPE_IDX_GPAFR_U_MSB] = STMPE811_REG_GPIO_AF,
 435         [STMPE_IDX_IEGPIOR_LSB] = STMPE811_REG_GPIO_INT_EN,
 436         [STMPE_IDX_ISGPIOR_MSB] = STMPE811_REG_GPIO_INT_STA,
 437         [STMPE_IDX_GPEDR_MSB]   = STMPE811_REG_GPIO_ED,
 438 };
 439
 440 static struct stmpe_variant_block stmpe811_blocks[] = {
 441         {
 442                 .cell   = &stmpe_gpio_cell,
 443                 .irq    = STMPE811_IRQ_GPIOC,
 444                 .block  = STMPE_BLOCK_GPIO,
 445         },
 446         {
 447                 .cell   = &stmpe_ts_cell,
 448                 .irq    = STMPE811_IRQ_TOUCH_DET,
 449                 .block  = STMPE_BLOCK_TOUCHSCREEN,
 450         },
 451 };
 452
 453 static int stmpe811_enable(struct stmpe *stmpe, unsigned int blocks,
 454                            bool enable)
 455 {
 456         unsigned int mask = 0;
 457
 458         if (blocks & STMPE_BLOCK_GPIO)
 459                 mask |= STMPE811_SYS_CTRL2_GPIO_OFF;
 460
 461         if (blocks & STMPE_BLOCK_ADC)
 462                 mask |= STMPE811_SYS_CTRL2_ADC_OFF;
 463
 464         if (blocks & STMPE_BLOCK_TOUCHSCREEN)
 465                 mask |= STMPE811_SYS_CTRL2_TSC_OFF;
 466
 467         return __stmpe_set_bits(stmpe, STMPE811_REG_SYS_CTRL2, mask,
 468                                 enable ? 0 : mask);
 469 }
 470
 471 static int stmpe811_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 472 {
 473         /* 0 for touchscreen, 1 for GPIO */
 474         return block != STMPE_BLOCK_TOUCHSCREEN;
 475 }
 476
 477 static struct stmpe_variant_info stmpe811 = {
 478         .name           = "stmpe811",
 479         .id_val         = 0x0811,
 480         .id_mask        = 0xffff,
 481         .num_gpios      = 8,
 482         .af_bits        = 1,
 483         .regs           = stmpe811_regs,
 484         .blocks         = stmpe811_blocks,
 485         .num_blocks     = ARRAY_SIZE(stmpe811_blocks),
 486         .num_irqs       = STMPE811_NR_INTERNAL_IRQS,
 487         .enable         = stmpe811_enable,
 488         .get_altfunc    = stmpe811_get_altfunc,
 489 };
 490
 491 /* Similar to 811, except number of gpios */
 492 static struct stmpe_variant_info stmpe610 = {
 493         .name           = "stmpe610",
 494         .id_val         = 0x0811,
 495         .id_mask        = 0xffff,
 496         .num_gpios      = 6,
 497         .af_bits        = 1,
 498         .regs           = stmpe811_regs,
 499         .blocks         = stmpe811_blocks,
 500         .num_blocks     = ARRAY_SIZE(stmpe811_blocks),
 501         .num_irqs       = STMPE811_NR_INTERNAL_IRQS,
 502         .enable         = stmpe811_enable,
 503         .get_altfunc    = stmpe811_get_altfunc,
 504 };
 505
 506 /*
 507  * STMPE1601
 508  */
 509
 510 static const u8 stmpe1601_regs[] = {
 511         [STMPE_IDX_CHIP_ID]     = STMPE1601_REG_CHIP_ID,
 512         [STMPE_IDX_ICR_LSB]     = STMPE1601_REG_ICR_LSB,
 513         [STMPE_IDX_IER_LSB]     = STMPE1601_REG_IER_LSB,
 514         [STMPE_IDX_ISR_MSB]     = STMPE1601_REG_ISR_MSB,
 515         [STMPE_IDX_GPMR_LSB]    = STMPE1601_REG_GPIO_MP_LSB,
 516         [STMPE_IDX_GPSR_LSB]    = STMPE1601_REG_GPIO_SET_LSB,
 517         [STMPE_IDX_GPCR_LSB]    = STMPE1601_REG_GPIO_CLR_LSB,
 518         [STMPE_IDX_GPDR_LSB]    = STMPE1601_REG_GPIO_SET_DIR_LSB,
 519         [STMPE_IDX_GPRER_LSB]   = STMPE1601_REG_GPIO_RE_LSB,
 520         [STMPE_IDX_GPFER_LSB]   = STMPE1601_REG_GPIO_FE_LSB,
 521         [STMPE_IDX_GPAFR_U_MSB] = STMPE1601_REG_GPIO_AF_U_MSB,
 522         [STMPE_IDX_IEGPIOR_LSB] = STMPE1601_REG_INT_EN_GPIO_MASK_LSB,
 523         [STMPE_IDX_ISGPIOR_MSB] = STMPE1601_REG_INT_STA_GPIO_MSB,
 524         [STMPE_IDX_GPEDR_MSB]   = STMPE1601_REG_GPIO_ED_MSB,
 525 };
 526
 527 static struct stmpe_variant_block stmpe1601_blocks[] = {
 528         {
 529                 .cell   = &stmpe_gpio_cell,
 530                 .irq    = STMPE1601_IRQ_GPIOC,
 531                 .block  = STMPE_BLOCK_GPIO,
 532         },
 533         {
 534                 .cell   = &stmpe_keypad_cell,
 535                 .irq    = STMPE1601_IRQ_KEYPAD,
 536                 .block  = STMPE_BLOCK_KEYPAD,
 537         },
 538 };
 539
 540 /* supported autosleep timeout delay (in msecs) */
 541 static const int stmpe_autosleep_delay[] = {
 542         4, 16, 32, 64, 128, 256, 512, 1024,
 543 };
 544
 545 static int stmpe_round_timeout(int timeout)
 546 {
 547         int i;
 548
 549         for (i = 0; i < ARRAY_SIZE(stmpe_autosleep_delay); i++) {
 550                 if (stmpe_autosleep_delay[i] >= timeout)
 551                         return i;
 552         }
 553
 554         /*
 555          * requests for delays longer than supported should not return the
 556          * longest supported delay
 557          */
 558         return -EINVAL;
 559 }
 560
 561 static int stmpe_autosleep(struct stmpe *stmpe, int autosleep_timeout)
 562 {
 563         int ret;
 564
 565         if (!stmpe->variant->enable_autosleep)
 566                 return -ENOSYS;
 567
 568         mutex_lock(&stmpe->lock);
 569         ret = stmpe->variant->enable_autosleep(stmpe, autosleep_timeout);
 570         mutex_unlock(&stmpe->lock);
 571
 572         return ret;
 573 }
 574
 575 /*
 576  * Both stmpe 1601/2403 support same layout for autosleep
 577  */
 578 static int stmpe1601_autosleep(struct stmpe *stmpe,
 579                 int autosleep_timeout)
 580 {
 581         int ret, timeout;
 582
 583         /* choose the best available timeout */
 584         timeout = stmpe_round_timeout(autosleep_timeout);
 585         if (timeout < 0) {
 586                 dev_err(stmpe->dev, "invalid timeout\n");
 587                 return timeout;
 588         }
 589
 590         ret = __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
 591                         STMPE1601_AUTOSLEEP_TIMEOUT_MASK,
 592                         timeout);
 593         if (ret < 0)
 594                 return ret;
 595
 596         return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL2,
 597                         STPME1601_AUTOSLEEP_ENABLE,
 598                         STPME1601_AUTOSLEEP_ENABLE);
 599 }
 600
 601 static int stmpe1601_enable(struct stmpe *stmpe, unsigned int blocks,
 602                             bool enable)
 603 {
 604         unsigned int mask = 0;
 605
 606         if (blocks & STMPE_BLOCK_GPIO)
 607                 mask |= STMPE1601_SYS_CTRL_ENABLE_GPIO;
 608
 609         if (blocks & STMPE_BLOCK_KEYPAD)
 610                 mask |= STMPE1601_SYS_CTRL_ENABLE_KPC;
 611
 612         return __stmpe_set_bits(stmpe, STMPE1601_REG_SYS_CTRL, mask,
 613                                 enable ? mask : 0);
 614 }
 615
 616 static int stmpe1601_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 617 {
 618         switch (block) {
 619         case STMPE_BLOCK_PWM:
 620                 return 2;
 621
 622         case STMPE_BLOCK_KEYPAD:
 623                 return 1;
 624
 625         case STMPE_BLOCK_GPIO:
 626         default:
 627                 return 0;
 628         }
 629 }
 630
 631 static struct stmpe_variant_info stmpe1601 = {
 632         .name           = "stmpe1601",
 633         .id_val         = 0x0210,
 634         .id_mask        = 0xfff0,       /* at least 0x0210 and 0x0212 */
 635         .num_gpios      = 16,
 636         .af_bits        = 2,
 637         .regs           = stmpe1601_regs,
 638         .blocks         = stmpe1601_blocks,
 639         .num_blocks     = ARRAY_SIZE(stmpe1601_blocks),
 640         .num_irqs       = STMPE1601_NR_INTERNAL_IRQS,
 641         .enable         = stmpe1601_enable,
 642         .get_altfunc    = stmpe1601_get_altfunc,
 643         .enable_autosleep       = stmpe1601_autosleep,
 644 };
 645
 646 /*
 647  * STMPE1801
 648  */
 649 static const u8 stmpe1801_regs[] = {
 650         [STMPE_IDX_CHIP_ID]     = STMPE1801_REG_CHIP_ID,
 651         [STMPE_IDX_ICR_LSB]     = STMPE1801_REG_INT_CTRL_LOW,
 652         [STMPE_IDX_IER_LSB]     = STMPE1801_REG_INT_EN_MASK_LOW,
 653         [STMPE_IDX_ISR_LSB]     = STMPE1801_REG_INT_STA_LOW,
 654         [STMPE_IDX_GPMR_LSB]    = STMPE1801_REG_GPIO_MP_LOW,
 655         [STMPE_IDX_GPSR_LSB]    = STMPE1801_REG_GPIO_SET_LOW,
 656         [STMPE_IDX_GPCR_LSB]    = STMPE1801_REG_GPIO_CLR_LOW,
 657         [STMPE_IDX_GPDR_LSB]    = STMPE1801_REG_GPIO_SET_DIR_LOW,
 658         [STMPE_IDX_GPRER_LSB]   = STMPE1801_REG_GPIO_RE_LOW,
 659         [STMPE_IDX_GPFER_LSB]   = STMPE1801_REG_GPIO_FE_LOW,
 660         [STMPE_IDX_IEGPIOR_LSB] = STMPE1801_REG_INT_EN_GPIO_MASK_LOW,
 661         [STMPE_IDX_ISGPIOR_LSB] = STMPE1801_REG_INT_STA_GPIO_LOW,
 662 };
 663
 664 static struct stmpe_variant_block stmpe1801_blocks[] = {
 665         {
 666                 .cell   = &stmpe_gpio_cell,
 667                 .irq    = STMPE1801_IRQ_GPIOC,
 668                 .block  = STMPE_BLOCK_GPIO,
 669         },
 670         {
 671                 .cell   = &stmpe_keypad_cell,
 672                 .irq    = STMPE1801_IRQ_KEYPAD,
 673                 .block  = STMPE_BLOCK_KEYPAD,
 674         },
 675 };
 676
 677 static int stmpe1801_enable(struct stmpe *stmpe, unsigned int blocks,
 678                             bool enable)
 679 {
 680         unsigned int mask = 0;
 681         if (blocks & STMPE_BLOCK_GPIO)
 682                 mask |= STMPE1801_MSK_INT_EN_GPIO;
 683
 684         if (blocks & STMPE_BLOCK_KEYPAD)
 685                 mask |= STMPE1801_MSK_INT_EN_KPC;
 686
 687         return __stmpe_set_bits(stmpe, STMPE1801_REG_INT_EN_MASK_LOW, mask,
 688                                 enable ? mask : 0);
 689 }
 690
 691 static int stmpe1801_reset(struct stmpe *stmpe)
 692 {
 693         unsigned long timeout;
 694         int ret = 0;
 695
 696         ret = __stmpe_set_bits(stmpe, STMPE1801_REG_SYS_CTRL,
 697                 STMPE1801_MSK_SYS_CTRL_RESET, STMPE1801_MSK_SYS_CTRL_RESET);
 698         if (ret < 0)
 699                 return ret;
 700
 701         timeout = jiffies + msecs_to_jiffies(100);
 702         while (time_before(jiffies, timeout)) {
 703                 ret = __stmpe_reg_read(stmpe, STMPE1801_REG_SYS_CTRL);
 704                 if (ret < 0)
 705                         return ret;
 706                 if (!(ret & STMPE1801_MSK_SYS_CTRL_RESET))
 707                         return 0;
 708                 usleep_range(100, 200);
 709         }
 710         return -EIO;
 711 }
 712
 713 static struct stmpe_variant_info stmpe1801 = {
 714         .name           = "stmpe1801",
 715         .id_val         = STMPE1801_ID,
 716         .id_mask        = 0xfff0,
 717         .num_gpios      = 18,
 718         .af_bits        = 0,
 719         .regs           = stmpe1801_regs,
 720         .blocks         = stmpe1801_blocks,
 721         .num_blocks     = ARRAY_SIZE(stmpe1801_blocks),
 722         .num_irqs       = STMPE1801_NR_INTERNAL_IRQS,
 723         .enable         = stmpe1801_enable,
 724         /* stmpe1801 do not have any gpio alternate function */
 725         .get_altfunc    = NULL,
 726 };
 727
 728 /*
 729  * STMPE24XX
 730  */
 731
 732 static const u8 stmpe24xx_regs[] = {
 733         [STMPE_IDX_CHIP_ID]     = STMPE24XX_REG_CHIP_ID,
 734         [STMPE_IDX_ICR_LSB]     = STMPE24XX_REG_ICR_LSB,
 735         [STMPE_IDX_IER_LSB]     = STMPE24XX_REG_IER_LSB,
 736         [STMPE_IDX_ISR_MSB]     = STMPE24XX_REG_ISR_MSB,
 737         [STMPE_IDX_GPMR_LSB]    = STMPE24XX_REG_GPMR_LSB,
 738         [STMPE_IDX_GPSR_LSB]    = STMPE24XX_REG_GPSR_LSB,
 739         [STMPE_IDX_GPCR_LSB]    = STMPE24XX_REG_GPCR_LSB,
 740         [STMPE_IDX_GPDR_LSB]    = STMPE24XX_REG_GPDR_LSB,
 741         [STMPE_IDX_GPRER_LSB]   = STMPE24XX_REG_GPRER_LSB,
 742         [STMPE_IDX_GPFER_LSB]   = STMPE24XX_REG_GPFER_LSB,
 743         [STMPE_IDX_GPAFR_U_MSB] = STMPE24XX_REG_GPAFR_U_MSB,
 744         [STMPE_IDX_IEGPIOR_LSB] = STMPE24XX_REG_IEGPIOR_LSB,
 745         [STMPE_IDX_ISGPIOR_MSB] = STMPE24XX_REG_ISGPIOR_MSB,
 746         [STMPE_IDX_GPEDR_MSB]   = STMPE24XX_REG_GPEDR_MSB,
 747 };
 748
 749 static struct stmpe_variant_block stmpe24xx_blocks[] = {
 750         {
 751                 .cell   = &stmpe_gpio_cell,
 752                 .irq    = STMPE24XX_IRQ_GPIOC,
 753                 .block  = STMPE_BLOCK_GPIO,
 754         },
 755         {
 756                 .cell   = &stmpe_keypad_cell,
 757                 .irq    = STMPE24XX_IRQ_KEYPAD,
 758                 .block  = STMPE_BLOCK_KEYPAD,
 759         },
 760 };
 761
 762 static int stmpe24xx_enable(struct stmpe *stmpe, unsigned int blocks,
 763                             bool enable)
 764 {
 765         unsigned int mask = 0;
 766
 767         if (blocks & STMPE_BLOCK_GPIO)
 768                 mask |= STMPE24XX_SYS_CTRL_ENABLE_GPIO;
 769
 770         if (blocks & STMPE_BLOCK_KEYPAD)
 771                 mask |= STMPE24XX_SYS_CTRL_ENABLE_KPC;
 772
 773         return __stmpe_set_bits(stmpe, STMPE24XX_REG_SYS_CTRL, mask,
 774                                 enable ? mask : 0);
 775 }
 776
 777 static int stmpe24xx_get_altfunc(struct stmpe *stmpe, enum stmpe_block block)
 778 {
 779         switch (block) {
 780         case STMPE_BLOCK_ROTATOR:
 781                 return 2;
 782
 783         case STMPE_BLOCK_KEYPAD:
 784                 return 1;
 785
 786         case STMPE_BLOCK_GPIO:
 787         default:
 788                 return 0;
 789         }
 790 }
 791
 792 static struct stmpe_variant_info stmpe2401 = {
 793         .name           = "stmpe2401",
 794         .id_val         = 0x0101,
 795         .id_mask        = 0xffff,
 796         .num_gpios      = 24,
 797         .af_bits        = 2,
 798         .regs           = stmpe24xx_regs,
 799         .blocks         = stmpe24xx_blocks,
 800         .num_blocks     = ARRAY_SIZE(stmpe24xx_blocks),
 801         .num_irqs       = STMPE24XX_NR_INTERNAL_IRQS,
 802         .enable         = stmpe24xx_enable,
 803         .get_altfunc    = stmpe24xx_get_altfunc,
 804 };
 805
 806 static struct stmpe_variant_info stmpe2403 = {
 807         .name           = "stmpe2403",
 808         .id_val         = 0x0120,
 809         .id_mask        = 0xffff,
 810         .num_gpios      = 24,
 811         .af_bits        = 2,
 812         .regs           = stmpe24xx_regs,
 813         .blocks         = stmpe24xx_blocks,
 814         .num_blocks     = ARRAY_SIZE(stmpe24xx_blocks),
 815         .num_irqs       = STMPE24XX_NR_INTERNAL_IRQS,
 816         .enable         = stmpe24xx_enable,
 817         .get_altfunc    = stmpe24xx_get_altfunc,
 818         .enable_autosleep       = stmpe1601_autosleep, /* same as stmpe1601 */
 819 };
 820
 821 static struct stmpe_variant_info *stmpe_variant_info[STMPE_NBR_PARTS] = {
 822         [STMPE610]      = &stmpe610,
 823         [STMPE801]      = &stmpe801,
 824         [STMPE811]      = &stmpe811,
 825         [STMPE1601]     = &stmpe1601,
 826         [STMPE1801]     = &stmpe1801,
 827         [STMPE2401]     = &stmpe2401,
 828         [STMPE2403]     = &stmpe2403,
 829 };
 830
 831 /*
 832  * These devices can be connected in a 'no-irq' configuration - the irq pin
 833  * is not used and the device cannot interrupt the CPU. Here we only list
 834  * devices which support this configuration - the driver will fail probing
 835  * for any devices not listed here which are configured in this way.
 836  */
 837 static struct stmpe_variant_info *stmpe_noirq_variant_info[STMPE_NBR_PARTS] = {
 838         [STMPE801]      = &stmpe801_noirq,
 839 };
 840
 841 static irqreturn_t stmpe_irq(int irq, void *data)
 842 {
 843         struct stmpe *stmpe = data;
 844         struct stmpe_variant_info *variant = stmpe->variant;
 845         int num = DIV_ROUND_UP(variant->num_irqs, 8);
 846         u8 israddr;
 847         u8 isr[num];
 848         int ret;
 849         int i;
 850
 851         if (variant->id_val == STMPE801_ID) {
 852                 int base = irq_create_mapping(stmpe->domain, 0);
 853
 854                 handle_nested_irq(base);
 855                 return IRQ_HANDLED;
 856         }
 857
 858         if (variant->id_val == STMPE1801_ID)
 859                 israddr = stmpe->regs[STMPE_IDX_ISR_LSB];
 860         else
 861                 israddr = stmpe->regs[STMPE_IDX_ISR_MSB];
 862
 863         ret = stmpe_block_read(stmpe, israddr, num, isr);
 864         if (ret < 0)
 865                 return IRQ_NONE;
 866
 867         for (i = 0; i < num; i++) {
 868                 int bank = num - i - 1;
 869                 u8 status = isr[i];
 870                 u8 clear;
 871
 872                 status &= stmpe->ier[bank];
 873                 if (!status)
 874                         continue;
 875
 876                 clear = status;
 877                 while (status) {
 878                         int bit = __ffs(status);
 879                         int line = bank * 8 + bit;
 880                         int nestedirq = irq_create_mapping(stmpe->domain, line);
 881
 882                         handle_nested_irq(nestedirq);
 883                         status &= ~(1 << bit);
 884                 }
 885
 886                 stmpe_reg_write(stmpe, israddr + i, clear);
 887         }
 888
 889         return IRQ_HANDLED;
 890 }
 891
 892 static void stmpe_irq_lock(struct irq_data *data)
 893 {
 894         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 895
 896         mutex_lock(&stmpe->irq_lock);
 897 }
 898
 899 static void stmpe_irq_sync_unlock(struct irq_data *data)
 900 {
 901         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 902         struct stmpe_variant_info *variant = stmpe->variant;
 903         int num = DIV_ROUND_UP(variant->num_irqs, 8);
 904         int i;
 905
 906         for (i = 0; i < num; i++) {
 907                 u8 new = stmpe->ier[i];
 908                 u8 old = stmpe->oldier[i];
 909
 910                 if (new == old)
 911                         continue;
 912
 913                 stmpe->oldier[i] = new;
 914                 stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_IER_LSB] - i, new);
 915         }
 916
 917         mutex_unlock(&stmpe->irq_lock);
 918 }
 919
 920 static void stmpe_irq_mask(struct irq_data *data)
 921 {
 922         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 923         int offset = data->hwirq;
 924         int regoffset = offset / 8;
 925         int mask = 1 << (offset % 8);
 926
 927         stmpe->ier[regoffset] &= ~mask;
 928 }
 929
 930 static void stmpe_irq_unmask(struct irq_data *data)
 931 {
 932         struct stmpe *stmpe = irq_data_get_irq_chip_data(data);
 933         int offset = data->hwirq;
 934         int regoffset = offset / 8;
 935         int mask = 1 << (offset % 8);
 936
 937         stmpe->ier[regoffset] |= mask;
 938 }
 939
 940 static struct irq_chip stmpe_irq_chip = {
 941         .name                   = "stmpe",
 942         .irq_bus_lock           = stmpe_irq_lock,
 943         .irq_bus_sync_unlock    = stmpe_irq_sync_unlock,
 944         .irq_mask               = stmpe_irq_mask,
 945         .irq_unmask             = stmpe_irq_unmask,
 946 };
 947
 948 static int stmpe_irq_map(struct irq_domain *d, unsigned int virq,
 949                                 irq_hw_number_t hwirq)
 950 {
 951         struct stmpe *stmpe = d->host_data;
 952         struct irq_chip *chip = NULL;
 953
 954         if (stmpe->variant->id_val != STMPE801_ID)
 955                 chip = &stmpe_irq_chip;
 956
 957         irq_set_chip_data(virq, stmpe);
 958         irq_set_chip_and_handler(virq, chip, handle_edge_irq);
 959         irq_set_nested_thread(virq, 1);
 960 #ifdef CONFIG_ARM
 961         set_irq_flags(virq, IRQF_VALID);
 962 #else
 963         irq_set_noprobe(virq);
 964 #endif
 965
 966         return 0;
 967 }
 968
 969 static void stmpe_irq_unmap(struct irq_domain *d, unsigned int virq)
 970 {
 971 #ifdef CONFIG_ARM
 972                 set_irq_flags(virq, 0);
 973 #endif
 974                 irq_set_chip_and_handler(virq, NULL, NULL);
 975                 irq_set_chip_data(virq, NULL);
 976 }
 977
 978 static struct irq_domain_ops stmpe_irq_ops = {
 979         .map    = stmpe_irq_map,
 980         .unmap  = stmpe_irq_unmap,
 981         .xlate  = irq_domain_xlate_twocell,
 982 };
 983
 984 static int stmpe_irq_init(struct stmpe *stmpe, struct device_node *np)
 985 {
 986         int base = 0;
 987         int num_irqs = stmpe->variant->num_irqs;
 988
 989         if (!np)
 990                 base = stmpe->irq_base;
 991
 992         stmpe->domain = irq_domain_add_simple(np, num_irqs, base,
 993                                               &stmpe_irq_ops, stmpe);
 994         if (!stmpe->domain) {
 995                 dev_err(stmpe->dev, "Failed to create irqdomain\n");
 996                 return -ENOSYS;
 997         }
 998
 999         return 0;
1000 }
1001
1002 static int stmpe_chip_init(struct stmpe *stmpe)
1003 {
1004         unsigned int irq_trigger = stmpe->pdata->irq_trigger;
1005         int autosleep_timeout = stmpe->pdata->autosleep_timeout;
1006         struct stmpe_variant_info *variant = stmpe->variant;
1007         u8 icr = 0;
1008         unsigned int id;
1009         u8 data[2];
1010         int ret;
1011
1012         ret = stmpe_block_read(stmpe, stmpe->regs[STMPE_IDX_CHIP_ID],
1013                                ARRAY_SIZE(data), data);
1014         if (ret < 0)
1015                 return ret;
1016
1017         id = (data[0] << 8) | data[1];
1018         if ((id & variant->id_mask) != variant->id_val) {
1019                 dev_err(stmpe->dev, "unknown chip id: %#x\n", id);
1020                 return -EINVAL;
1021         }
1022
1023         dev_info(stmpe->dev, "%s detected, chip id: %#x\n", variant->name, id);
1024
1025         /* Disable all modules -- subdrivers should enable what they need. */
1026         ret = stmpe_disable(stmpe, ~0);
1027         if (ret)
1028                 return ret;
1029
1030         if (id == STMPE1801_ID) {
1031                 ret =  stmpe1801_reset(stmpe);
1032                 if (ret < 0)
1033                         return ret;
1034         }
1035
1036         if (stmpe->irq >= 0) {
1037                 if (id == STMPE801_ID)
1038                         icr = STMPE801_REG_SYS_CTRL_INT_EN;
1039                 else
1040                         icr = STMPE_ICR_LSB_GIM;
1041
1042                 /* STMPE801 doesn't support Edge interrupts */
1043                 if (id != STMPE801_ID) {
1044                         if (irq_trigger == IRQF_TRIGGER_FALLING ||
1045                                         irq_trigger == IRQF_TRIGGER_RISING)
1046                                 icr |= STMPE_ICR_LSB_EDGE;
1047                 }
1048
1049                 if (irq_trigger == IRQF_TRIGGER_RISING ||
1050                                 irq_trigger == IRQF_TRIGGER_HIGH) {
1051                         if (id == STMPE801_ID)
1052                                 icr |= STMPE801_REG_SYS_CTRL_INT_HI;
1053                         else
1054                                 icr |= STMPE_ICR_LSB_HIGH;
1055                 }
1056         }
1057
1058         if (stmpe->pdata->autosleep) {
1059                 ret = stmpe_autosleep(stmpe, autosleep_timeout);
1060                 if (ret)
1061                         return ret;
1062         }
1063
1064         return stmpe_reg_write(stmpe, stmpe->regs[STMPE_IDX_ICR_LSB], icr);
1065 }
1066
1067 static int stmpe_add_device(struct stmpe *stmpe, const struct mfd_cell *cell)
1068 {
1069         return mfd_add_devices(stmpe->dev, stmpe->pdata->id, cell, 1,
1070                                NULL, stmpe->irq_base, stmpe->domain);
1071 }
1072
1073 static int stmpe_devices_init(struct stmpe *stmpe)
1074 {
1075         struct stmpe_variant_info *variant = stmpe->variant;
1076         unsigned int platform_blocks = stmpe->pdata->blocks;
1077         int ret = -EINVAL;
1078         int i, j;
1079
1080         for (i = 0; i < variant->num_blocks; i++) {
1081                 struct stmpe_variant_block *block = &variant->blocks[i];
1082
1083                 if (!(platform_blocks & block->block))
1084                         continue;
1085
1086                 for (j = 0; j < block->cell->num_resources; j++) {
1087                         struct resource *res =
1088                                 (struct resource *) &block->cell->resources[j];
1089
1090                         /* Dynamically fill in a variant's IRQ. */
1091                         if (res->flags & IORESOURCE_IRQ)
1092                                 res->start = res->end = block->irq + j;
1093                 }
1094
1095                 platform_blocks &= ~block->block;
1096                 ret = stmpe_add_device(stmpe, block->cell);
1097                 if (ret)
1098                         return ret;
1099         }
1100
1101         if (platform_blocks)
1102                 dev_warn(stmpe->dev,
1103                          "platform wants blocks (%#x) not present on variant",
1104                          platform_blocks);
1105
1106         return ret;
1107 }
1108
1109 static void stmpe_of_probe(struct stmpe_platform_data *pdata,
1110                            struct device_node *np)
1111 {
1112         struct device_node *child;
1113
1114         pdata->id = of_alias_get_id(np, "stmpe-i2c");
1115         if (pdata->id < 0)
1116                 pdata->id = -1;
1117
1118         pdata->irq_trigger = IRQF_TRIGGER_NONE;
1119
1120         of_property_read_u32(np, "st,autosleep-timeout",
1121                         &pdata->autosleep_timeout);
1122
1123         pdata->autosleep = (pdata->autosleep_timeout) ? true : false;
1124
1125         for_each_child_of_node(np, child) {
1126                 if (!strcmp(child->name, "stmpe_gpio")) {
1127                         pdata->blocks |= STMPE_BLOCK_GPIO;
1128                 } else if (!strcmp(child->name, "stmpe_keypad")) {
1129                         pdata->blocks |= STMPE_BLOCK_KEYPAD;
1130                 } else if (!strcmp(child->name, "stmpe_touchscreen")) {
1131                         pdata->blocks |= STMPE_BLOCK_TOUCHSCREEN;
1132                 } else if (!strcmp(child->name, "stmpe_adc")) {
1133                         pdata->blocks |= STMPE_BLOCK_ADC;
1134                 } else if (!strcmp(child->name, "stmpe_pwm")) {
1135                         pdata->blocks |= STMPE_BLOCK_PWM;
1136                 } else if (!strcmp(child->name, "stmpe_rotator")) {
1137                         pdata->blocks |= STMPE_BLOCK_ROTATOR;
1138                 }
1139         }
1140 }
1141
1142 /* Called from client specific probe routines */
1143 int stmpe_probe(struct stmpe_client_info *ci, int partnum)
1144 {
1145         struct stmpe_platform_data *pdata = dev_get_platdata(ci->dev);
1146         struct device_node *np = ci->dev->of_node;
1147         struct stmpe *stmpe;
1148         int ret;
1149
1150         if (!pdata) {
1151                 if (!np)
1152                         return -EINVAL;
1153
1154                 pdata = devm_kzalloc(ci->dev, sizeof(*pdata), GFP_KERNEL);
1155                 if (!pdata)
1156                         return -ENOMEM;
1157
1158                 stmpe_of_probe(pdata, np);
1159
1160                 if (of_find_property(np, "interrupts", NULL) == NULL)
1161                         ci->irq = -1;
1162         }
1163
1164         stmpe = devm_kzalloc(ci->dev, sizeof(struct stmpe), GFP_KERNEL);
1165         if (!stmpe)
1166                 return -ENOMEM;
1167
1168         mutex_init(&stmpe->irq_lock);
1169         mutex_init(&stmpe->lock);
1170
1171         stmpe->dev = ci->dev;
1172         stmpe->client = ci->client;
1173         stmpe->pdata = pdata;
1174         stmpe->irq_base = pdata->irq_base;
1175         stmpe->ci = ci;
1176         stmpe->partnum = partnum;
1177         stmpe->variant = stmpe_variant_info[partnum];
1178         stmpe->regs = stmpe->variant->regs;
1179         stmpe->num_gpios = stmpe->variant->num_gpios;
1180         dev_set_drvdata(stmpe->dev, stmpe);
1181
1182         if (ci->init)
1183                 ci->init(stmpe);
1184
1185         if (pdata->irq_over_gpio) {
1186                 ret = devm_gpio_request_one(ci->dev, pdata->irq_gpio,
1187                                 GPIOF_DIR_IN, "stmpe");
1188                 if (ret) {
1189                         dev_err(stmpe->dev, "failed to request IRQ GPIO: %d\n",
1190                                         ret);
1191                         return ret;
1192                 }
1193
1194                 stmpe->irq = gpio_to_irq(pdata->irq_gpio);
1195         } else {
1196                 stmpe->irq = ci->irq;
1197         }
1198
1199         if (stmpe->irq < 0) {
1200                 /* use alternate variant info for no-irq mode, if supported */
1201                 dev_info(stmpe->dev,
1202                         "%s configured in no-irq mode by platform data\n",
1203                         stmpe->variant->name);
1204                 if (!stmpe_noirq_variant_info[stmpe->partnum]) {
1205                         dev_err(stmpe->dev,
1206                                 "%s does not support no-irq mode!\n",
1207                                 stmpe->variant->name);
1208                         return -ENODEV;
1209                 }
1210                 stmpe->variant = stmpe_noirq_variant_info[stmpe->partnum];
1211         } else if (pdata->irq_trigger == IRQF_TRIGGER_NONE) {
1212                 pdata->irq_trigger = irq_get_trigger_type(stmpe->irq);
1213         }
1214
1215         ret = stmpe_chip_init(stmpe);
1216         if (ret)
1217                 return ret;
1218
1219         if (stmpe->irq >= 0) {
1220                 ret = stmpe_irq_init(stmpe, np);
1221                 if (ret)
1222                         return ret;
1223
1224                 ret = devm_request_threaded_irq(ci->dev, stmpe->irq, NULL,
1225                                 stmpe_irq, pdata->irq_trigger | IRQF_ONESHOT,
1226                                 "stmpe", stmpe);
1227                 if (ret) {
1228                         dev_err(stmpe->dev, "failed to request IRQ: %d\n",
1229                                         ret);
1230                         return ret;
1231                 }
1232         }
1233
1234         ret = stmpe_devices_init(stmpe);
1235         if (!ret)
1236                 return 0;
1237
1238         dev_err(stmpe->dev, "failed to add children\n");
1239         mfd_remove_devices(stmpe->dev);
1240
1241         return ret;
1242 }
1243
1244 int stmpe_remove(struct stmpe *stmpe)
1245 {
1246         mfd_remove_devices(stmpe->dev);
1247
1248         return 0;
1249 }
1250
1251 #ifdef CONFIG_PM
1252 static int stmpe_suspend(struct device *dev)
1253 {
1254         struct stmpe *stmpe = dev_get_drvdata(dev);
1255
1256         if (stmpe->irq >= 0 && device_may_wakeup(dev))
1257                 enable_irq_wake(stmpe->irq);
1258
1259         return 0;
1260 }
1261
1262 static int stmpe_resume(struct device *dev)
1263 {
1264         struct stmpe *stmpe = dev_get_drvdata(dev);
1265
1266         if (stmpe->irq >= 0 && device_may_wakeup(dev))
1267                 disable_irq_wake(stmpe->irq);
1268
1269         return 0;
1270 }
1271
1272 const struct dev_pm_ops stmpe_dev_pm_ops = {
1273         .suspend        = stmpe_suspend,
1274         .resume         = stmpe_resume,
1275 };
1276 #endif