drivers/mfd/twl6030-irq.c

   1 /*
   2  * twl6030-irq.c - TWL6030 irq support
   3  *
   4  * Copyright (C) 2005-2009 Texas Instruments, Inc.
   5  *
   6  * Modifications to defer interrupt handling to a kernel thread:
   7  * Copyright (C) 2006 MontaVista Software, Inc.
   8  *
   9  * Based on tlv320aic23.c:
  10  * Copyright (c) by Kai Svahn <kai.svahn@nokia.com>
  11  *
  12  * Code cleanup and modifications to IRQ handler.
  13  * by syed khasim <x0khasim@ti.com>
  14  *
  15  * TWL6030 specific code and IRQ handling changes by
  16  * Jagadeesh Bhaskar Pakaravoor <j-pakaravoor@ti.com>
  17  * Balaji T K <balajitk@ti.com>
  18  *
  19  * This program is free software; you can redistribute it and/or modify
  20  * it under the terms of the GNU General Public License as published by
  21  * the Free Software Foundation; either version 2 of the License, or
  22  * (at your option) any later version.
  23  *
  24  * This program is distributed in the hope that it will be useful,
  25  * but WITHOUT ANY WARRANTY; without even the implied warranty of
  26  * MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  27  * GNU General Public License for more details.
  28  *
  29  * You should have received a copy of the GNU General Public License
  30  * along with this program; if not, write to the Free Software
  31  * Foundation, Inc., 59 Temple Place, Suite 330, Boston, MA  02111-1307 USA
  32  */
  33
  34 #include <linux/init.h>
  35 #include <linux/export.h>
  36 #include <linux/interrupt.h>
  37 #include <linux/irq.h>
  38 #include <linux/kthread.h>
  39 #include <linux/i2c/twl.h>
  40 #include <linux/platform_device.h>
  41 #include <linux/suspend.h>
  42 #include <linux/of.h>
  43 #include <linux/irqdomain.h>
  44 #include <linux/of_device.h>
  45
  46 #include "twl-core.h"
  47
  48 /*
  49  * TWL6030 (unlike its predecessors, which had two level interrupt handling)
  50  * three interrupt registers INT_STS_A, INT_STS_B and INT_STS_C.
  51  * It exposes status bits saying who has raised an interrupt. There are
  52  * three mask registers that corresponds to these status registers, that
  53  * enables/disables these interrupts.
  54  *
  55  * We set up IRQs starting at a platform-specified base. An interrupt map table,
  56  * specifies mapping between interrupt number and the associated module.
  57  */
  58 #define TWL6030_NR_IRQS    20
  59
  60 static int twl6030_interrupt_mapping[24] = {
  61         PWR_INTR_OFFSET,        /* Bit 0        PWRON                   */
  62         PWR_INTR_OFFSET,        /* Bit 1        RPWRON                  */
  63         PWR_INTR_OFFSET,        /* Bit 2        BAT_VLOW                */
  64         RTC_INTR_OFFSET,        /* Bit 3        RTC_ALARM               */
  65         RTC_INTR_OFFSET,        /* Bit 4        RTC_PERIOD              */
  66         HOTDIE_INTR_OFFSET,     /* Bit 5        HOT_DIE                 */
  67         SMPSLDO_INTR_OFFSET,    /* Bit 6        VXXX_SHORT              */
  68         SMPSLDO_INTR_OFFSET,    /* Bit 7        VMMC_SHORT              */
  69
  70         SMPSLDO_INTR_OFFSET,    /* Bit 8        VUSIM_SHORT             */
  71         BATDETECT_INTR_OFFSET,  /* Bit 9        BAT                     */
  72         SIMDETECT_INTR_OFFSET,  /* Bit 10       SIM                     */
  73         MMCDETECT_INTR_OFFSET,  /* Bit 11       MMC                     */
  74         RSV_INTR_OFFSET,        /* Bit 12       Reserved                */
  75         MADC_INTR_OFFSET,       /* Bit 13       GPADC_RT_EOC            */
  76         MADC_INTR_OFFSET,       /* Bit 14       GPADC_SW_EOC            */
  77         GASGAUGE_INTR_OFFSET,   /* Bit 15       CC_AUTOCAL              */
  78
  79         USBOTG_INTR_OFFSET,     /* Bit 16       ID_WKUP                 */
  80         USBOTG_INTR_OFFSET,     /* Bit 17       VBUS_WKUP               */
  81         USBOTG_INTR_OFFSET,     /* Bit 18       ID                      */
  82         USB_PRES_INTR_OFFSET,   /* Bit 19       VBUS                    */
  83         CHARGER_INTR_OFFSET,    /* Bit 20       CHRG_CTRL               */
  84         CHARGERFAULT_INTR_OFFSET,       /* Bit 21       EXT_CHRG        */
  85         CHARGERFAULT_INTR_OFFSET,       /* Bit 22       INT_CHRG        */
  86         RSV_INTR_OFFSET,        /* Bit 23       Reserved                */
  87 };
  88
  89 static int twl6032_interrupt_mapping[24] = {
  90         PWR_INTR_OFFSET,        /* Bit 0        PWRON                   */
  91         PWR_INTR_OFFSET,        /* Bit 1        RPWRON                  */
  92         PWR_INTR_OFFSET,        /* Bit 2        SYS_VLOW                */
  93         RTC_INTR_OFFSET,        /* Bit 3        RTC_ALARM               */
  94         RTC_INTR_OFFSET,        /* Bit 4        RTC_PERIOD              */
  95         HOTDIE_INTR_OFFSET,     /* Bit 5        HOT_DIE                 */
  96         SMPSLDO_INTR_OFFSET,    /* Bit 6        VXXX_SHORT              */
  97         PWR_INTR_OFFSET,        /* Bit 7        SPDURATION              */
  98
  99         PWR_INTR_OFFSET,        /* Bit 8        WATCHDOG                */
 100         BATDETECT_INTR_OFFSET,  /* Bit 9        BAT                     */
 101         SIMDETECT_INTR_OFFSET,  /* Bit 10       SIM                     */
 102         MMCDETECT_INTR_OFFSET,  /* Bit 11       MMC                     */
 103         MADC_INTR_OFFSET,       /* Bit 12       GPADC_RT_EOC            */
 104         MADC_INTR_OFFSET,       /* Bit 13       GPADC_SW_EOC            */
 105         GASGAUGE_INTR_OFFSET,   /* Bit 14       CC_EOC                  */
 106         GASGAUGE_INTR_OFFSET,   /* Bit 15       CC_AUTOCAL              */
 107
 108         USBOTG_INTR_OFFSET,     /* Bit 16       ID_WKUP                 */
 109         USBOTG_INTR_OFFSET,     /* Bit 17       VBUS_WKUP               */
 110         USBOTG_INTR_OFFSET,     /* Bit 18       ID                      */
 111         USB_PRES_INTR_OFFSET,   /* Bit 19       VBUS                    */
 112         CHARGER_INTR_OFFSET,    /* Bit 20       CHRG_CTRL               */
 113         CHARGERFAULT_INTR_OFFSET,       /* Bit 21       EXT_CHRG        */
 114         CHARGERFAULT_INTR_OFFSET,       /* Bit 22       INT_CHRG        */
 115         RSV_INTR_OFFSET,        /* Bit 23       Reserved                */
 116 };
 117
 118 /*----------------------------------------------------------------------*/
 119
 120 struct twl6030_irq {
 121         unsigned int            irq_base;
 122         int                     twl_irq;
 123         bool                    irq_wake_enabled;
 124         atomic_t                wakeirqs;
 125         struct notifier_block   pm_nb;
 126         struct irq_chip         irq_chip;
 127         struct irq_domain       *irq_domain;
 128         const int               *irq_mapping_tbl;
 129 };
 130
 131 static struct twl6030_irq *twl6030_irq;
 132
 133 static int twl6030_irq_pm_notifier(struct notifier_block *notifier,
 134                                    unsigned long pm_event, void *unused)
 135 {
 136         int chained_wakeups;
 137         struct twl6030_irq *pdata = container_of(notifier, struct twl6030_irq,
 138                                                   pm_nb);
 139
 140         switch (pm_event) {
 141         case PM_SUSPEND_PREPARE:
 142                 chained_wakeups = atomic_read(&pdata->wakeirqs);
 143
 144                 if (chained_wakeups && !pdata->irq_wake_enabled) {
 145                         if (enable_irq_wake(pdata->twl_irq))
 146                                 pr_err("twl6030 IRQ wake enable failed\n");
 147                         else
 148                                 pdata->irq_wake_enabled = true;
 149                 } else if (!chained_wakeups && pdata->irq_wake_enabled) {
 150                         disable_irq_wake(pdata->twl_irq);
 151                         pdata->irq_wake_enabled = false;
 152                 }
 153
 154                 disable_irq(pdata->twl_irq);
 155                 break;
 156
 157         case PM_POST_SUSPEND:
 158                 enable_irq(pdata->twl_irq);
 159                 break;
 160
 161         default:
 162                 break;
 163         }
 164
 165         return NOTIFY_DONE;
 166 }
 167
 168 /*
 169 * Threaded irq handler for the twl6030 interrupt.
 170 * We query the interrupt controller in the twl6030 to determine
 171 * which module is generating the interrupt request and call
 172 * handle_nested_irq for that module.
 173 */
 174 static irqreturn_t twl6030_irq_thread(int irq, void *data)
 175 {
 176         int i, ret;
 177         union {
 178                 u8 bytes[4];
 179                 u32 int_sts;
 180         } sts;
 181         struct twl6030_irq *pdata = data;
 182
 183         /* read INT_STS_A, B and C in one shot using a burst read */
 184         ret = twl_i2c_read(TWL_MODULE_PIH, sts.bytes, REG_INT_STS_A, 3);
 185         if (ret) {
 186                 pr_warn("twl6030_irq: I2C error %d reading PIH ISR\n", ret);
 187                 return IRQ_HANDLED;
 188         }
 189
 190         sts.bytes[3] = 0; /* Only 24 bits are valid*/
 191
 192         /*
 193          * Since VBUS status bit is not reliable for VBUS disconnect
 194          * use CHARGER VBUS detection status bit instead.
 195          */
 196         if (sts.bytes[2] & 0x10)
 197                 sts.bytes[2] |= 0x08;
 198
 199         for (i = 0; sts.int_sts; sts.int_sts >>= 1, i++)
 200                 if (sts.int_sts & 0x1) {
 201                         int module_irq =
 202                                 irq_find_mapping(pdata->irq_domain,
 203                                                  pdata->irq_mapping_tbl[i]);
 204                         if (module_irq)
 205                                 handle_nested_irq(module_irq);
 206                         else
 207                                 pr_err("twl6030_irq: Unmapped PIH ISR %u detected\n",
 208                                        i);
 209                         pr_debug("twl6030_irq: PIH ISR %u, virq%u\n",
 210                                  i, module_irq);
 211                 }
 212
 213         /*
 214          * NOTE:
 215          * Simulation confirms that documentation is wrong w.r.t the
 216          * interrupt status clear operation. A single *byte* write to
 217          * any one of STS_A to STS_C register results in all three
 218          * STS registers being reset. Since it does not matter which
 219          * value is written, all three registers are cleared on a
 220          * single byte write, so we just use 0x0 to clear.
 221          */
 222         ret = twl_i2c_write_u8(TWL_MODULE_PIH, 0x00, REG_INT_STS_A);
 223         if (ret)
 224                 pr_warn("twl6030_irq: I2C error in clearing PIH ISR\n");
 225
 226         return IRQ_HANDLED;
 227 }
 228
 229 /*----------------------------------------------------------------------*/
 230
 231 static int twl6030_irq_set_wake(struct irq_data *d, unsigned int on)
 232 {
 233         struct twl6030_irq *pdata = irq_get_chip_data(d->irq);
 234
 235         if (on)
 236                 atomic_inc(&pdata->wakeirqs);
 237         else
 238                 atomic_dec(&pdata->wakeirqs);
 239
 240         return 0;
 241 }
 242
 243 int twl6030_interrupt_unmask(u8 bit_mask, u8 offset)
 244 {
 245         int ret;
 246         u8 unmask_value;
 247         ret = twl_i2c_read_u8(TWL_MODULE_PIH, &unmask_value,
 248                         REG_INT_STS_A + offset);
 249         unmask_value &= (~(bit_mask));
 250         ret |= twl_i2c_write_u8(TWL_MODULE_PIH, unmask_value,
 251                         REG_INT_STS_A + offset); /* unmask INT_MSK_A/B/C */
 252         return ret;
 253 }
 254 EXPORT_SYMBOL(twl6030_interrupt_unmask);
 255
 256 int twl6030_interrupt_mask(u8 bit_mask, u8 offset)
 257 {
 258         int ret;
 259         u8 mask_value;
 260         ret = twl_i2c_read_u8(TWL_MODULE_PIH, &mask_value,
 261                         REG_INT_STS_A + offset);
 262         mask_value |= (bit_mask);
 263         ret |= twl_i2c_write_u8(TWL_MODULE_PIH, mask_value,
 264                         REG_INT_STS_A + offset); /* mask INT_MSK_A/B/C */
 265         return ret;
 266 }
 267 EXPORT_SYMBOL(twl6030_interrupt_mask);
 268
 269 int twl6030_mmc_card_detect_config(void)
 270 {
 271         int ret;
 272         u8 reg_val = 0;
 273
 274         /* Unmasking the Card detect Interrupt line for MMC1 from Phoenix */
 275         twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
 276                                                 REG_INT_MSK_LINE_B);
 277         twl6030_interrupt_unmask(TWL6030_MMCDETECT_INT_MASK,
 278                                                 REG_INT_MSK_STS_B);
 279         /*
 280          * Initially Configuring MMC_CTRL for receiving interrupts &
 281          * Card status on TWL6030 for MMC1
 282          */
 283         ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val, TWL6030_MMCCTRL);
 284         if (ret < 0) {
 285                 pr_err("twl6030: Failed to read MMCCTRL, error %d\n", ret);
 286                 return ret;
 287         }
 288         reg_val &= ~VMMC_AUTO_OFF;
 289         reg_val |= SW_FC;
 290         ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val, TWL6030_MMCCTRL);
 291         if (ret < 0) {
 292                 pr_err("twl6030: Failed to write MMCCTRL, error %d\n", ret);
 293                 return ret;
 294         }
 295
 296         /* Configuring PullUp-PullDown register */
 297         ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &reg_val,
 298                                                 TWL6030_CFG_INPUT_PUPD3);
 299         if (ret < 0) {
 300                 pr_err("twl6030: Failed to read CFG_INPUT_PUPD3, error %d\n",
 301                                                                         ret);
 302                 return ret;
 303         }
 304         reg_val &= ~(MMC_PU | MMC_PD);
 305         ret = twl_i2c_write_u8(TWL6030_MODULE_ID0, reg_val,
 306                                                 TWL6030_CFG_INPUT_PUPD3);
 307         if (ret < 0) {
 308                 pr_err("twl6030: Failed to write CFG_INPUT_PUPD3, error %d\n",
 309                                                                         ret);
 310                 return ret;
 311         }
 312
 313         return irq_find_mapping(twl6030_irq->irq_domain,
 314                                  MMCDETECT_INTR_OFFSET);
 315 }
 316 EXPORT_SYMBOL(twl6030_mmc_card_detect_config);
 317
 318 int twl6030_mmc_card_detect(struct device *dev, int slot)
 319 {
 320         int ret = -EIO;
 321         u8 read_reg = 0;
 322         struct platform_device *pdev = to_platform_device(dev);
 323
 324         if (pdev->id) {
 325                 /* TWL6030 provide's Card detect support for
 326                  * only MMC1 controller.
 327                  */
 328                 pr_err("Unknown MMC controller %d in %s\n", pdev->id, __func__);
 329                 return ret;
 330         }
 331         /*
 332          * BIT0 of MMC_CTRL on TWL6030 provides card status for MMC1
 333          * 0 - Card not present ,1 - Card present
 334          */
 335         ret = twl_i2c_read_u8(TWL6030_MODULE_ID0, &read_reg,
 336                                                 TWL6030_MMCCTRL);
 337         if (ret >= 0)
 338                 ret = read_reg & STS_MMC;
 339         return ret;
 340 }
 341 EXPORT_SYMBOL(twl6030_mmc_card_detect);
 342
 343 static int twl6030_irq_map(struct irq_domain *d, unsigned int virq,
 344                               irq_hw_number_t hwirq)
 345 {
 346         struct twl6030_irq *pdata = d->host_data;
 347
 348         irq_set_chip_data(virq, pdata);
 349         irq_set_chip_and_handler(virq,  &pdata->irq_chip, handle_simple_irq);
 350         irq_set_nested_thread(virq, true);
 351         irq_set_parent(virq, pdata->twl_irq);
 352
 353 #ifdef CONFIG_ARM
 354         /*
 355          * ARM requires an extra step to clear IRQ_NOREQUEST, which it
 356          * sets on behalf of every irq_chip.  Also sets IRQ_NOPROBE.
 357          */
 358         set_irq_flags(virq, IRQF_VALID);
 359 #else
 360         /* same effect on other architectures */
 361         irq_set_noprobe(virq);
 362 #endif
 363
 364         return 0;
 365 }
 366
 367 static void twl6030_irq_unmap(struct irq_domain *d, unsigned int virq)
 368 {
 369 #ifdef CONFIG_ARM
 370         set_irq_flags(virq, 0);
 371 #endif
 372         irq_set_chip_and_handler(virq, NULL, NULL);
 373         irq_set_chip_data(virq, NULL);
 374 }
 375
 376 static struct irq_domain_ops twl6030_irq_domain_ops = {
 377         .map    = twl6030_irq_map,
 378         .unmap  = twl6030_irq_unmap,
 379         .xlate  = irq_domain_xlate_onetwocell,
 380 };
 381
 382 static const struct of_device_id twl6030_of_match[] = {
 383         {.compatible = "ti,twl6030", &twl6030_interrupt_mapping},
 384         {.compatible = "ti,twl6032", &twl6032_interrupt_mapping},
 385         { },
 386 };
 387
 388 int twl6030_init_irq(struct device *dev, int irq_num)
 389 {
 390         struct                  device_node *node = dev->of_node;
 391         int                     nr_irqs;
 392         int                     status;
 393         u8                      mask[3];
 394         const struct of_device_id *of_id;
 395
 396         of_id = of_match_device(twl6030_of_match, dev);
 397         if (!of_id || !of_id->data) {
 398                 dev_err(dev, "Unknown TWL device model\n");
 399                 return -EINVAL;
 400         }
 401
 402         nr_irqs = TWL6030_NR_IRQS;
 403
 404         twl6030_irq = devm_kzalloc(dev, sizeof(*twl6030_irq), GFP_KERNEL);
 405         if (!twl6030_irq) {
 406                 dev_err(dev, "twl6030_irq: Memory allocation failed\n");
 407                 return -ENOMEM;
 408         }
 409
 410         mask[0] = 0xFF;
 411         mask[1] = 0xFF;
 412         mask[2] = 0xFF;
 413
 414         /* mask all int lines */
 415         status = twl_i2c_write(TWL_MODULE_PIH, &mask[0], REG_INT_MSK_LINE_A, 3);
 416         /* mask all int sts */
 417         status |= twl_i2c_write(TWL_MODULE_PIH, &mask[0], REG_INT_MSK_STS_A, 3);
 418         /* clear INT_STS_A,B,C */
 419         status |= twl_i2c_write(TWL_MODULE_PIH, &mask[0], REG_INT_STS_A, 3);
 420
 421         if (status < 0) {
 422                 dev_err(dev, "I2C err writing TWL_MODULE_PIH: %d\n", status);
 423                 return status;
 424         }
 425
 426         /*
 427          * install an irq handler for each of the modules;
 428          * clone dummy irq_chip since PIH can't *do* anything
 429          */
 430         twl6030_irq->irq_chip = dummy_irq_chip;
 431         twl6030_irq->irq_chip.name = "twl6030";
 432         twl6030_irq->irq_chip.irq_set_type = NULL;
 433         twl6030_irq->irq_chip.irq_set_wake = twl6030_irq_set_wake;
 434
 435         twl6030_irq->pm_nb.notifier_call = twl6030_irq_pm_notifier;
 436         atomic_set(&twl6030_irq->wakeirqs, 0);
 437         twl6030_irq->irq_mapping_tbl = of_id->data;
 438
 439         twl6030_irq->irq_domain =
 440                 irq_domain_add_linear(node, nr_irqs,
 441                                       &twl6030_irq_domain_ops, twl6030_irq);
 442         if (!twl6030_irq->irq_domain) {
 443                 dev_err(dev, "Can't add irq_domain\n");
 444                 return -ENOMEM;
 445         }
 446
 447         dev_info(dev, "PIH (irq %d) nested IRQs\n", irq_num);
 448
 449         /* install an irq handler to demultiplex the TWL6030 interrupt */
 450         status = request_threaded_irq(irq_num, NULL, twl6030_irq_thread,
 451                                       IRQF_ONESHOT, "TWL6030-PIH", twl6030_irq);
 452         if (status < 0) {
 453                 dev_err(dev, "could not claim irq %d: %d\n", irq_num, status);
 454                 goto fail_irq;
 455         }
 456
 457         twl6030_irq->twl_irq = irq_num;
 458         register_pm_notifier(&twl6030_irq->pm_nb);
 459         return 0;
 460
 461 fail_irq:
 462         irq_domain_remove(twl6030_irq->irq_domain);
 463         return status;
 464 }
 465
 466 int twl6030_exit_irq(void)
 467 {
 468         if (twl6030_irq && twl6030_irq->twl_irq) {
 469                 unregister_pm_notifier(&twl6030_irq->pm_nb);
 470                 free_irq(twl6030_irq->twl_irq, NULL);
 471                 /*
 472                  * TODO: IRQ domain and allocated nested IRQ descriptors
 473                  * should be freed somehow here. Now It can't be done, because
 474                  * child devices will not be deleted during removing of
 475                  * TWL Core driver and they will still contain allocated
 476                  * virt IRQs in their Resources tables.
 477                  * The same prevents us from using devm_request_threaded_irq()
 478                  * in this module.
 479                  */
 480         }
 481         return 0;
 482 }
 483