2 * Copyright 2014 IBM Corp.
4 * This program is free software; you can redistribute it and/or
5 * modify it under the terms of the GNU General Public License
6 * as published by the Free Software Foundation; either version
7 * 2 of the License, or (at your option) any later version.
10 #include <linux/pci.h>
14 static int cxl_dma_set_mask(struct pci_dev *pdev, u64 dma_mask)
16 if (dma_mask < DMA_BIT_MASK(64)) {
17 pr_info("%s only 64bit DMA supported on CXL", __func__);
21 *(pdev->dev.dma_mask) = dma_mask;
25 static int cxl_pci_probe_mode(struct pci_bus *bus)
27 return PCI_PROBE_NORMAL;
30 static int cxl_setup_msi_irqs(struct pci_dev *pdev, int nvec, int type)
35 static void cxl_teardown_msi_irqs(struct pci_dev *pdev)
38 * MSI should never be set but need still need to provide this call
43 static bool cxl_pci_enable_device_hook(struct pci_dev *dev)
45 struct pci_controller *phb;
48 phb = pci_bus_to_host(dev->bus);
49 afu = (struct cxl_afu *)phb->private_data;
51 if (!cxl_ops->link_ok(afu->adapter, afu)) {
52 dev_warn(&dev->dev, "%s: Device link is down, refusing to enable AFU\n", __func__);
56 set_dma_ops(&dev->dev, &dma_direct_ops);
57 set_dma_offset(&dev->dev, PAGE_OFFSET);
59 return _cxl_pci_associate_default_context(dev, afu);
62 static resource_size_t cxl_pci_window_alignment(struct pci_bus *bus,
68 static void cxl_pci_reset_secondary_bus(struct pci_dev *dev)
70 /* Should we do an AFU reset here ? */
73 static int cxl_pcie_cfg_record(u8 bus, u8 devfn)
75 return (bus << 8) + devfn;
78 static int cxl_pcie_config_info(struct pci_bus *bus, unsigned int devfn,
79 struct cxl_afu **_afu, int *_record)
81 struct pci_controller *phb;
85 phb = pci_bus_to_host(bus);
87 return PCIBIOS_DEVICE_NOT_FOUND;
89 afu = (struct cxl_afu *)phb->private_data;
90 record = cxl_pcie_cfg_record(bus->number, devfn);
91 if (record > afu->crs_num)
92 return PCIBIOS_DEVICE_NOT_FOUND;
99 static int cxl_pcie_read_config(struct pci_bus *bus, unsigned int devfn,
100 int offset, int len, u32 *val)
108 rc = cxl_pcie_config_info(bus, devfn, &afu, &record);
114 rc = cxl_ops->afu_cr_read8(afu, record, offset, &val8);
118 rc = cxl_ops->afu_cr_read16(afu, record, offset, &val16);
122 rc = cxl_ops->afu_cr_read32(afu, record, offset, &val32);
130 return PCIBIOS_DEVICE_NOT_FOUND;
132 return PCIBIOS_SUCCESSFUL;
135 static int cxl_pcie_write_config(struct pci_bus *bus, unsigned int devfn,
136 int offset, int len, u32 val)
141 rc = cxl_pcie_config_info(bus, devfn, &afu, &record);
147 rc = cxl_ops->afu_cr_write8(afu, record, offset, val & 0xff);
150 rc = cxl_ops->afu_cr_write16(afu, record, offset, val & 0xffff);
153 rc = cxl_ops->afu_cr_write32(afu, record, offset, val);
160 return PCIBIOS_SET_FAILED;
162 return PCIBIOS_SUCCESSFUL;
165 static struct pci_ops cxl_pcie_pci_ops =
167 .read = cxl_pcie_read_config,
168 .write = cxl_pcie_write_config,
172 static struct pci_controller_ops cxl_pci_controller_ops =
174 .probe_mode = cxl_pci_probe_mode,
175 .enable_device_hook = cxl_pci_enable_device_hook,
176 .disable_device = _cxl_pci_disable_device,
177 .release_device = _cxl_pci_disable_device,
178 .window_alignment = cxl_pci_window_alignment,
179 .reset_secondary_bus = cxl_pci_reset_secondary_bus,
180 .setup_msi_irqs = cxl_setup_msi_irqs,
181 .teardown_msi_irqs = cxl_teardown_msi_irqs,
182 .dma_set_mask = cxl_dma_set_mask,
185 int cxl_pci_vphb_add(struct cxl_afu *afu)
187 struct pci_controller *phb;
188 struct device_node *vphb_dn;
189 struct device *parent;
192 * If there are no AFU configuration records we won't have anything to
193 * expose under the vPHB, so skip creating one, returning success since
194 * this is still a valid case. This will also opt us out of EEH
195 * handling since we won't have anything special to do if there are no
196 * kernel drivers attached to the vPHB, and EEH handling is not yet
197 * supported in the peer model.
202 /* The parent device is the adapter. Reuse the device node of
204 * We don't seem to care what device node is used for the vPHB,
205 * but tools such as lsvpd walk up the device parents looking
206 * for a valid location code, so we might as well show devices
207 * attached to the adapter as being located on that adapter.
209 parent = afu->adapter->dev.parent;
210 vphb_dn = parent->of_node;
212 /* Alloc and setup PHB data structure */
213 phb = pcibios_alloc_controller(vphb_dn);
217 /* Setup parent in sysfs */
218 phb->parent = parent;
220 /* Setup the PHB using arch provided callback */
221 phb->ops = &cxl_pcie_pci_ops;
222 phb->cfg_addr = NULL;
224 phb->private_data = afu;
225 phb->controller_ops = cxl_pci_controller_ops;
228 pcibios_scan_phb(phb);
229 if (phb->bus == NULL)
232 /* Claim resources. This might need some rework as well depending
233 * whether we are doing probe-only or not, like assigning unassigned
236 pcibios_claim_one_bus(phb->bus);
238 /* Add probed PCI devices to the device model */
239 pci_bus_add_devices(phb->bus);
246 void cxl_pci_vphb_remove(struct cxl_afu *afu)
248 struct pci_controller *phb;
250 /* If there is no configuration record we won't have one of these */
251 if (!afu || !afu->phb)
257 pci_remove_root_bus(phb->bus);
258 pcibios_free_controller(phb);
261 bool cxl_pci_is_vphb_device(struct pci_dev *dev)
263 struct pci_controller *phb;
265 phb = pci_bus_to_host(dev->bus);
267 return (phb->ops == &cxl_pcie_pci_ops);
270 struct cxl_afu *cxl_pci_to_afu(struct pci_dev *dev)
272 struct pci_controller *phb;
274 phb = pci_bus_to_host(dev->bus);
276 return (struct cxl_afu *)phb->private_data;
278 EXPORT_SYMBOL_GPL(cxl_pci_to_afu);
280 unsigned int cxl_pci_to_cfg_record(struct pci_dev *dev)
282 return cxl_pcie_cfg_record(dev->bus->number, dev->devfn);
284 EXPORT_SYMBOL_GPL(cxl_pci_to_cfg_record);