2 * at25.c -- support most SPI EEPROMs, such as Atmel AT25 models
4 * Copyright (C) 2006 David Brownell
6 * This program is free software; you can redistribute it and/or modify
7 * it under the terms of the GNU General Public License as published by
8 * the Free Software Foundation; either version 2 of the License, or
9 * (at your option) any later version.
12 #include <linux/kernel.h>
13 #include <linux/init.h>
14 #include <linux/module.h>
15 #include <linux/slab.h>
16 #include <linux/delay.h>
17 #include <linux/device.h>
18 #include <linux/sched.h>
20 #include <linux/spi/spi.h>
21 #include <linux/spi/eeprom.h>
25 * NOTE: this is an *EEPROM* driver. The vagaries of product naming
26 * mean that some AT25 products are EEPROMs, and others are FLASH.
27 * Handle FLASH chips with the drivers/mtd/devices/m25p80.c driver,
32 struct spi_device *spi;
33 struct memory_accessor mem;
35 struct spi_eeprom chip;
36 struct bin_attribute bin;
40 #define AT25_WREN 0x06 /* latch the write enable */
41 #define AT25_WRDI 0x04 /* reset the write enable */
42 #define AT25_RDSR 0x05 /* read status register */
43 #define AT25_WRSR 0x01 /* write status register */
44 #define AT25_READ 0x03 /* read byte(s) */
45 #define AT25_WRITE 0x02 /* write byte(s)/sector */
47 #define AT25_SR_nRDY 0x01 /* nRDY = write-in-progress */
48 #define AT25_SR_WEN 0x02 /* write enable (latched) */
49 #define AT25_SR_BP0 0x04 /* BP for software writeprotect */
50 #define AT25_SR_BP1 0x08
51 #define AT25_SR_WPEN 0x80 /* writeprotect enable */
53 #define AT25_INSTR_BIT3 0x08 /* Additional address bit in instr */
55 #define EE_MAXADDRLEN 3 /* 24 bit addresses, up to 2 MBytes */
57 /* Specs often allow 5 msec for a page write, sometimes 20 msec;
58 * it's important to recover from write timeouts.
62 /*-------------------------------------------------------------------------*/
64 #define io_limit PAGE_SIZE /* bytes */
68 struct at25_data *at25,
74 u8 command[EE_MAXADDRLEN + 1];
77 struct spi_transfer t[2];
81 if (unlikely(offset >= at25->bin.size))
83 if ((offset + count) > at25->bin.size)
84 count = at25->bin.size - offset;
91 if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
92 if (offset >= (1U << (at25->addrlen * 8)))
93 instr |= AT25_INSTR_BIT3;
96 /* 8/16/24-bit address is written MSB first */
97 switch (at25->addrlen) {
103 case 0: /* can't happen: for better codegen */
107 spi_message_init(&m);
108 memset(t, 0, sizeof t);
110 t[0].tx_buf = command;
111 t[0].len = at25->addrlen + 1;
112 spi_message_add_tail(&t[0], &m);
116 spi_message_add_tail(&t[1], &m);
118 mutex_lock(&at25->lock);
120 /* Read it all at once.
122 * REVISIT that's potentially a problem with large chips, if
123 * other devices on the bus need to be accessed regularly or
124 * this chip is clocked very slowly
126 status = spi_sync(at25->spi, &m);
127 dev_dbg(&at25->spi->dev,
128 "read %Zd bytes at %d --> %d\n",
129 count, offset, (int) status);
131 mutex_unlock(&at25->lock);
132 return status ? status : count;
136 at25_bin_read(struct file *filp, struct kobject *kobj,
137 struct bin_attribute *bin_attr,
138 char *buf, loff_t off, size_t count)
141 struct at25_data *at25;
143 dev = container_of(kobj, struct device, kobj);
144 at25 = dev_get_drvdata(dev);
146 return at25_ee_read(at25, buf, off, count);
151 at25_ee_write(struct at25_data *at25, const char *buf, loff_t off,
155 unsigned written = 0;
159 if (unlikely(off >= at25->bin.size))
161 if ((off + count) > at25->bin.size)
162 count = at25->bin.size - off;
163 if (unlikely(!count))
166 /* Temp buffer starts with command and address */
167 buf_size = at25->chip.page_size;
168 if (buf_size > io_limit)
170 bounce = kmalloc(buf_size + at25->addrlen + 1, GFP_KERNEL);
174 /* For write, rollover is within the page ... so we write at
175 * most one page, then manually roll over to the next page.
177 mutex_lock(&at25->lock);
179 unsigned long timeout, retries;
181 unsigned offset = (unsigned) off;
187 status = spi_write(at25->spi, cp, 1);
189 dev_dbg(&at25->spi->dev, "WREN --> %d\n",
195 if (at25->chip.flags & EE_INSTR_BIT3_IS_ADDR)
196 if (offset >= (1U << (at25->addrlen * 8)))
197 instr |= AT25_INSTR_BIT3;
200 /* 8/16/24-bit address is written MSB first */
201 switch (at25->addrlen) {
202 default: /* case 3 */
203 *cp++ = offset >> 16;
207 case 0: /* can't happen: for better codegen */
211 /* Write as much of a page as we can */
212 segment = buf_size - (offset % buf_size);
215 memcpy(cp, buf, segment);
216 status = spi_write(at25->spi, bounce,
217 segment + at25->addrlen + 1);
218 dev_dbg(&at25->spi->dev,
219 "write %u bytes at %u --> %d\n",
220 segment, offset, (int) status);
224 /* REVISIT this should detect (or prevent) failed writes
225 * to readonly sections of the EEPROM...
228 /* Wait for non-busy status */
229 timeout = jiffies + msecs_to_jiffies(EE_TIMEOUT);
233 sr = spi_w8r8(at25->spi, AT25_RDSR);
234 if (sr < 0 || (sr & AT25_SR_nRDY)) {
235 dev_dbg(&at25->spi->dev,
236 "rdsr --> %d (%02x)\n", sr, sr);
237 /* at HZ=100, this is sloooow */
241 if (!(sr & AT25_SR_nRDY))
243 } while (retries++ < 3 || time_before_eq(jiffies, timeout));
245 if ((sr < 0) || (sr & AT25_SR_nRDY)) {
246 dev_err(&at25->spi->dev,
247 "write %d bytes offset %d, "
248 "timeout after %u msecs\n",
250 jiffies_to_msecs(jiffies -
251 (timeout - EE_TIMEOUT)));
263 mutex_unlock(&at25->lock);
266 return written ? written : status;
270 at25_bin_write(struct file *filp, struct kobject *kobj,
271 struct bin_attribute *bin_attr,
272 char *buf, loff_t off, size_t count)
275 struct at25_data *at25;
277 dev = container_of(kobj, struct device, kobj);
278 at25 = dev_get_drvdata(dev);
280 return at25_ee_write(at25, buf, off, count);
283 /*-------------------------------------------------------------------------*/
285 /* Let in-kernel code access the eeprom data. */
287 static ssize_t at25_mem_read(struct memory_accessor *mem, char *buf,
288 off_t offset, size_t count)
290 struct at25_data *at25 = container_of(mem, struct at25_data, mem);
292 return at25_ee_read(at25, buf, offset, count);
295 static ssize_t at25_mem_write(struct memory_accessor *mem, const char *buf,
296 off_t offset, size_t count)
298 struct at25_data *at25 = container_of(mem, struct at25_data, mem);
300 return at25_ee_write(at25, buf, offset, count);
303 /*-------------------------------------------------------------------------*/
305 static int at25_probe(struct spi_device *spi)
307 struct at25_data *at25 = NULL;
308 const struct spi_eeprom *chip;
313 /* Chip description */
314 chip = spi->dev.platform_data;
316 dev_dbg(&spi->dev, "no chip description\n");
321 /* For now we only support 8/16/24 bit addressing */
322 if (chip->flags & EE_ADDR1)
324 else if (chip->flags & EE_ADDR2)
326 else if (chip->flags & EE_ADDR3)
329 dev_dbg(&spi->dev, "unsupported address type\n");
334 /* Ping the chip ... the status register is pretty portable,
335 * unlike probing manufacturer IDs. We do expect that system
336 * firmware didn't write it in the past few milliseconds!
338 sr = spi_w8r8(spi, AT25_RDSR);
339 if (sr < 0 || sr & AT25_SR_nRDY) {
340 dev_dbg(&spi->dev, "rdsr --> %d (%02x)\n", sr, sr);
345 if (!(at25 = kzalloc(sizeof *at25, GFP_KERNEL))) {
350 mutex_init(&at25->lock);
352 at25->spi = spi_dev_get(spi);
353 dev_set_drvdata(&spi->dev, at25);
354 at25->addrlen = addrlen;
356 /* Export the EEPROM bytes through sysfs, since that's convenient.
357 * And maybe to other kernel code; it might hold a board's Ethernet
358 * address, or board-specific calibration data generated on the
359 * manufacturing floor.
361 * Default to root-only access to the data; EEPROMs often hold data
362 * that's sensitive for read and/or write, like ethernet addresses,
363 * security codes, board-specific manufacturing calibrations, etc.
365 sysfs_bin_attr_init(&at25->bin);
366 at25->bin.attr.name = "eeprom";
367 at25->bin.attr.mode = S_IRUSR;
368 at25->bin.read = at25_bin_read;
369 at25->mem.read = at25_mem_read;
371 at25->bin.size = at25->chip.byte_len;
372 if (!(chip->flags & EE_READONLY)) {
373 at25->bin.write = at25_bin_write;
374 at25->bin.attr.mode |= S_IWUSR;
375 at25->mem.write = at25_mem_write;
378 err = sysfs_create_bin_file(&spi->dev.kobj, &at25->bin);
383 chip->setup(&at25->mem, chip->context);
385 dev_info(&spi->dev, "%Zd %s %s eeprom%s, pagesize %u\n",
386 (at25->bin.size < 1024)
388 : (at25->bin.size / 1024),
389 (at25->bin.size < 1024) ? "Byte" : "KByte",
391 (chip->flags & EE_READONLY) ? " (readonly)" : "",
392 at25->chip.page_size);
395 dev_dbg(&spi->dev, "probe err %d\n", err);
400 static int __devexit at25_remove(struct spi_device *spi)
402 struct at25_data *at25;
404 at25 = dev_get_drvdata(&spi->dev);
405 sysfs_remove_bin_file(&spi->dev.kobj, &at25->bin);
410 /*-------------------------------------------------------------------------*/
412 static struct spi_driver at25_driver = {
415 .owner = THIS_MODULE,
418 .remove = __devexit_p(at25_remove),
421 module_spi_driver(at25_driver);
423 MODULE_DESCRIPTION("Driver for most SPI EEPROMs");
424 MODULE_AUTHOR("David Brownell");
425 MODULE_LICENSE("GPL");
426 MODULE_ALIAS("spi:at25");